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The purpose of this demo application is to present a usage of the
LPSPI IP Driver for the S32K3xx MCU.
The example uses LPSPI2 for transmit & receive Twelve bytes using the DMA.
MOSI MISO connected on Hardware in loopback.
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* Test HW: S32K3X2EVB-Q172
* MCU: S32K312
* Compiler: S32DS3.5
* SDK release: RTD 3.0.0
* Debugger: PE micro
* Target: internal_FLASH
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DATA and Instruction CACHE is enabled by default --> in startup code :--
========= This selection enable the use of CACHE driver API =========
============= Use this MACRO ====================
#define USE_NON_CHACHABLE_REGION 1
This MACRO comment & uncomment will allocate the buffer in cachable & non cacable region of memory. You can allocate the SPI buffer in in cachable & non cacable region of memory.
Enabling & disabling of this MACRO will adjust the example code.
============ How this example works : Cacheable region used ============
I have connected MOSI and MISO pins of spi at hardware level.
Whenever I am sending and receiving total 10 numbers of 12 byte packet
On each transmission of 12 byte packet I am incrementing the first bite of transmit buffer just to distinguish between packets at the receive side
Cache_Ip_InvalidateByAddr() --> I have to call this API every time I receive 12 byte of data on receive buffer
Cache_Ip_CleanByAddr() --> every time after incrementing the transmit buffer first byte ...I have to call this API then only the correct data is transmitted otherwise it will transmit the same data which was available at first time transfer
================ Cache API operation ==============
- Cache_Ip_InvalidateByAddr() is for the invalidate operation.
- Cache_Ip_CleanByAddr() is for the clean operation or clean&invalidate operation that can be chosen by param of this api: @Param[in] enInvalidate Specifies to execute operation Clean&Invalidate.
Clean: This operation ensures that all dirty lines—data in the cache that has been modified but not yet written back to the main memory—are written back to the main memory ->(push data from cache memory to main memory)
Invalidate: This operation marks the cache lines as invalid, ensuring that any subsequent access to these lines results in a fetch from the main memory, thus ensuring data consistency ->(push data from main memory to cache memory)
Clean&invalidate : A cache clean and invalidate operation behaves as the execution of a clean operation followed immediately by an invalidate operation. Both operations are performed to the same location.
================ Pins used ======================
