***************************************************************************** *Detailed Description: *This example will show you how to configure Wdg_fs23 Driver. *Sbc_fs23_InitDriver, Sbc_fs23_GoToInitState, Wdg_43_fs23_Init, Sbc_fs23_InitDevice initialize the Sbc device and external Wdg in SLOW MODE(This mode can e.g. be used during system startup/initialization phase). *Sbc_fs23_InitDevice release FS0B, according to the configuration in Sbc_fs23 WatchdogConfig tab: Release safety outputs after init *Sbc_fs23_TimeDelay delay for an amount of time, allow Gpt ISR to trigger watchdog externally. *Wdg_43_fs23_SetMode(WDGIF_FAST_MODE); switch Wdg operation mode to FAST MODE(This mode can e.g. be used during normal operations of the ECU). *Wdg_43_fs23_SetTriggerCondition(10000U); sets a new timeout value to 10 seconds, during which Wdg_fs23_Cbk_GptNotification0 continuously refresh the watchdog. *To demonstrate the watchdog timeout, Wdg_43_fs23_SetTriggerCondition was not called again to set a new timeout value, and Wdg_fs23_Cbk_GptNotification0 no longer refreshed the watchdog. *The watchdog error counter(WD_ERR_CNT) continues to increase reached its maximum value(WD_ERR_LIMIT), causing fault error counter(FLT_ERR_CNT) to increment by 1. *FS23 eventually enters fail-safe mode because FLT_ERR_CNT >= max. At this point, it was observed that LEDs V1 (D7), V2 (D8), and V3 (D9) of KITFS23SKTEVM were turned off. *The SPI data between FS23 and S32K311 are captured and attached to the project. *------------------------------------------------------------------------------ *Test HW: * S32K31XEVB-Q100 Board SCH-55131 REV A P32K311HV 0P98C * KITFS23SKTEVM Dev-kit SCH-53096 REV B2 MFS2320BMBB1EP * My S32K31XEVB-Q100 has an onboard PFS2320A0L1W1, but Step 13/14 of AN14041 mention that A0 devices are not supported, so S32K311 communicate with the FS23 on the KITFS23SKTEVM. *Connections: KITFS23SKTEVM | S32K31XEVB-Q100 ------------------------------|-------------------- SPI_CSB J28-2 | J12-5(PTB-17) SPI_MOSI J29-2 | J12-7(PTB-16) SPI_SCK J31-2 | J12-11(PTB-14) SPI_MISO J32-2 | J12.9(PTB-15) VCC J6-1 | J40-15 GND J6-2 | J40-13 - KITFS23SKTEVM: SW1 - position 2-3 , J30 - ON, J26 5-6 ON, J26 9-10 ON . - Connect KITFS23SKTEVM Dev-kit and S32K3 MCU via on-board Arduino headers. *SDK: * S32K3 RTD 4.0.0 (SW32K3_S32M27x_RTD_R21-11_4.0.0_D2311_DS_updatesite.zip) * FS23 RTD 1.0.0 (S32K3xx_SBC_FS23_R21-11_1.0.0_D2508_DesignStudio_updatesite.zip) *Debugger: S32DS 3.5.8, OpenSDA/ PEmicro Multilink Universal FX *Target: internal_FLASH *Reference: * AN14041 FS23 quick start guide (Rev. 2.0 — 23 January 2025) * AN14129 FS23 implementation and behaviors (Rev. 2.0 — 13 December 2024) * FS23, Safety System Basis Chip (SBC) with Power Management, CAN FD and LIN Transceivers Data Sheet (Rev. 8.0 — 30 June 2025) * RTD_SBC_FS23_UM.pdf C:\NXP\S32DS.3.5\S32DS\software\PlatformSDK_S32K3\SW32K3_FS23_R21-11_1.0.0_D2312\Sbc_fs23_TS_T40D34M10I0R0\doc * RTD_WDG_43_FS23_UM.pdf C:\NXP\S32DS.3.5\S32DS\software\PlatformSDK_S32K3\SW32K3_FS23_R21-11_1.0.0_D2312\Wdg_43_fs23_TS_T40D34M10I0R0\doc * AUTOSAR_SWS_WatchdogDriver.pdf https://www.autosar.org/fileadmin/standards/R21-11/CP/AUTOSAR_SWS_WatchdogDriver.pdf * This example is migrated from Wdg_fs23_example_HLD_S32K344. The method of migrating refers to the video "2.S32DS CT MCAL demo porting K344 to K312 based on RTD500": https://community.nxp.com/t5/S32K-Knowledge-Base/S32K3-Tools-Part-How-to-port-RTD-s-existing-MCAL-demo-to-other/ta-p/1966315 *****************************************************************************

***************************************************************************** *Detailed Description: *This example will show you how to configure Sbc_fs23 Driver. *It initialization of Sbc_fs23 with watchdog window disabled. The Sbc_fs23_InitDevice() must be done within the dedicated 256 ms INIT window. *It Disable regulator V2, then re-enable it again. FS0b pin is asserted due to V2 Undervoltage reaction setting configured in FailSafe Init Configuration tab. *If the example runs without errors, the D12 LED on S32K31XEVB-Q100 will light up Green; otherwise, it will light up Red. *The SPI data between FS23 and S32K311 are captured and attached to the project. *Use the analog input of a logic analyzer or an oscilloscope to monitor the signals of FS23_V2 (TP27) and FS23_FS0 (TP8) on the KITFS23SKTEVM board. *This example is migrated from Sbc_fs23_example_HLD_S32K344 *The method of migrating refers to the video "2.S32DS CT MCAL demo porting K344 to K312 based on RTD500": https://community.nxp.com/t5/S32K-Knowledge-Base/S32K3-Tools-Part-How-to-port-RTD-s-existing-MCAL-demo-to-other/ta-p/1966315 *------------------------------------------------------------------------------ *Test HW: * S32K31XEVB-Q100 Board SCH-55131 REV A P32K311HV 0P98C * KITFS23SKTEVM Dev-kit SCH-53096 REV B2 MFS2320BMBB1EP * My S32K31XEVB-Q100 has an onboard PFS2320A0L1W1, but Step 13/14 of AN14041 mention that A0 devices are not supported, so S32K311 communicate with the FS23 on the KITFS23SKTEVM. *Connections: KITFS23SKTEVM | S32K31XEVB-Q100 ------------------------------|-------------------- SPI_CSB J28-2 | J12-5(PTB-17) SPI_MOSI J29-2 | J12-7(PTB-16) SPI_SCK J31-2 | J12-11(PTB-14) SPI_MISO J32-2 | J12.9(PTB-15) VCC J6-1 | J40-15 GND J6-2 | J40-13 - KITFS23SKTEVM: SW1 - position 2-3 , J30 - ON, J26 5-6 ON, J26 9-10 ON . - Connect KITFS23SKTEVM Dev-kit and S32K3 MCU via on-board Arduino headers. *SDK: * S32K3 RTD 4.0.0 (SW32K3_S32M27x_RTD_R21-11_4.0.0_D2311_DS_updatesite.zip) * FS23 RTD 1.0.0 (S32K3xx_SBC_FS23_R21-11_1.0.0_DS_updatesite_D2402_updated_D250115.zip) *Debugger: S32DS 3.5.8, OpenSDA/ PEmicro Multilink Universal FX *Target: internal_FLASH *Reference Documentation: * AN14041 FS23 quick start guide (Rev. 2.0 23 January 2025) * AN14129 FS23 implementation and behaviors (Rev. 2.0 13 December 2024) * FS23, Safety System Basis Chip (SBC) with Power Management, CAN FD and LIN Transceivers Data Sheet (Rev. 8.0 30 June 2025) *****************************************************************************

**************************************************************************************************** * Detailed Description: * This code demonstrates how to inject an ECC (Error Correction Code) fault into either DTCM0 * (Data Tightly Coupled Memory) or SRAM0 using the EIM (ECC Injection Module). * * When the processor reads corrupted data from DTCM0 or SRAM0, an ECC error is detected, resulting in: * - A Bus Fault exception raised by the core. * - An error report generated by the ERM (Error Reporting Module), which can also trigger an interrupt. * * By default, the ERM interrupt has a lower priority than the Bus Fault exception. In this example, * the Bus Fault exception priority is intentionally lowered so that the ERM interrupt is serviced first. * This ensures the system can respond to the ERM interrupt before the core's Bus Fault handler executes. * * IMPORTANT: The interrupt vector table must not reside in SRAM0 or DTCM0 when injecting an * uncorrectable ECC fault into these memories. Otherwise, the ECC fault would corrupt the vector * table during a fetch, leading to unpredictable behavior. * Always check the VTOR (Vector Table Offset Register) * to confirm the vector table location before performing ECC fault injection. * * Memory Selection: * You can select which memory to inject the ECC fault into using the following macros: * #define SRAM0 * #define DTCM0 *************************************************************************************************** * ------------------------------------------------------------------------------------------------* * Test HW: S32K3X4EVB_Q257 * MCU: S32K344, 0P55A * SDK: NA * Debugger: Lauterbach Trace32 * Target: internal_FLASH ****************************************************************************************************

Hi everyone, Welcome to the NXP Tech Days 2025 training session AUT-T437: Hands - On Workshop: Explore Ethernet Integration on the S32K3 Microcontroller. My name is Alejandro Flores Triana (Alex) and I will be your guide during this conference. I am an Automotive Applications Engineer supporting different OEMs, Tier1s, Partners and other internal NXP teams on topics related to communication protocols (e.g. CAN, LIN, SPI, I2C, Ethernet, etc.). The idea of this session is for you to understand how to program the S32K3 Ethernet interface using NXP Real-Time Drivers (RTDs) – Autosar MCAL Layer. We will use a base project and together modify it to create a simple Ethernet application. Therefore, to be ready follow the steps below to get your environment up and running before the session. On your laptop, install the NXP Software environment described in the attached presentation: Hands - On Workshop: S32K3 Ethernet Prerequisites.   Once you have the NXP software environment installed, download the attached project: S32K344_ETH_MCAL_TechDays.exe.   Run the .exe project with administrator rights. Accept the license and install in the desired folder.         Open the NXP Design Studio. Click File -> Import -> Existing Projects into Workspace.   Select root directory and browse the folder where you downloaded the project.   Select Copy projects into workspace. Then, click Finish.   Select the project. Click on the arrow next to the hammer. Click on Debug_FLASH. Then you are ready for the session! See you soon. Best Regards, Alejandro Flores Triana

****************************************************************************************************** * Detailed Description: These demos showcase how to configure the eMIOS module on the S32K3 series, highlighting various operational modes and their implementations using the RTD high-level drivers, commonly known as MCAL drivers. The implementations demonstrated in these examples follow the approach outlined in the community thread:  S32M27x/S32K3 – eMIOS Usage. * Connections:  ******************************************************************************************************* * Test HW: S32K31XEVB-Q100 * MCU: S32K311 * Debugger: S32DS 3.6.2, OpenSDA/ PEmicro Multilink Universal FX  * Target: internal_FLASH ******************************************************************************************************* * Important information:  The OPWMT channel does not support the notification function. In this mode, the Sn[FLAG] bit is only set upon an AS2 match, which defines the generation of a trigger event within the PWM period. As a result, OPWMT mode cannot support notifications based on signal edges. A bus exception may occur during the execution of Mcl_Init() if the eMIOS clock is not properly enabled. To avoid this issue, ensure that the eMIOS peripheral clock is activated in the configuration settings under: MCU driver → McuModuleConfiguration → McuModeSettingConf → McuPeripheral *******************************************************************************************************

**************************************************************************************************** * Detailed Description: * * - CMU errors cannot be injected by any means other than manipulating the CMU thresholds, * except for FXOSC_CLK, which can be physically disrupted on the PCB. * * - CMU_FC_0 (FXOSC_CLK) is configured for **synchronous interrupt** on both LFF and HFF CMU events. * - CMU_FC_3 (CORE_CLK) is configured for **asynchronous destructive reset** triggered only by the LFF event; the HFF event is ignored. * - CMU_FC_4 (CORE_CLK) is configured identically to CMU_3: **asynchronous destructive reset** on LFF only; HFF is ignored. * - CMU_FC_5 (HSE_CLK) can be configured by the HSE_B core only. * Refer to the Reference Manual rev.10, Figure 122. Frequency checking (FC) instances * * - The configuration must be identical in both the MCU MCAL driver and the Clock Configuration Tool (clock details). * - To inject a specific CMU error, define one of the following macros: `INJECT_CMU_0`, `INJECT_CMU_3`, or `INJECT_CMU_4`. * * Behavior After Destructive Reset: * - Following a destructive reset (either `MCU_CORE_CLK_FAIL_RESET` or `MCU_AIPS_PLAT_CLK_FAIL_RESET`), * execution will halt in the `while(wait)` loop. * ------------------------------------------------------------------------------------------------ * Test HW: S32K3X4EVB_Q257 * MCU: S32K344, 0P55A * SDK: RTD 6.0.0 * Debugger: PEMicro Multilink FX * Target: internal_FLASH ****************************************************************************************************

* ================================================================================================== * Detailed Description: * * This example shows how to implement ADC continuous scan with DMA read. * ADC1 is set to perform continuous scan of 4 channels (S10/S11/S12,S13) with DMA request enabled * for last channel S13. DMA reads respective sequential ADC data registers in one major loop. * * ADC1 channel S10 is connected to board's potentiometer, converted value is used to dim board's LED. * * ================================================================================================== * Test HW: S32K312EVB-Q172 * MCU: S32K312_172LQFP * Compiler: S32DS 3.6.3 * RTD release: S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0 * Debugger: On-Board Debugger (J40), Lauterbach * Target: Internal_FLASH * ==================================================================================================   Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.  

Abstract This example presents an use case for complementary PWM outputs with dead-time insertion and hardware ADC triggering using eFlexPWM, TRGMUX, BCTU, SAR-ADC and DMA modules on S32K39-37-36 series based on the RTD low level API to support diverse application needs. Connections: S32K396-BGA-DC1 -> Pin -> Signal -> Label J62-1 -> PTC30 -> siul2_gpio_94 -> GPIO1_GPT J62-5 -> PTD2 -> pwm_0_a, 2 -> PWM1 J62-6 -> PTD3 -> pwm_0_b, 2 -> PWM2 J62-30 -> PTD24 -> pwm_0_a, 0 -> PWMT J62-2 -> PTC31 -> siul2_gpio_95 -> GPIO3_BTCU_Trigger J62-4 -> PTD6 -> siul2_gpio_102 -> GPIO4_BTCU_Watermark J62-24 -> PTB14 -> adc1_s21 -> ADC1 *To use the potentiometer of S32X-MB connect: J62-24 (in S32K396-BGA-DC1) to P26-1 (in S32X-MB)   Note: Following line should be added in project/generate/src/Bctu_Ip_PBcfg.c every time the code is updated in Config Tools: #define DMA_LOGIC_CH_0 ((uint8)0U)   Detailed Description: The Compare Value of GPT eMIOS 0 channel 0 generates a time-out period. Once time-out is reached its eMIOS notification toggles GPIO1. This allows us to observe in scope 2 events, which describe the start and the end of the signal sequence. The eFlexPWM0 module is used for generating PWMs and hardware ADC triggering. The eFlexPWM0 Submodule 2 is employed to generate center-aligned complementary PWM outputs (PWM1 and PWM2) with dead-time insertion. The eFlexPWM0 Submodule 0 generates another independent PWM output (PWMT) and is utilized to generate the trigger signal for analog data capturing within the same PWM period —happens at half the time high in this case—using VAL0 register. The BCTU implements a list for parallel conversions using ADC0 and ADC1. Which is triggered by the eMIOS channel, and the resulting data is stored in FIFO1, as follows: • ADC0: VREFH_ChanNum51 -> BANDGAP_ChanNum48 • ADC1: VREFL_ChanNum50 -> S21_ChanNum45 For debugging purposed the GPIO3 is toggled every BCTU Trigger Notification. Additionally, the GPIO4 is toggled in BCTU Watermark Notification, which happens every time the number of active entries in FIFO exceeds the watermark level, and therefore the data is available for reading. See full signal sequence in Figure 1: Figure 1. Signals of example project When you suspend debug session, in Expressions tab (Figure 2) you can observe results: g_fifo1Result, which corresponds to the BCTU list measurements, meanwhile g_fifo1Volts corresponds to the conversion in volts. Figure 2. Expressions tab of example project   References S32 Design Studio for S32 Platform Real-Time Drivers (RTD) S32K39, S32K37 and S32K36 Data Sheet [S32K39-S32K37-DS] S32K39, S32K37, and S32K36 Reference Manual [S32K396RM] S32K344 to S32K39/S32K37 Migration Guide [AN14301] S32K39/37/36 Electrification Microcontrollers Evaluation Board [S32K396-BGA-DC1] S32X-MB I/O Extension Evaluation Board for Real-Time Domain Control and Actuation [S32X-MB] S32K39-37-36 – eMIOS/BTCU/SAR-ADC/DMA – [RTD600] [S32K Knowledge Base]   Application Software: - S32K396_RTD600_eFlexPWM_TRGMUX_BCTU_SARADC_DMA Example was built and tested using the following IDE and Driver versions: - S32 Design Studio for S32 Platform Version 3.6.3 - S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0

Abstract This example presents an use case for analogue data capturing using eMIOS, BCTU, SAR-ADC and DMA modules on S32K39-37-36 series based on the RTD low level API to support diverse application needs.   Connections: S32K396-BGA-DC1 -> Pin -> Signal -> Label J62-1 -> PTC30 -> siul2_gpio_xx -> GPIO1_GPT (D0) J58-1 -> PTE14 -> emios_0_ch_19_z -> PWM1 J58-2 -> PTG9 -> siul2_gpio_xx -> GPIO2_eMIOS_Trigger J62-2 -> PTC31 -> siul2_gpio_xx -> GPIO3_BTCU_Trigger J62-4 -> PTD6 -> siul2_gpio_xx -> GPIO4_BTCU_Watermark J62-24 -> PTB14 -> adc1_s21 -> ADC1 *To use the potentiometer of S32X-MB connect: J62-24 (in S32K396-BGA-DC1) to P26-1 (in S32X-MB) Note: Following line should be added in project/generate/src/Bctu_Ip_PBcfg.c every time the code is updated in Config Tools: #define DMA_LOGIC_CH_0 ((uint8)0U)   Detailed Description: The Compare Value of GPT eMIOS_0_ch_0 generates a time-out period. Once time-out is reached its Emios Notification toggles GPIO1. This allows us to observe in scope 2 events, which describe the start and the end of the signal sequence. The eMIOS_0_ch_23 channel is configured as global counter bus A. In this setup, it can act as the time base for other eMIOS_0 channels, enabling synchronization between other them—there is just one PWM in this case. This synchronization ensures that channels share the same time base, thereby defining a common period for their operation. The emios_0_ch_19_g channel is configured as OPWMT mode, which offer more flexibility for triggering. An interrupt is requested on every flag event, during which GPIO2 is toggled—happens at half the time high in this case. This flag event, can be configured using Trigger parameter. For more details about eMIOS, please refer to S32M27x/S32K3 – eMIOS Usage, considering differences for porting from S32K3 to S32K39-37-36 in AN14301. The BCTU implements a list for parallel conversions using ADC0 and ADC1. Which is triggered by the eMIOS channel, and the resulting data is stored in FIFO1, as follows: ADC0: VREFH_ChanNum51 -> BANDGAP_ChanNum48 ADC1: VREFL_ChanNum50 -> S21_ChanNum45 For debugging purposed the GPIO3 is toggled every BCTU Trigger Notification. Additionally, the GPIO4 is toggled in BCTU Watermark Notification, which happens every time the number of active entries in FIFO exceeds the watermark level, and therefore the data is available for reading. See full signal sequence in Figure 1: Figure 1. Signals of example project When you suspend debug session, in Expressions tab (Figure 2) you can observe results: g_fifo1Result, which corresponds to the BCTU list measurements, meanwhile g_fifo1Volts corresponds to the conversion in volts. Figure 2. Expressions tab of example project   References S32 Design Studio for S32 Platform Real-Time Drivers (RTD) S32K39, S32K37 and S32K36 Data Sheet [S32K39-S32K37-DS] S32K39, S32K37, and S32K36 Reference Manual [S32K396RM] S32K344 to S32K39/S32K37 Migration Guide [AN14301] S32K39/37/36 Electrification Microcontrollers Evaluation Board [S32K396-BGA-DC1] S32X-MB I/O Extension Evaluation Board for Real-Time Domain Control and Actuation [S32X-MB] S32M27x/S32K3 – eMIOS Usage [S32M Knowledge Base] S32M27x/S32K3 – eMIOS/BTCU/ADC/DMA – [RTD600] [S32M Knowledge Base] S32K39-37-36 – eFlexPWM/TRGMUX/BCTU/SAR-ADC/DMA – [RTD600] [S32M Knowledge Base] Application Software: - S32K396_RTD600_eMIOS_BCTU_SARADC_DMA_Ip_example Example was built and tested using the following IDE and Driver versions: - S32 Design Studio for S32 Platform Version 3.6.3 - S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0

This simple example demonstrates how to configure and handle UART interrupts using the LPUART module on the S32K312-EVB. It sets up a UART callback function and initiates reception in single-byte mode. After each byte is received, the buffer is updated using  Lpuart_Uart_Ip_SetRxBuffer() , unless a newline character ( '\n' ) is detected, in which case a reception flag is set to signal the main loop. When the  LPUART_UART_IP_EVENT_END_TRANSFER  event occurs, reception is re-enabled using  Lpuart_Uart_Ip_AsyncReceive() . Only basic event handling is implemented; other UART events are acknowledged but not processed. The example uses LPUART instance 6, enabling serial communication via the USB port (J40) on the S32K312-EVB. If using TeraTerm, ensure the transmit setting is configured to LF (Line Feed) to properly send newline characters when pressing Enter.  ------------------------------------------------------------------------------ * Test HW: S32K312EVB-Q172 * MCU: S32K312 * IDE: S32DS3.6.2 * RTD release: 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ Test result:

* ================================================================================================== Detailed Description: * This example shows how to implement the UART RX/TX using interrupt/callback under FreeRTOS. * LPUART6 is set for 115200, 8N1 using interrupt processing. Callback is called for single byte received. * Reception is advanced until buffer is full or "\n" is received. * 2 tasks (receive/send) and 1 Queue are created. * ReceiveTask starts new UART reception, waits for completion and puts received message into Queue. * SendTask gets the message from Queue, echoes it back and toggle pin (LED_PIN <-> PTA29). * ================================================================================================== * Test HW: S32K3x4EVB-T172 Rev B * MCU: S32K344_172HDQFP * Compiler: S32DS 3.6.2 * RTD release: S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0 * Debugger: On-Board Debugger (J41) * Target: Internal_FLASH * Serial: 115200, 8N1 * ==================================================================================================   Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.

******************************************************************************** * Detailed Description: * The S32K144 MCU is configured as a LIN Slave node. * When a MasterReq frame (0x3C) is received with Go-to-sleep command, the stack goes to sleep. * The application can read: * l_flg_tst_LI0_MasterReq_flag() * l_ifc_read_status(LI0) * When a falling edge is detected on the LPUART RX pin, * LinWakeUpTimerNotification() is called. * The notification has to be enabled in MEX. * Gpt (LPIT) timer is used to calculated the length of the wake-up signal. * * ------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: S32K144 * Debugger: S32DS_ARM_3.6, S32K1_RTD_3_0_0_D2503 * Target: internal_FLASH ********************************************************************************   Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.

This post is an additional project to the S32K3 Low Power Management AN and demos.  A simple FlexCAN routine is configured for RX/TX and wakeup through the CAN0_RX pin (PTA6/WKPU19). The example is based on the S32K3X4EVB-T172, meaning that transceiver TJA1443 is used. TJA1443 only needs CAN0_EN & CAN0_STB pins in HIGH for normal configuration. In the example, the GREEN led is used to indicate that the MCU is in RUN mode. Once SW5 is pressed, MCU enters low power (STANDBY), and led is turned off. BLUE led toggles each time a CAN frame is received. MCU can be woken up with SW6 (WKPU42) or through a CAN RX. Note that CAN is not enabled in low-power, rather PTA6 (WKPU19) is configured for wake up, and once a rising edge signal is detected on the pin, MCU wakes up and reconfigures CAN module.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 * MCU: S32K344 * Compiler: S32DS3.6.2 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example is provided as is with no guarantees and no support.

******************************************************************************** The purpose of this demo application is to show you how to use the Temperature Sensor module in S32DS. It includes two methods to obtain temperature. -The first one starts a normal software conversion with one-shot mode on temp sense channel and calculates the temperature on chip from the data conversion. -The second one calculates the temperature based on given data (if read directly using ADC). Note: Please adjust the ADC reference voltage according to the board you are using * ------------------------------------------------------------------------------ * Test HW: S32K344EVB-T172 * MCU: S32K344 1P55A * Compiler: S32DS.ARM.3.5/6 * SDK release: S32K3_RTD_6.0.0/5.0.0/4.0.0_P24 * Debugger: OpenSDA/PE&Micro * Target: internal_FLASH *Jumper:J18-1:2,5V used. ********************************************************************************* Note that if you use "sprintf", you need to check the following option.  

MCU : S32K144 AFE : MC33771 RTD : 1.0.1 As we know BCC sample software for MC33771C which is delivered is based on SDK for S32K144 , and uses S32DS-2.2 :-- BCC_S32K144_FreeMASTER I am having a setup , for this combination, using SPI :-- FRDM33771CSPEVB evaluation board  + S32K144 + 14 cell Battery EMULATOR :    S32K144 pins used :-- MOSI :  LPSPI0  : PTB-4 MISO :  LPSPI0  : PTB-3 SCK :    LPSPI0  : PTB-2 CSB :    LPSPI0  : PTB-5 RESET line of MC33771C : PTD-4 FRDM33771CSPEVB pins used :-- https://www.nxp.com/docs/en/user-guide/UM11402.pdf SI of MC33771C : Connects to MOSI of S32K144 : K2-7 SO of MC33771C : Connects to MISO of S32K144 : K2-9 SCK of MC33771C : Connects to PTD-4 of S32K144 : K2-11 CSB :    K2 -5 RESET line of MC33771C : K4 -1 Freemaster uses UART-1 on S32K144 EVB ():-- TX : PTC7 RX : PTC6 I have ported the BCC_S32K144_FreeMASTER  sample code to S32K144 using RTD-1.0.1 & is working fine. This attached code work fine for SPI.  Two sample project i have attached, both are tested and working fine :--- 1> Chip select is controlled by LPSPI. 2> Chip select is controlled manually in user software. Fremaster project is also inside the folder, name of freemaster project is :-- 1> FreeMASTER_project.pmp TPL related part i have not ported & tested because at present i am not having MC33664ATL on S32K144 EVB board & do not have FRDM33771BTPLEVB (MC33771C board with TPL on it). Regards, Dinesh

*******************************************************************************  The purpose of this demo application is to present a usage of the  LPSPI IP Driver for the S32K3xx MCU.  The example uses LPSPI2 for transmit & receive Twelve bytes using the DMA. MOSI MISO connected on Hardware in loopback.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** DATA and Instruction CACHE is enabled by default --> in startup code :--     ========= This selection enable the use of CACHE driver API =========     ============= Use this MACRO ==================== #define USE_NON_CHACHABLE_REGION 1 This MACRO comment & uncomment will allocate the buffer in cachable & non cacable region of memory. You can allocate the SPI buffer in in cachable & non cacable region of memory. Enabling & disabling of this MACRO will adjust the example code.     ============ How this example works : Cacheable region used ============ I have connected MOSI and MISO pins of spi at hardware level. Whenever I am  sending and receiving total 10 numbers of 12 byte packet On each transmission of 12 byte packet I am incrementing the first bite of transmit buffer just to distinguish between packets at the receive side Cache_Ip_InvalidateByAddr() --> I have to call this API every time I receive 12 byte of data on receive buffer Cache_Ip_CleanByAddr() --> every time after incrementing the transmit buffer first byte ...I have to call this API then only the correct data is transmitted otherwise it will transmit the same data which was available at first time transfer ================ Cache API operation ============== Cache_Ip_InvalidateByAddr() is for the  invalidate operation. Cache_Ip_CleanByAddr() is for the clean operation or clean&invalidate operation that can be chosen by param of this api: @Param[in]  enInvalidate      Specifies to execute operation Clean&Invalidate. Clean: This operation ensures that all dirty lines—data in the cache that has been modified but not yet written back to the main memory—are written back to the main memory ->(push data from cache memory to main memory)  Invalidate: This operation marks the cache lines as invalid, ensuring that any subsequent access to these lines results in a fetch from the main memory, thus ensuring data consistency ->(push data from main memory to cache memory) Clean&invalidate : A cache clean and invalidate operation behaves as the execution of a clean operation followed immediately by an invalidate operation. Both operations are performed to the same location. ================ Pins used ======================    

This example code brief  :-- 1> Tested without the SL of BMS, so no dependency on the BMS Safety library. 2> Its tested on 2 AFE MC33775 board connected in TPL 3> Change following macro in mc33775_cfg.h file  to change the numbers of AFE connected in TPL.     RTD : 3.0.0 P07 BMS SDK : 1.0.2 This example does this task :-- Application Measurement. SYNC measurement Periodic Measurement. Read AFE temperature. Cell balancing timer method. Reading the Cell balancing status register & fault registers. =================== Setup used ============ Attached code is tested with TWO MC33775 AFE connected in TPL mode.   =============== MCU Pins used ===========   FRDM665SPIEVB Jumper setting  :---                   K1, K2 & K4 connector of S32J344 EVB :--             K1 on MC33665 & S32K334 evb :--      K2 on MC33665 & S32K334 evb :--    K4 on MC33665 & S32K334 evb :--        ================= EVB Link ==================   https://www.nxp.com/design/design-center/development-boards-and-designs/18-cell-battery-pack-emulator-to-supply-mc33774-bcc-evbs:BATT-18EMULATOR https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM665SPIEVB https://www.nxp.com/design/design-center/development-boards-and-designs/RD33775ADSTEVB https://www.nxp.com/design/design-center/development-boards-and-designs/automotive-development-platforms/s32k-mcu-platforms/s32k3x4evb-t172-evaluation-board-for-automotive-general-purpose:S32K3X4EVB-T172 ============= Using Debugger ============ Debugger breakpoint will cause the communication timeout at the AFE, which will RESET the AFE. To use the debugger while development you need to disable the communication timeout. In S32DS MEX file you cannot disable the timeout function ( limit the value of 0~255)   Disable Communication timeout in code :--     ================= Results for TWO AFE ===========================          

This example code brief  :-- 1> Tested without the SL of BMS, so no dependency on the BMS Safety library. 2> Its tested on 3 AFE MC33774 board connected in TPL 3> Change following macro in mc33774_cfg.h file  to change the numbers of AFE connected in TPL.     RTD : 3.0.0 P07 BMS SDK : 1.0.2 This example does this task :-- Application Measurement. SYNC measurement Periodic Measurement. Read AFE temperature. Cell balancing timer method. Reading the Cell balancing status register & fault registers. =================== Setup used ============ Attached code is tested with TWO MC33774 AFE connected in TPL mode. FRDM665SPIEVB stackable board used for MC33665.     =============== MCU Pins used =========== FRDM665SPIEVB Jumper setting  :---     K1, K2 & K4 connector of S32J344 EVB :--       K1 on MC33665 & S32K334 evb :--  K2 on MC33665 & S32K334 evb :--  K4 on MC33665 & S32K334 evb :--    ================= EVB Link ================== https://www.nxp.com/design/design-center/development-boards-and-designs/18-cell-battery-pack-emulator-to-supply-mc33774-bcc-evbs:BATT-18EMULATOR https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM665SPIEVB https://www.nxp.com/design/design-center/development-boards-and-designs/mc33774ata-evaluation-board-with-isolated-daisy-chain-communication:RD33774ADSTEVB https://www.nxp.com/design/design-center/development-boards-and-designs/automotive-development-platforms/s32k-mcu-platforms/s32k3x4evb-t172-evaluation-board-for-automotive-general-purpose:S32K3X4EVB-T172   ================== Measurement types used in example ===== Periodic measurement is done by 33774 , this is cyclic Other Two : application , sync  need send command to start Application measurement , need send app_capture command twice , and then read the result. Synchronous measurement take out the Primary adc result（VC）and secondary result（VB) .But the VC and VB result comes from different adc. Period measurement start when you send  API "MSR_StartMeasurement" and then 774 will do period measurement automatically periodically :--   Why we need to measure Vc & Vb both :-- ASIL-D ，yes we can measurement VC channel by primary ADC and measurement VB by secondary ADC from hardware VC and VB are come from same point of battery cell. Now 2 ADC compare with each other, that lead to high safety (ASIL D）. Primary & Secondary Device temperature reading :-- This API is used for it MC33774_CDD_BCC_SWC_Running_Slot4(). ============= Cell Balancing =========== Cell Balancing method used :-- MC33774 balance will switch between odd channel (1,3,5,7,... 17) and even channel (2,4,6,8,..18) by 500ms period , (250ms for odd and then switch to even 250ms and then odd 250ms...)it is because of IC design and cannot change by software.   MC33774 have lots of balance method  this example uses "timer method ". How to check Balancing is enabled :-- Following function MC33774_CDD_BCC_SWC_Running_Slot5() read the : Balance status & fault registers BAL_SWITCH_STAT0, BAL_SWITCH_STAT1 represent the balancing MOSFET current status.   Measure the voltage drop across the balancing register is the best approach. You will see the voltage drop appears every 250ms if PWM is 100%.  Please check the schematic of the 33774 EVB, find the balancing resistor on which channel balancing is enabled.     ======= How much time to wait to extract the measurements results ======= 240 us is the time of one SCAN Time between each Application measurement sequence. Min App measure time for 16 sample :-- 4.08ms = (16+1) *240 Min 1 SYNC measurement time, for 16 samples = 18 cycle ≈ 18 * (16*240us) ≈ 69 ms ============= Using Debugger ============ Debugger breakpoint will cause the communication timeout at the AFE, which will RESET the AFE. To use the debugger while development you need to disable the communication timeout. In S32DS MEX file you cannot disable the timeout function ( limit the value of 0~255) Disable Communication timeout in code :--   ================= Results for FIRST AFE ===========================            

This example code brief  :-- 1> Tested without the SL of BMS, so no dependency on the BMS Safety library. 2> Its tested on 2 AFE MC33775 board connected in TPL 3> Change following macro in mc33775_cfg.h file  to change the numbers of AFE connected in TPL.   RTD : 3.0.0 P07 BMS SDK : 1.0.2 This example does this task :-- Application Measurement. SYNC measurement Periodic Measurement. Read AFE temperature. Cell balancing timer method. Reading the Cell balancing status register & fault registers. =================== Setup used ============ Attached code is tested with TWO MC33775 AFE connected in TPL mode.   =============== MCU Pins used =========== TPL1-TX :-- TPL1TXCSB  --> PTC6/LPSPI0_PCS1 TPL1TXSCLK --> TPL12TXCLK --> PTE1/LPSPI0_SCK    TPL1TXDATA --> TPL12TXDATA --> PTE2/LPSPI0_SOUT    TPL1-RX :-- TPL1RXCSB  --> PTB17/LPSPI1_PCS3 TPL1RXCLK  --> PTB14/LPSPI1_SCK TPL1RXDATA --> PTB15/LPSPI1_SIN     ================= EVB Link ================== https://www.nxp.com/design/design-center/development-boards-and-designs/18-cell-battery-pack-emulator-to-supply-mc33774-bcc-evbs:BATT-18EMULATOR https://www.nxp.com/design/design-center/development-boards-and-designs/analog-toolbox/evaluation-board-for-mc33664atl-isolated-network-high-speed-transceiver:FRDMDUALK3664EVB https://www.nxp.com/design/design-center/development-boards-and-designs/RD33775ADSTEVB https://www.nxp.com/design/design-center/development-boards-and-designs/automotive-development-platforms/s32k-mcu-platforms/s32k3x4evb-t172-evaluation-board-for-automotive-general-purpose:S32K3X4EVB-T172   ============= Using Debugger ============ Debugger breakpoint will cause the communication timeout at the AFE, which will RESET the AFE. To use the debugger while development you need to disable the communication timeout. In S32DS MEX file you cannot disable the timeout function ( limit the value of 0~255) Disable Communication timeout in code :--   ================= Results for FIRST AFE ===========================          

*******************************************************************************  The purpose of this demo application is to present a usage of the HSE IP Driver for the S32K3xx MCU. This DEMO make use of SHE based keys & the RAM keys.  Step-1> Uncomment this MACRO to program the MASTER_ECU_KEY & BOOT_MAC_KEY #define FORMAT_HSE_KEY_CATALOG (1U) Step-2> Then comment the above mentioned MACRO to test the demo. Step-3> End of the DEMO in Switch case HSE_ERASE : keys are erased. HSE_EraseKeys(); SHE based secured boot :-- This demo uses the SHE based secured boot. You can test this after performing step-1. Once SHE is enabled code will be stuck at this point, after this issue an RESET.    ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************