Multi Source Translation Content

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Multi Source Translation Content

Discussions

Sort by:
Example MCAL S32K312 MEM_InFls DS3.5 RTD300 *******************************************************************************  The purpose of this demo application is to present a usage of the MEM_InFls MCAL Driver for the S32K3xx MCU.  The example uses MEM_InFls driver to write 128 bytes to FLASH memory address  0x50_0000 .  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Results :-- Ram location where FLASH writing erase code is placed :-- I placed the code at 256 byte below the MAX address of the RAM size 0x20417DAA = 541162922 Size of RAM need to save the flashing routine, as per the MAP & linker file :-- 0x00407e64 - 0x00407e38 = 44 bytes  S32K3 FLASH Memory Terminology :--  
View full article
NXP Model-Based Design Toolbox for S32K3 version 1.8.0 - Product Release Announcement Product Release Announcement Analog & Automotive Embedded Systems NXP Model-Based Design Toolbox for S32K3 – version 1.8.0 The Analog & Automotive Embedded Systems, Model-Based Design Tools Team at NXP Semiconductors, is pleased to announce the release of the Model-Based Design Toolbox for S32K3 version 1.8.0. This release supports automatic code generation for S32K3 peripherals and applications prototyping from MATLAB/Simulink for NXP S32K3 Automotive Microprocessors. This new product adds support for S32K310, S32K311, S32K312, S32K314, S32K322, S32K324, S32K328, S32K338, S32K341, S32K342, S32K344, S32K348, S32K356, S32K358, S32K364, S32K366, S32K374, S32K376, S32K388, S32K389, S32K394 and S32K396 MCUs, and part of their peripherals, based on RTD MCAL components (ADC, CAN, DIO, FEE, GPT, I2C, ICU, LIN, MEM, MCL, PWM, SPI, UART). In this release, we have also updated the RTD, S32 Configuration Tools, AMMCLib, FreeMASTER, and MATLAB support for the latest versions. The product comes with over 130 examples, covering all the features and functionalities of the toolbox, including new demos for motor control applications. Target audience: This product is part of the Automotive SW – Model-Based Design Toolbox. FlexNet Location: https://nxp.flexnetoperations.com/control/frse/download?element=7690521 Technical Support: NXP Model-Based Design Toolbox for S32K3 issues will be tracked through the NXP Model-Based Design Tools Community space. Release Content: Automatic C code generation from MATLAB® for NXP S32K3 derivatives: S32K310 S32K311 S32K312 S32K314 S32K322 S32K324 S32K328 S32K338 S32K341 S32K342 S32K344 S32K348 S32K356 S32K358 S32K364 S32K366 S32K374    S32K376    S32K388 S32K389 S32K394  S32K396 Support for the following peripheral components and functions: ADC CAN DIO eTPU FEE GPT I2C ICU LIN MCL (including DMA support) MEM Memory read/write PWM Profiler Registers read/write SPI UART New RTD version supported (7.0.0) New S32 Configuration Tools version supported (2025.R1.8)😎 Integration with EB tresos v32.0.0 Provides 2 modes of operation: Basic – using pre-configured configurations for peripherals; useful for quick hardware evaluation and testing Advanced – using S32 Configuration Tools or EB tresos to configure peripherals/pins/clocks Default Configuration Project Templates targeting all the supported S32K3 derivatives The toolbox delivers default configuration projects, available in both S32 Configuration Tools and EB tresos, covering an initial enablement of the on-board peripherals, pins, and clocks, for all the supported S32K3 derivatives. The desired template, which represents the starting point for enabling the hardware configuration of the application, can be selected via a dropdown widget. Support for creating and using Custom Project Templates The toolbox provides support to use and create custom project templates. This could be very useful when having a custom board design – offering the possibility to create the configuration for it only once. After it is saved as a custom project template, it can be used for every model that is being developed.   Such custom projects, addressing specific hardware designs are offered inside the current version of the toolbox to integrate the following EVBs: S32K312MINI-EVB MCTPTX1AK324 S32K344-WB S32K3-T-BOX S32K396-BGA-DC1 MR-CANHUBK344, alongside a set of examples specifically created to target this hardware design and a series of articles (available on NXP Community) demonstrating how to use the toolbox features and functionalities for creating applications for custom boards. The toolbox has been tested and validated on the official NXP Evaluation Boards     S32K31XEVB-Q100     S32K312EVB-Q172     S32K312MINI-EVB     MCTPTX1AK324     XS32K3X2CVB-Q172     S32K3-T-BOX     MR-CANHUBK344       XS32K3X4EVB-Q257     XS32K3X4EVB-Q172           S32K3X4EVB-T172      S32K344-WB        XS32K3X8CVB-Q172     S32K388EVB-Q289      S32K389EVB-Q437            XS32K396-BGA-DC     XS32K396-BGA-DC1 Integrates the Automotive Math and Motor Control Library release 1.1.42 All functions in the Automotive Math and Motor Control Functions Library v1.1.42 are supported as blocks for simulation and embedded target code generation. FreeMASTER Integration We provide several Simulink example models and associated FreeMASTER projects to demonstrate how our toolbox interacts with the real-time data visualization tool and how it can be used for tuning embedded software applications. S32 Design Studio integration We provide the feature of importing the code generated from a Simulink model inside the S32 Design Studio IDE. This functionality can be useful if the model needs to be integrated into an already existing project or for debug purposes. Simulation modes We provide support for the following simulation modes (each of them being useful for validation and verification): Software-in-Loop (SIL) Processor-in-Loop (PIL) including AUTOSAR SW-C deployment External mode Motor Control Applications The toolbox provides examples for 1-shunt and 2-shunt PMSM and BLDC motor control applications, supporting both S32 Configuration Tools and EB  tresos. Each of the examples provides a detailed description of the hardware setup and an associated FreeMASTER project which can be used for control and data visualization. The toolbox also demonstrates the integration of the Motor Control Blockset in developing such applications. For demonstrating the S32K3 eTPU Software integration, we have included a PMSM application where the FOC algorithm runs on the main CPU of the S32K396 MCU, while the analog sensing, software resolver, and PWM signals generation are offloaded to the eTPU co-processor. The motor control applications were developed and validated on the MCSPTE1AK344 and MCSPTR2AK396 Motor Control kits.   Support for MATLAB versions We added support for the following MATLAB versions: R2023b R2024a R2024b R2025a R2025b Examples for every peripheral/function supported More than 130 examples showcasing: I/O Control Timers and scheduling Communication (CAN, I2C, LIN, SPI, UART) Memory handling Motor Control applications (BLDC and PMSM) AMMCLib FreeMASTER SIL / PIL / External mode For more details, features, and how to use the new functionalities, please refer to the Release Notes and User Manual documents attached. MATLAB® Integration: The NXP Model-Based Design Toolbox extends the MATLAB® and Simulink® experience by allowing customers to evaluate and use NXP’s S32K3 MCUs and evaluation board solutions out-of-the-box. NXP Model-Based Design Toolbox for S32K3 version 1.8.0 is fully integrated with MATLAB® environment. Target Audience: This release (1.8.0) is intended for technology demonstration, evaluation purposes, and prototyping S32K3 MCUs and Evaluation Boards. Useful Resources: Examples, Trainings, and Support: https://community.nxp.com/community/mbdt
View full article
PN7160 PN7220 Android 15 移植到 i.MX8MN-EVK 简介 我们有一份官方的PN7160/PN7220 Android 15移植指南(PN7160/PN7220 – Android 15 移植指南)。但这些补丁仅适用于Android 15 AOSP r1(android-15.0.0_r1)。如果用户想移植到较新版本的AOSP,在源代码编译过程中会出现很多错误。本文件供客户参考,以便逐一解决错误。 注意:所有修改仅供参考。它们不是 NXP 官方针对 AOSP 新版本移植提供的补丁。因此,这些修改可能并非最佳解决方案。请客户根据自身需求修改 AOSP 源代码。 硬件板: i.MX8MN EVK PN7160 EVK PN7220 EVK 为 i.MX8MN EVK 构建 Android 我使用的 i.MX Android BSP 是 Android 15.0.0_2.0.0 (L6.12.20_2.0.0 BSP),可从此处下载:用于 i.MX 应用处理器的 Android 操作系统 | NXP 半导体。 1. 下载"文档"和"安装代码包"。 2. 首先按照 Android BSP 为 i.MX8MN EVK 构建 Android BSP。 根据 android_build/.repo/manifests/aosp-android-15.0.0_2.0.0.xml,您将看到 AOSP 版本是 android-15.0.0_r32。 现在,请按照 PN7160/PN7220 – Android 15 移植指南,将 NFC 移植到 i.MX Android BSP。 1. 内核驱动程序: 为了与 PN7220 或 PN7160 建立连接,Android 协议栈使用 nxpnfc 内核驱动。您可以从下面的 GitHub 链接下载驱动程序: nfcandroid_platform_drivers/drivers at br_ar_16_comm_infra_dev · nxp-nfc-infra/nfcandroid_platform_drivers · GitHub git clone "https://github.com/nxp-nfc-infra/nfcandroid_platform_drivers.git"-b br_ar_16_comm_infra_dev 驱动程序适用于 Kernel 6.6 和 6.12。因此,请下载适合您移植的正确版本。例如,i.MX Android BSP Android 15.0.0_2.0.0 中的 Kernel 版本为 6.12。因此,我将使用针对 6.12 的驱动程序进行移植。 在移植过程中,请确保 Makefile 和 Kconfig 文件中的 PATH 设置正确。 例如在我的移植中: android_build/vendor/nxp-opensource/kernel_imx/drivers/nfc$ tree . ├── Kconfig ├── Makefile └── pn7160 ├── common.c ├── common.h        ├── i2c_drv.c        ├── i2c_drv.h        ├── Kbuild         ├── Kconfig         ├── Makefile         ├── spi_drv.c        └── spi_drv.h 1 个目录,11 个文件 android_build/vendor/nxp-opensource/kernel_imx/drivers/nfc$ cat Makefile # # 内核NFC设备驱动程序的Makefile。 # obj-y += pn7160/ android_build/vendor/nxp-opensource/kernel_imx/drivers/nfc$ cat Kconfig source "drivers/nfc/pn7160/Kconfig" 2. 将 “nxpnfc” 添加到 i.MX8MN EVK 设备树文件中。 在板上显示连接表。 显示图片 &i2c3 { clock-frequency = <100000>; pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; pinctrl-1 = <&pinctrl_i2c3_gpio>; scl-gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; status = "okay"; nxpnfc@28{ compatible = "nxp,nxpnfc"; reg = <0x28>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nfc>; nxp,nxpnfc-irq = <&gpio3 22 0>; nxp,nxpnfc-ven = <&gpio3 20 0>; nxp,nxpnfc-fw-dwnld = <&gpio3 21 0>; }; &iomuxc {         pinctrl_nfc: nfcgrp {                 fsl,pins = <                         MX8MN_IOMUX_SAI5_RXC_GPIO3_IO20                 0X19  // VEN MX8MN_IOMUX_SAI5_RXD0_GPIO3_IO21 0X19 // FW-DWNLD MX8MN_IOMUX_SAI5_RXD1_GPIO3_IO22 0X19 // IRQ                 >;         }; 显示示意图。 3. 修改 imx8mn_gki.fragment nano vendor/nxp-opensource/kernel_imx/arch/arm64/configs/imx8mn_gki.fragment 添加 CONFIG_NXP_NFC_I2C=m 4. 转到设备 device/nxp/imx8m/evk_8mn/ 修改 BoardConfig.mk。 # selinux permissive +BOARD_KERNEL_CMDLINE += androidboot.selinux=permissive BOARD_SEPOLICY_DIRS := \ $(CONFIG_REPO_PATH)/imx8m/sepolicy \        $(IMX_DEVICE_PATH)/sepolicy  \ +       vendor/nxp/nfc/sepolicy \ + vendor/nxp/nfc/sepolicy/nfc ShareBoardConfig.mk     $(KERNEL_OUT)/drivers/net/phy/realtek.ko \ $(KERNEL_OUT)/drivers/pps/pps_core.ko \     $(KERNEL_OUT)/drivers/ptp/ptp.ko \ $(KERNEL_OUT)/drivers/net/ethernet/freescale/fec.ko + $(KERNEL_OUT)/drivers/nfc/nfc/nxpnfc-i2c.ko endif     $(KERNEL_OUT)/drivers/trusty/trusty-core.ko \     $(KERNEL_OUT)/drivers/trusty/trusty-log.ko \     $(KERNEL_OUT)/drivers/trusty/trusty-ipc.ko \     $(KERNEL_OUT)/drivers/trusty/trusty-virtio.ko \ + $(KERNEL_OUT)/drivers/nfc/nfc/nxpnfc-i2c.ko else BOARD_VENDOR_RAMDISK_KERNEL_MODULES += \     $(KERNEL_OUT)/drivers/input/touchscreen/goodix_ts.ko \     $(KERNEL_OUT)/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_i2c.ko endif Compatibility_matrix.xml         netutils-wrapper 1.0     android.hardware.emvco 1         IEmvco default     device_framework_matrix.xml nxp.hardware.secureime 1 ISecureIME default     nxp.hardware.imx_dek_extractor 1 IDek_Extractor default     vendor.nxp.nxpnfc 2.0 INxpNfc default     android.hardware.emvco 1 IEmvco default     evk_8mn.mk # -------@block_bluetooth------- # Bluetooth HAL PRODUCT_PACKAGES += \     android.hardware.bluetooth \     android.hardware.bluetooth-service.default.nxp # NXP 8987 蓝牙厂商配置 PRODUCT_PACKAGES += \ bt_vendor.conf # ------nfc------- $(call inherit-product, vendor/nxp/nfc/device-nfc.mk) $(call inherit-product, vendor/nxp/emvco/device-emvco.mk) PRODUCT_PACKAGES += \ android.hardware.nfc-service.nxp PRODUCT_PACKAGES += \         com.nxp.emvco \         com.nxp.nfc \ nfc_nci_nxp_pn72xx # -------@block_usb------- Init.rc 在 post-fs && property:vendor.skip.charger_not_need=0     # 一次只交换一页     写入 /proc/sys/vm/page-cluster 0 # 授予获取 statsd 的 available_pages 信息的权限 chown system system /proc/pagetypeinfo     chmod 0440 /proc/pagetypeinfo     exec u:r:vendor_modprobe:s0 -- /vendor/bin/modprobe -a -d \ /vendor/lib/modules nxpnfc_i2c 写入 /sys/power/wake_lock nosleep 在 post-fs-data && property:vendor.skip.charger_not_need=0 setprop vold.post_fs_data_done 1 ueventd.nxp.rc /sys/devices/virtual/thermal/thermal_zone* trip_point_0_hyst 0660 系统 系统 /sys/devices/virtual/thermal/thermal_zone* trip_point_1_hyst 0660 系统 系统 /dev/dmabuf_imx           0664   系统     系统 /sys/class/backlight/* 亮度 0660 系统 系统 /dev/ttymxc1              0666   nfc   nfc /dev/ttymxc2 0666 nfc nfc /dev/nxpnfc 0666 nfc nfc # 用于 libcamera /dev/media* 0660 system camera /dev/v4l-subdev* 0660 系统摄像头 5. hardware/interfaces/compatibility_matrices/compatibility_matrix.202404.xml android.hardware.wifi.hostapd 1 IHostapd default     android.hardware.wifi.supplicant 2 ISupplicant default     nxp.hardware.imx_dek_extractor 1 IDek_Extractor default     vendor.nxp.nxpnfc 2.0 INxpNfc default     vendor.nxp.emvco 1 INxpEmvco default     6.  android_build/vendor/nxp/nfc/device-nfc.mk android_build/vendor/nxp/emvco/device-emvco.mk 两种方法。 1. 将 NXP NFC 补丁应用到 Android AOSP,然后进行构建。如果 Android 版本过新,将会出现大量错误。 2. 先将 R1 文件复制到 R30,然后应用 NXP NFC 补丁。然后构建。 我使用第二种方法。 下载 AOSP R1 源代码。 将 R1 复制并替换以下文件夹。 应用补丁。 版本代码。 以下是错误列表及参考解决方案。
View full article
如何将 i.MX93 Cortex-M33 板和 SDK 导入 MCUXpresso IDE? 📌 背景: 我想开始使用 MCUXpresso IDE 在 i.MX93 Cortex-M33 (MCIMX93-EVK) 板上进行开发。我已经从恩智浦网站下载了SDK ZIP,但我无法成功导入板或使用其示例。 🛠️ 我做了什么? 从 mcuxpresso.nxp.com 下载 SDK ZIP: SDK_25_03_00_MCIMX93-EVK.zip 已打开MCUXpresso 集成开发环境(版本:请在此注明) 去了 已安装的 SDK> Import → 选择 ZIP 文件 SDK 出现在集成开发环境的已安装 SDK 下。 但是,当我进入 “导入SDK示例” 时,没有任何显示,或者我无法创建导入的项目的版本。 ❓ 我的问题: 将 i.MX93 Cortex-M33 板和 SDK 导入 MCUXpresso IDE 的正确和完整程序是什么,这样我就可以: 查看支持的板 访问演示/示例应用程序(如 hello_world) 无错误地版本和调试项目 🔍 其他说明: 我的目标是 i.MX93 的Cortex-M33 内核 我只想使用MCUXpresso 集成开发环境(而不是 IAR 或 VS Code)。 🧪 预期成果: 能够使用 MCUXpresso IDE 在 MCIMX93-EVK 板上导入和版本 cm33_core0 的 hello_world 或 led_blinky 等示例项目。 如果需要其他工具或配置,请告诉我。预先表示感谢! i.MX93EVK#i.mx93 cortex-m33i.MX93#MCUXpressoIDE ##MCUXpressoSDK Re: How to Import i.MX93 Cortex-M33 Board and SDK into MCUXpresso IDE? 你好@Manjunathb 我目前也在使用i.MX93 Cortex-M33。我安装了 MCUXpresso 集成开发环境,但在将 SDK 压缩文件下放到已安装的 SDK 视图时遇到了错误(根据指南)。 了解到您也在研究相同的 M33 核心,您是否介意与我们分享任何信息以及您目前的进展情况?我还应该为 VS 代码使用 MCUXpresso 吗? 如果您能分享一些关于如何开始 M33 开发的指南或程序,我将不胜感激。谢谢。 Re: How to Import i.MX93 Cortex-M33 Board and SDK into MCUXpresso IDE? 你好 Chavira, 我目前正在使用 i.MX93 Cortex-M33 内核,我知道这款设备不支持 MCUXpresso IDE,但推荐使用适用于 VS Code 的 MCUXpresso IDE。 我已经安装了:适用于 VS Code 扩展 的 mcuxPresso i.MX93 SDK 包 ARM GCC 工具链 而且我正在使用 J-Link 调试器。 请就以下几点为我提供指导: 如何将 i.MX93 Cortex-M33 SDK 正确导入 VS 代码?SDK 文件应放在哪里,扩展程序如何检测它们? 如何创建或打开 Cortex-M33 演示或模板项目(如 hello_world 或 led_blinky)? 如何配置版本设置(编译器、链接器路径等),以便使用 MCUXpresso VS Code 环境成功编译? 使用 J-Link 探头或 remoteproc(如果使用 Linux)闪存和调试已编译应用程序的正确方法是什么? 在使用 MCUXpresso for VS Code 时,是否有 i.MX93 特有的已知限制或额外步骤? 如果能提供完整的分步说明或相关文档链接,我将不胜感激。预先感谢您的支持! 最崇高的敬意, Manjunath Badiger Re: How to Import i.MX93 Cortex-M33 Board and SDK into MCUXpresso IDE? 好的 👍 感谢您的回复 Re: How to Import i.MX93 Cortex-M33 Board and SDK into MCUXpresso IDE? 嗨,@Manjunathb! 感谢您联系恩智浦支持中心! 遗憾的是,MCUXpresso IDE 与这种情况不兼容。不过,您也可以使用 MCUXpresso for VS Code,它支持并提供类似的功能。 致以最崇高的敬意, Chavira
View full article
[Introduction] Running the i.MX 93 Cortex-M SDK Sample Code - [Part 2] Running the M Core with U-Boot and remoteproc (Japanese blog) This three-part series provides hands-on instruction on how to build and run SDK sample code for the Cortex-M33 core in the NXP i.MX 93 applications processor . In this second article, we will explain how to run a pre-built M core image on an evaluation board using U-Boot and remoteproc . [ Part 1] Building a development environment and M core image [Part 2] M-core execution using U-Boot and remoteproc (this article) [ Part 3] Automatic startup of M core using boot loader Contents of the 2nd session 3. Running the M core image 3.1 Cortex-M33 TCM Memory Mapping 3.2 Writing to the FAT partition of the SD card 3.3 Running from U-Boot 3.4 Execution from remoteproc 3. Running the M core image There are two ways to run an M33 core image from A55: "running from U-Boot" and "running from remoteproc," as shown in the figure below. Now, I'll explain each method. 3.1 Cortex-M33 TCM Memory Mapping As stated in the ARM documentation below, M33 code must be run in Privileged/Secure mode. The Cortex-M33 processor supports Secure and Non-secure security states, Thread and Handler operating modes, and can run in either Thumb or Debug operating states. In addition, the processor can limit or exclude access to some resources by executing code in privileged or unprivileged mode. Code can execute as privileged or unprivileged. Unprivileged execution limits or excludes access to some resources appropriate to the current security state. Privileged execution has access to all resources available to the security state. Handler mode is always privileged. Thread mode can be privileged or unprivileged. Check the address map of the i.MX 93 TCM (Tightly Coupled Memory) area and organize the access addresses from the Cortex-M33 and Cortex-A55. The following is an excerpt from the i.MX 93 Applications Processor Reference Manual : TCM address for M33 viewpoint: 0x1FFE0000 TCM address for A55 viewpoint: 0x201E0000 *For details, please refer to the following section in the i.MX 93 Applications Processor Reference Manual. " 2.2 System memory map used by all initiators other than the Cortex-M33 core " " 2.3 System memory map (Cortex-M33)" 3.2 Writing to the FAT partition of the SD card This article explains how to write the M core image to an SD card using the uuu tool or the Ubuntu cp command . For more information, please also refer to the article " How to build a Linux BSP and write the generated image to the target board ." Posted by uuu ① Set BOOT_MODE to "Cortex-A55 USDHC1 8-bit eMMC 5.1 [0100]" and start U-Boot. ②Start fastboot with U-Boot Uboot=> fastboot 0 [ Tip ] : "fastboot 0" is a convenient command that allows you to switch to USB Serial Loader mode without changing the DIP SW. ③ Write to the SD card from the host PC with uuu -b fat_write $ uuu -b fat_write power_mode_switch_rtos_imx93.bin mmc 1:1 power_mode_switch_rtos_imx93.bin Writing using the cp command (Ubuntu) Use an SD card reader and copy directly to the FAT partition $ cp power_mode_switch_rtos_imx93.bin /media/xxx/boot $ cp power_mode_switch_rtos_imx93_cm33.elf /media/xxx/boot   3.3 Running from U-Boot This article explains how to load the M33 image on U-Boot and run it with the bootaux command. It also includes setting environment variables before starting Linux. ① Load the M33 image with U-Boot and run it u-boot=> fatload mmc 1:1 ${loadaddr} power_mode_switch_rtos_imx93.bin 36484 bytes read in 6 ms (5.8 MiB/s) u-boot=> cp.b ${loadaddr} 0x201e0000 ${filesize} u-boot=> bootaux 0x1ffe0000 0 ## Starting auxiliary core addr = 0x1FFE0000... ② Before starting Linux, run prepare_mcore in U-Boot and add clk_ignore_unused to the U-Boot mmcargs environment variable. u-boot=>run prepare_mcore u-boot=>setenv mmcargs setenv bootargs ${jh_clk} ${mcore_clk} clk_ignore_unused console=${console} root=${mmcroot} ③ Start Linux u-boot=>boot The following will be displayed on the M33 terminal. By performing the suspend/wakeup operation on the A55, you can check the cooperation with the M33. On the A55, suspend it by running: root@imx93frdm:~# echo mem > /sys/power/state Enter the "W" command on the M33 to wake up the A55: Confirmed return of A55:   3.4 What is remoteproc? remoteproc (Remote Processor Framework) is a mechanism that allows the Linux kernel to control remote processors such as the Cortex-M33. It allows the M33 firmware to be loaded, started, and stopped from Linux, enabling flexible system design in multi-core SoCs. With i.MX 93, remoteproc allows you to dynamically control the M33 from Linux, enabling designs that separate and execute real-time processing and safety functions. Main functional configuration function explanation Loading Firmware Loads an ELF binary into the specified memory location. Processor start/stop Start/stop control Resource Management Shared memory and communication channel configuration using resource_table IPC Collaboration Message communication between Linux and M33 using rpmsg Components component explanation /lib/firmware/ M33 firmware location directory resource_table Resource information structure in firmware remoteproc driver Control driver in the Linux kernel (e.g. imx_rproc) sysfs interface Can be controlled by /sys/class/remoteproc/remoteprocX/   3.5 Execution from remoteproc Learn how to load, run, and stop M33 images using the remoteproc framework ① Run prepare_mcore in U-Boot , add clk_ignore_unused to the U-Boot mmcargs environment function, and start Linux. u-boot=>run prepare_mcore u-boot=>setenv mmcargs setenv bootargs ${jh_clk} ${mcore_clk} clk_ignore_unused console=${console} root=${mmcroot} u-boot=>boot ② After booting Linux, copy the M33 image to /lib/firmware/ root@imx93frdm:~# mount /dev/mmcblk1p1 /mnt root@imx93frdm:~# cp /mnt/power_mode_switch_rtos_imx93_cm33.elf /lib/firmware/ ③ Specify the firmware to remoteproc root@imx93frdm:~# echo /lib/firmware/power_mode_switch_rtos_imx93_cm33.elf >/sys/devices/platform/remoteproc-cm33/remoteproc/remoteproc0/firmware ④ Start the M33 image root@imx93frdm:~# echo start > /sys/devices/platform/remoteproc-cm33/remoteproc/remoteproc0/state The following will be displayed in the M33 terminal.   ⑤Stop the execution of the M33 image from remoteproc. root@imx93frdm:~# echo stop > /sys/devices/platform/remoteproc-cm33/remoteproc/remoteproc0/state In this article, we introduced the steps to run a pre-built M core image on the FRDM-i.MX93 evaluation board using U-Boot and remoteproc . In the next article, we will explain how to automatically start these binaries using the bootloader . → Next time : [ Part 3] Automatic startup of M-core using bootloader ○ This time : [Part 2] M-core execution using U-Boot and remoteproc (this article) ← Previous article: [ Part 1] Building a development environment and M core image =========================== We are currently unable to respond to comments in the " Comment " section of this post . We apologize for the inconvenience, but when making inquiries, please refer to " How to contact NXP with technical questions ( Japanese blog ) " . (If you are already an NXP distributor or have a relationship with NXP , you may contact the person in charge directly. ) This series will cover three hands-on articles that explain how to build and run SDK sample code for the Cortex-M33 core in i.MX 93 using the low-cost, compact development board, the FRDM i.MX 93 Development Board . [Part 1] Building a development environment and M core image [Part 2] M-core execution using U-Boot and remoteproc (this article) [Part 3] Automatic startup of M core using boot loader i.MX Processors Japanese blog
View full article
用LPTMR定时器中断无法从VLPS到VLPR的唤醒问题 我在仿真调试的时候,程序进入VLPS后,LPTMR定时器设定10秒中断,定时器中断可以从VLPS到VLPR的正常唤醒。但是不仿真的时候,关电重新上电,程序从RUN进入VLPR,然后程序进入VLPS后,之后无法进入LPTMR定时器中断,也无法唤醒到VLPR模式,一直处在VLPS状态。 但是外部IO口中断从VLPS到VLPR可以正常唤醒,不管是在仿真模式还是不仿真的情况都可以从VLPS正常唤醒到VLPR。 难道不仿真的时候VLPS导致LPTMR定时器时钟关了,还是有其他的问题? VLPR用的慢速时钟源8M,分频后慢系统时钟为4M,FLASH时钟为1M,LPTMR定时器时钟源用的慢系统时钟4M分4096分频,10000计数大约10s中断一次。 主函数主函数 Run to VLPR函数Run to VLPR函数 VLPR to VLPS函数VLPR to VLPS函数 Re: 用LPTMR定时器中断无法从VLPS到VLPR的唤醒问题 问题已经解决,要提前设置使能VLPS模式下SIRC时钟,默认是关闭的,程序中增加一句宏定义就可以了 #define  SCG_ENABLE_SIRC_IN_VLPS  1 Re: 用LPTMR定时器中断无法从VLPS到VLPR的唤醒问题 这是我的源代码。不管是仿真还是断开下载器,在VLPR模式下LPTMR都正常工作。但是就是在VLPS模式下LPTMR无法唤醒到VLPR模式。用外部IO中断唤醒都正常。但是下载仿真时在VLPS模式LPTMR又可以唤醒到VLPR模式。我的初始化时钟就在Run_to_VLPR(void)函数中的scg_vlpr_configuration()函数中。 #include "include.h" /* 中断优先级组 */ #define NVIC_Group0 0x07 #define NVIC_Group1 0x06 #define NVIC_Group2 0x05 #define NVIC_Group3 0x04 #define NVIC_Group4 0x03 typedef enum _mode { eRun = 1, eStop = 2, eVLPR = 4, eVLPS = 16, eHSRun = 128 }eLowPowerMode; void delay(uint32_t cycles) { /* Delay function - do nothing for a number of cycles */ while(cycles--) { __asm("nop"); } } void error_trap (void) { while (1) { } } void disable_clock_monitors(void) { /* Disable Clock monitor for System Oscillator */ SCG->SOSCCSR &= ~(SCG_SOSCCSR_SOSCCM_MASK); /* Disable Clock monitor for System PLL */ SCG->SPLLCSR &= ~(SCG_SPLLCSR_SPLLCM_MASK); } void scg_vlps_configuration (void) { uint32_t tempSIRC = SCG->SIRCCSR; /* Disable in VLPS */ tempSIRC &= ~(SCG_SIRCCSR_SIRCLPEN_MASK | SCG_SIRCCSR_SIRCSTEN_MASK); #if SCG_ENABLE_SIRC_IN_VLPS /* Enable in VLPS */ tempSIRC |= SCG_SIRCCSR_SIRCLPEN_MASK | SCG_SIRCCSR_SIRCSTEN_MASK; #endif SCG->SIRCCSR = tempSIRC; } void scg_vlpr_configuration(void) { uint8_t tempRCM = RCM->SRIE; uint32_t temp; /* Check if core is not using SIRC */ if ((SCG->CSR & SCG_CSR_SCS_MASK) != SCG_CSR_SCS(2)) { /* Disable SIRC */ SCG->SIRCCSR &= ~SCG_SIRCCSR_SIRCEN_MASK; /* Wait until SIRC is disabled */ while (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) {} /* Enable SIRC in VLP modes */ SCG->SIRCCSR = SCG_SIRCCSR_SIRCSTEN_MASK #if SCG_ENABLE_SIRC_IN_VLPS | SCG_SIRCCSR_SIRCLPEN_MASK #endif ; /* Enable SIRC */ SCG->SIRCCSR |= SCG_SIRCCSR_SIRCEN_MASK; /* Wait until SIRC is enabled */ while (0 == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)) {} temp = SCG_RCCR_DIVCORE(1) | /* Core clock is SIRC/8 = 4MHz */ SCG_RCCR_DIVBUS(0) | /* Bus clock is Core clock / 1 = 4MHz */ SCG_RCCR_DIVSLOW(3) | /* Flash clock is Core clock / 1 = 1MHz */ SCG_RCCR_SCS(2); /* Select SIRC as system clock */ SCG->RCCR = temp; /* Select SIRC as system clock */ /* Wait until SIRC is used as system clock */ while ((SCG->CSR & SCG_CSR_SCS_MASK) != SCG_CSR_SCS(2)) {} /* Configure SIRC as system clock in VLPR modes */ SCG->VCCR = SCG_VCCR_DIVCORE(1) | /* Core clock is SIRC/8 = 1MHz */ SCG_VCCR_DIVBUS(0) | /* Bus clock is Core clock / 1 = 1MHz */ SCG_VCCR_DIVSLOW(3) | /* Flash clock is Core clock / 1 = 1MHz */ SCG_VCCR_SCS(2); /* Select SIRC as system clock */ /* Disable FIRC and SPLL */ /* ?Configurable SIRC as system clock */ /* ?Configure all reset sources to be 'Reset' (not as Interrupt) via RCM_SRIE */ /* ?Program each reset source as interrupt via RCM_SRIE for a minimum delay time of 10 LPO */ RCM->SRIE &= 0; /* ?Disable FIRC */ SCG->FIRCCSR = SCG_FIRCCSR_FIRCREGOFF_MASK; /* ?Execute few nops to ensure an interval of 45 ns */ delay(10); while (0 != (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) { }; /* ?Configure every reset source back to original intended reset configuration (Interrupt or Reset) via RCM_SRIE */ RCM->SRIE = tempRCM; /* Set SIRCDIV2 value to 1MHz (SIRC / 😎 */ SCG->SIRCDIV = SCG_SIRCDIV_SIRCDIV2(2); } } void scg_configure_freq_for_VLPR() { } void Run_to_VLPR(void) { /* Disable clock monitors on SCG module */ disable_clock_monitors(); /* Adjust SCG settings to meet maximum frequencies values */ scg_vlpr_configuration(); /* Allow very low power run mode */ SMC->PMPROT |= SMC_PMPROT_AVLP_MASK; /* Check if current mode is RUN mode */ if (eRun == SMC->PMSTAT) { /* This bit enables source and well biasing for the core logic, * this is useful to further reduce MCU power consumption */ PMC->REGSC |= PMC_REGSC_BIASEN_MASK; /* Move to VLPR mode */ SMC->PMCTRL = SMC_PMCTRL_RUNM(2); /* Wait for transition */ while (SMC->PMSTAT != eVLPR) {} } else { /* Error trap */ error_trap(); } } #define SCG_ENABLE_SIRC_IN_VLPS 1 void VLPR_to_VLPS (void) { uint32_t tempPMC_ctrl = SMC->PMCTRL; /* Disable FIRC and SPLL and configure VLPS */ scg_vlps_configuration(); /* Enable SLEEPDEEP bit in the Core * (Allow deep sleep modes) */ S32_SCB->SCR |= S32_SCB_SCR_SLEEPDEEP_MASK; /* Allow very low power run mode */ SMC->PMPROT |= SMC_PMPROT_AVLP_MASK; /* Select VLPS Mode */ tempPMC_ctrl &= ~SMC_PMCTRL_STOPM_MASK; tempPMC_ctrl |= SMC_PMCTRL_STOPM(2); SMC->PMCTRL = tempPMC_ctrl; /* Reduce power consumption */ PMC->REGSC |= PMC_REGSC_BIASEN_MASK #if (0 == SCG_ENABLE_SIRC_IN_VLPS) | PMC_REGSC_CLKBIASDIS_MASK #endif ; /* Check if current mode is VLPR mode */ if(eVLPR == SMC->PMSTAT) { STANDBY(); // Move to Stop mode // __asm("DSB"); // __asm("ISB"); /* Go to deep sleep mode */ // __asm("WFI"); } else { /* Error trap */ error_trap(); } /* Verify VLPSA bit is not set */ if (0 != (SMC->PMCTRL & SMC_PMCTRL_VLPSA_MASK)) { // error_trap(); } } #define KEY0_IO PTD5 void Key_Init(void) { /* 配置按键 内部上拉 下降沿触发中断 */ GPIO_ExtiInit(KEY0_IO, falling_up); /*优先级配置 抢占优先级1 子优先级2 越小优先级越高 抢占优先级可打断别的中断 */ NVIC_SetPriority(PORTD_IRQn,NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1,2)); NVIC_EnableIRQ(PORTD_IRQn); //使能PORTD_IRQn的中断 } #define LED1_IO PTC17 //核心板LED #define LED2_IO PTC16 #define LED3_IO PTD15 //母板LED #define LED4_IO PTD16 void LED_Init(void) { GPIO_PinInit(LED1_IO,GPO,0); GPIO_PinInit(LED2_IO,GPO,0); GPIO_PinInit(LED3_IO,GPO,0); GPIO_PinInit(LED4_IO,GPO,0); } int main(void) { uint16 w1; uint16 wCnt=0; Run_to_VLPR(); NVIC_SetPriorityGrouping(NVIC_Group2); LPTMR_Init(5000); /* 优先级配置 抢占优先级1 子优先级2 越小优先级越高 抢占优先级可打断别的中断 */ NVIC_SetPriority(LPTMR0_IRQn,NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1,2)); NVIC_EnableIRQ(LPTMR0_IRQn); //使能LPTMR0_IRQn的中断 Key_Init(); LED_Init(); while(1) { wCnt++; if(wCnt>=100){ wCnt=0; VLPR_to_VLPS(); } delay(0x00007fff); LED_Reverse(1); } // return 0; } Re: 用LPTMR定时器中断无法从VLPS到VLPR的唤醒问题 Hi@yankui666 MCU在进入低功耗的时候要断开调试器,否则MCU可能并不会成功进入低功耗模式 1.我没看到你初始化时钟的示例代码 2.请先初始化完成时钟,外设后再去执行RUN_TO_VLPR 3.先调通RUN模式下LPTMR再去排查
View full article
S32K5 RTD configuration does not allow to set initial value in some pins Hello, Some pins as the ones listed below don't allow to set the initial value when being configured. Is there a reason for that? Regards RTD Re: S32K5 RTD configuration does not allow to set initial value in some pins Hi @nxp52415, As I said, with pins that you selected, they are not supported this function. So, the "the initial value" is not necessary for these pins. Default, RTD driver disabled "the initial value" on "pins were not supported RCVR", and these pins will be generated "the initial value" as 0. Even when driver allow user configures RCVR for these pins, then it doesn't have any effection because it has not support RCVR. Best regards, Dan Re: S32K5 RTD configuration does not allow to set initial value in some pins Hi Dan, I was talking about the initial value and not the RCVR. Can you explain why the initial value cannot be set in these pins? Regards  Re: S32K5 RTD configuration does not allow to set initial value in some pins Hi @nxp52415, This is the information about "Receiver Select" bit in S32K5 RM: You can find the pins support the RCVR in the "IO Signal Table" sheet in the S32K56x_IOMUX.xlsx (attached file in S32K5RM). And based on this files, pins that you showed as not support RCVR. Best regards, Dan
View full article
CAN FDとCAN(動作していません) NXPコミュニティの皆様、こんにちは。 現在、CAN 構成に関する問題が発生しています。CAN 通信には基本設定を使用していますが、 PEAK CAN ViewerでCAN-FD モードを使用する場合にのみ機能します。ただし、標準のClassical CAN (非 FD) を試しても、応答がありません。 参考までに私のプロジェクトを添付しました。どなたか親切にレビューして、不足している構成や設定が見落とされているかどうか教えていただけませんか? 要約すると: CAN-FD + PEAK CAN Viewer :期待通りに動作 標準CAN + PEAK CANビューア:ボードからの応答なし ご提案やご指導をいただければ幸いです。 お手数ですが、よろしくお願いいたします。 よろしくお願いします、 ガネーシュ・バグワット Re: CAN FD and CAN(not Working) こんにちは、ジュリアン ご返信ありがとうございます。 最初はソフトウェアの構成の問題を疑ったので、ここに投稿しました。しかし、それは TJA1443 トランシーバ接続に関するハードウェア関連の問題であることが判明しました。フローティング ピンのため、通常の CAN では CAN メッセージを受信または送信できませんでしたが、FD ではなぜ動作していたのかはわかりません。 ハードウェアの問題を解決した後、すべてが期待どおりに動作するようになりました。 ご返信いただき、また、役に立つコミュニティ投稿を紹介していただき、改めて感謝申し上げます。 よろしくお願いします、 ガネーシャ Re: CAN FD and CAN(not Working) こんにちは@GaneshBhagwat PCAN-View ツールは、モード、ボーレート、サンプリング ポイントに対して正しく構成されていますか? バス上で表示されている内容を共有することは可能ですか?(ロジックアナライザまたはオシロスコープを使用して)フレームが正しく送信されているかどうかを確認するだけです。また、「機能していない」とはどういう意味か詳しく説明してください。受付時にコールバックを入力できますか?問題があるのはトランスミッションだけですか? CANInit 関数で、ID 0x80000 が受け入れ用に設定されていることがわかります。これが CAN アナライザーでも設定されているかどうかを確認してください。 このコミュニティ投稿を CAN 構成のガイダンスとして使用できます:例: S32K358 FlexCAN TXRX ISR S32DS35 RTD400/500 - NXPコミュニティ。 よろしくお願いします、 ジュリアン
View full article
Zephyr培训资源 以下是一些资源,帮助您更好地了解Zephyr: 本篇 恩智浦 Zephyr 入门教程将通过 MCUXpresso for VS Code 和 MCUXpresso Installer 向您介绍所有 Zephyr 环境设置步骤,帮助您构建并运行第一个 Zephyr 应用程序。 本分步实验室指南(来自恩智浦技术日培训)从 " Hello,World " 开始,然后引导您完成有关 Kconfig、设备树和调试方法的有用教程: 实践研讨会:在 Visual Studio Code 中使用 Zephyr™ 操作系统进行开发 本教程展示了 Zephyr 强大的便携性。演示了将 FRDM-MCXN947 的 LVGL 演示移植到 FRDM-RW612 的简单步骤: 恩智浦 Zephyr 显示器便携性演示 想了解更多?访问我们 Zephyr 登录页面的 “培训” 部分,查找恩智浦在线研讨会和在线培训 ——只需点击页面顶部的 “培训” 选项卡即可 返回 Zephyr 知识中心
View full article
Clock Measuring using the Signal Frequency Analyzer (SFA) module for KW45/KW47/MCXW71/MCXW72 Using the Signal Frequency Analyzer (SFA) to Measure the FRO 6M Frequency Overview The Signal Frequency Analyzer (SFA) is a specialized hardware peripheral available in NXP’s KW45, MCXW71, KW47, and MCXW72 microcontrollers. It is designed to provide precise, real-time measurement and analysis of digital signal characteristics, including frequency, period, and timing intervals. This makes it a valuable tool for applications requiring accurate timing diagnostics, signal validation, and system debugging. By utilizing internal 32-bit counters and configurable trigger mechanisms, the SFA enables high-resolution capture of signal transitions, supporting robust system monitoring and fault detection. Functional Capabilities of the SFA The SFA module supports the following measurements: Clock signal frequency of a Clock Under Test (CUT) Clock signal period It operates using two 32-bit counters: One for the Reference Clock (REF) One for the Clock Under Test (CUT) Measurement is performed by comparing the counts of both clocks until predefined target values are reached. FRO 6M Frequency Failure Scenarios The 6 MHz Free Running Oscillator (FRO6M) may occasionally output an incorrect frequency under certain conditions: When the device exits reset When the device wakes from low-power modes To mitigate potential issues caused by incorrect FRO6M output, it is the application developer’s responsibility to verify the oscillator’s frequency and apply corrective measures as needed. Monitoring the FRO 6M Using the SFA To monitor the FRO6M signal, the following configuration is recommended: SFA Configuration Parameters Reference Clock (REF): CPU Clock (e.g., 96 MHz) Clock Under Test (CUT): FRO6M routed via CLKOUT Interrupt Mode: Enabled for asynchronous measurement completion Code Implementation The presented functions are meant to be implemented in users application, the inner functions are part of the implementations of the SFA driver from the NXP’s SDK. It can be used on MCXW71, MCXW72, KW45, kKW47, just make sure SFA Peripheral Initialization  void init_SFA_peripheral(void) { /* Enable SFA interrupt. */ EnableIRQ(SFA_IRQn); /* Set SFA interrupt priority. */ NVIC_SetPriority(SFA_IRQn, 1); SFA_Init(DEMO_SFA_BASEADDR); SFA_InstallCallback(DEMO_SFA_BASEADDR, EXAMPLE_SFA_CALLBACK); } SFA Callback Function void EXAMPLE_SFA_CALLBACK(status_t status) { if (status == kStatus_SFA_MeasurementCompleted) { SfaMeasureFinished = true; } sfa_callback_status = status; } Frequency Measurement Function This function sets up the measurement of the FRO6M signal using the CPU clock as the reference. uint8_t SFA_freq_measurement_6M_FRO(void) { uint8_t ratio = 0; uint32_t freq = 0UL; sfa_config_t config; CLOCK_SetClkOutSel(kClockClkoutSelSirc); //set clokout to SIRC SFA_GetDefaultConfig(&config); //Get SFA default config config.mode = kSFA_FrequencyMeasurement0; config.refSelect = kSFA_REFSelect1; //Set CPU clk as ref clk config.cutSelect = kSFA_CUTSelect1; //Set clkout as CUT config.refTarget = 0xFFFFFFUL; config.cutTarget = 0xFFFFUL; config.enableCUTPin = true; freq = get_ref_freq_value(CPU_CLK); SFA_SetMeasureConfig(DEMO_SFA_BASEADDR, &config); SFA_MeasureNonBlocking(DEMO_SFA_BASEADDR); while (1) { if (SfaMeasureFinished) { SfaMeasureFinished = false; if(kStatus_SFA_MeasurementCompleted == sfa_callback_status) { freq = SFA_CalculateFrequencyOrPeriod(DEMO_SFA_BASEADDR, freq);//Calculate the FRO freq if(FREQ_6MHZ + TOLERANCE <= freq ) { ratio = 1; } else { if(FREQ_3MHZ + TOLERANCE <= freq) { ratio = 2; } else { if(FREQ_2MHZ + TOLERANCE <= freq) { ratio = 3; } else { ratio = 4; } } } break; } } else { __WFI(); } } return ratio; } Result Interpretation and Usage To test the FRO 6M after adding the above functions the FRO can be tested after executing: init_SFA_peripheral(); SFA_freq_measurement_6M_FRO(); The measured FRO6M frequency ratio is returned by the function SFA_freq_measurement_6M_FRO(), with the ratio you can know the current frequency output of the 6M FRO, ration 1 means 6M are being output by the FRO, ratio 2 means the frequency output of the FRO it's being cut in half meaning the FRO is outputting 3 Mhz, ration 3 means the FRO output frequency is being cut by a third part, this results in 2MHz frequency output. With this information you can: Adapt peripheral clocking if the FRO6M frequency is incorrect (This can be achieve by modifying the peripheral dividers if dividers are being used). Trigger corrective actions such as  switching to an alternate clock source Steps to Reconfigure Peripheral Clocking When FRO6M output frequency is lower Detect the Faulty FRO6M Output Use the SFA measurement as described earlier to determine if the FRO6M is operating below its expected frequency (6 MHz). If the result is significantly lower, proceed to reconfigure. Choose an Alternative Clock Source Most NXP MCUs offer multiple internal and external clock sources. Common alternatives include: FRO 192M OSC RF 32M Sys OSC RTC OSC Choose one that is: Stable Available in your current power mode Compatible with the peripheral’s timing requirements You can add more clock divers if needed to make a higher frequency clock reach a certain lower frequency. Reconfigure the Peripheral Clock Source Use the SDK’s CLOCK_Set... APIs to change the clock source. You may also need to: Adjust dividers to match the required baud rate or timing Reinitialize the peripheral with the new clock settings Example Scenario: Measuring the FRO and Adjusting UART Based on Frequency Ratio Imagine your application relies on the 6 MHz Free Running Oscillator (FRO), and its accuracy directly affects UART communication. To ensure reliable operation, you can use the System Frequency Adjustment (SFA) feature to monitor the FRO output and dynamically adjust the UART configuration. After measuring the 6 MHz FRO using the recommended method, the system returns a frequency ratio value. This value ranges from 1 to 4, where: 1 indicates the frequency is within expected limits (no issues), 2 to 4 represent varying degrees of deviation from the expected frequency. Using this ratio, you can initialize and configure the UART peripheral and its driver to compensate for any frequency variation, ensuring stable and accurate communication. */ int main(void) { BOARD_InitHardware(); uint8_t ch = 0; uint8_t FRO_ratio = 0; init_SFA_peripheral(); /*Measure FRO6M output frequency*/ FRO_ratio = SFA_freq_measurment_6M_FRO(); /*Init debug console and compensate in case a different frequency is output */ if(0 == FRO_ratio) { assert(0);//this user defined return value means something went wrong while measuring 6Mz FRO } uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ/FRO_ratio;//Compensate the src frequency set for uart module CLOCK_EnableClock(kCLOCK_Lpuart1); CLOCK_SetIpSrc(kCLOCK_Lpuart1, kCLOCK_IpSrcFro6M); DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq); ...... } SDK 25.0.00 Enhancements for FRO6M Calibration To address known reliability issues with the 6 MHz Free Running Oscillator (FRO6M), particularly during transitions from low-power modes, SDK version 25.06.00 introduces a set of software enhancements aimed at improving oscillator validation and calibration. Key Features Introduced FRO6M Calibration API Two new functions have been added to facilitate runtime verification of the FRO6M frequency: PLATFORM_StartFro6MCalibration() Initializes the calibration process by enabling the cycle counter, capturing a timestamp, and preparing the system to measure elapsed time using both the CPU and the FRO6M-based timestamp counter. PLATFORM_EndFro6MCalibration() Completes the calibration by comparing the time measured via CPU cycles and the FRO6M timestamp counter. This comparison determines whether the oscillator is operating at the expected 6 MHz or has erroneously locked to a lower frequency (e.g., 2 MHz). The result is stored in a global ratio variable (fwk_platform_FRO6MHz_ratio) for use by the system. These functions provide a lightweight and efficient mechanism to detect and respond to oscillator misbehavior, ensuring system stability and timing accuracy. Configuration Macro gPlatformEnableFro6MCalLowpower_d This macro enables automatic FRO6M frequency verification upon exiting low-power modes. When defined, the system will invoke the calibration functions to validate the oscillator before resuming normal operation. Default Integration The calibration mechanism is enabled by default in the SDK configuration file fwk_config.h, ensuring that all applications benefit from this safeguard without requiring manual setup. Use Case and Benefits These enhancements are particularly valuable in applications where: Precise timing is critical (e.g., wireless communication, sensor sampling). The system frequently enters and exits low-power states. Clock source integrity must be guaranteed to avoid peripheral misbehavior or timing faults. By integrating these calibration routines, developers can proactively detect and correct FRO6M frequency anomalies, improving overall system robustness and reducing the risk of runtime errors due to clock instability.
View full article
System Controller Firmware 101-はじめに 評価キットを使用する際には、BSPに含まれるSystem Controller Firmware(SCFW)バイナリが提供されます。このscfwバイナリはそのボード専用に調整されており、ご使用のハードウェアに合わせてボード依存部分を変更する必要がある場合があります。 本書ではSCFWのポーティング手順の概要を説明します。詳細についてはSystem Controller Porting guide(sc_fw_port.pdf)を参照してください。 システムを設定する SCFWはLinuxホスト上でビルドされます。システムをセットアップする手順は次のとおりです: GNU ARM Embedded Toolchain: 6-2017-q2-update June 28, 2017をARM websiteからダウンロードします: ファイルを展開するディレクトリを選択します。例: mkdir ~/gcc_toolchain cp ~/Downloads/gcc-arm-none-eabi-6-2017-q2-update-linux.tar.bz2 ~/gcc_toolchain/ cd ~/gcc_toolchain/ tar xvjf gcc-arm-none-eabi-6-2017-q2-update-linux.tar.bz2‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ ツールチェーンを含むディレクトリ(上記例では"~/gcc_toolchain")を指すようTOOLS環境変数を設定します。.bash_profileを編集してこの環境変数をexportすることもできます: export TOOLS=~/gcc_toolchain/ srec_catもビルドに必要です。これは通常srecordパッケージに含まれており、ubuntuでは次のように実行します: sudo apt-get update sudo apt-get install srecord これでポーティングキットのディレクトリ(例:scfw_export_mx8qm)に移動し、scfwをビルドできます。 System Controller Firmwareポーティングキット SCFW 移植キットには、SCFW をお客様のボードで動作するように変更できるソースファイルとオブジェクトファイルが含まれています。 最新のSystem Controller Firmwareポーティングキットは i.MX Software and development webpageから入手できます: ポーティングキットを入手したら展開します: tar xvzf imx-scfw-porting-kit-1.1.tar.gz‍ 次のようなファイル構成が表示されます: ポーティングキットはpackages以下に含まれており、READMEに展開手順が記載されています。基本的には: cd packages/ chmod a+x imx-scfw-porting-kit-1.1.bin ./imx-scfw-porting-kit-1.1.bin‍‍‍ エンドユーザーライセンス契約の同意を求められます: 同意するとポーティングキットは新しいフォルダに展開されます。フォルダ構成は次のとおりです: SCFWに関するドキュメントはdoc/pdfにあるか、html形式で提供されています。sc_fw_port.pdfに目を通すことを推奨します。 異なるSoCバリアント(QM A0、QM B0、QXP B0)のポーティングキットはsrcにtar.gzとして格納されています。その他のファイルはLinux、QNX、FreeRTOS、U-boot、ARM Trusted Firmwareなど向けのSCFWライブラリです。 複数のSoCバリアント(QXPとQMの両方など)で作業する場合は、すべてのポーティングキットを1つのディレクトリに展開することを推奨します。これにより、そのディレクトリから任意のバリアント向けにビルドできます。実行コマンドは次のとおりです: cd imx-scfw-porting-kit-1.1/ cd src/ find scfw_export_mx8*.gz -exec tar --strip-components 1 --one-top-level=scfw_export_mx8 -xzvf {} \;‍‍‍ scfw_export_mx8フォルダが作成され、ここからサポートされている任意のバリアント向けにSCFWをビルドできます。または、目的のバリアントのパッケージだけを展開して使用することもできます。 cd scfw_export_mx8/‍ すべてのビルドフォルダーには、SCFWのビルド結果が含まれており、プラットフォームにはSCFWのソースが保存されています。 ボード固有のコードはすべて「platform/board/mx8_」にあります。ここでderivativeはQXPやQMなどのi.MX8シリコンファミリ、board_nameはSCFWパッケージの対象ボード名です。 SCFWをお使いのボードにポーティングする最初のステップは、i.MX8のderivativeとボード用のフォルダを作成することです。既存のボード例をコピーしてフォルダ名を変更すると、すぐに開始できるプロジェクトが得られます。例: cp -r platform/board/mx8qm_val/ platform/board/mx8qm_myBoard/‍‍‍‍‍‍‍‍‍‍ この例のボードは「myBoard」と呼ばれ、i.MX8QM B0 デバイス用です。このボード用の SCFW を構築するには、単に次のコマンドを呼び出してください。 make qm R=B0 B=myBoard‍‍‍‍‍‍‍‍‍‍‍‍ ターゲットがi.MX8QXPの場合は、このデバイスをベースにしたボードを選び、「make qx」を実行するだけです。 ビルドオプションや詳細なブート情報などの追加情報はSCFWポーティングガイド(sc_fw_port.pdf)に記載されています。本書の第2章はポーティングプロセスの優れた入門です。 概要と有用な情報 PMICの設定概要およびboard.c一般的な修正 変更が必要な主なファイル(場合によっては唯一)は「board.c」で、場所は「platform/board/mx8X_board/」です。board.cファイルにはSCU UARTポート、PMIC初期化ルーチン、PMIC温度アラーム設定などボード関連情報のほとんどが含まれており、LDO電圧を設定したりPMICと通信するように変更することもできます。board.c内のすべての関数はSCU自身によって実行されるため、PMICとの通信に使用されるI2Cインターフェースにアクセスできます。 外部電源(たとえばPMIC LDO)で駆動されるSoCリソース(APコアやGPUなど)はboard_set_power_modeによってオン/オフされ、リソースを特定のPMIC電源にマッピングする処理はboard_get_pmic_infoで行われます。例としてi.MX8QMバリデーションボードでは、A53サブシステムがPF100 PMICカードの3番目のPMIC(PMIC_2_ADDR、アドレスはPMIC_0から開始)のSW2とPF8100 PMICカードの1番目のPMIC(PMIC_0_ADDR)のSW5により給電されます。 case SC_SUBSYS_A53: pmic_init(); if (pmic_card == PF100) { pmic_id[0] = PMIC_2_ADDR; pmic_reg[0] = SW2; *num_regs = 1; } else {/* PF8100_dual Card */ pmic_id[0] = PMIC_0_ADDR; pmic_reg[0] = PF8100_SW5; *num_regs = 1; } break; ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ 外部電源で駆動されるSoCリソース(APコア、GPUなど)の電圧はboard.c内のboard_set_voltageで管理されます。リソースと電源のマッピングは前述のとおりboard_get_pmic_infoで行われます。 8個の「ボードリソース」(SC_R_BOARD_R0〜SC_R_BOARD_R7)が利用可能で、これらを用いてSCUが管理できるボード上のコンポーネントを定義できます。たとえばPMICのLDOの1つで駆動されるセンサをボードリソースにマッピングし、board.cを変更してセンサの電源オン/オフや電圧変更を行えます。 ボードリソースの電圧変更は、board_trans_resource_powerで電圧を設定するか、実行時に電圧を変更する必要がある場合はboard_set_controlを修正して、Miscellaneous Service 101で説明されているミスレニアスコールがそのリソースに対して発行されるたびに電圧を変更します。たとえばSC_R_BOARD_R7の電圧を変更する場合、board_set_controlに以下のcaseを追加します: case SC_R_BOARD_R7: if (ctrl == SC_C_VOLTAGE) { /* Example only PMIC_X_ADDR and PMIC_SUPPLY need to match an actual device */ pmic_interface.pmic_set_voltage(PMIC_X_ADDR, PMIC_SUPPLY, val, step); } else return SC_ERR_PARM; break;‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ 上記のcaseはアプリケーションが次の関数を呼び出すたびにSCUによって実行されます。 sc_misc_set_control( ipc, SC_R_BOARD_R7, SC_C_VOLTAGE, voltage_val);‍‍‍‍‍‍‍‍ ボードリソースの電源オン/オフはboard.c内のboard_trans_resource_powerで行われます。例えばNXPのバリデーションボードでは、ボード上のPTN5150はボードリソース0で管理され、電源のオン/オフは次のように制御されます: case BRD_R_BOARD_R0 : /* PTN5150 (use SC_R_BOARD_R0) */ if (pmic_ver.device_id == PF100_DEV_ID) { if (to_mode > SC_PM_PW_MODE_OFF) { pmic_interface.pmic_set_voltage(PMIC_2_ADDR, VGEN6, 3300, SW_RUN_MODE); pmic_interface.pmic_set_mode(PMIC_2_ADDR, VGEN6, VGEN_MODE_ON); } else { pmic_interface.pmic_set_mode(PMIC_2_ADDR, VGEN6, VGEN_MODE_OFF); } } else {/* PF8100_dual Card */ if (to_mode > SC_PM_PW_MODE_OFF) { pmic_interface.pmic_set_voltage(PMIC_1_ADDR, PF8100_LDO1, 3300, REG_RUN_MODE); pmic_interface.pmic_set_mode(PMIC_1_ADDR, PF8100_LDO1, RUN_EN_STBY_EN); } else { pmic_interface.pmic_set_mode(PMIC_1_ADDR, PF8100_LDO1, RUN_OFF_STBY_OFF); } } break;‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ アプリケーション側で以下の関数が呼び出されるたびに、SCUは上記のコードを実行します: sc_pm_set_resource_power_mode(ipc, SC_R_BOARD_R0, SC_PM_PW_MODE_ON/OFF);‍‍‍‍‍‍‍‍ board_config_scは、I2CモジュールやPMICとの通信に使用されるパッドなど、SCUが必要とするリソースをマーキングするために使用します。board.cの関数が動作するために必要なリソースは、本関数で移動不可に設定する必要があります。例えばSCUのI2Cモジュールを保持するには、次の行を追加します: rm_set_resource_movable(pt_sc, SC_R_SC_I2C, SC_R_SC_I2C, false);‍‍‍‍‍‍‍‍‍ 以下のパッドはSCUに属しており、アプリケーションからはアクセスできません: - SC_P_SCU_PMIC_MEMC_ON - SC_P_SCU_WDOG_OUT - SC_P_PMIC_EARLY_WARNING - SC_P_PMIC_INT_B - SC_P_SCU_BOOT_MODE0〜SC_P_SCU_BOOT_MODE5 board_system_configは初期リソース管理を行う関数で、イメージ内でalt_configフラグが設定されている場合にのみ呼び出され、パーティションを作成してリソースを割り当てることができます。詳細はResource Management Service 101を参照してください。 board_get_pcie_clk_srcはPCIeが使用するクロックを定義し、BOARD_PCIE_PLL_EXTERNALまたはBOARD_PCIE_PLL_INTERNALのいずれかを指定できます。 board_printは変更内容のデバッグに非常に便利で、構文は次のとおりです: board_print(3, "Debug printout %d\n", val);‍‍‍‍‍‍‍ 最初のパラメータがデバッグレベルで、それ以降は標準printfと同様に動作します。出力はSCUが対応するデバッグレベルでビルドされている場合にのみSCUのデバッグ出力で確認できます。上記の例では出力を表示するためにSCFWを次のようにビルドする必要があります: make qm B=myBoard‍‍‍‍ DL=3 or higher (debug level goes from 0 to 5)‍‍‍‍‍‍‍ 使用例 以下のユーティリティはSystem Controller Firmwareリクエストの方法を示し、QNXとLinuxの両方でコマンドラインからリクエストを行う手段を提供します。 System Controller Firmware Command Line Utility for Linux and QNX System Controller Firmware 101 i.MX 8ファミリ | i.MX 8QuadMax (8QM) | 8QuadPlus
View full article
Regulatory Domain and Wi-Fi Tx Power Level Management in Linux (Country regulatory settings) Default init case By default, when no country regulatory setting is defined, we use WW (World Wide safe setting, meaning we only transmit on bands which are allowed worldwide, with the TX power compatible with all countries regulations)   Setting country 1/ When operating in AP mode: - we usually set country code (ex : country_code=JP) in hostapd.conf to define the country. - this country definition will be advertised to all connected STA if ieee80211d=1 is set in hostpad.conf - the country can also be set with "iw reg set" command   2/ When operating in STA mode - country code can be set with "iw reg set" command or in wpa_supplicant.conf (ex : country=jp) - once connected to the AP (with 80211d enabled), the STA will switch to the AP country setting (this behaviour can be disabled by adding country_ie_ignore=1 driver parameter)   Once country is set: - we will only transmit on channels allowed for that country - with country maximum TX power - we might use DFS feature on channels declared as DFS channels for that specific country   TX power settings   1/ By default, using Linux regulatory settings (/lib/firmware/regulatory.db, generated from db.txt) These settings define allowed channels, DFS flags and max TX power on a country basis See section "Regulatory db" further.   2/ Linux regulatory settings can be overwritten by: a. cntry_txpwr=0 and txpwrlimit_cfg=nxp/txpower.bin driver param (generated from txpower.conf (channel/MCS->txpower), see AN13009) Same setting for all countries (static). Using channels/flags from db.txt, and minimum TX power between db.txt and txpower.bin/rgpower.bin b. cntry_txpwr=1 (look for nxp/txpower_XX.bin files (generated from txpower.conf (channel/MCS->txpower), see AN13009) Need one txpower_XX.bin file for each country XX (dynamically loaded, for instance with iw reg set XX) Using channels/flags from db.txt, and minimum TX power between db.txt and txpower_XX.bin   cntry_txpwr txpwrlimit_cfg TX power limit Method 0 nxp/txpower.bin nxp/txpower.bin (static) V1 1 - nxp/txpower_XX.bin (dynamic) V1 cfg     We have default TX power tables, but customer can tune these TX power settings, based on their HW. Please refer to "AN13009 Wi-Fi Tx Power Management in Linux"       Regulatory db   Source https://wireless.wiki.kernel.org/en/developers/Regulatory/wireless-regdb   Wifi regulatory setting (allow channels, etc) are defined in db.txt, then converted to regulatory.db (store in /lib/firmware) We can get official db.txt from here, and build regulatory.db with below command   git clone git://git.kernel.org/pub/scm/linux/kernel/git/wens/wireless-regdb.git make   Kernel regulatory.db integrity is checked by the Linux kernel. Disabling REGDB signature check with the folllowing kernel config: CONFIG_EXPERT=y CONFIG_CFG80211_CERTIFICATION_ONUS=y # CONFIG_CFG80211_REQUIRE_SIGNED_REGDB is not set   Rebuilding kernel and flashing scp Image root@192.168.0.2:/run/media/mmcblk0p1/      iw reg command examples and other notes   root@imx8mqevk:~# iw reg get global country 00: DFS-UNSET         (2402 - 2472 @ 40), (N/A, 20), (N/A)         (2457 - 2482 @ 20), (N/A, 20), (N/A), AUTO-BW, PASSIVE-SCAN         (2474 - 2494 @ 20), (N/A, 20), (N/A), NO-OFDM, PASSIVE-SCAN         (5170 - 5250 @ 80), (N/A, 20), (N/A), AUTO-BW, PASSIVE-SCAN         (5250 - 5330 @ 80), (N/A, 20), (0 ms), DFS, AUTO-BW, PASSIVE-SCAN         (5490 - 5730 @ 160), (N/A, 20), (0 ms), DFS, PASSIVE-SCAN         (5735 - 5835 @ 80), (N/A, 20), (N/A), PASSIVE-SCAN         (57240 - 63720 @ 2160), (N/A, 0), (N/A) root@imx8mqevk:~# iw reg get global country FR: DFS-ETSI         (2400 - 2483 @ 40), (N/A, 20), (N/A)         (5150 - 5250 @ 80), (N/A, 23), (N/A), NO-OUTDOOR, AUTO-BW         (5250 - 5350 @ 80), (N/A, 20), (0 ms), NO-OUTDOOR, DFS, AUTO-BW         (5470 - 5725 @ 160), (N/A, 26), (0 ms), DFS         (5725 - 5875 @ 80), (N/A, 13), (N/A)         (57000 - 66000 @ 2160), (N/A, 40), (N/A) By default (if no country is set), we are using the world domain. this is the most restrictive. Then you can set the country (using driver module parameter, wpa_supplicant.conf, etc) or get the country automatically provided by the access point (80211d). This will update the regulatory domain, meaning the allowed channels, etc. You can check the country settings with "iw reg get" command. The regulatory domain has priority, compared to the channel list you would set in the wpa_supplicant.conf. OS LINUX Product: WiFi 88MW32X Product: WiFi 88W8801 Product: WiFi 88W8897 Product: WiFi 88W8987 Product: WiFi 88W8997 Product: WiFi 88X9098 Product: WiFi IW416 Product: WiFi IW6XX Product: WiFi RW6XX Protocol: Wi-Fi
View full article
Flash layout for new boot flow with TF-A Please note that the LSDK memory layout for TF-A boot flow explained in this topic is only applicable for LSDK 18.12 and newer releases.  The following table shows the memory layout of various firmware stored in NOR/NAND/QSPI flash device or SD card on all QorIQ Reference Design Boards. When the board boots from NOR flash, the NOR bank from which the board boots is considered as the "current bank" and the other bank is considered as the "alternate bank". For example, if LS1043ARDB boots from NOR bank 4, to update an image on NOR bank 0, you need to use the "alternate bank" address range,0x64000000 - 0x64F00000. Firmware Definition MaxSize Flash Offset (QSPI/NAND flash) Absolute address (NOR bank 0 on LS1043ARDB, LS1021ATWR) Absolute address  (NOR bank 4 LS1043ARDB, LS1021ATWR) Absolute address (NOR bank 0 on LS2088ARDB) Absolute address (NOR bank 4 on LS2088ARDB) SD Start Block No. RCW + PBI + BL2 (bl2.pbl) 1 MiB 0x00000000 0x60000000 0x64000000 0x580000000 0x584000000 0x00008 ATF FIP Image (fip.bin) BL31 + BL32 + BL33 4 MiB 0x00100000 0x60100000 0x64100000 0x580100000 0x584100000 0x00800 Boot firmware environment 1 MiB 0x00500000 0x60500000 0x64500000 0x580500000 0x584500000 0x02800 Secure boot headers 2 MiB 0x00600000 0x60600000 0x64600000 0x580600000 0x584600000 0x03000 Secure header or DDR PHY FW 512 KiB 0x00800000 0x60800000 0x64800000 0x580800000 0x584800000 0x04000 Fuse provisioning header 512 KiB 0x00880000 0x60880000 0x64880000 0x580880000 0x584880000 0x04400 DPAA1 FMAN ucode 256 KiB 0x00900000 0x60900000 0x64900000 0x580900000 0x584900000 0x04800 QE/uQE firmware 256 KiB 0x00940000 0x60940000 0x64940000 0x580940000 0x584940000 0x04A00 Ethernet PHY firmware 256 KiB 0x00980000 0x60980000 0x64980000 0x580980000 0x584980000 0x04C00 Script for flashing image 256 KiB 0x009C0000 0x609C0000 0x649C0000 0x5809C0000 0x5849C0000 0x04E00 DPAA2-MC or PFE firmware 3 MiB 0x00A00000 0x60A00000 0x64A00000 0x580A00000 0x584A00000 0x05000 DPAA2 DPL 1 MiB 0x00D00000 0x60D00000 0x64D00000 0x580D00000 0x584D00000 0x06800 DPAA2 DPC 1 MiB 0x00E00000 0x60E00000 0x64E00000 0x580E00000 0x584E00000 0x07000 Device tree(needed by uefi) 1 MiB 0x00F00000 0x60F00000 0x64F00000 0x580F00000 0x584F00000 0x07800 Kernel lsdk_linux.itb 16 MiB 0x01000000 NA NA NA NA 0x08000 Ramdisk rfs 32 MiB 0x02000000 NA NA NA NA 0x10000 The following figures highlight the changes in the flash layout for previous boot flow (with PPA) and flash layout for TF-A boot flow. Flash layout for previous boot flow (with PPA) Changed flash layout for TF-A boot flow QorIQ LS1 Devices QorIQ LS2 Devices
View full article
Freescale Yocto Project main page Yoctoproject Framework Installing any Needed Package Using Yocto and i.MX Boards Testing Yocto for i.MX6 i.MX53 QSB - Quick Start Board i.MX6 Sabre Lite Board Build the image SDCard Image Yoctoproject Framework Yoctoproject is a framework for creating Linux distributions for embedded devices. Its layering mechanism makes it easy to add Linux to new target devices highly customized for a particular platform; it can include custom start-up scripts, software packages built with a high degree of optimization for a particular architecture, and different user interfaces from full Gnome desktop to a simple a serial console. Yocto has 2 basic layers: board support packages layer and core layer. In the BSP layer is where all the custom software and configuration tweaks for a particular platform are included, while the core layer provides the common software stack to provide from a simple command line interface to Sato desktop interface (Matchbox based and Gnome mobile software stack). A third layer could be added to provide additional user interfaces LXDE, XFCE, and more; YP is quite flexible&emdash;one of it major strengths. Installing any Needed Package Go to Yocto Project Quick Start and double check that you have all the necessary packages installed for your machine. For example, if building machine was an Ubuntu machine: $ sudo apt-get install gawk wget git-core diffstat unzip texinfo  build-essential chrpath libsdl1.2-dev xterm curl Using Yocto and i.MX Boards Please, go to project's README file in order to see the recommended instructions to download the source code. Testing Yocto for i.MX6 How to test Yocto for i.MX 6 i.MX53 QSB - Quick Start Board Edit conf/local.conf user config file and set imx53 Quick start board machine and enable parallel build features. MACHINE ?= "imx53qsb" BB_NUMBER_THREADS = "4" PARALLEL_MAKE = "-j 4" i.MX6 Sabre Lite Board Edit conf/local.conf user config file and set i.MX6 Sabrelite board machine and enable parallel build features MACHINE ?= "imx6qsabrelite" BB_NUMBER_THREADS = "4" PARALLEL_MAKE = "-j 4" if you've been facing problems to get yocto's images working on your i.MX Sabre Lite board, please take a look on this comment Re: The kernel sometins hang  in L3.0.35_4.0.0_130424 release Build the image some example of available image: image name description core-image-minimal A small image just capable of allowing a device to boot. core-image-base A console-only image that fully supports the target device hardware. core-image-sato Image with sato, a mobile environment and visual style for mobile devices.  The image supports X11 with a Sato theme, Pimlico applications and contains terminal, editor and file manager. fsl-image-test Builds contents core-image-base plus Freescale test applications and multimedia components. fsl-image-gui Builds contents of core-image-sato with Freescale test applications and multimedia with hardware accelerated X11 To build the image: $ bitbake Build using Dash instead can bring some problems. You can check what your system uses typing: "ls -l /bin/sh". On Ubuntu you can change it using "dpkg-reconfigure bash". Some Ubuntu releases you must use "dpkg-reconfigure dash" and choose Bash Built images are located in cd tmp/deploy/images SDCard Image sudo dd if=core-image-minimal-imx6qsabrelite.sdcard of=/dev/sdb i.MX Yocto Project: Frequently Asked Questions Yocto Project Re: Freescale Yocto Project main page All, we're closing this document for any further comments.  If you have a comment about this document or if you have an issue doing what the document describes, please start a new discussion.  Thanks. Re: Freescale Yocto Project main page Hello community, have an urgent need for input on touch screen integration. Please help! We're developing a project which requires touch screen function. The processor we use is i.MX6 dual light. Source code is Yocto 1.5. The LCD is working. We integrated the touch screen driver and can see on the computer that is connected to the board through serial port that touch screen reports coordinates for touches which indicates that touch screen does work. However, the system doesn't respond to touches. No icon displayed on the LCD is touched and the mouse arrow doesn't move with a finger touching the screen. Any advice where to look to see which part is broken? Thanks! Re: Freescale Yocto Project main page There's an error in the document, the part about dash.  You can check what your system uses typing: "ln -s /bin/sh" should probably be "ls -l /bin/sh" since "ln -s /bin/sh" would simply create a symbolic link in the current directory pointing to /bin/sh. Re: Freescale Yocto Project main page Please, LeonardoSandovalGonzalez, hkh and OtavioSalvador, create a new topic in imx.community. Please, remind to add all log available. With kernel version, MM version and branch name. It´s very difficult to us, hkh to provide support when the DOC has several comments on it. It´s much easier to start with a new and clear thread, with all the text futures it has in it (like quote, mark a answer as helpfull, as so on). Thanks in advance, Re: Freescale Yocto Project main page hkh, the issue you found regarding 'mesa' has been fixed in OE-Core and Poky yesterday. You can drop this change from meta-fsl-arm and it will work just fine. I am not a good person to help with GStreamer stuff. LeonardoSandovalGonzalez, can you take a look here? Re: Freescale Yocto Project main page Hello, I am using a Boundarydevices Nitrogen6x with a iMX6 Solo processor. I followed Daiane’s instruction to build my Yocto Dora image. I was able to build core-image-base, but had a problem with fsl-image-test. I found the following issue and applied the change manually (it must not be in the branch since sync was not retrieving the patch): https://lists.yoctoproject.org/pipermail/meta-freescale/2014-April/008057.html Also, I used menuconfig to disable ov5642 and enable ov5640. I can build the images, but can’t use gstreamer. I keep getting this error: ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0 VIDIOC_DQBUF failed. ERROR: v4l2 capture: VIDIOC_QBUF: buffer already queued VIDIOC_QBUF failed I know my hardware works because with the Timesys demo SD Card that came with the board I can use the following command to display the MIPI camera image on the LCD: $ gst-launch mfw_v4lsrc capture-mode=5 ! mfw_v4lsink disp-width=1280 disp-height=800 I have tried many gstreamer commands, and they all fail with the same error. One example is: $ gst-launch mfw_v4lsrc ! mfw_v4lsink I tried adding capture-mode=4 to the above command, and I get the same error. Are you aware of any issue with the latest Yocto Image that would cause this problem (something similar to the patch above that I had to apply)? What else can I try? Here is the complete snapshot of the error I am getting: root@nitrogen6x:~# gst-launch mfw_v4lsrc ! mfw_v4lsink MFW_GST_V4LSRC_PLUGIN 3.0.9 build on Apr 16 2014 09:57:53. pwm_config: pwm freq = 22000000, clk_select=1 clock_rate=66000000 ov5640_mipi_camera_powerdown: powerdown=0, power_gp=0xa9 MFW_GST_V4LSINK_PLUGIN 3.0.9 build on Apr 16 2014 09:57:39. Setting pipeline to PAUSED … pwm_config: pwm freq = 22000000, clk_select=1 clock_rate=66000000 ov5640_mipi_camera_powerdown: powerdown=0, power_gp=0xa9 Pipeline is live and does not need PREROLL … Setting pipeline to PLAYING … New clock: GstSystemClock ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0 ERROR: from element /GstPipeline:pipeline0/MFWGstV4LSrc:mfwgstv4lsrc0: Internal data flow error. Additional debug info: /yocto/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/gstreamer/0.10.36-r2/gstreamer-0.10.36/libs/gst/base/gstbasesrc.c(2625): gst_base_src_loop (): /GstPipeline:pipeline0/MFWGstV4LSrc:mfwgstv4lsrc0: streaming task paused, reason error (-5) Execution ended after 10004586509 ns. Setting pipeline to PAUSED … Setting pipeline to READY … Setting pipeline to NULL … Total rendered:0 Freeing pipeline … [—>FINALIZE v4l_sink root@nitrogen6x:~# ov5640_mipi_camera_powerdown: powerdown=1, power_gp=0xa9 root@nitrogen6x:~# Thanks, Re: Freescale Yocto Project main page look under "sources" you will see "sources/meta-fsl-arm" "sources/meta-fsl-demos" "sources/poky" Re: Freescale Yocto Project main page Hi All, I want to know where exactly the actual source code will reside after "repo sync", since I see only bitbake, patch and *.inc files under source directory. Please let me know. Thank you, Gautham Re: Freescale Yocto Project main page After: $ source setup-environment build the local.conf file will be placed inside /build/conf/local.conf Re: Freescale Yocto Project main page Thanks DaianeAngolini Please let me know where can i find local.conf file, in fsl-community-bsp Folder tree after repo and clone fsl-community-bsp -> sources--------------------------------- > base                                 README                                  meta-fsl-arm                                 setup-environment                      meta-fsl-arm-extra                                                                                  meta-fsl-demos                                                                                  meta-openembedded                                                                                  poky Thanks Ram Re: Freescale Yocto Project main page The only difference would be the machine name to place in local.conf. Re: Freescale Yocto Project main page Hi All, I want to boot my Imx6q Sabre AI board with Yocto, can I follow the same steps suggested in this post, if not please suggest a thread/link that i can follow to achieve this. Thanks Ram Re: Freescale Yocto Project main page if you got  a custom board, why are you using a mx53qsb machine? unless the board is the same, you need to create your own board layer with proper changes. Leo Re: Freescale Yocto Project main page got a fsl-image-gui to compile for mx53qsb. I have a customboard with an attached LVDS lcd, but both vga as lcd remain black on boot. I attached a serial cable but only get gibberish over this (non-ascii characters). Does anyone know 1) where to find info on how to configure LVDS lcd and 2) where to configure tty/console so i can check my settings and actually see what's happening when I try the image Re: Freescale Yocto Project main page BrianEdmond, what branch are you using? The default distribution used on yocto (and meta-fsl-arm) is poky.conf. And by default X11 is selected. If you´re using master, you can override your DISTRO_FEATURES and remove X11. Take a look on poky.conf file under source Re: Freescale Yocto Project main page I did a build of fsl-image-test and it boots but I still seem to have an OpenGL ES environment which required X11.  In other builds I had a libGAL and libgal-fb which had the fbGetDisplayByIndex calls so I could run with fbdev.  Is there a configuration option I am missing? Brian Re: Freescale Yocto Project main page Thanks Nick. I have corrected the verbatim, adding the curl package. Leo Re: Freescale Yocto Project main page Ok if both packages are prerequisites then please change the text for the Ubuntu command in the section above entitled "Installing any Needed Package" to: $ sudo apt-get install gawk wget git-core diffstat unzip texinfo \   build-essential chrpath libsdl1.2-dev xterm curl This would help new users who need to be able to follow the instructions verbatim Nick Re: Freescale Yocto Project main page You can use both for downloading the repo app. Both packages are requisites. Leo Re: Freescale Yocto Project main page In the prerequisites for an Ubuntu Machine there is sudo apt-get install wget but in the fsl-community-bsp-platform/README there is $: curl https://dl-ssl.google.com/dl/googlesource/git-repo/repo > ~/bin/repo Should this instead be $: wget https://dl-ssl.google.com/dl/googlesource/git-repo/repo -O ~/bin/repo or should curl be added as a prerequisite? Re: Freescale Yocto Project main page All ugly hacks. He might use: sed after every sync (as he did) use local_manifests.xml use gitconfig 'insteadOf' configuration all hacks! better to fix the firewall. Re: Freescale Yocto Project main page OtavioSalvador, any other workaround you know to avoid the issue that Nick found? Leo Re: Freescale Yocto Project main page It seems that to change the repo from using the git protocol to using the http prtocol can be achieved as follows: $ sed -i 's/git:/http:/g' .repo/manifest.xml $ sed -i 's|yoctoproject.org|yoctoproject.org/git|g' .repo/manifest.xml I hope this helps others who are experiencing problems when following the supported BSP installation process from behind firewalls that do not support git Re: Freescale Yocto Project main page Further investigation reveals that the url http://git.yoctoproject.org/git/meta-fsl-arm works Re: Freescale Yocto Project main page No idea Nick. You need to talk to the admin guy Re: Freescale Yocto Project main page Yes a 'git clone http://git.yoctoproject.org/meta-fsl-arm' confirms that the meta-fsl-arm committers are not running git update-server-info so http access does not work. Until this is fixed I will use a zip archive Re: Freescale Yocto Project main page Might use 'git clone' to check git command. Re: Freescale Yocto Project main page Thank you for the information on how to get started with the new Yocto based Freescale BSPs. Could you please assist me with a problem fetching the repositories? It appears that protocols/ports other than HTTP are blocked by the corporate firewall. Changing to HTTP though results in errors finding the info subdirectory. Can you please suggest a resolution to this problem? The output from repo is as follows: $ ./repo sync fatal: unable to connect to github.com: github.com[0: 207.97.227.239]: errno=Connection timed out fatal: unable to connect to github.com: github.com[0: 207.97.227.239]: errno=Connection timed out fatal: unable to connect to github.com: github.com[0: 207.97.227.239]: errno=Connection timed out fatal: unable to connect to git.yoctoproject.org: git.yoctoproject.org[0: 140.211.169.56]: errno=Connection timed out fatal: unable to connect to git.yoctoproject.org: git.yoctoproject.org[0: 140.211.169.56]: errno=Connection timed out fatal: unable to connect to github.com: github.com[0: 207.97.227.239]: errno=Connection timed out fatal: unable to connect to github.com: github.com[0: 207.97.227.239]: errno=Connection timed out fatal: unable to connect to github.com: github.com[0: 207.97.227.239]: errno=Connection timed out error: Cannot fetch meta-fsl-arm error: Cannot fetch meta-fsl-arm-extra error: Cannot fetch meta-fsl-demos error: Cannot fetch fsl-community-bsp-base fatal: unable to connect to git.openembedded.org: git.openembedded.org[0: 140.211.169.152]: errno=Connection timed out fatal: unable to connect to git.openembedded.org: git.openembedded.org[0: 140.211.169.152]: errno=Connection timed out error: Cannot fetch meta-openembedded error: Exited sync due to fetch errors $ sed -i 's/git:/http:/g' .repo/manifest.xml $ ./repo sync Fetching projects:  16% (1/6)  fatal: http://git.yoctoproject.org/meta-fsl-arm/info/refs not found: did you run git update-server-info on the server? Fetching projects:  66% (4/6)  fatal: http://git.yoctoproject.org/poky/info/refs not found: did you run git update-server-info on the server? fatal: http://git.yoctoproject.org/meta-fsl-arm/info/refs not found: did you run git update-server-info on the server? fatal: http://git.yoctoproject.org/poky/info/refs not found: did you run git update-server-info on the server? error: Cannot fetch meta-fsl-arm error: Cannot fetch poky error: Exited sync due to fetch errors $ Re: Freescale Yocto Project main page Hi Thomas, sorry for the confusion but this document should not be used to build Freescale Yocto layers, please refer to this document How to test yocto for imx6 Repeat the steps, and try to build the same core image. If error persists, please send the description/log to the meta-freescale distribution list. Re: Freescale Yocto Project main page Hi Leonardo Sandoval Gonzalez, Met same error as Eduardo Gorio in busybox,. So, Freescale will support repo way for our build only? Either or customize build for our own board? BR Thomas Re: Freescale Yocto Project main page Hi gorio, please post your question on the meta-freescale mailing list. Check this document for instructions. Re: Freescale Yocto Project main page What does it wrong ? I did step by step from this tutorial.. gorio@ubuntu:/opt/poky/build$ bitbake core-image-minimal Loading cache: 100% |############################################################| ETA:  00:00:00 Loaded 1600 entries from dependency cache. Build Configuration: BB_VERSION        = "1.17.1" BUILD_SYS         = "x86_64-linux" NATIVELSBSTRING   = "Ubuntu-10.04" TARGET_SYS        = "arm-poky-linux-gnueabi" MACHINE           = "imx53qsb" DISTRO            = "poky" DISTRO_VERSION    = "1.3+snapshot-20130308" TUNE_FEATURES     = "armv7a vfp neon" TARGET_FPU        = "vfp-neon" meta              meta-yocto        = "master:d823759b4594143d522eae0b2a2498436a6dcb1e" meta-oe           = "master:6c9ac38e8b998e6739383ba91e0c4e0c0ed0094b" meta-fsl-arm      = "master:a502be66bef33f2016b43f8c7129b18f92d6e337" NOTE: Resolving any missing task queue dependencies NOTE: Preparing runqueue NOTE: Executing SetScene Tasks NOTE: Executing RunQueue Tasks ERROR: Function failed: do_configure (see /opt/poky/build/tmp/work/armv7a-vfp-neon-poky-linux-gnueabi/busybox/1.20.2-r6/temp/log.do_configure.23360 for further information) ERROR: Logfile of failure stored in: /opt/poky/build/tmp/work/armv7a-vfp-neon-poky-linux-gnueabi/busybox/1.20.2-r6/temp/log.do_configure.23360 Log data follows: | DEBUG: Executing python function sysroot_cleansstate | DEBUG: Python function sysroot_cleansstate finished | DEBUG: Executing shell function do_configure | trap: 80: SIGHUP: bad trap | ERROR: Function failed: do_configure (see /opt/poky/build/tmp/work/armv7a-vfp-neon-poky-linux-gnueabi/busybox/1.20.2-r6/temp/log.do_configure.23360 for further information) ERROR: Task 914 (/opt/poky/meta/recipes-core/busybox/busybox_1.20.2.bb, do_configure) failed with exit code '1' NOTE: Tasks Summary: Attempted 1030 tasks of which 1026 didn't need to be rerun and 1 failed. Waiting for 0 running tasks to finish: Summary: 1 task failed:   /opt/poky/meta/recipes-core/busybox/busybox_1.20.2.bb, do_configure Summary: There was 1 ERROR message shown, returning a non-zero exit code. gorio@ubuntu:/opt/poky/build$ Re: Freescale Yocto Project main page Please refer to the bellow link to check the community supported way to build Freescale Yocto layers How to test yocto for imx6 Re: Freescale Yocto Project main page I'll update the page above soon. Meanwhile, I suggest you to use the instructions located at: Freescale/fsl-community-bsp-platform · GitHub For i.MX53 platform, use the denzil branch, for i.MX6, use the master branch. Rgds Rogerio Re: Freescale Yocto Project main page Hi Thanks a lot for the information. I tried to use the instruction above to build image for iMX6q SabreLite, but I've got a error below when I try to do "bitbake core-image-minimal" ================================= Summary: There were 2 WARNING messages shown. Summary: There were 2 ERROR messages shown, returning a non-zero exit code. WARNING: Host distribution "Ubuntu 10.10" has not been validated with this version of the build system; you may possibly experience unexpected failures. It is recommended that you use a tested distribution. Loading cache: 100% |###########################################| ETA:  00:00:00 Loaded 1160 entries from dependency cache. ERROR: No recipes available for:   /home/its/poky/meta-fsl-arm/recipes-core/udev/udev_173.bbappend ERROR: Command execution failed: Exited with 1 ===================================== Anybody can help? I am very new to Yocto/bitbake, we used to build image by using ltib, Thanks a lot.
View full article
Example S32K144 FlexCAN Pretended Networking STOP mode test S32DS.ARM.2.2 ********************************************************************************  Detailed Description:  Example shows how to use FlexCAN 0 Pretended networking mode to allow FlexCAN  module to wake up MCU from STOP mode.  Wake up by Timeout and wake up by Match events are enabled.  Also pin interrupt can be used to exit STOP mode.  So MCU enters STOP mode by pressing SW3 button.  MCU exits STOP mode when one of following happens:  - no CAN message comes in 8sec (CAN PN timeout event)  - message with standard ID 0x554 or 0x555 comes (CAN PN match event)  - SW2 button is pressed (PTC12 interrupt)  In run mode blue LED is dimming and the rate is different for each wakeup event  ------------------------------------------------------------------------------  Test HW: S32K144 EVB-Q100  MCU: FS32K144UAVLL 0N57U  Fsys: 160MHz  Debugger: Lauterbach, OpenSDA  Target: internal_FLASH ******************************************************************************** General
View full article
TCP Client & Server Implementation on MCUXrpesso SDK --- part I--using LwIP Netconn API Introduction TCP Client & Server establishes a two-way connection between a server and a client. It is the most common communication model used by applications such as HTTP, Telnet, FTP, SSH and others LwIP is a free light-weight TCP/IP stack in MCUXpresso SDK. It has three application programming interfaces (API): RAW API:  it is the native API of LwIP. It enables the development of applications using event callbacks. Netconn API:  it is a high level sequential API that requires the services of a real-time system (RTOS), The Netconn API enables multi-threaded operations BSD Socket API: it is developed on top of the Netconn API. In this article, I will introduce how to implement a TCP client & Server demo with LwIP Netconn API.  One EVK-RT1060 acts as TCP server, and others boards act as TCP clients.  They are connected through an Ethernet router.  They communicate via TCP protocol. If you press SW8 on the client board, it will toggle a LED on the Server board. This article is for beginners to understand the Netconn API on NXP MCUXpresso SDK. 2. Hardware configuration PHY settings: In this demo, we use phyksz8081, that is the default PHY in EVK-RT1060 board.  ENET port 0. /*! @brief The ENET PHY address. */ #define BOARD_ENET0_PHY_ADDRESS (0x02U) /* Phy address of enet port 0. */ /* Address of PHY interface. */ #define EXAMPLE_PHY_ADDRESS BOARD_ENET0_PHY_ADDRESS /* MDIO operations. */ #define EXAMPLE_MDIO_OPS enet_ops /* PHY operations. */ #define EXAMPLE_PHY_OPS phyksz8081_ops /* ENET clock frequency. */ #define EXAMPLE_CLOCK_FREQ CLOCK_GetFreq(kCLOCK_IpgClk) Configure the external PHY, pull up the ENET_INT before RESET.     GPIO_PinInit(GPIO1, 9, &gpio_config);     GPIO_PinInit(GPIO1, 10, &gpio_config);     /* pull up the ENET_INT before RESET. */     GPIO_WritePinOutput(GPIO1, 10, 1);     GPIO_WritePinOutput(GPIO1, 9, 0);     delay();     GPIO_WritePinOutput(GPIO1, 9, 1); MAC settings: In this demo, MAC address is defined in Macro configMAC_ADDR /* MAC address configuration. */ #define configMAC_ADDR                     \     {                                      \         0x02, 0x12, 0x13, 0x10, 0x15, 0x11 \     }  3. Starting a network interface To create a new network interface, the user allocates space for a new struct netif (but does not initialize any part of it) and calls netifapi_netif_add:     IP4_ADDR(&fsl_netif0_ipaddr, configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3);     IP4_ADDR(&fsl_netif0_netmask, configNET_MASK0, configNET_MASK1, configNET_MASK2, configNET_MASK3); IP4_ADDR(&fsl_netif0_gw, configGW_ADDR0, configGW_ADDR1, configGW_ADDR2, configGW_ADDR3);     netifapi_netif_add(&fsl_netif0, &fsl_netif0_ipaddr, &fsl_netif0_netmask, &fsl_netif0_gw, &fsl_enet_config0,                        ethernetif0_init, tcpip_input); Pass tcpip_input API to netif_add API as input callback function that is called to pass ingress packets up in the protocol layer stack next we need to bring the interface up An interface that is “up” is available to your application for input and output, and “down” is the opposite state. Therefore, before you can use the interface, you must bring it up. This can be accomplished depending on how the interface gets its IP address.  We can use static IP address  or DHCP. Set the network interface as the default network interface netifapi_netif_set_default(&fsl_netif0); Bring the interface up, available for processing     netifapi_netif_set_up(&fsl_netif0); 4. LwIP Initialization Call tcpip_init to create a tcpip_thread, this thread has exclusive access to LwIP core functions. Other threads communicate with this thread using message boxes. It also starts all the timers to make sure they are running in the right thread context. tcpip_init(NULL, NULL); 5. TCP Client & Server Implementation For TCP communications, one host listens for incoming connection requests. When a request arrives, the server accepts it and data is transferred between the server and the client. The sequence of function calls for the client and a server participating in a TCP connection is show in below picture. The steps for establishing a TCP connection on the client side are the following: Create a netconn using the netconn_new() function. Connect the connection to the address of the server using the netconn_connect() function. Send and receive data by means of the netconn_recv() and netconn_send() functions. Close the connection by means of the netconn_close() function. The steps in establishing a TCP connection on the server side are as follows Create a connection with netconn_new() function; Bind the connection to an address using the netconn_bind() function. Listen for connections with the netconn_listen() function. Accept a connection with the netconn_accept() function, this blocks until a client connects. Send and receive data by means of netconn_send() and netconn_recv(). Close the connection by means of the netconn_close() function. 5.1 TCP SERVER IMPLEMENTATION netconn_new() is used to create a new connection.   conn = netconn_new(NETCONN_TCP); netconn_bind() binds a connection to a local IP address and port.   netconn_bind(conn, IP_ADDR_ANY, TCP_CUSTOM_PORT); netconn_listen() function sets a TCP connection into a listening TCP connection.   /* Tell connection to go into listening mode. */   netconn_listen(conn); netconn_accept() function accepts an incoming connection on a listening TCP connection.    err = netconn_accept(conn, &newconn); netconn_recv() function receives a message from a netconn. netconn_send() function sends data to the currently connected remote IP/Port. In this demo, if server board receives a ‘TOGGLE’ message from the client board, it will toggle a LED. (GPIO1/3,  need to connect a LED manually)           while ((err = netconn_recv(newconn, &buf)) == ERR_OK) {         PRINTF("Received  %s\n", buf->p->payload);         do {              netbuf_data(buf, &data, &len);              tcp_rx_buf = (void *)data;              if (tcp_rx_buf[0] == 'T')              {                  PRINTF("LED was toggled from client\r\n");                 GPIO_PortToggle(EXAMPLE_LED_GPIO, 1u << EXAMPLE_LED_GPIO_PIN);                 netconn_write(newconn, TcpReply, sizeof(TcpReply) , NETCONN_COPY );              }         } while (netbuf_next(buf) >= 0);         netbuf_delete(buf);       } //end of while(( err   5.2 TCP CLIENT IMPLEMENTATION For the client side, the netconn structure is created:   conn = netconn_new(NETCONN_TCP); netconn_connect():  when a user issues a connect command, the stack creates a connection with another host. Before connect can instruct the stack to establish a connection, the user must pass a netconn and a sockaddr_in structure containing the destination IP address and port. In TCP, the handshaking packets will be exchanged.   memset(&server_addr, 0, sizeof(server_addr));   server_addr.sin_family = AF_INET;   server_addr.sin_port = PP_HTONS(TCP_CUSTOM_PORT);   server_addr.sin_addr.s_addr = server_ip_addr.addr;   err = connect(client_sock, (struct sockaddr *)&server_addr, sizeof(server_addr));   LWIP_ASSERT("connect fail, please start TCP server first !  ",  err == 0); In this demo, a GPIO is initialized and interrupt is enabled. When SW8 is pressed, the client board will send ‘Toggle’ command to the TCP server.   while (1)   {       if (g_InputSignal)       {           delay();           if (1 == GPIO_PinRead(EXAMPLE_SW_GPIO, EXAMPLE_SW_GPIO_PIN))           {               PRINTF("%s is turned on.\r\n", EXAMPLE_SW_NAME);               err = send(server_sock, Sendtext, sizeof(Sendtext) / sizeof(Sendtext[0]), 0);           }           /* Reset state of switch. */           g_InputSignal = false;       }  //end of if (g_InputSignal)   }  
View full article
带 DMA 的 S32K358 RTD ICU 示例 德拉支持、 我的客户 Aptiv 正在寻找基于 DMA 的 ICU 处理。根据传入的上升沿,应在 mcl 驱动程序中配置 DMA 交易。在我们的 RTD ICU 用户手册中,自某些版本发布以来,我们发现了同样的说法: 3.6.1 带有 DMA 功能的 Icu 有关此功能 的提示将在下一版本中添加。 它在 RTD5.00 / 6.0.0 和 7.0.0 中 我们是否有工作示例向 Aptiv 演示如何使用该功能? 最好是 S32K358 RTD6.0.0,但如果有其他版本也可以。 顺祝商祺! 维克托 优先级:高 RTD 资料来源直接客户 Re: S32K358 RTD ICU Example with DMA 你好@viktorfellinger、 该功能有一些注意事项: - DMA 只支持 IcuMeasurementMode 为 ICU_MODE_SIGNAL_MEASUREMENT 或 ICU_MODE_TIMESTAMP。 - DMA 功能仅支持 eMios SAIC 模式下的 ICU_MODE_SIGNAL_MEASUREMENT。 - 只有部分 Emios 通道支持 DMA,您可以通过所附的 excel 找到这一点:RM 中的 S32K3xx_DMAMUX_map,就像这样: 在我的例子中,我使用 Emios_0,通道 1 来测量信号。 在 Icu: 在 Mcl 中,使用 DMA_TCD0 在 Rm: 在平台上: 我在这里附上了我在软件包中使用所附示例 (RTM600) 的示例,然后添加了这个功能。 我还创建了票证:ARTDCT1-637,以便 SW 团队可以在下一个版本中更新本章。 顺祝商祺! Nhi
View full article
安装 Zephyr SDK 版本 Zephyr SDK 是一套用于构建 Zephyr 应用程序的构建工具。它包含 GCC 和 CMake,并且每个 Zephyr 版本都与特定的 Zephyr SDK 版本相关联。此版本已在 Zephyr 存储库的 SDK_VERSION 文件中注明。使用推荐的 Zephyr SDK 版本非常重要——版本不匹配可能导致构建错误。 例如,Zephyr v4.1指定Zephyr SDK v0.17.0。如果在 Zephyr v4.1 中使用 Zephyr SDK v0.17.2(用于 Zephyr v4.2),会遇到版本错误。如果您需要为 Zephyr v4.1 版本应用程序,请安装Zephyr SDK v0.17.0。 您可以安装多个 Zephyr SDK 版本,并在构建时进行切换(请参阅下方说明)。 完整安装与最小安装。 完全安装:包括每个支持的 SoC 架构的所有工具链。建议初学者使用,但需要更多磁盘空间和下载时间。 最小安装:允许您仅选择所需的工具链。节省空间和时间。 对于最小化安装,运行 setup.cmd 脚本选择要安装的工具。在恩智浦板上,选择: 注册 Zephyr SDK CMake 软件包 安装主机工具 aarch64-zephyr-elf (64 位 ARM) arm-zephyr-eabi (32 位 ARM,包括 NXP 微控制器) 可选 xtensa-nxp… (Cadence Tensilica DSP 内核) 安装 Zephyr SDK 这些步骤包括使用 MCUXpresso 安装程序安装 Zephyr SDK、从 CLI 安装 West 或手动下载。 使用 MCUXpresso 安装程序进行安装 MCUXpresso 安装程序从 Zephyr v4.2 开始支持 Zephyr 软件包。每个软件包都会安装相应的 Zephyr SDK 版本(例如,v4.2 软件包会安装 SDK v0.17.2)。此选项安装了面向恩智浦开发的最小工具集。 MCUXpresso 安装程序不支持更早版本的 Zephyr SDK。对于 v0.17.1 或更早版本,请使用 West 或手动安装。 使用 West CLI 进行安装 Zephyr 项目已将 Zephyr SDK 安装添加到 West。 对于命令行界面 (CLI),请激活Python 虚拟环境,然后运行: west sdk install --version 0.17.0   如果省略 --version ,West 将使用 Zephyr 仓库的 SDK_VERSION 文件中的版本。 默认情况下,安装完整软件包。如需最小化,请添加 -i 。 通过手动下载安装 从 https://github.com/zephyrproject-rtos/sdk-ng/releases 下载 Zephyr SDK。 请根据您的主机操作系统选择完整版或精简版。 解压到您的用户文件夹(West 和 MCUXpresso 的默认位置): Windows: C:\Users\ \zephyr-sdk-0.17.0 Ubuntu: /home/ /zephyr-sdk-0.17.0 选择 Zephyr SDK 版本 多个 Zephyr SDK 版本可以共存。West 默认使用最新版本,但你可以将其覆盖: VS Code:导入示例时,在向导中选择 Zephyr SDK 版本。 CLI:在构建前设置环境变量 ZEPHYR_SDK_INSTALL_DIR 。此命令在 Ubuntu 中设置该变量: 导出 ZEPHYR_SDK_INSTALL_DIR="/home/ /zephyr-sdk-0.17.0" 或者在 Windows 中: set ZEPHYR_SDK_INSTALL_DIR= C:\Users\ \ zephyr-sdk-0.17.0   返回 Zephyr 知识中心    
View full article
[RTD600 MCAL] S32K3X4EVB-T172 RTC API Wake-up This example project will show user how to use and configure the basic functionalities of WKPU + GPT RTC API.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) or S32K344MINI-EVB * MCU: S32K344 * IDE: S32DS3.5 & S32DS3.6 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU & RTC units for wake-up. The RTC is present in always ON domain, hence available in RUN mode as well as in STANDBY mode. The chip contains one instance of RTC (Real Time Clock) timer and API (Autonomous Periodic Interrupt) timer, where both can perform 32-bit comparisons. Both RTC and API timers can generate interrupts as well as wake-up from low power modes. The following figure highlights the path for RTC API wake-up. Please refer to Chapter 69.3.2 API functional description from the S32K3XX reference manual (Rev. 12) for further information. The routine waits for SW5 to be pressed, then: Turns off the green LED Switches CORE_CLK to Option C - Boot Standby mode (CORE_CLK @ 24 MHz). Initializes the ICU driver. Configures RTC_API channel (WKPU0) Initializes GPT module. Starts timer and sets RTC_API_TIME. Enters standby. After the period defined, RTC API generates an interruption and MCU wakes up. After wake-up, MCU resets and polls for SW5 to be pressed again. The RTC API value can be changed with RTC_API_TIME definition. This example is provided as is with no guarantees and no support.
View full article
S32K14x SRAM ECC注入示例 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> ******************************************************************************** 详细描述: 此示例显示了 SRAM ECC 注入。 默认情况下,在对 SRAM_U 区域中的位置进行读取访问时会注入双位 ECC 错误。 这可以通过 SRAM_U 和 DOUBLE_BIT 宏来改变。 ERM 和 MCM 模块都可以检测到错误,并可以调用相应的中断。 虽然只需要 ERM,但为了演示目的,MCM 中断也启用了 其优先级低于 ERM 中断。 首次调用的 ERM 中断会禁用注入机制 这样在堆栈读取访问期间就无法检测到后续错误。 默认的 S32 Design Studio start_up 文件将向量表复制到 SRAM_L 区域。 为了能够在此 SRAM 区域注入 ECC 错误并调用中断, 复制被 __flash_vector_table__ 符号禁用 在start_up.h中声明文件并在S32K144_64_flash链接器文件中定义。 -------------------------------------------------------------------------------------------- 测试硬件:S32K144EVB-Q100 单片机:S32K144 0N57U 调试器:S32DSR1 目标:internal_FLASH ********************************************************************************
View full article