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******************************************************************************** * Detailed Description: * * Example shows possible setting for PWM duty cycle update using DMA. * FTM0 ch0 is set to Edge aligned mode with 20KHz period. * Initialization trigger is routed back to HW trigger 1 using TRGMUX, so this HW * trigger can be used for CnV synchronization. * DMA on FTM0 ch0 is enabled (on ch0 CHF flag) and DMA ch0 configured to update C0V * from duty cycle variable. * NOte CHF is not set for 0% and 100% duty cycle, thus no DMA trigger is generated. * * Green LED is dimming as duty is changing. * * ------------------------------------------------------------------------------ * Test HW: S32K118EVB-Q64 * MCU: PS32K118LAMLH 0N97V * Compiler: S32DS.ARM.2.2 * SDK release: S32SDK_S32K1xx_RTM_3.0.3 * Debugger: Lauterbach, OpenSDA * Target: internal_FLASH * ******************************************************************************** Revision History: 1.0 Sep-16-2021 Petr Stancik Initial Version *******************************************************************************/
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The purpose of this demo application is to show you the usage of the FlexCAN module configured to use Flexible Data Rate using the S32 SDK API. - In the first part, the application will setup the board clocks, pins and other system functions such as SBC if the board uses this module as a CAN transceiver. - Then it will configure the FlexCAN module features such as FD, Bitrate and Message buffers - The application will wait for frames to be received on the configured message buffer or for an event raised by pressing one of the two buttons which will trigger a frame send to the recipient. - Pressing SW3 button of board 1 shall trigger a CAN transfer that results in toggling the RED led on board 2. - Pressing SW2 button of board 1 shall trigger a CAN transfer that results in toggling the GREEN led on board 2. - This demo application requires two boards, one configured as master and the other one configured as slave (see MASTER/SLAVE defines in application code) or single board connected with CAN tool. - Both the event and error callbacks are installed, callback_test variable indicates event entering bit0 .. RX complete bit1 .. TX complete bit2 .. ERR INT flag set bit3 .. BOFF INT flag set - to enter bus off simply short CANH with GND and send message using either SW1 or SW2, FlexCAN enters bus off (error event) and blue LED is ON. Also TX MB is aborted. Remove short connection and send message again normally, blue LED is off.   ------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: FS32K1441 0N57U * Compiler: S32DS.ARM.2.2 * SDK release: S32SDK_S32K1xx_RTM_3.0.3 * Debugger: Lauterbach, OpenSDA * Target: internal_FLASH  
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Due to K3 hasn't been mass-produced yet, this content is moved to S32K3 Internal forum: https://community.nxp.com/t5/S32K3-Internal-Community/S32K3-Low-power-lab/ta-p/1280219 Any question, pls contact [email protected].
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******************************************************************************** * File: main.c * Owner: David Tosenovjan * Version: 0.0 * Date: Mar-12-2021 * Classification: General Business Information ******************************************************************************** * Detailed Description: * Example code configures the whole 4kB FlexRAM area for SRAM use. * By default or after mass erase, S32K1 device has only address range * 0x1400_0000-0x1400_0DFF (3.5kB) accessible for SRAM use. * To enable remaining 0.5kB it is needed to perform Program Partition Command * (with the setting shown in the example), but only once with the blank new * device (or previously mass erased). It sets up address range * 0x1400_0000-0x1400_0FFF for SRAM use. * ------------------------------------------------------------------------------ * Test HW: S32K146EVB-Q144 * MCU: PS32K146UAVLQ 0N73V QAC1735D * Fsys: default * Debugger: Lauterbach Trace32, OpenSDA * Target: Debug_RAM * Terminal: none * EVB connection: default ********************************************************************************
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********************************************************************************  Detailed Description:  Example shows FlexCAN 0 usage in RUN/VLPR modes using SDK.  CAN bitrate is set to 250bit/s.  MCU enters VLPR mode by pressing SW3 button. CAN std message is sent with data VLPRmode"  MCU exits VLPR to RUN mode when one of following happens:  - CAN std message with RX_MSG_ID is received and MCU is in VLPR  - SW2 button is pressed (PTC12 interrupt). CAN std message is sent with data "RUN mode"  Blue LED is dimming and the rate is different for each power mode due to different  system clock (48Mhz vs 4MHz)  ------------------------------------------------------------------------------  Test HW: S32K116EVB-Q48  MCU: PS32K116LAM 0N96V  Compiler: S32DS.ARM.2.2  SDK release: S32SDK_S32K1xx_RTM_3.0.3  Debugger: Lauterbach, OpenSDA  Target: internal_FLASH ********************************************************************************
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Hello everyone, SEGGER's Real Time Transfer (RTT) is the new technology for interactive user I/O in embedded applications. It combines the advantages of SWO and semihosting at very high performance. Bi-directional communication with the target application Very high transfer speed without affecting real-time behavior Uses debug channel for communication No additional hardware or pin on target required Supported by any J-Link model Supported by ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33 and Renesas RX100/200/600 Complete implementation code providing functionality and freedom Here, I'd like to share you the SEGGER RTT porting project on S32K144 as attached. SW requirements: S32DS for ARM v2.2 IDE + S32K1xx SDK RTM 3.0 HW requirements: S32K144-EVB  + J-LINK debugger   For SEGGER RTT, you can refer to: About Real-Time Transfer: https://www.segger.com/products/debug-probes/j-link/technology/about-real-time-transfer/   RTT SEGGER Wiki: https://wiki.segger.com/RTT#SEGGER_RTT_TerminalOut.28.29;   Using Segger Real Time Terminal (RTT) with Eclipse: https://mcuoneclipse.com/2015/07/07/using-segger-real-time-terminal-rtt-with-eclipse/   Hope this project can help you, and enjoy the RTT! Best regard, Enwei Hu.
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Audio Video Bridging(AVB) is a protocol for the transport of audio and video streams over Ethernet-based networks, which makes it possible to deliver high volumes of data in real-time to multiple destinations with very low latency. This reference design board demonstrates the usage for AVB over S32K148. Alternatively, it can be an S32K148 evaluation board of 100pin version besides S32K148EVB-Q144 and S32K148EVB-Q176. Below shows the board layout, diagram, and main features. Figure 1. S32K148AVB-RDB Layout   S32K148AVB-RDB Diagram(Rev B) Figure 2. S32K148AVB-RDB Diagram S32K148AVB-RDB Features Figure 3. S32K148AVB-RDB Features In terms of the software, we provide several examples to show the AVB/TSN usages and other applications. The avb_listener_talker project is the main example which implements most features and demonstrates by connecting 2 AVB boards by Ethernet cable.   Figure 4. S32K148AVB-RDB Code Examples Below software stack and middleware are implemented. ✓ RTOS: FreeRTOS ✓ Peripherial Driver: SDK RTM 3.0 (Work with Processer Expert) ✓ AVB Stream: RTM 1.0 ✓ AVB AudioIf: RTM 1.0 ✓ gPTP Stack Version: 1.3.4 ✓ Lwip Stack Version: 2.1.2 •Note: Even though we did a lot of tests, it’s still the customer’s responsibility to ensure the total quality by themselves when it’s integrated into a real application project, all the sample codes and user guide documentation are just reference for the customer. •Note: We do not have an FCC or CE certificate for this board.   Now we have 50 pcs boards available in Chongqing, China. For applying for the board, please contact NXP sales or GPIS marketing.  Since the AVB stack is not free of use, for accessing the code please contact NXP sales or GPIS marketing. For technical discussion, please contact [email protected] or [email protected].  
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******************************************************************************************************** Detailed Description: LPUART1 echoes RX signal at 115200 bps When an 's' char is received, the MCU enters VLPS. A falling edge of the RX signal brings the MCU from VLPS via LPUART RXEDGIF interrupt. BUS_CLK can be monitored at CLKOUT PTD14. In VLPS, BUS_CLK is gated off. -------------------------------------------------------------------------------------------------------------------------- Test HW: S32K144EVB-Q100 MCU: S32K 0N57U Debugger: S32DS_ARM_2.2, OpenSDA Target: internal_FLASH ********************************************************************************************************    
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Hi,      The draft time gap, from power-on to clock output of S32K14x, is as below.    You can take a reference. Cheers! Oliver
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NXP S32K1xx serial MCU is widely used in automotive body control and many general-purpose automotive applications, while to target some applications with special requirements such as requiring more peripherals instance than the portfolio can offer (e.g. 6x CAN-FD, 6x LIN or 4 I2C) like mid-end BCM or DCU, an on-board dual/multi MCU sync solution is proposed as an alternate solution to extend the S32K1xx MCU peripherals/memory resource and CPU process capability. The eRPC (Embedded Remote Procedure Call) is a Remote Procedure Call (RPC) system created by NXP(https://github.com/EmbeddedRPC/erpc/). An RPC is a mechanism used to invoke a software routine on a remote system using a sample local function call. eRPC software architecture Figure 1. eRPC software architecture In this project, we ported the eRPC protocol to S32K1xx platform, tested and figured out its performance. An out-of-box software package with detailed user guide (this document) is provided to simplify and accelerate users’ assessment of eRPC on S32K1xx. Two S32K144EVB boards are connected to demonstrate the usage of the eRPC protocol. One works as the client, another as the server. The client board starts an eRPC request and the server board responds to the request and executes the service. Figure 2. eRPC task workflow on S32K144-EVB There are three types of MCU extensions are demonstrated in the project: MCU IO extension: Set LED; MCU peripheral extension: CAN and LIN message forwarding, LED luminance regulator; CPU process capability extension: Matrix multiply and addition math operation. Please find the attached sample projects and user guide for more details. Figure 3. Table of Contents in User Guide •Note: Even though we did a lot of tests for the solution with the sample projects on S32K144-EVB, it’s still customer’s responsibility to ensure the total quality by themselves when it’s integrated in a real application project, all the sample codes and user guide documentation are just reference for customer. If you have any questions about this solution, please post here and we can have an open discussion. Best Regard, Enwei Hu(胡恩伟) GPIS System Apps Engineer.  
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Often we need to implement a SENT receiver in order to read the information sent by some sensors. It is useful to have the possibility of transmitting different message patterns in order to test your implementation. With this project you can transmit via a computer terminal a group of messages (up to 64). The project runs on a S32K144 EVB board, the output signal goes through J206 pin.
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******************************************************************************** Detailed Description: This example shows SRAM ECC injection. By default, a double-bit ECC error is injected on read access of a location in SRAM_U region. This can be changed with the SRAM_U and DOUBLE_BIT macros. The errors can be detected by both the ERM and MCM modules and the corresponding interrupts can be called. Although only ERM is needed, for demonstration purposes, the MCM interrupt is enabled as well with a lower priority than the ERM interrupts. The ERM interrupts that are called first disable the injection mechanism so that subsequent errors can not be detected during a stack read access. The default S32 Design Studio start_up file copies the vector table to the SRAM_L region. To be able to inject ECC errors in this SRAM region and call the interrupts, the copying is disabled by __flash_vector_table__ symbol  declared in the start_up.h file and defined in the S32K144_64_flash linker file. -------------------------------------------------------------------------------------------- Test HW: S32K144EVB-Q100 MCU: S32K144 0N57U Debugger: S32DSR1 Target: internal_FLASH ********************************************************************************
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Hi,     I would like to share with you the follow solution for S32K14x which could be attached while couldn't be re-programmed and stopped at RAM initializing.     If you met the issue as title, please check the SIM_CHIPCTL's value in IDE with attach function. Maybe you can find that the value is 0x0, which is not as default value after reset which is 0x0030_0000.     If you check the meaning on SIM_CHIPCTL, you can find that SRAMU and SRAML are retained across resets.  To solute the issue, you should add 'WRITE_LONG=00300000/40048004/ ;' in front of it the algorithm (it's better after reset) of freescale_s32k144f512m15_pflash_dflash_eeprom.arp which is at  'C:\NXP\S32DS_ARM_v20\eclipse\plugins\com.pemicro.debug.gdbjtag.pne_3.3.3.201712132114\win32\gdi\P&E\supportFiles_ARM\NXP\S32K1xx' After that, you can download your project as normal. Cheers! Oliver
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An example implementation of SENT protocol receiver with S32K118 evaluation board. The input is expected in J106, TICK duration is 2,75us. CRC is calculated and check, the decoded output is printed into terminal via UART (ASCII)
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Using S32k144 ISELD SDK driver and adding Touch Sensor software, a demo is created to show different light combinations when electrodes of S32K144 EVB are touched. ADK ISELED board is attached to S32K144 EVB.
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Example of usage of AIPS-lite, Protects the access to GPIO port. This example can be used with UART terminal, 115200 bps. The interface menu shows like this: AIPS example has started Please press 0 + enter to set red LED in GPIO port Please press 1 + enter to set red LED in GPIO port Please press 2: GPIO peripheral will only accept accesses from trusted master, M0 (Core) is set as untrusted when a write access, AIPS cannot longer be modified from core and a reset will occur in the next GPIO access Please press 3: GPIO access is write protected, any write access to GPIO will produce a hard fault
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Hi,     If you try to compile the sample project within S32K14X_MCAL4_2_RTM_1_0_0, you should take care of the command if you use Linaro.    After you set the environment of compiling and run the command under command window, you should enter     "launch.bat MODE=USER TOOLCHAIN=linaro"    NOT    "launch.bat MODE=USER TOOLCHAIN=LINARO"      The command is case sensitivity.   Hope you can compile the project successfully.  Cheers! Oliver
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To accelerate S32K demand creation and support urgent evaluation requriement in Great China, we build one batch boards locally. These boards will only be given out to our potential opportunities for free. The boards are made by China local partner and verified by AE and FAE team. if you have any question on this kind of board, please go to China Auto CAS or Auto MCU marketing for support. 1. Board overview   2. Pinout 3. Test point 4. Block diagram 3. The main difference between NXP official S32K EVB and this FRDM-S32K144 board are OpenSDA firmware and CAN PHY The original OpenSDA firmware in this board is from MBED which is not supported by S32DS, thus we need to change to PEmicro OpenSDA firmware, and then we can use S32DS for development.   Unplug the USB cable (if attached). Press and hold the Reset button. Plug in a USB cable from a USB Host to the OpenSDA USB port. Release the RESET/Bootloader button. A removable drive will be visible in the host file system with a volume label of BOOTLOADER. Drag/drop or copy/paste attached firmware “DEBUG-FRDM-K64F_Pemicro_v108a_for_OpenSDA_v2.0.bin” into the removable drive. Unplug the USB cable and plug it in again. The OpenSDA application should now be running. The CAN physical is different. This board used standalone CAN PHY but not CAN SBC. Please refer SCH file for debug.   Original Attachment has been moved to: dmeo2.rar
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S32Kxxx   Excel configurators MPC5xxx/S32Kxx: CAN / CAN FD bit timing calculation   S32K1/S32M24x   Documents Solution for S32K14x which could be attached while couldn't be re-programmed Fault handling on S32K144 FRDM-S32K144 EVB Useful tips about S32DS for ARM v2018.R1 IDE and S32K1xx development Using S32K CMSIS-SVD Files in EmbSysRegView Eclipse Plugin FlexNVM used as code/data Flash   S32K3/S32M27x   Excel configurators S32K344 DCF Configurator   Debugger plugins Lauterbach FCCU_Utility plugin - S32K3xx    Documents Restrict the debug access with a password when HSE is not used S32K3/S32M27x – eMIOS Usage S32K3/S32M27x – eMIOS/BTCU/ADC/DMA – [RTD600] S32K3/S32M27x – eMIOS/TRGMUX/LCU – [RTD600] DOC_S32K3x1_S32K3x2_S32K3x4_EIM_Mapping_v1_0_SPD105_Unofficial  DOC_S32K3x1_S32K3x2_S32K3x4_eMCEM_DCM_Mapping_v1_0_SPD1.0.5_Unofficial    S32K39-37-36   Documents S32K39-37-36 – eMIOS/BTCU/SAR-ADC/DMA – [RTD600] S32K39-37-36 – eFlexPWM/TRGMUX/BCTU/SAR-ADC/DMA – [RTD600]  
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Welcome to the S32K Microcontrollers forum. Get expert advice from the NXP developer community. Our support team also monitors these forums to provide answers and take your feedback.   Anyone can read the discussions, but only registered NXP Community members can post questions and comments. Before you ask a question, please search the community to find if someone has already offered a solution. If you don’t see a solution, then ask the community your question. S32K Web page S32K Reference manual S32K Data sheet S32K Application notes and other documents S32K Evaluation Board S32 Design Studio IDE https://community.nxp.com/docs/DOC-334170 
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