S12 / MagniV Microcontrollers Knowledge Base

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This example simulates ECC issue by cumulative write into the same EEPROM area without an erasing.   The EEPROM erase operation set all bits into log1. The EEPROM program operation may keep bit cells in log1 state or change it into log0 state, but not in opposite way.   The S12Z MCU EEPROM is protected by 22-Bit ECC Scheme. Every word (16bits) is protected by additional 6 bits with ECC checksum. The ECC values are not accessible for users. Every EEPROM reading triggers also ECC check by internal logic. The single bit error in user data may be corrected by ECC checksum. The double bit error cannot be corrected.   The ECC protection is implemented also at flash controller commands and results are signalling by MGSTAT bits.   The first case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b10 due to fact that just 1 bit is different during write verification (correctable error)   The second case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b11 due to fact that more than 1 bits are different during write verification (non-correctable error)   The third case simulates Double-bit ECC error during reading. The MGSTAT bits after the second write are 0b11 due to fact that more than 1 bits are different during write verification (non-correctable error)       The EEPROM patterns are selected for highlighted described behavior and they don't have any real meaning.   The cumulative write is not allowed for normal operation!!! The code from this example should be used only for design testing - not in production!!!   Please, see the prm file. Address range 0x100000-0x100001 is excluded from default EEPROM and is used as user EEPROM memory The size of EEPROM sectors is 2 bytes. The EEPROM_Program() function may program up to 4 words in single flash command.   Note: The EEPROM_Program() function was updated - erase verification is skipped     I hope it helps you. Radek
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CAN Standard ID, CAN Extended ID memories refreshment   A human is a creature forgetting things, procedures and a lot of useful principles in a very short time especially when it often jumps between different projects. I also solve the CAN interface filter setup issues occasionally and even I did it a lot of times I always have to think how to set the filter easily and fast. Because of this, on the basis of last experience, I created an excel sheet this year which provides me an easy return to my CAN filter memories. I am not sure it will be helpful for everyone as it is helpful for me, however, I am sharing..... Each of us has different thinking and ways of visualization so any idea for improvement is appreciated in advance.      
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In the attached zip file you can find three software examples demonstrating clock module and PLL configuration on MagniV device MC9S12ZVM. The examples are made in CodeWarrior IDE v10.6 (Eclipse). The main.c source file of each project provides detailed description, comments and important notes.   The source code can be used with other devices within MagniV family based on S12Z core such as S12ZVL, S12ZVC, S12ZVH/Y, but the precaution must be considered about the max bus frequency of the device.   p.s. Revision 2: SYNR, REFDIV and POSTDIV values changed in PLL initialization to achieve highest PLL locking time.
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Introduction S12ZVM is a mixed signal MCU for automotive motor control applications. PWM signal for external MOSFETs is managed by integrated gate drive unit, providing gate signals of dedicated profile and strength. In motor control application, current feedback is typically needed and is usually measured in synchronization with PWM signal. In order to schedule sampling commands correctly, delays between PWM signal and actual MOSFET state have to be known. Following text aims to show how to measure delays between PWM and GDU on S12ZVM device. Based on the S12ZVM Reference Manual, the delay is dependent on the slew-rate settings, thus it is important to measure this delay for user configuration. How to Measure Delays in S12ZVM Application? S12ZVM provides PWM probe signals for debugging purposes. In this special mode, PWM signals can be enabled on general purpose pins. User has to make sure the pins are available and not used by another functionality. Pins availability has to be checked for specific product in the Reference Manual. As an example, S12ZVM PMSM/BLDC development kit can be used. S912ZVML12F1MKH or S912ZVML12F3MKH is populated, which introduces PMF_V3 and GDU_V4 in 64-pin LQFP package. On this device, PMF output signals (PWM1_0 to PWM1_5) are routed to pins PP0, PP1, PP2 and PT0, PT1, PT2 and probing can be enabled by PWMPRR1-0 bits in MODRR1 register (see Paragraph 2.3.2.2 Module Routing Register 1 (MODRR1) in the Reference Manual. Note In many motor control applications, probing pins are being used by the application, for example: PP0 - used as EVDD1 external 5V power supply for sensors PP1, PP2 - used for "keyboard wake-up" functionality (e.g. car key signal) PT0, PT1, PT2 - used as Hall-switch sensor inputs (timer input-capture mode signals) or SPI interface or SCI/UART interface. In such cases, it is necessary to have special PCB configured for the test, where the functions above are disabled (e.g. components not populated). System settings Considering S12ZVM PMSM/BLDC development kit as an example, jumper settings should be changed to have the PWM signals clear (with no external load or source, e.g. pull-ups). Jumper Default settings Configuration for the test Notes J9 Enabled Disabled User On/Off switch on PT1 J14 2-3 Removed EVDD / Fault input on PP0 J15 2-3 Removed HALL_A / Res_A on PT1 J16 2-3 Removed HALL_B / Res_B on PT2 J19 Enabled Disabled "Up" button on PP1 J20 Enabled Disabled "Down" button on PP2       Testing Points Oscilloscope of sufficient parameters should be used (at least 500Ms/s) with standard low-capacitance probes or better, with isolated differential probes. Channel connection for the test should be as follows: Channel 1: PWM1_n signal to GND (for PWM1_0, PP0 on J21:1 can be used) Channel 2: GDU HGm or LGm signal to GND (for HG0, TP31 is used) or HGm to PHASE_m if differential probe is used (for HG0, TP31 and PHASE_A / TP35) Channel 3: Phase voltage on PHASE_m to GND (e.g. PHASE_A)   Software Demo software provided on the S12ZVM PMSM/BLDC development kit page can be used for the test with minor changes: In "main.c", buttons and switch handling should be disabled (commented out) INTERRUPT void ADC1done_ISR(void) { static tBool getFcnStatus; EnableInterrupts; //PTT_PTT0 = 1; // Set debug pin to record execution time // Read the user control interface //cntrState.usrControl.btSpeedUp = PTP_PTP1; //cntrState.usrControl.btSpeedDown = PTP_PTP2; // User switch should be checked only if not in init state (see state machine table) //if(cntrState.state != init) // cntrState.usrControl.btFlipFlop = PTT_PTT1; // User accessible switch for stopping the application. if (cntrState.usrControl.btFlipFlop ^ cntrState.usrControl.btFlipFlopTemp) { cntrState.usrControl.btFlipFlopTemp = cntrState.usrControl.btFlipFlop; cntrState.usrControl.switchAppOnOff = (cntrState.usrControl.btFlipFlop) ? false: true; } ... In "src\S12ZVM_system\peripherals\pim.c", pin configuration should be changed as follows: void pim_init(void) { MODRR0_SCI1RR = 1; // SCI - FreeMASTER //DDRS_DDRS4 = 1; // Debugg Signal //DDRS_DDRS5 = 1; // Debugg Signal //DDRT_DDRT0 = 1; // Debugg Signal MODRR1_PWMPRR = 0x01; //PWM to pins enabled //DDRT_DDRT1 = 0; // Input switch signal }  Finally, GDU slew rate should be set to the values assumed by the application: GDUSRC_GSRCHS = 7; // High-side slew rate GDUSRC_GSRCLS = 7; // Low-side slew rate Results Resulting waveforms can be seen on the following figures for normal (room) conditions and using following setup: Item Details Oscilloscope Lecroy WaveRunner 44Xi-A Probes PP008 / 500MHz, 10MΩ, 9.5pF Evaluated PWM signal PWM1_0 / HG0 EVB S12ZVMLEVBLIN Rev.D   Two corner cases have been used to match the specifications in the Reference Manual. However, user-specific slew rate settings may be used to measure the delay in the application. Slowest Slew Rate Settings (GDUsrc=0) Switch-on delay: Switch-off delay: Fastest Slew Rate Settings (GDUsrc=0x77) Switch-on delay:   Switch-off delay:   Summary Measured values are compared with the Reference Manual specifications. Switch-on and switch-off delays are presented. As seen below, the results are within the specified range. Slew rate Edge Minimum Maximum Measured Fastest slew T_delay_ON 0.47 μs 0.89 μs 0.55 μs T_delay_OFF 0.25 μs 0.49 μs 0.32 μs Slowest slew T_delay_ON 0.77 μs 1.43 μs 1.08 μs T_delay_OFF 0.25 μs 0.49 μs 0.33 μs   For higher confidence, high temperature and low temperature tests are recommended. Conclusion This short article shows how to measure propagation delay between PWM signals and GDU outputs on S12ZVM using S12ZVM PMSM/BLDC development kit. The PWM to GDU propagation delay is important information for proper timing of ADC triggering if synchronized with PWM. In simple or simplified use cases, maximum ratings of the delay can be used for consideration. However, unnecessarily higher time span between the PWM edge and ADC trigger may raise a need for lower duty-cycle limit, thus limiting the overall performance e.g. at high speed. Therefore, the importance of proper ADC triggering based on known propagation delay of PWM to GDU signal is obvious. In addition, MOSFET turn-on and turn-off times have to be considered in the overall ADC triggering schedule, based on application-specific settings.
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This short video demonstrates a path through NXP website to the CodeWarrior v5.1 download link. On the final place other downloads are available such as service packs, updates, patches etc. Login to NXP site is required.
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For debug purposes, it is possible to read and write the user data and the ECC value directly from/to the SRAM memory. For these debug accesses a register interface is available.   By the debug access and writing incorrect data + ECC values into the system memory,  the single and double bit ECC errors may be simulated for checking the software error handling.   The debug registers may be modified only in a special mode.   The tested address 0x3000 is excluded from linker use - see prm linker file.   I hope it helps you. Radek
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The ADC measurement is always relative – relative to your voltage reference. The most of the applications don't allow to use accurate and expensive voltage reference. In that case, VDDA is used as the reference for ADC measurement. Since the operational VSUP range starts from 3.5V and accuracy of the voltage regulator is limited, we should use internal bandgap reference for compensating ADC voltage results. The bandgap voltage VBG has a narrow variation over temperature and external voltage supply. The example shows how to compensate ADC results by additional bandgap voltage measurement.
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This document is intended to show the new SM912F634xxxxx part and the differences between this new part and the MM912F634xxxxx part.
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This document includes in attachment excel file calculation that might be useful for those using the S12 MagniV for motor control and proper PLL setting in their projects.   Following parameters can be set and reused for different scenarios via attached excel sheet calculation for the S12 MagniV BLDC motor control applications: #define CPMU_REFDIV // PLL setting of ref. divider #define CPMU_SYNDIV // PLL setting of multiplier #define CPMU_POSTDIV // PLL setting of the post divider #define CPMU_REFFRQ // PLL setting of ref. frequency #define CPMU_VCOFRQ // PLL setting of VCO frequency #define ADC_TIM // setting of ADC timer #define MIN_ADC_TRIGGER_FIRST // setting of ADC trigger #define MIN_ADC_TRIGGER_SECOND // setting of ADC trigger #define PWM_MODULO // PMF module config. #define PWM_DEADTIME // PMF module config. #define TIM_PRESCALER // Timer prescaler #define TIMER_1MS // Setting of timer #define SCI_BAUDRATE // setting of SCI baud rate   This is how it can look for setting either internal or external clock: // PLL settings /* /* // Internal clock 1MHz, 100/50 MHz CPU/Bus clock, 8.33 MHz ADC clock #define _INTERNAL_CLOCK                        // 1 MHz internal clock is used #define    CPMU_REFDIV        0 #define    CPMU_SYNDIV        49 #define    CPMU_POSTDIV       0 #define    CPMU_REFFRQ        0 #define    CPMU_VCOFRQ        3 #define    ADC_TIM            2 #define    MIN_ADC_TRIGGER_FIRST     24 #define    MIN_ADC_TRIGGER_SECOND    144 #define    PWM_MODULO                5000 #define    PWM_DEADTIME              50 #define    TIM_PRESCALER      6         // Timer prescaler 64; 50 MHz/64 = 1.28 us #define    TIMER_1MS          781 #define    SCI_BAUDRATE       5208 */  // External clock 4MHz, 25/12.5 MHz CPU/Bus clock, 6.25 MHz ADC clock #define _EXTERNAL_CLOCK #define    CPMU_REFDIV        3 #define    CPMU_SYNDIV        24 #define    CPMU_POSTDIV       1 #define    CPMU_REFFRQ        0 #define    CPMU_VCOFRQ        1 #define    ADC_TIM            0 #define    MIN_ADC_TRIGGER_FIRST     8 #define    MIN_ADC_TRIGGER_SECOND    48 #define    PWM_MODULO                1250 #define    PWM_DEADTIME       13 #define    TIM_PRESCALER      4         // Timer prescaler 16; 12.5MHz/16 = 1.28 us #define    TIMER_1MS          781 #define    SCI_BAUDRATE       1302     It is used in following function for Clock, Reset and Power Management Unit configuration: //Clock, Reset and Power Management Unit configuration //* //*****************************************************************************/ void initCPMU(void) {     // Wait for stable supply after power up     while (GDUF_GLVLSF)         GDUF_GLVLSF = 1;      CPMUREFDIV_REFDIV = CPMU_REFDIV;     CPMUREFDIV_REFFRQ = CPMU_REFFRQ;     CPMUSYNR_SYNDIV = CPMU_SYNDIV;     CPMUSYNR_VCOFRQ = CPMU_VCOFRQ;     CPMUPOSTDIV_POSTDIV = CPMU_POSTDIV;  #ifdef _EXTERNAL_CLOCK     CPMUOSC_OSCE = 1;     while (CPMUIFLG_UPOSC == 0) {}; // Wait for oscillator to start up (UPOSC=1) and PLL to lock (LOCK=1) #endif      while (CPMUIFLG_LOCK == 0) {};     CPMURFLG  = 0x60;     //Clear PORF and LVRF }          Or setting of ADC clock for both ADC modules in ADC module configuration function:   //ADC0CTL_1 = 0;        ADC0TIM = ADC_TIM;          // clock: clk = fbus / (2x(reg.value + 1)) [0.25 - 8MHz]        //ADC1CTL_1 = 0;        ADC1TIM = ADC_TIM;          // clock: clk = fbus / (2x(reg.value + 1)) [0.25 - 8MHz]        All the rest of the corresponding registers settings can be found in the example for the BLDC motor control of 3-pase sensorless BLDC development kit with S12 MagniV in section download: MTRCKTSBNZVM128_SW : Complete motor control application software package for MTRCKTSBNZVM128
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Hello all, sharing the latest version of MagniV Power Dissipation Calculator started by Carlos Vazquez and Anita Maliverney. With this excel sheet is possible estimate the power dissipated for any MCU of S12ZVM, S12ZVL, S12ZC family, considering: supply voltages, digital modules, gate drive unit, charge pump, communication transceivers, etc.   A few features where added, any additional comment or suggestion is appreciated. Regards.
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This application note was already officially released. Please, download it from: AN12086 Simple Serial Bootloader for S12Z AN12086SW software package    1.  Introduction This application note covers the operation and use of a simple serial Bootloader for the S12Z microcontroller families. The Bootloader can be a convenient way to support programming during production or “in-system”, where support for the dedicated HCS12 Background Debug interface (BDM) may not be available. Users must pre-program the S12Z MCU with the Bootloader during production or at a programming vendor. The Bootloader should reside in the MCU for further use. This Bootloader implementation allows User Application software to be downloaded into the MCU flash and EEPROM memory using the SCI serial interface. The Bootloader may be also configured for self-update similar way as a User Application software update. This Bootloader is originally based on AN4258 Serial Bootloader for S12(X) Microcontrollers Based on 180 nm Technology with several modifications and improvements. The Bootloader described in this document is only an example and comes with no guarantees and no direct support.   2. Bootloader Overview The software architecture consists of two independent software projects: Bootloader Project User Application Project For avoiding compatibility issues between these projects, the minimum interface points must be kept. The switching between Bootloader and User Application codes is managed through MCU reset. So, the Bootloader and application are not limited by write-once registers. The Bootloader Project itself contain small user-defined dispatcher code which is executed directly after MCU reset and decide whether Bootloader or User Application will be executed as next. Figure 1 Software Architecture   2.1.     Hardware Compatibility The Bootloader is written for S12Z derivatives (S12ZVM, S12ZVMB, S12ZVMA, S12ZVC, S12ZVL, S12ZVH, S12ZVHY and S12ZVFP). The Bootloader for S12Z microcontrollers is not optimized for the smallest derivatives. Therefore, S12ZVL8 derivative (only 512B RAM) is not supported and only some of derivatives (with 4kB or more RAM) supports Bootloader self-update feature (rewritable).   2.2.     Dispatcher code The Dispatcher code is executed right after MCU reset. It just temporary initializes stack (write stack pointer) and directly executes user code for testing conditions whether Bootloader code should be executed or not. The most typical testing conditions for Bootloader presents: pushed button some specific value in the EEPROM memory waiting loop for command via the communication interface If User Application code is already loaded and Bootloader was not selected, the User Application is automatically started.   2.3.     Serial interface All S12Z microcontrollers include an on-chip serial communication interface. Notice that the RS-232 or USB to TTL level shifter is necessary to communicate with PC. Optionally, the virtual COM port at OSBDM interface may be used. By default, the serial communication is set to format: 8-data bit one start bit one stop bit no parity Xon / Xoff flow control Default baud rate is configured in Config.h file. The baud rate can be changed via the Bootloader’s menu to 38400, 57600, or 115200 bps. The Bootloader implementation currently assumes using just one of SCI channels. However, this may be changed by Bootloader code modification. The same approach may be used for a different type of channel implementation like CAN or LIN.   2.4.     PC software interface A general terminal emulation program like Microsoft HyperTerminal, Tera Term, RealTerm or similar software can be used on a PC to communicate with a microcontroller. A terminal emulation program must support communications over serial COM ports, Xon / Xoff flow control, and it must be able to send a text file.   3.  Functional Description The operation of the Bootloader is straightforward. This section describes only the most important and specific points. Figure 2 Memory map 3.1.     Bootloader Project Folders The C language codes and appropriate header files are located in Sources and Project_Header folders. The exception is Dispatcher.c and start12z.c files located in Project_Settings\Startup_Code folder. The linker file is located in Project_Settings\Linker_Files folder. The FLASH folder contain generated files like elf, map or s19 files. The SRecCvt folder contains a SRecCvt.exe tool for re-formating generated S-record file. The content of Documentation folder should help you in guide how to use this Bootloader. Figure 3 Bootloader Project Folders 3.2.     Bootloader Configuration The most of the Bootloader configuration settings are collected in Config.h file.   If the modified Bootloader will use any derivative specific registers, the mc9s12zvl128.h and mc9s12zvl128.c files should be replaced with appropriate files from CodeWarrior folders: "c:\Freescale\CW MCU v10.7\MCU\lib\wizard_data\S12Z\DataBase\device\include\.." and "c:\Freescale\CW MCU v10.7\MCU\lib\wizard_data\S12Z\DataBase\device\src\.."  And followed by modification of derivative.h file.   The Config.h contains settings for: Bootloader feature configuration Clock settings SCI module settings Dispatcher definitions MCU derivative configuration and addresses Flash Configuration Field configuration   The Bootloader-persistent.prm and Bootloader-rewritable.prm linker files contain definitions of Flash and RAM ranges for Bootloader. The appropriate linker file is selected by Build Configuration. Figure 4 Build Configuration   3.2.1.     Bootloader features SECURE_MCU: The MCU may be secured after Bootloader loading (default 0 = MCU unsecured) USE_BACKDOOR_KEY: The Flash Configuration Field may already contain Backdoor Key for temporary unsecure of MCU (default 0 = backdoor key 0xFFFF FFFF FFFF FFFF). WRITE_EEPROM: When enabled, the Bootloader menu offers an option for erasing EEPROM and program option will be able to program both Flash and EEPROM. BOOTLODER_REWRITABLE: When enabled, the Bootloader code is automatically loaded into RAM and allow unprotect, erase and program Bootloader Flash area. This variable is already defined differently in used Build Configurations. That allows us to keep BOOTLODER_REWRITABLE value and selected linker file synchronized.   3.2.2.     Serial Channel The current S12Z MCU derivatives offer up to 2 SCI channels. The SCI_MODULE defines whether SCI0 or SCI1 will be used for Bootloader communication (default SCI1). The DEFAULT_BAUDRATE specifies default SCI baud rate for initial Bootloader menu display (default Baud9600: 9600bps). The baud rate can be changed via the Bootloader’s menu to 38400, 57600, or 115200 bps. The S12Z MCU derivatives offer routing options for SCI0, SCI1, and other peripherals channels. The BL_MODRR0 value defines MODRR0 value loaded by Bootloader code after a reset.    Note: The MODRR0 values may be written just once in normal mode and cannot be changed until next MCU reset.   3.2.3.     Configure Dispatcher code The default Dispatcher condition is based on the testing value of pin with push button. The PUSH_BOTTON defines tested port and pin (default PTP_PTP1) while PB_ACTIVE_LEVEL defines active logic level – when the push button is pressed (default 0 = push button to GND with pull-up). The BL_REQUEST_ADD defines tested address (default 0x100000) while BL_REQUEST_VALUE defines active value for bootloader request key. When the memory content fits to the BL_REQUEST_VALUE, Bootloader code is executed (default "BOOT" in ASCII = 0x424F4F54).   3.2.4.     Configure Derivative and addresses The FLASH_START_ADD, EEPROM_START_ADD, EEPROM_END_ADD defines MCU derivative memory ranges. The BOOTLOADER_START_ADD value is automatically obtained from linker file (ROM segment start). The Bootloader automatically move User Application reset vector to the APPLICATION_RESET_VEC_ADD address (default BOOTLOADER_START_ADD-4 = placed to the end of User Application flash area)   3.2.5.     Configure Flash Configuration Field The bytes from BACKDOOR_KEY_0 to BACKDOOR_KEY_7 defines Backdoor Comparison Key (default "UNSECURE" = 0x554E534543555245 in ASCII). The bytes PROTECTION_OVERRIDE_KEY_H and PROTECTION_OVERRIDE_KEY_L defines Protection Override Comparison Key (default "AB" = 0x4142 in ASCII). The Bootloader code should be protected against unwanted erase/rewrite operations. Trying to alter data in any protected area in the P-Flash memory will result in a protection violation error and the FPVIOL bit will be set in the FSTAT register. Flash protection scheme allows protecting 2, 4, 8 or 16KB from upper range of Flash memory. The BL_FPROT defines FPROT value automatically loaded from Flash Configuration Field after reset (default 0xD7 = upper 8kB of P-Flash protected.). The BL_DFPROT defines DFPROT value automatically loaded from Flash Configuration Field after reset (default 0xFF = EEPROM unprotected). The initial configuration of COP watchdog and GDU (S12ZVM derivatives) is given by FOPT register value. The BL_FOPT defines FPROT value automatically loaded from Flash Configuration Field after reset (default 0xFF = COP is not active after reset).   3.2.6.     Bootloader linker file Since the preprocessor functionality is no longer supported directly in prm linker file, the Bootloader use two versions of linker file: Bootloader-persistent.prm Bootloader-rewritable.prm The linker file selection is managed by two Build Configurations (Figure 4 Build Configuration).   3.3     Operation The Bootloader handles reset vector. After reset, the Bootloader’s Dispatcher routine is called. As a first step, the Dispatcher initialize stack and reads the push button pin status. If the value of the pin is equal to the PB_ACTIVE_LEVEL, the Bootloader starts its operation. If the value of this pin is not equal to the PB_ACTIVE_LEVEL, the User Application’s reset vector is tested. If the reset vector of the User Application is not available (long word at address APPLICATION_RESET_VEC_ADD is in erased state = 0xFFFFFFFF) then the Bootloader is called anyway. The User Application is called only when User Application reset vector is already programmed and the condition for Bootloader enter is not true. The user can rewrite this code to start the Bootloader or User Application upon another condition. Note: Since this code is executed prior Bootloader/application startup code, the dispatcher code shouldn’t use any uninitialized global variables.   3.4.     Interrupt vector In the case when the User Application using interrupts, it is necessary to relocate the interrupt vector table using the IVBR register. The Bootloader resides in the upper 4/8/16kB fixed block at the address defined by linker prm file. This area is had to be protected (configured in Config.h), so the User Application cannot rewrite a default location of the interrupt vector table at 0xFFFE10-0xFFFFFF. The advantage of this solution is that the Bootloader cannot be affected by a power failure that could occur when rewriting User Application interrupt and reset vectors. The Bootloader automatically moves User Application’s reset vector from address 0xFFFFFD to the  APPLICATION_RESET_VEC_ADD address = typically the end of User Application’s flash area. Since this moving is managed by the Bootloader, the whole phrase (by default from (BOOTLOADER_START_ADD-8) to BOOTLOADER_START_ADD) must be excluded from User Application’s linker usage and the same sector (512B) shouldn’t be used for User Application’s interrupt vector table.   4.  User Guide This section describes the step-by-step procedure to use the Bootloader.   4.1.     Setup procedure for the Bootloader Open the Simple_Serial_Bootloader_for_S12Z project in CodeWarrior Development Studio for MCU. The Bootloader was tested in current versions v10.7. Select the Build Configuration as shown in Figure 4 Build Configuration. The Persistent Bootloader code option allows just update a User Application. The Bootloader Rewritable code option linker allows updating both User Application and Bootloader itself. Optionally edit appropriate linker file Optionally edit the Config.h header file per your target environment (required features, clocks, channels, derivative addresses, backdoor, and protection override keys). Optionally edit the c file with conditions for select User Application/Bootloader code execution.   4.2.     Bootloader Guide   1. Compile the project and download the Bootloader to the MCU via BDM device. Note: The correct derivative should be selected in debug configuration for successful complete MCU Flash erase and programming (Figure 5 Select derivative for Bootloader download). Figure 5 Select derivative for Bootloader download     2. Open the Microsoft HyperTerminal or any other serial terminal utility (e.g. Realterm, Tera Term,…). Set the baud rate 9600 bps, 1 start bit, 8 data bits, 1 stop bit, and flow control Xon / Xoff.   3. Make sure there is a serial (USB to Serial) cable connection between the PC and the board.   4. Hold the PUSH_BOTTON pin low and reset the MCU.   5. The Bootloader is started and the following response is received in HyperTerminal. See Figure 6 Initial screen.   Figure 6 Initial screen   6. Type “a” to erase the flash memory. This is not necessary the first time because the flash has been already erased by the BDM device.   7. Type “b” to program the flash.   8. Now send the desired S-record as a text file — See Figure 7 Send Text File. Browse for S-record which is downloaded to the MCU. For testing purposes, use demo S-records that are attached to this application note. The S-records must have a specified format. Refer to chapter 3 How to write a User Application and to chapter 4.4 How to convert S-Record that will be downloaded by the Bootloader. Figure 7 Send Text File     9. Confirm the dialog and the S-record are downloaded to the MCU. One printed star (*) means that one line of S-record has been programmed. See Figure 8 Download User Application. Figure 8 Download User Application   Note: If User Application contains any EEPROM data, please erase EEPROM by typing “h” prior the step 7. Note: If you want to reprogram Bootloader code, please use subsequently options “e” (it will ask you for entering protection override key), step “f” and step “g” instead steps 6 and 7.   4.3.     How to write a User Application You must ensure that the User Application does not interfere with Bootloader area defined by Bootloader linker file.   1. Create a new User Application project in CodeWarrior Development Studio for MCU.   2. Open the User Application project.prm file   3. Trim the high address of the segment ROM from the original to the (BOOTLOADER_START_ADD-8). For example, to the address 0xFFDFF7. This is because the area 0xFFDFF8–0xFFFFFF is occupied by the Bootloader and the area at address 0xFFDFF8–0xFFDFFF will be used for the User Application reset vector. If interrupts are used:   4. Trim the low address of the segment ROM from the original to (the original address + 0x200). This area will be used for the relocated interrupt vector table. Note: You may use any other Flash sector in User Application memory for that purpose except the last one (already used for the User Application reset vector). Note: The generated CodeWarrior project doesn’t show warning about memory overlapping between linker and user object placement. This warning is disabled by default (Linker option -WmsgSd1912).      5. Create a vector table as shown in the attached demo applications and set the IVBR register accordingly. The IVBR sets the interrupt vector table base address. It contains 15 most significant bits from 24bit vector table address.   4.4.     How to convert S-Record that will be downloaded by the Bootloader The default S12Z MCU project generated by CW10 does not generate a file with s-records automatically.   1. Check option for generating S-Record file in User Application project settings per Figure 9 Generate S-Record file The <YourProjectName>.sx file will be generated when you will build your project. Figure 9 Generate S-Record file For the simplifying, the Bootloader parser, only s-records with specific format are accepted. All records must be aligned to 32 bytes and the length of records must be 32 bytes.   2. Copy SRecCvt directory with SRecCvt.exe tool from Bootloader/Application Example project to your User Application project   3. Exter command “ ${ProjDirPath}/SRecCvt/sreccvt.exe -hc12 -m 100000 FFFFFF 32 -o ..\FLASH\\${BuildArtifactFileBaseName}.s19 ..\FLASH\\${BuildArtifactFileBaseName}.sx ” as post build step into User Application project settings per Figure 10 Adding Post-build step . Figure 10 Adding Post-build step This command will load S-Records from your <YourProjectName>.sx file and create new <YourProjectName>.s19 file with reformatted S-Records when you build your project. Note: The complete SRecCvt utility may be downloaded from NXP web pages. Unfortunately, the graphical user interface doesn’t support directly S12Z derivatives. Therefore we use this tool in command line mode.   4.5.     How to merge the User Application and Bootloader The User Application can be developed independently, that is without the Bootloader. The User Application can be loaded into the microcontroller and can be debugged directly via the BDM device. However, for production purposes, it is worth merging the User Application and Bootloader together, so it can be downloaded into the microcontroller all at once as a single S-Record file. This is a recommended procedure:   1. Open the User Application that was created as per chapter 3, "How to write a User Application" in the CodeWarrior Development Studio for MCU.   2. Replace a User Application reset vector in Project.prm file from default address to the address (BOOTLOADER_START_ADD-3), so the Bootloader can use this vector for start User Application. For example: //VECTOR 0 _Startup VECTOR ADDRESS 0xFFDFFD _Startup   3. Copy the ready-mades19 file to ..\user_application_project\FLASH directory. Note: the s-record file can be renamed for example to the bootloader.s19.   4. Link this file to the User Application be using command at the beginning of Project.prm: HEXFILE Simple_Serial_Bootloader_for_S12Z.s19   5. Build the project. The final S-Record is ready to be downloaded into the microcontroller by the BDM interface.   5.  Testing The Bootloader and example application were tested on evaluation boards: DEVKIT-ZVL128 S12ZVMC256EVB S12ZVM32EVB S12ZVM-MINIBRD   6.  Content of Zip file All mentioned projects and utilities can be found in a zip file associated with this application note: Simple_Serial_Bootloader_for_S12Z — Bootloader project for S12Z microcontrollers. Application_Example_for_SSBZ — Projects that show how to write User Applications. Converted_srecords — S-Records was taken from Bootloader and Application Example that has been converted by the SRecCvt utility (*.s19 file extension). These S-Record files can be downloaded into the MCU by the Bootloader. SRecCvt — Utility for S-Record files converting.   7.  Reference AN4258 AN4258SW: Serial Bootloader for S12(X) Microcontrollers Based on 180 nm Technology Rev 0. February 2011. S12Z Protection Override S12Z constant, variable, code allocation in CodeWarrior S12Z Interrupt catcher for unexpected interrupts S12Z Flash example code S12Z EEPROM example code   I hope it help you. Please let me know when you find any error or if something missing in this document.   Radek Sestak
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Work with pushbuttons and 7 segment display. Write assembly (ASM) and C programs for the HCS12, as well as to work with the pushbuttons and 7-segment display on the Dragon12-JR board.  The programs find the largest and smallest numbers from an arbitrary list of eight 8-bit unsigned numbers and displays them on the 7-segment display as outlined in the following.   1. Write a program to do the following, in both ASM and C. Do not use MINA, MINM, MAXA, and MAXM instructions.            a. Load an array of eight 8-bit unsigned numbers into RAM.            b. Find the largest of these numbers and store it.            c. Find the smallest of these numbers and store it.            d. Wait for the pushbuttons (S1 or S2) to be pressed.            e. The first time S1 is pressed, display the high nibble of the largest number; the second time S1 is pressed, display the low nibble of the largest number.                For example, if the largest number is 0x3F, the 7-segment display should show “3” the first time S1 is pressed and “F” the second time it is pressed.            f. Do the same for S2, except use the smallest number.  2. Explain why debouncing is used with switches. Optional: Implement software debouncing for switch used above.   Hints: These are unsigned numbers that your program will be searching through.  Make sure you are using the unsigned branch instructions in your ASM code. Your TA will be changing the numbers in your array to make sure it works for arbitrary 8-bit values. Please make sure the array is somewhere near the top of your program file. For interfacing to LEDs, 7 segment Displays, and pushbuttons see the schematic and manual of your development board. The type of the 7-segment LED on the Dragon12-JR board is common anode. All cathodes are driven individually by an output port and all anodes are internally connected together. The Dragon12-JR board uses port H to drive 7-segment cathodes. Skeleton files are provided to help you complete the asseignment. The 7-segment display communicates with the board via Port H whose address is $0260 (PTH).  Its data direction (input or output) is controlled by writing to Data Direction H register whose address is $0262 (DDRH). In order for PTH to be output (i.e. displaying something), you must set DDRH to $FF first (all bits high, all bits output).  The skeleton code does this for you this time. Almost every I/O port on the board works similarly to PTH; that is, you must set the direction of data on a corresponding data direction register before writing to or reading from it. The two pushbuttons (S1 and S2) are connected to PM6 and PM7. S1à PM6, S2à PM7 A subroutine that displays the low nibble of register A is included with the skeleton ASM code. Just store a value in register A and issue jsr seg7_out to display the low nibble of A. You are required to understand how it works and to write a similar routine for the C version of your code.   This document was generated from the following discussion: Professional Way to solve this HCS12 Dragon12-JR,Work with pushbottons and 7 segment display
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Here are the two utilities which can be used to calculate the following:   - PLL filter component values on HCS12 devices such as MC9S12DP256   - PLL register values on S12(X) devices such as S12XE, S12XF, S12XS, S12P and S12HY.   Both utilities come with appropriate user manuals in PDF.
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Have you ever wondered what is the difference between the electric motors included in those two Development Kit with S12 MagniV?     MTRCKTSBNZVM128: 3-phase Sensorless BLDC Development Kit with S12 MagniV S12ZVM MTRCKTSPNZVM128: 3-phase Sensorless PMSM Development Kit with S12 MagniV MC9S12ZVML128 MCU   Well frankly writing none. They include the same motor model 45ZWN24-90       . So the motors are same from physics perspective, only the flux distribution in an air gap is different. It is sinusoidal for PMSM whereas it is trapezoidal for BLDC motor. The powerstage is same for both but what is different however is the control strategy. The Linix motor equipped with the DevKits is in fact somewhere between PMSM and BLDC, The flux is not sinusoidal nor trapezoidal.   Further information and motor parameters can be found at manufacturer product pages:                          http://www.linixmotor.com/3-3-Tool-Motor.html
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TIC example code, v.1.1 * The SW: * demonstrates FLASH programming as a part of application * uses adjusted routines from AN2720 * writes a few words into FLASH locations Pages FE and E0~EF may be used for data storage.   Other pages are used for program storage (see PRM file)      * tested on: HCS12X STARTER KIT * OSCCLK = 16MHz, BUSCLK = 8MHz * Reference to documentation: MC9S12XDP512V2 Rev.2.17 Original Attachment has been moved to: XDP512-FLASH-E_W-CW47.ZIP
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The example code shows how to invoke single or double bit RAM ECC error at S12Z devices.   Some basic overview about S12Z ECC codes may be found in thread AM/FLASH ECC Error handling .
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The example code demonstrates MCU low power modes: STOP and WAIT. For detailed description see main.c file of the project. * - tested on X-VLG-S12ZVC board * - BUSCLK = 6.25MHz based on internal oscillator clock IRCCLK = 1MHz.The PLL set by default in PEI mode. * - Reference documentation: MC9S12ZVCRMV1.pdf (REV 1.9) VLG-MC9S12ZVC-SCH.pdf (Document Number SCH-28038, SPF-28038)
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This example: 1. write unprotected P-Flash area 2. protect target P-Flash area 3. tries to write protected P-Flash area 4. call Protection Override command for temporary modify P-Flash protection 5. write into temporary unprotected P-Flash area 6. restore original P-Flash protection scheme The part of P-Flash memory used in this example for writing tests (0xFF8000..0xFF8FFFUL) is excluded from linker using. Please look at prm linker file for more details.   The flash_array constant with Protection Override Comparison Key is not directly referenced in the code, therefore we must enter the constant name into ENTRIES section in prm linker file for avoiding stripping it out as unused. Please look at P-Flash Protection Register (FPROT) chapter in the reference manual for more details about P-Flash protection. The key for Protection Override should be rather received from external source and used as PFLASH_Protection_Override() parameter. The correct Protection Override key is here hard-coded (err = PFLASH_Protection_Override(0xCAFE, 0xF...) for example code simplifying.   I hope it helps you. Radek
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The package contains of AN5327_SW ported to S12ZVML-MINIBRD hardware. Just minor changes are introduced, such as removing a button control, moving the LED light to another pin and using internal oscillator. This is just a working version, it is NOT an official release!!! AN5327_SW_CW11_MINIBRD.ZIP CodeWarrior 11.0 and AMMCLib 1.1.13 or higher is required to run this example. If you are not sure about the AMMCLib version, please download the general AN5327_SW from the www.nxp.com/automcdevkits first, install it and then unzip and use the example above.
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This example shows a few possible configurations of the S12PWM8B8CV2 PWM module. Five PWM channels are configured with different clock source, polarity, alignment, period and duty-cycle.   Four clock sources (A, B, SA, SB) are derived from bus clock using dividers.   Selected polarity of PWM channel determines the duty-cycle whereas the alignment determines the period of the PWM signal.   Four 8-bit channels (4-5, 6-7) are concatenated into two 16-bit channels. Channels 4 and 6 become high-order channels while channels 5 and 7 become low-order channels. These low-order channels (5 and 7) are the output channels routed to a port  and they configure the clock, polarity, alignment and enablement of the PWM signal.  Period and duty-cycle of the signal are configured with both the low-order and high-order channels.   The period registers (PWMPERx) and the duty-cycle registers (PWMDTYx) are double buffered. When they are rewritten while the channel is enabled, the change will not take effect until one of the following occurs: 1. The effective period ends 2. Counter resets 3. The channel is disabled
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