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车辆动力学:通过 IGBT 栅极驱动集成驱动器的进步简化高压/大电流逆变器 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本课程将对高压 (HV) 电力进行深入的系统分析,我们将回顾 MCU、GDIC 和 IGBT 如何单独运行以及作为一个系统运行。我们将讨论 EV 和 HEV 电力系统和组件,以实现高效、安全的 HV 电机驱动。使用 NXP 新型 HV IGBT GDIC、GD3100 和 Fuji GEN 7 IGBT 模块的系统框图和示波器屏幕截图,我们将考虑如何实现更小、更高效和更低成本的 HV 逆变器设计。我们将审查 SPI 接口可编程性,该可编程性使任何 IGBT 都能进行调整以实现最高效率、热设计考虑、布局考虑、功率预算评估、上电排序、管理短路故障、温度监控和高级功能达到系统 ASIL D 级和 ISO26262 认证。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本课程将对高压 (HV) 电力进行深入的系统分析,我们将回顾 MCU、GDIC 和 IGBT 如何单独运行以及作为一个系统运行。我们将讨论 EV 和 HEV 电力系统和组件,以实现高效、安全的 HV 电机驱动。使用 NXP 新型 HV IGBT GDIC、GD3100 和 Fuji GEN 7 IGBT 模块的系统框图和示波器屏幕截图,我们将考虑如何实现更小、更高效和更低成本的 HV 逆变器设计。我们将审查 SPI 接口可编程性,该可编程性使任何 IGBT 都能进行调整以实现最高效率、热设计考虑、布局考虑、功率预算评估、上电排序、管理短路故障、温度监控和高级功能达到系统 ASIL D 级和 ISO26262 认证。
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i.MX6SLL 寄存器编程辅助工具 重要提示:如果您有任何疑问或想要报告有关 DDR 工具或支持文档的任何问题,请在i.MX 社区中创建支持工单。请注意,任何私人消息或直接邮件不会被监控,也不会收到回复。 这是针对与 MMDC 初始化相关寄存器的详细编程辅助资料。最后一张表格格式化寄存器设置以便与 ARM RealView ICE 一起使用。它还可以与 DDR 压力测试的 Windows 可执行文件一起使用。此编程辅助工具用于内部 NXP 验证板。 i.MX6 全部 i.MX6SL
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HMB-N1937 接続デバイス用のAndroidベースのBrillio OSの紹介 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Brilloは、Androidをベースにした軽量OSで、オープンで拡張性があり、安全な小さなフットプリントを備えたコネクテッドデバイス向けです。Brilloは、Androidプラットフォームを接続されているすべてのデバイスに拡張するため、セットアップが簡単で、相互に連携したり、スマートフォンとシームレスに連携したりできます。Googleの通信API「Weave」が付属しており、Brilloデバイスが相互に通信して交換したり、データをクラウドに保存したりするのを簡単に行うことができます。このクラスでは、Brillo と、NXP が Google と協力して Brillo を i.MX 6UltraLite プロセッサやその他のプラットフォームに導入した方法を紹介します。 ビデオプレゼンテーションを見る <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Brilloは、Androidをベースにした軽量OSで、オープンで拡張性があり、安全な小さなフットプリントを備えたコネクテッドデバイス向けです。Brilloは、Androidプラットフォームを接続されているすべてのデバイスに拡張するため、セットアップが簡単で、相互に連携したり、スマートフォンとシームレスに連携したりできます。Googleの通信API「Weave」が付属しており、Brilloデバイスが相互に通信して交換したり、データをクラウドに保存したりするのを簡単に行うことができます。このクラスでは、Brillo と、NXP が Google と協力して Brillo を i.MX 6UltraLite プロセッサやその他のプラットフォームに導入した方法を紹介します。 ビデオプレゼンテーションを見る スマートホーム&ビル
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FIR滤波器套件 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本内容最初由 Steve Sabram 贡献给 lpcware.com 该示例项目使用 LPC4350 演示板和 ARM CMSIS DSP 库实现了声学范围、有限无限响应 (FIR) 滤波器。科幻“电击枪”的声音资源从演示板的耳机插孔中播放出来。该声音样本非常适合演示,因为它在声学带中具有许多低频、中频和高频成分。您可以通过触摸演示板上的电容式触摸按钮来播放声音资源,如演示板 LCD 上显示的菜单所示。最好使用耳机或耳塞聆听声音。四个按钮分别播放相同的声音资源 不同之处: 1) Raw – 未处理的声音按照其格式播放(采样率为 44.1 kHz、16 位样本和单声道)。 2) 低通——通过低通巴特沃斯滤波器滤波,截止频率为 5 kHz,类似于普通模拟电话的带宽。播放时,请注意高音部分被移除,类似 通过电话听到的声音。 3) 高通——通过高通巴特沃斯滤波器滤波,低频截止频率为 8 kHz。请注意,由于仅播放高音谐波成分,因此音量较低。 4) 后向掩码——声音资源样本以相反的顺序播放。“Zap!”现在变成了“Zoup!”数字滤波器是使用广受欢迎的公共领域工具 WinFilter ( http://www.winfilter.20m.com/ ) 设计的。 伴随这个例子。随着 NXP 推出这款免费 DSP 设计工具,我希望它的作者能够扩展其功能。 用户内容
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无线充电让您摆脱电线的束缚! <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 如果您的智能手机、平板电脑或数字智能手表的电池可能会没电,或者您的床头柜或办公桌上的充电线可能缠绕不住您,那么无线充电器的简便性将使您的梦想成真!但无线充电器需要很多技术,而且并不是都一样。NXP 的发射器和接收器组件系列为 Qi 和 Rezence 标准提供解决方案。我们对这两者进行了研究,并提供了一些实用的硬件解决方案来切断这种联系。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 如果您的智能手机、平板电脑或数字智能手表的电池可能会没电,或者您的床头柜或办公桌上的充电线可能缠绕不住您,那么无线充电器的简便性将使您的梦想成真!但无线充电器需要很多技术,而且并不是都一样。NXP 的发射器和接收器组件系列为 Qi 和 Rezence 标准提供解决方案。我们对这两者进行了研究,并提供了一些实用的硬件解决方案来切断这种联系。
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フリースケール・カップ・ワールドワイド・ファイナル2015トレーニング・ハイライトをご覧ください <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> トレーニング・セッションについては、フリースケール・カップ・ワールドワイド・ファイナル2015のハイライト・ビデオをご覧ください。クレジット:Fraunhofer IIS (マイビデオで視聴) フリースケール・カップの内容
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MCUXpresso IDE v11.8.1 现已推出 我们很高兴地宣布 MCUXpresso IDE v11.8.1(build 1197)现已推出。 这是一个基于之前的 MCUXpresso IDE v11.8.0 版本的维护版本,我们建议所有现有用户下载并安装这个新版本。   安装程序下载 要下载所有平台的安装程序,请登录我们的下载网站: https://www.nxp.com/mcuxpresso/ide/download   文档 更多信息可在更新后的用户指南及其他文档中查阅,这些文档可通过 IDE 的“帮助”菜单访问内置帮助系统,或以 PDF 格式从安装目录中获取。   未来版本的发布通知 如需接收有关未来版本发布的通知,请关注:MCUXpresso IDE - 发布历史   变更摘要 - 版本 11.8.1 - 2023 年 10 月 升级:更新的 SEGGER J-Link 软件 (v7.92l)。 已升级:更新的 PEmicro 插件(v5.7.3)。 新增:支持 i.MX RT1180 设备和 MIMXRT1180-EVK 板。 新增:支持 KE1xZ512 器件和 X-FRDM-KE17Z512 开发板。 新增:支持 MCXA153 设备和 FRDM-MCXA153 开发板。 改进:[工具链集成] 在支持的编译器方言列表中添加了 C++20 和 C++23 条目。 修复:[Debugger][RW61x] 当安全项目位于闪存中时,连接脚本在 SYSRESET 后不会暂停。 修复:[Flash Programmer] 与 Flash blank 命令相关的一些问题。 已修复:[SDK 集成] 更改设备包时,未考虑设备特定的预处理器定义。   已知问题 请参阅安装布局中的 KnownIssues.txt 文件以获取详细列表。  
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关于 S32K312 上 FlexCAN 增强型 RX FIFO + DMA 操作的说明需要澄清 你好 , 我们目前正在研究基于 S32K312 的 FlexCAN 增强型 RX FIFO 和 DMA, enhanced FIFOenhanced FIFO增强型先进先出   我们正在使用 rtd v 7.0.1,希望就我们遇到的几个问题和观察结果进行澄清。 1. MEX 配置验证 请您确认启用 DMA 的 FlexCAN 增强型 RX FIFO 的推荐 MEX 配置是什么?我们希望确保我们的配置符合预期的RTD使用模型。 2. 增强型接收 FIFO + DMA 数据丢失观察 根据 FlexCAN 勘误表中的建议,启用增强型 RX FIFO 时,以下消息缓冲区将不使用: MB0–MB7、MB10、MB12、MB20、MB22、MB30、MB32、MB40、MB50 和 MB60。 我们的配置如下: 增强型接收 FIFO 已启用 DMA已使能 水印配置为 10 个条目 DMA 将 FIFO 数据传输到软件缓冲区。 观察到的行为: CAN 消息已正确接收到增强型 RX FIFO 中。 DMA 可以成功传输数据,直到达到水印级别。 DMA完成中断被触发。 此后,在预期的下一个 FIFO 位置(从第 11 个 FIFO 条目开始)中未观察到传入的 CAN 消息。 观察到数据丢失和异常的先进先出(FIFO)行为。 请解释一下这种情况下的预期行为以及出现消息丢失的可能原因? 3. FlexCAN_Ip_RxFifo DMA 重配置 在调试 RTD 驱动程序时,我们观察到 FlexCAN_Ip_RxFifo API 似乎会重新配置 DMA 参数。 具体来说: 次要循环计数似乎已配置为 16 传输大小似乎为 4 字节 这导致总传输大小为 64 字节(或根据解释约为 68 字节),这似乎与参考手册中描述的增强型 RX FIFO 条目大小不符。 能否解释一下这个 API 的预期功能以及这些 DMA 设置背后的原理? 4. 增强型接收 FIFO 存储器观察 调试过程中还观察到,尽管 DMA 似乎将数据从 FIFO 传输到软件缓冲区: FIFO 内存区域仍然包含较旧的消息 ID。 内存浏览器似乎只显示第一个增强型 RX FIFO 元素。 先进先出位置似乎没有按预期更新。 附上屏幕截图供参考。 能否解释一下这是否是预期行为,以及在运行时调试期间应该如何解释增强型 RX FIFO 内存? 5. 结构尺寸不匹配 我们还观察到 RTD 结构与参考手册之间存在差异。 FlexCAN_Ip_MsgBuffType 在 RTD 中的大小:78 字节 根据参考手册,增强型 RX FIFO 元素大小为:80 字节 请问您能否解释一下: 为什么会出现这种尺寸差异? 是否需要考虑包装/对齐方面的问题? DMA 传输应该配置为 78 字节还是 80 字节? 预期用途案例 我们的要求是使用: 增强型接收 FIFO 基于DMA的接收 消息接收过程中不会出现 CPU 中断。 预期行为是: CAN 消息到达增强型 RX FIFO。 DMA 会自动将 FIFO 条目传输到软件缓冲区。 正常运行不需要软件轮询或接收中断处理。 有意避开增强型 RX FIFO 保留的消息缓冲区(MB0–MB7、MB10、MB12、MB20、MB22、MB30、MB32、MB40、MB50 和 MB60),而其余的消息缓冲区则用于传输。 申请它 请问您能否提供以下信息: 任何能够演示增强型 RX FIFO 与 DMA 操作的示例项目。 针对此用例推荐的RTD配置。 澄清 RTD 目前是否支持使用 DMA 进行连续增强型 RX FIFO 接收而无需软件重新激活。 任何实现增强型 RX FIFO + DMA 接收的裸机驱动程序示例。 感谢您的支持。 Re: Clarification Required on FlexCAN Enhanced RX FIFO + DMA Operation on S32K312 您好, 1. MEX 配置验证 A:看来您的 MEX 与您描述的设置不符。 - 水印设置为 1 - DMA传输配置并非必需,驱动程序会自动配置DMA,除非您想要自行设置DMA参数和传输方式。 2. 增强型接收 FIFO + DMA 数据丢失观察 A:DMA 完成中断后,所有接收到的消息都会被读取,并且分配的 DMA 通道将被禁用。 因此,如果不再调用 FlexCAN_Ip_RxFifo,RXFIFO 仍然会从条目 0 开始接收消息,但由于 DMA 没有再次启动,因此不会读取 RXFIFO。 3. FlexCAN_Ip_RxFifo DMA 重配置 A:什么是次要循环计数?驱动程序本身将次要循环大小(字节)设置为 80,以便从 RXFIFO 读取最多 64 字节的有效负载消息以及 IDHIT 和时间戳信息。 所以,我其实不太明白你的计算方法。或许可以分享一下你的代码 4. 增强型接收 FIFO 存储器观察 A:仅第一个增强型 RX FIFO 元素区域可见,表示增强型 FIFO 输出端口地址范围。调试期间不建议显示 RXFIFO 内存。为了使 FIFO 引擎正常运行,CPU 在 DMA 操作期间不应访问增强型 FIFO 输出端口地址范围,实际上显示此内存空间会导致对其进行读取。 5. 结构尺寸不匹配 A:FlexCAN_Ip_MsgBuffType 不能完全反映 RXFIFO 结构。传输结束时,驱动程序读取内部缓冲,并将相应的数据填充到用户缓冲区的相应字段中。 如上所述,DMA 应设置为每次 DMA 请求读取 80 字节。 驱动程序的编写方式是,在 DMA 完成并调用 FLEXCAN_EVENT_DMA_COMPLETE 事件后,需要重新激活 DMA(调用 FlexCAN_Ip_RxFifo)。 您可以参考下面的演示来增强 RXFIFO 和 DMA 的使用,但这是在 RTD400 中实现的。 https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-FlexCAN-Ip-TX-RX-EnhanceRXFIFO-DMA-test-S32DS3-5/ta-p/2015832 BR,彼得
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S32G274A 实现 SHA256+RSA2048 算法 NXP 支持团队您好, 我目前正在 S32G274A 平台上评估 HSE,希望能获得一些关于推荐实施路径的指导。 当前环境: * 设备:S32G274A * 内核:Cortex-M7 * IDE:S32 Design Studio 3.6 * HSE 封装:HSE_DEMO APP_S32G2XX_0_1_0_16 * HSE 固件:H SE_FW_S32G2XX_0_0_16 当前进展: * 我正在参考 AN14070("如何在 S32G2 的 Cortex-M7 核心上运行 HSE 演示应用程序" )。 * HSE 演示项目可以成功导入并编译。 * 然而,在打开 IVT 视图时,S32DS 报告了一个异常,导致无法创建 IVT 视图: com.nxp.swtools.ivt.views.IVTView (如有需要,我可以提供完整的错误日志。) 项目目标: 目前,我们的引导加载程序实现了基于软件的安全启动: 1。计算应用程序映像的 安全散列算法\(SHA\)-256。 2。使用存储在闪存中的公钥验证 RSA-2048 签名。 3.仅在验证成功时启动应用程序。 我们希望将此实现迁移到基于 Cortex-M7 的 HSE 服务上。 问题: 1. 在使用 S32DS 3.6 进行 S32G274A 的 HSE 评估时,AN14070 是否仍是推荐的起点? 2. 评估HSE服务(例如:)时,是否必须使用IVT View? * SHA-256 * AES * RSA 签名验证 还是说这仅用于生成 Blob 映像和安装 HSE 固件? 3.安装 HSE 固件后,是否有任何参考示例演示: * 通过 HSE 计算安全散列算法 (SHA)-256 * 通过 HSE 进行 RSA-2048 签名验证 * 公钥导入 HSE 密钥目录 4。是否有任何应用笔记、培训材料或演示项目可以演示将基于软件的安全启动实现迁移到 Cortex-M7 上的 HSE 服务? 5。对于当前在跳转到应用程序之前执行 安全散列算法(SHA)-256 + RSA2048 验证的引导加载程序,建议使用 HSE 的迁移路径是什么? 任何指导、参考项目或推荐的文档将不胜感激。 顺祝商祺! Re: S32G274A 实现SHA256+RSA2048算法 我按照步骤操作到了第3步。IVTView(如下图所示)显示了与生成 blob 映像 MINYS32 Design Studio for S32 平台 3.6.0打不开IVT 相关的方块 DCD、HSE、应用程序引导加载程序、启动 配置和自动对齐模块VIEW 报错:无法创建视图:com.nxp.swtools.ivt.views.IVTView java.lang. 异常,位于 org.eclipse.ui.internal.ViewReference.createErrorPart(ViewReference.java:115) 异常,位于 org.eclipse.ui.internal.ViewReference.createPart(ViewReference.java:101) 异常,位于 org.eclipse.ui.internal.e4.compatibility.CompatibilityPart.createPart(CompatibilityPart.java:304) 在 org.eclipse.ui.internal.e4.compatibility.CompatibilityPart.create(CompatibilityPart.java:342) 在 java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method) 位于 java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77) 位于 java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43) 在 java.base/java.lang.reflect.Method.invoke(Method.java:568) 位于 org.eclipse.e4.core.internal.di.MethodRequestor.execute(MethodRequestor.java:58) 在 org.eclipse.e4.core.internal.di.InjectorImpl.processAnnotated(InjectorImpl.java:976) 在 org.eclipse.e4.core.internal.di.InjectorImpl.processAnnotated(InjectorImpl.java:938) 在 org.eclipse.e4.core.internal.di.InjectorImpl.internalInject(InjectorImpl.java:138) 在 org.eclipse.e4.core.internal.di.InjectorImpl.internalMake(InjectorImpl.java:385) 位于 org.eclipse.e4.core.internal.di.InjectorImpl.make(InjectorImpl.java:311) Re: S32G274A 实现SHA256+RSA2048算法 你好,tom9 感谢您的联系。 AN14070 仍然是 Cortex-M7 评估的有效起点,但建议将其与 HSE 演示应用程序包和 HSE 固件参考文档一起使用。您可以在测试过程中向我反馈详细的错误信息。 关于安全启动在S32G上的应用,你可以尝试参考以下内容: S32G_Secure_boot 中文/英文版本。 目前,尚无任何文件能直接满足您的要求。我会通过内部渠道协助您进行核查。如果我拿到结果了,我会回复你的。 BR 乔伊 Re: S32G274A 实现SHA256+RSA2048算法 你好,tom9 感谢您的回复。 该问题可能与 S32DS 版本有关。请参阅 HSE_DEMOAPP_S32G2XX_0_1_0_16_ReadMe.pdf,请尽量使用此推荐版本。 BR 乔伊 Re: S32G274A 实现SHA256+RSA2048算法 我现在blob制作完成了,烧录进去后,串口看不到打印信息,trace32也无法加载,该从哪方面开始查呢?麻烦尽快给我看下 Re: S32G274A 实现SHA256+RSA2048算法 Hi,tom9 1.根据AN14070的内容,blob制作完成,烧写后通过QSPI启动,加载HSE相关固件和启动M7_0。QSPI启动后,你可以尝试trace32链接M7_0,检查一下SRAM的内容,看APP是否已经加载到了正确的地址。 2.能够正常启动后再加载HSE demo .elf 到 SRAM,再进行下一步操作。 BR Joey Re: S32G274A 实现SHA256+RSA2048算法 你的回答总是达不到我的预期,我现在已经可以正常打印信息了,打印这些如下: HSE FW Version: 0.1.0_1.0.9 HSE FW Image: Pink HSE FW up and running! Status: HSE_STATUS_RNG_INIT_OK HSE_STATUS_INIT_OK HSE_STATUS_CUST_SUPER_USER    卡在这里不能往后运行了,程序DEBUG_LOOP(gZero);注释之后,发现是卡在HSE_Config();中了,/* Backup primary image */ ASSERT(FLASH_OP_OK == Flash_WriteData_FromFlash(IVT.pSysImage_bck, IVT.pSysImage, MAX_SYS_IMG_SIZE));  卡在这里了。后面HSE_Aes_Example等也都不能执行 Re: S32G274A 实现SHA256+RSA2048算法 Hi,tom9 我们支持系统已经收到了相关的问题,您们的需求涉及的问题较多,内部专家已经在支持和回复。 BR Joey
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S32G_Howto_Boot_MiniLinux_from_QSPI This article explains how to boot a minimal Linux on the S32G using only QSPI Nor, for the most important purposes: emergency/upgrade/test mode for Linux, or fast booting catalogs 1 Background and Information Note... 2 1.1 Background note... 2 1.2 Description of the information required... 2 2 S32G QSPI Nor Mirror Layout Description... 3 2.1 S32G Linux BSP Support for QSPI Nor Boot... 3 2.2 S32G Yocto fsl-image-flash mechanism analysis... 5 2.3 Mirror Layout and Modification Targets for S32G QSPI Nor Boot... 7 3 Image modification and compilation... 8 3.1 Mirror image modification... 8 3.2 Yocto compilation methods... 10 3.3 Standalong compilation method... 11 4 How to shrink a Linux kernel image... 12 5 How to Make Minimum Rootfs. 12 5.1 Direct shrink based on existing rootfs... 12 5.2 Other methods... 14 6 Testing... 14 6.1 Burning Approach... 14 6.2 Running log. 16 7 How to add apps to Rootfs... 17 7.1 Adding methods to the Yocto environment... 17 7.2 Other methods ... 17 7.3 Test results... 17 8 Annexes... 17
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HSE_b: RSAキーをRAMにインポートすることは許可されていません 1024ビットのRSA公開鍵を1つRAMカタログにインポートして鍵インポートサービスを使用する方法を理解しようとしていますが、サーバーからHSE_SRV_RSP_NOT_ALLOWEDという応答が返されます。 私のテストアプリケーションは、RAMキーカタログを次のようにフォーマットします。 { { muMask = HSE_MU0_MASK | HSE_MU1_MASK, groupOwner = HSE_KEY_OWNER_ANY, keyType = HSE_KEY_TYPE_RSA_PUB, numOfKeySlots = 2, maxKeyBitLen = HSE_KEY1024_BITS, }, { muMask = HSE_MU0_MASK | HSE_MU1_MASK, groupOwner = HSE_KEY_OWNER_ANY, keyType = HSE_KEY_TYPE_ECC_PUB_EXT, numOfKeySlots = 2, maxKeyBitLen = HSE_KEY256_BITS, }, { muMask = 0, groupOwner = 0, keyType = 0, numOfKeySlots = 0, maxKeyBitLen = 0 }, } そして、サーバーからの応答としてHSE_SRV_RSP_OKを受け取りました。 次に、以下のキー情報を使用してRSAキーをインポートしようとします。 { keyFlags = HSE_KF_USAGE_VERIFY, keyBitLen = HSE_KEY1024_BITS, keyCounter = 0x0, smrFlags = 0x0, keyType = HSE_KEY_TYPE_RSA_PUB, specific = { pubExponentSize = 4, } } 私の要望は以下のとおりです。 { targetKeyHandle = 0x20000, pKeyInfo = 0x20401f74, pKey = { 0x210034b4, 0x21003534, 0x0}, keyLen = { 0x80, 0x4, 0x0}, } . HSE_RAM_PUB_KEY_IMPORT_POLICY_ATTR_ID を HSE_KM_POLICY_ALLOW_RAM_PUB_KEY_IMPORT に設定し、読み戻した結果も同じでした。 LC属性は0x04、HSEエラーフラグは0x0000、HSEステータスフラグは0x0B60です。ファームウェアバージョンは、0x0F SoC ID 0x0000 FWタイプ 0x02 メジャー 0x32 マイナー 0x00 パッチと読み取られます。 Re: HSE_b: Not allowed to import RSA key to RAM こんにちは、 @Emma_G-gbgさん パラメータは正しく設定されています。特に問題は見当たりません。スーパーユーザー権限を持っている場合は、その属性を設定する必要すらありません。 昨日、これと非常によく似たことをテストしていたので、1024ビットのRSA公開鍵と4バイトの公開指数をインポートするようにコードを少し更新しました。見た目はこんな感じです。 RSA公開鍵をインポートする際には、pubExponentSizeを設定する必要がないことに注意してください。HSEはこのパラメータを無視します。代わりにkeyLen[1]を使用します。 パラメータ pubExponentSize は、サービス HSE_SRV_ID_GET_KEY_INFO によって keyInfo を読み取る際に使用されます。そのキーのkeyInfoを読み取った結果は以下のとおりです。 それは単なるデータキャッシュの問題ではないでしょうか?データキャッシュを無効にして、違いが出るかどうか試していただけますか? よろしくお願いいたします。 ルーカス Re: HSE_b: Not allowed to import RSA key to RAM ありがとうございます。暗号鍵と認証鍵のハンドル情報の入力を忘れていました。確認していなかったので、HSE_INVALID_KEY_HANDLE はゼロになると思っていました。 現在は、キャッシュメモリ内の少なくとも一部の値を使用して動作しており、サービス呼び出しの前後にキャッシュメンテナンス操作が行われています。既存のプロジェクトにHSEサービスを追加しているため、キャッシュ構造を変更することはできませんが、共有メモリに実際に書き込まれていることを確認する限り、これまでのところすべて正常に動作しています。ただし、関連するメモリのキャッシュを無効にしてみましたが、違いはありませんでした。
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s32k344 罐 你好,我正在使用 s32k344 电机驱动器代码,并有几个原型。我发现其中一台 CAN 机器在运行一段时间后会脱机,发送和接收都会出现异常。我打开了离线回复,发现信息会丢失 200 毫秒的帧。我更换了 CAN 收发器,但同样的现象依然存在。我已经阅读了勘误手册,是否是芯片本身存在这个错误? Re: s32k344 can Hi@qicbeng 示例代码"MCSPTE1AK344_PMSM_FOC_2Sh_ll" 不提供 FLEXCAN 功能;您必须自行添加 CAN 相关功能。 请提供您的 CAN 测试项目,以便我检查您的配置是否正确。
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FRDM-MCXN947:Ee(42) 刷新 tflm_modelrunner 后无法连接到内核 刷新 tflm_modelrunner SDK 示例(FreeRTOS + lwIP,定义 USE_RTOS)后,我的 FRDM-MCXN947 不再响应 SWD。LinkServer v25.6 和 MCU-Link V3.128 报告 Ee(42)。所有操作(包括大量擦除)都无法连接到核心。在 “设备管理器” 中可以正确检测到 MCU-Link 探测器。按下 SW3+RESET 时,Windows 会检测到 USB 枚举,但未安装驱动程序,blhost 报告未找到任何设备。 我怎样才能找回板? 更新:我能够在 Linux 上下载 led_blinky 示例,但在 Windows 10 上问题依然存在。 此外,在这两个操作系统上,我通常会收到以下警告: " 项目是为设备 MCXN947 配置的,但选定的探测器报告已连接到设备 MCXN947VDFT。你确定要继续吗?" 第一次尝试下载程序时(不知道是否与此有关)。 Re: FRDM-MCXN947: Ee(42) Could not connect to core after flashing tflm_modelrunner 最新情况--决议 通过从 Windows 设备管理器中卸载 MCU-Link 设备条目并允许 Windows 在重新连接时重新枚举这些条目,该问题得到了解决。 具体而言,删除了两个条目:通用串行总线设备下的 " MCU-LINK FRDM-MCXN947 CMSIS-DAP ",以及端口 (COM & LPT) 下相应的 MCU-Link vCom 端口。重新连接 USB 电缆后,Windows 自动重新安装了这两个驱动程序,LinkServer 可以正确打开探针。 根本原因似乎是Windows中USB设备状态损坏,很可能是在之前使用tflm_modelrunner固件(FreeRTOS + LwIP)的会话中触发的。该探针在系统中可见并被正确枚举,但其句柄无法被 redlinkserv.exe 打开,导致在所有操作(包括大量擦除、闪存和 gdbserver)中出现 Ee(42)。重新安装集成开发环境,替换 redlinkserv.exe、清除 USB 注册表项也无法解决这个问题。只有从设备管理器重新枚举设备才能解决问题。
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MCUXPRESSOでc11を選択しても機能しません。 MCUXPRESSO c11にチェックを入れても、FRDM MCXA156ではstatic_assertが動作しません。プロジェクト全体は添付ファイルにあります。       MCXA Re: MCUXPRESSO钩选c11不起作用 プロジェクトはこちらです Re: MCUXPRESSO钩选c11不起作用 こんにちは、 @bigz static_assert を変更してみてください。 _Static_assert。     BR アリス Re: MCUXPRESSO钩选c11不起作用 Keilプラットフォームに移行しました。
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How to use SecureElement SE05x: Using SE050 via OpenSSL (Japanese blog) In the previous article, we described the procedure for setting up the "Plug and Trust Middleware" library for SE05x (Secure Element) on a Raspberry Pi and FRDM-IMX93 (development board for i.MX 93) . How to use Secure Element SE05x: Setting up Plug and Trust Middleware on Raspberry Pi (Japanese blog) How to use Secure Element SE05x: Setting up Plug and Trust Middleware on the FRDM-IMX93 development board (Japanese blog) By using Secure Element and "*Plug and Trust Middleware," you can apply protection features to all applications that perform authentication using OpenSSL (e.g., Eclipse Mosquitto ™ , etc.) without modifying the application itself . This article explains practical ways to use SE05x in conjunction with OpenSSL. (Estimated time: 10 minutes *Assuming Plug and Trust Middleware is already set up) *Plug and Trust Middleware also includes integration with OpenSSL, which is widely used on Linux. Hardware, software, and versions used in writing this article Hardware: Raspberry Pi 3 Model B+ EdgeLock ® SE050 Development Kit ( OM-SE050ARD-E ) Five jumper wires (male-to-female or female-to-female) or an Arduino to Raspberry Pi adapter board ( OM-SE050RPI ) software: Raspberry Pi OS 12 64-bit SE-PLUG-TRUST-MW_04.07.01 *After unzipping, you can access the documentation from simw-top/doc/index.html (hereafter, "documentation" refers to this HTML file). The OpenSSL provider within the middleware is also available on GitHub, where you can find command examples and other information. https://github.com/NXPPlugNTrust/se05x-openssl-provider   Summary of this article OpenSSL has an interface called `provider` (or `engine` in earlier versions) since version 3.0, which allows you to replace parts of OpenSSL's operation with customized code. Plug and Trust Middleware provides a provider/engine to replace the cryptographic processing performed by OpenSSL with cryptographic processing using SE05x. The corresponding process is described in section "8.2" of the documentation. Please refer to "Introduction on OpenSSL provider". If a provider is not used (see the diagram on the left below) , the key, including the private key, is placed on the file system, and OpenSSL reads it and performs the processing. (*Since the key is stored on the file system, there is a high risk of key leakage.) When using a Provider (see the diagram on the right below) , it will look like this: OpenSSL instructs the Plug and Trust Middleware Provider to perform cryptographic processing. The Provider reads the Key file, and upon recognizing that it is in the format of a reference key, it retrieves the Key ID from the reference key and instructs the SE05x to perform encryption using the Key with that ID. (If a regular key file that is not a reference key is recognized, the process returns to the left.) In this article, Creating a reference key to use the key pair pre-installed on the SE05x at the time of shipment. Enabling the OpenSSL Provider Example of the steps for signing and verifying using these methods. I will explain this.   Retrieving the object list within SE05x Similar to the Plug and Trust Middleware setup, we will enable venv and perform operations in an independent Python environment (virtual environment). Enable venv from the Plug and Trust Middleware deployment directory using the following command. cd simw-top/pycli/ source venv/bin/activate The following command will display a list of objects within SE05x. ssscli connect se05x t1oi2c none ssscli se05x readidlist ssscli disconnect The execution result will be as follows: (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli $ ssscli connect se05x t1oi2c none (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli $ ssscli se05x readidlist sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! Key-Id: 0X7fff0201 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0X7fff0202 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0X7fff0204 NIST-P (Public Key) Size(Bits): 256 Key-Id: 0X7fff0206 BINARY Size(Bits): 144 Key-Id: 0x7fff020b HMAC Size(Bits): No Info available Key-Id: 0Xf0000000 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000001 BINARY Size(Bits): 3760 Key-Id: 0Xf0000002 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000003 BINARY Size(Bits): 3760 Key-Id: 0Xf0000012 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000013 BINARY Size(Bits): 3736 Key-Id: 0Xf0000020 NIST-P (Public Key) Size(Bits): 256 Key-Id: 0Xf0000100 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000101 BINARY Size(Bits): 4392 Key-Id: 0Xf0000102 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000103 BINARY Size(Bits): 4392 Key-Id: 0Xf0003394 AES Size(Bits): 256 (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli $ ssscli disconnect   SE05x factory-programmed user identification information (keypair, certificate) Details of the displayed list of objects can be found in AN12436: SE050 configurations . The following are key pairs and their certificates that do not have a designated purpose and can be used freely by users. Key-Id: 0Xf0000100 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000101 BINARY Size(Bits): 4392 Key-Id: 0Xf0000102 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000103 BINARY Size(Bits): 4392 0Xf0000101 and 0Xf0000103 are certificates corresponding to the key pairs 0Xf0000100 and 0Xf0000102, respectively. Let's try using the key pair 0Xf0000100. OpenSSL treats key pairs as files, but there's no point in protecting the private key with SE050 if you're going to extract and use the private key. Therefore, it is obtained in a format that does not include the private key, called a reference key, which will be described later. The following commands will create a directory for storing keys and retrieve the keys. mkdir se050_keys cd se050_keys/ ssscli connect se05x t1oi2c none ssscli refpem ecc pair 0xf0000100 reference_key_0xf0000100.pem ssscli get ecc pub 0xf0000100 public_key_0xf0000100.pem ssscli disconnect For comparison purposes, we will also generate a key pair and public key without using the SE050 as described below. Please execute the following command. openssl ecparam -genkey -name prime256v1 -out keypair.pem openssl ec -in keypair.pem -outform PEM -pubout -out public_key.pem About the Reference Key Let's display the contents of the reference key and public key obtained using the following command. openssl ec -text -noout -in reference_key_0xf0000100.pem openssl ec -text -noout -pubin -in public_key_0xf0000100.pem The execution result will be as follows: (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl ec -text -noout -in reference_key_0xf0000100.pem read EC key Private-Key: (256 bit) priv: 10:00:00:00:00:00:00:00:00:00:00:00:00:00:00: 00:00:00:f0:00:01:00:a5:a6:b5:b6:a5:a6:b5:b6: 10:00 pub: 04:e7:e0:f5:77:d7:b7:6f:0c:e6:93:7c:61:bf:85: 5e:80:37:76:9a:01:e3:e4:18:60:67:7a:3f:ab:bd: 9b:b6:53:64:4d:40:9b:07:c6:18:c9:5a:74:b9:c7: c8:d4:ae:2e:49:ae:68:63:de:64:77:6d:1e:1c:94: 4b:bb:70:10:0b ASN1 OID: prime256v1 NIST CURVE: P-256 (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl ec -text -noout -pubin -in public_key_0xf0000100.pem read EC key Public-Key: (256 bit) pub: 04:e7:e0:f5:77:d7:b7:6f:0c:e6:93:7c:61:bf:85: 5e:80:37:76:9a:01:e3:e4:18:60:67:7a:3f:ab:bd: 9b:b6:53:64:4d:40:9b:07:c6:18:c9:5a:74:b9:c7: c8:d4:ae:2e:49:ae:68:63:de:64:77:6d:1e:1c:94: 4b:bb:70:10:0b ASN1 OID: prime256v1 NIST CURVE: P-256 As can be seen above, the `pub` field of the reference key contains the same public key as the public key file, but the private key portion starting with `priv` contains a series of zeros, indicating that it does not actually contain the private key. The `priv` field in the Reference key does not contain the private key itself, but rather indicates where the private key is stored within SE050. In this case, it indicates that it is stored at 0xf0000100. For formatting information, see document "8.1.2.2". It is described in "EC Reference key format". Enabling the OpenSSL Provider There are several ways to use the OpenSSL Provider, but here we will enable it by reading a config file. The config file is located in simw-top/demos/linux/common/ and there are several versions of it. openssl11_sss_se050.cnf ----- OpenSSL 1.1.1 and SE050 openssl_sss_se050.cnf ----- OpenSSL 1.0.0 and SE050 openssl30_sss_se050.cnf ----- OpenSSL 3.x and SE050 You can check the OpenSSL version with the following command. openssl version If you're using a Raspberry Pi, it should be version 3.0. Apply the configuration using the following command. Replace with the middleware deployment location. export OPENSSL_CONF= /simw-top/demos/linux/common/openssl30_sss_se050.cnf   Signature generation and verification using SE050 + OpenSSL provider Use the following command: Use the reference key to generate a signature using the private key with ID:0xf0000100 within SE05x. Signature verification using the reference key and the public key with ID:0xf0000100 within SE05x. Signature verification using a client key We will do this. openssl pkeyutl -sign -inkey reference_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -out signature_with_provider.txt -digest sha256 openssl pkeyutl -verify -inkey reference_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -sigfile signature_with_provider.txt -digest sha256 openssl pkeyutl -verify -pubin -inkey public_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -sigfile signature_with_provider.txt -digest sha256 The execution result will be as follows: (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -sign -inkey reference_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -out signature_with_provider.txt -digest sha256 App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! sssprov-flw: Performing ECDSA sign using SE05x (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -verify -inkey reference_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -sigfile signature_with_provider.txt -digest sha256 App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! sssprov-flw: Performing ECDSA verify using SE05x Signature Verified Successfully (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -verify -pubin -inkey public_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -sigfile signature_with_provider.txt -digest sha256 App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! sssprov-flw: Not a key in secure element. Performing ECDSA verify operation using host software Signature Verified Successfully Since the OpenSSL provider is enabled, messages related to the OpenSSL provider will be displayed. The following display shows that SE05x is actually using the object specified by the reference key to generate and verify the signature. If it is not displayed, please check the OPENSSL_CONF settings. sssprov-flw: Performing ECDSA sign using SE05x sssprov-flw: Performing ECDSA verify using SE05x When verifying a signature using a file containing only the public key, the following message is displayed, indicating that SE050 is not being used. sssprov-flw: Not a key in secure element. Performing ECDSA verify operation using host software For comparison, we will perform the same operation using a key pair and public key generated outside of the SE050. openssl pkeyutl -sign -inkey keypair.pem -rawin -in public_key.pem -out signature.txt -digest sha256 openssl pkeyutl -verify -inkey keypair.pem -rawin -in public_key.pem -sigfile signature.txt -digest sha256 openssl pkeyutl -verify -pubin -inkey public_key.pem -rawin -in public_key.pem -sigfile signature.txt -digest sha256 The execution result will be as follows: (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -sign -inkey keypair.pem -rawin -in public_key.pem -out signature.txt -digest sha256 App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! sssprov-flw: Not a ref key sssprov-flw: Not a key in secure element. Performing ECDSA sign operation using host software sssprov-flw: Get random data from SE05x (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -verify -inkey keypair.pem -rawin -in public_key.pem -sigfile signature.txt -digest sha256 App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! sssprov-flw: Not a ref key sssprov-flw: Not a key in secure element. Performing ECDSA verify operation using host software Signature Verified Successfully (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -verify -pubin -inkey public_key.pem -rawin -in public_key.pem -sigfile signature.txt -digest sha256 App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! sssprov-flw: Not a key in secure element. Performing ECDSA verify operation using host software Signature Verified Successfully When a key pair is specified, the following is displayed, indicating that signature generation is performed using the private key in the key pair file, not SE050. sssprov-flw: Not a ref key However, since the OpenSSL Provider provides a random number generation function, the following is displayed during signature generation, and random numbers are generated using SE050. sssprov-flw: Get random data from SE05x For comparison, the following is the result of using a reference key with the OpenSSL provider disabled. (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ export OPENSSL_CONF= (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -sign -inkey reference_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -out signature_without_provider.txt -digest sha256 (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -verify -inkey reference_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -sigfile signature_without_provider.txt -digest sha256 Signature Verification Failure The priv portion of the reference key is interpreted as the private key, and the signature is generated accordingly. The signature generation is successful, but the signature verification will naturally fail because the private key being used does not correspond to the public key. In this case, we applied SE050 protection to a process that uses OpenSSL commands. An example of applying SE050 protection to an application using the OpenSSL library is described in the following article. Connecting to Azure IoT Hub using the Eclipse Mosquitto client ========================= We are currently unable to respond to comments left in the " Comment " section of this post . We apologize for the inconvenience, but please refer to " Technical Questions to NXP - How to Contact Us( Japanese Blog) " when making inquiries.(If you are already an NXP distributor or have a relationship with NXP, you may ask your representative directly.) In the previous article, we described the procedure for setting up the "Plug and Trust Middleware" library for SE05x (Secure Element) on a Raspberry Pi and FRDM-IMX93 (development board for i.MX 93) . How to use Secure Element SE05x: Setting up Plug and Trust Middleware on Raspberry Pi (Japanese blog) How to use Secure Element SE05x: Setting up Plug and Trust Middleware on the FRDM-IMX93 development board (Japanese blog) By using Secure Element and "*Plug and Trust Middleware," you can apply protection features to all applications that perform authentication using OpenSSL (e.g., Eclipse Mosquitto ™ , etc.) without modifying the application itself . This article explains practical ways to use SE05x in conjunction with OpenSSL. (Estimated time: 10 minutes *Assuming Plug and Trust Middleware is already set up) *Plug and Trust Middleware also includes integration with OpenSSL, which is widely used on Linux. Security Technology Focus Japanese Blog
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imx8qm jailhouse Hi all, Is there any document showing all the steps to have a demo running on imx8qm mek board with jailhouse? I was going over this: L5.4.70_2.3.3_LINUX_DOCS but all I could find is a reference to device trees: Hypervisor Jailhouse Enables the Jailhouse Hypervisor device trees. • imx8qxp-mek-root.dtb: DTB for root-cell I do not know what to do with this info. That is why I need a step by step instruction list. Br, Mircea Re: imx8qm jailhouse @Jerry137207  Hi, Are you running jailhouse on top of hw ? Re: imx8qm jailhouse Hi @Rita_Wang  I am using MCIMX8QM soc I need to run android and freertos on top of hypervisor. Which hypervisor i can use ? Re: imx8qm jailhouse Waste of time. Nothing works out of the box on nxp imx8qm, at least not with the software provided by nxp. Android does not run in jailhouse, on imx95 they have a small android demo running in xen. freertos can run on the second core m3 core, you can flash the emmc with android and have it like that running. no hypervisor needed. Re: imx8qm jailhouse hi @Ahelion i am planning to use MCIMX8QM-CPU soc  i need to bringup freertos and Android on top on this do we need hypervisor here, and also Jailhouse is already present in the latest version of android ? Re: imx8qm jailhouse Hi, Ahelion: I'm interested in runing multiple OS based on jailhouse, but related information is lack. I've sucessfully run jailhouse test demo in Imx8qm mek board. If you would like share info each other, plz email me: [email protected]. Re: imx8qm jailhouse I can tell you right now, it is not supported. I could not get jailhouse or xen to work on imx8qm. Whatever documentation i find is referencing linux4.9, which can not be build anymore. Re: imx8qm jailhouse Hi, Yes, the xen is supported on the i.MX8QM. You can refer to the attach document. Wish you have a nice day Best Regards Rita Re: imx8qm jailhouse any ideea?  Found out that the latest linux kernel does support the lates XEN How can I get Linux and Android running at the same time? Re: imx8qm jailhouse OK, I will help confirm. Re: imx8qm jailhouse L5.4.70_2.3.3, i was following this quide, so all bsp-s mentioned here I am using. Re: imx8qm jailhouse Which version BSP are you want to use? Re: imx8qm jailhouse @Rita_Wang Xen willl support on latest kernal 6x? Re: imx8qm jailhouse @Rita_Wang i have one more we are buying MCIMX8QM soc  i need to run android and freertos as guest which hypervisor support on this latest kernel? jailhouse supports on latest kernel for my requirement  Re: imx8qm jailhouse Hi @Shivu_Guru_24 , Sorry for late reply. For the XEN the on latest kernal 6x do not support it. If customer want to use, they can do porting themself. In our BSP 4.14.98 support it. Customer and refer it: Embedded Linux for i.MX Applications Processors | NXP Semiconductors   Hope this can do help for you Wish you have a nice day Best Regards Rita Re: imx8qm jailhouse Hi @Shivu_Guru_24 , Jailhouse is a Type 1 hypervisor for i.MX 8. Xen is not support in the latest version BSP. Wish you have a nice day Best Regards Rita
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Vision ML with the FRDM-MCXN947 The MCX N microcontroller family includes an eIQ Neutron N1-16 NPU for accelerating neural network models. The FRDM-MCXN947 development board can be combined with a camera and LCD screen to showcase running TinyML vision models on a microcontroller.   MCX N Camera Hardware Setup: The following hardware is used: MCX N FRDM Development Board - FRDM-MCXN947 OV7670 camera (with optional wide-angle lens) NXP LCD-PAR-S035  There are three small modifications needed for the FRDM-MCXN947 board for camera support. Without this modification the camera colors will be incorrect and tinted red.   Change SJ16, SJ26, and SJ27 found on the back of the Rev B board to connect pin 3 (the dashed side) so that it looks like the following:          Then connect the camera and LCD to the FRDM-MCXN947: Plug in the OV7670 camera into J11. It should line up with the orange box.                            Connect the LCD-PAR-S035 LCD into J12. It should be flush with the bottom so that the top 2 rows of pins are left hanging off the edge. Also note that on some LCD-PAR-S035 boards those top two rows of pins are not installed.          It should look like the following when complete           Also as the camera and Ethernet pins are shared, if you need to use the Ethernet+Camera at the same time please see this NXP Community post. MCX N Vision ML Examples: The NXP Application Code Hub contains several vision AI/ML examples: Face Detect Face Detect with Zephyr Multiple Person Detection  CIFAR10 Fashion MNIST There are also Multimedia Processing Pipeline (MPP) examples inside the MCX N MCUXpresso SDK that demonstrate more examples of using vision AI/ML on MCX N. These examples are only available for VSCode/GCC in the Repository-Layout SDK package. Note: It is recommended to use MCUXpresso SDK 25.09 for these examples. The MPP issues in the 25.12 and 26.03 MCUXpresso SDK releases should be fixed in the upcoming MCUXpresso SDK 26.06.  MCX N ML Vision Lab: The attached eIQ Neutron NPU for MCX N Lab Guide - Face Detect.pdf lab document walks through the steps to download an example Face Detect ML project from the NXP Application Code Hub and use the eIQ Neutron Compiler tool to convert a model. It also describes how to update the eIQ and Neutron software libraries in an older MCUXpresso SDK project to work with the latest eIQ Neutron SDK libraries. It is recommended to go through the general MCX N NPU Lab Guide first and then do the attached Face Detect lab second.  The lab is also included below: 1  Lab Overview This document will demonstrate the acceleration provided by the eIQ Neutron NPU using the Multiple Face Detection demo for the FRDM-MCXN947 found on the NXP App Code Hub. The demo will run with the non-NPU optimized model and then the performance can be compared to the NPU optimized version of that same model. It also demonstrates how the NPU optimized version of the face detect model was generated. This lab is written for MCUXPresso IDE but the same basic steps can be used for VSCode or GCC. This lab will also cover how to update the Neutron NPU libraries in the project, as the original Face Detect example uses an older Neutron library version. It is highly recommended to complete the eIQ Neutron NPU for MCX N Lab Guide before starting this lab. 2  Software and Hardware Installation This section will cover the hardware and software needed for this lab. 2.1 Hardware The following hardware is required for this lab: MCX N FRDM Development Board - FRDM-MCXN947 OV7670 camera (with optional wide-angle lens) NXP LCD-PAR-S035 2.2 NXP Software Installation          Install MCUXpresso IDE v25.6 or later. Download the latest eIQ Neutron SDK Download and unzip the latest MCUXpresso SDK for FRDM-MCXN947 using MCUXpresso SDK builder Search for the FRDM-MCXN947 board Then click on Others On the SDK builder page, make sure to select the “eIQ” middleware and that the MCUXpresso IDE toolchain is selected. Then click on Build SDK.   Then click on the Download button and accept the license agreement to download the zip file. 3   Face Detection Example 3.1 Download Face Detect Demo from App Code Hub The code for this lab can be found on the NXP Application Code Hub hosted on Github, and we can use MCUXpresso IDE to directly import the Face Detection example from App Code Hub. Drag-and-drop the FRDM-MCXN947 SDK zip file into the Installed SDKs window, located on a tab at the bottom of the screen named “Installed SDKs”. You will get the following pop-up, so hit OK. Once imported, the Installed SDK tab will look something like this:  In the Quickstart Panel found in the lower left corner, click on Import from Application Code Hub.. In the dialog box that pops up there are many filters available to filter for different devices and types of demos. But since the name of the demo we are interested in is already known, the search box will be faster. Select the AI/ML category and then type in “face detection” and then click on the “Multiple face detection on mcxn947” demo. Make sure you don’t accidently click on the “Multiple Person Detection” demo. On the popup that comes up, click on GitHub link at the top. At that point the Next button at the bottom will become clickable so click on that. The next screen displays the possible branches. In this case there is only main so just click on the Next button at the bottom to go with the default. The next dialog box determines the location on your computer where the code will be downloaded to. You can leave it at the default location if desired or click on Browse to pick your own location. Then click on Next. The next screen will download the code and ask about importing the project. Click on Next to go with the default Import existing Eclipse projects option. Then finally on the last screen click on Finish to import the project into your MCUXPresso IDE workspace. You may get the following warning due to the project being made on an older version of the SDK. Then hit OK to accept the using the newest version.  15. It should look like the following when done: 3.2 Convert Model The demo is already using a model that was converted to take advantage of the eIQ Neutron NPU. This purpose of this section of the lab is to teach new NXP users how that model was converted. Unzip the eIQ Neutron SDK package in a directory of your choosing.   Optionally add \eIQ_NeutronSDK_ \bin to your executable path so that the neutron-compiler utility can be directly called from the command line. Back in MCUXpresso IDE, find the location of the original non-converted model used for this demo by right clicking on the face_detect.tflite file in source/model/ and going to Utilities->Open directory browser here. Copy the directory location as it will be used in the next step Open a Windows Command prompt and navigate to the directory where the model was at from the previous step             Use the Neutron Compiler to convert the Face Detection model: neutron-compiler --input face_detect.tflite --output face_npu.tflite --target mcxn94x 3.3 Update eIQ Neutron Libraries The Face Detect ACH example uses an older version of the eIQ Neutron libraries, and so it needs to be updated to match the Neutron libraries in newest eIQ Neutron SDK since the model was converted with that version of the Neutron Compiler tool. In the frdmmcxn947_multi_face_detection project, right click on the eiq folder and go to Utilities->Open directory browser here Overwrite the Neutron files from the eIQ Neutron SDK folder into your project to update the Neutron libraries to the latest version: File Name Source Directory in eIQ Neutron SDK Target Directory in MCUXpresso SDK libNeutronDriver.a target\mcxn94x\board\ eiq\neutron\mcxn\cm33 libNeutronFirmware.a target\mcxn94x\board\ eiq\neutron\mcxn\cm33 NeutronDriver.h target\mcxn94x\driver\include\ eiq\neutron\driver\include NeutronErrors.h target\mcxn94x\common\include\ eiq\neutron\common\include After the new Neutron libraries are copied over, clean the project to ensure the new libraries will be used 3.4 Board modifcations There are some hardware modifications to the MCX FRDM board required for this demo since the camera pins are muxed with the Ethernet pins and the Ethernet functionality is the default. The board version can be determined by scanning the QR code on the back of the MCX FRDM board with your phone. Most people will have Rev B boards. Rev A: Remove the R157, R158, and R159 resistors from the back of the Rev A board so that it looks like the following: Rev B: Change SJ16, SJ26, and SJ27 found on the back of the Rev B board to connect pin 3 (the dashed side) so that it looks like the following: 3.5 Connect the camera and LCD Plug in the OV7670 camera into J11. It should line up with the orange box. Connect the LCD-PAR-S035 LCD into J12. Note that some older LCD-PAR-S035 LCDs may have an extra set of pins soldered on, and in that case the extra 2 rows of pins should be hanging off the edge like in the photo below.             It should look like the following when complete 3.6 Run Models Now open up model_data.s by double clicking on it, and then modify line 43 to point to the original (non NPU converted) model file named face_detect.tflite. This particular project uses the .tflite file directly. Build the project by clicking on the Build icon in the Quickstart Panel Then download and run the project by clicking on the Debug icon in the Quickstart Panel You should see the demo working with an inference time of 817ms printed on the LCD display. Note: The default camera on the OV7670 is not very wide angle so you have to hold it fairly far back. There are wide-angle lenses that can be purchased to make it easier to demonstrate. Note: After POR there may be some glitching on the camera due to the fact the camera is expecting 2.8V but the board is at 3.3V and the initial HSYNC signal was missed. Press the reset button (SW1) and it should fix any camera issue.  Now let’s use the Neutron optimized model by opening model_data.s again and this time selecting the NPU converted model face_npu.tflite Recompile and reprogram the board. You’ll see it is significantly faster with a 22ms inference time, a 37x improvement! 4  Conclusion This lab demonstrated how the eIQ Neutron NPU on MCX N devices can significantly decrease inference time on quantized models and the steps to generate a NPU optimized model using the command line tools. Also explore the other App Code Hub ML examples available online. FRDM-Training MCXN NPU|ML
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Power Optimization Strategies for NXP MCUs in Edge AI Applications Hello everyone, I’m currently designing a low-power edge computing device based on an NXP microcontroller and wanted to get some advice from the community. The system performs intermittent sensor sampling and local inference, then sends summarized results to a host system for further analysis. During development and testing, I’m using an ai enabled laptop to profile performance, validate inference output, and monitor power consumption patterns over extended runs. My main challenge is optimizing power usage on the MCU side while maintaining acceptable response time for inference tasks. Are there recommended low-power modes, clock scaling techniques, or SDK features in MCUXpresso that work well for this kind of workload? Any real-world experiences with balancing performance and power on NXP MCUs would be very helpful. Thanks in advance for your insights.
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S32K310 CAN Interrupt Receive S32K310のCANドライバモジュールをCANとCANIFを使って設定しました。CAN_Write()関数を呼び出してメッセージを送信できることは分かっていますが、以下の点について疑問があります。 1. メッセージを受信するにはどうすればよいですか?CanIf_RxIndication()関数を使ってメッセージを受信できるという記事をいくつか見ました。しかし、この関数のロジックは静的コード内で自動的に呼び出されるべきであり、外部メインプログラムで自分で記述するべきではありません。あるいは、この関数は割り込み発生後にデータを保存するので、どのようにデータを読み出せばいいのでしょうか?自分で作成したコールバック関数に置き換えることは可能でしょうか?(MCALルーチンの中に割り込みを使用するCANルーチンは見つかりませんでした。POLLINGモードのルーチンしかないようです。) 2. CANの受信はCANIFを経由する必要があるのに、送信はCANドライバーから直接送信できるのはなぜですか?何か仕様上の制限があるのでしょうか? 助けてくれてありがとう!! Re:S32K310 CAN割り込み受信 こんにちは@Embedded_novice、 1.FlexCANがドライバーとどのように連携するかについては、次のトレーニングをご覧ください:RTDおよび低レベルドライバーを使用したFLEXCAN。 割り込みモードでメッセージを受信するには、割り込みドライバー(IntCtrl)を設定し、FlexCANデータ情報構造体内でpolling = FALSEを選択し、「FlexCAN_Ip_Receive」を使用する必要があります。 この例は、コミュニティの投稿からガイダンスとして使用できます: TX/RX/EnhanceRXFIFO DMAテストの例S32K344 FlexCAN_Ip S32DS3.5 RTD400 - NXPコミュニティ。 2. CanIf_RxIndication APIのことを言っているのですね。前の回答で述べたように、代わりにFlexCAN_Ip_Receiveを使用できます。 Best regards, Julián
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FRDM-KL25Z 错过 U7 MMA8451Q 新版 FRDM-KL25Z 缺少 U7 MMA8451Q 芯片。这个芯片是这个板的重要元器件,但我不明白为什么它被拆除了。因此,我无法使用板,但是尽管芯片已被移除,价格还是上涨了。我需要那块旧板。请检查一下,你移除了芯片但没有更改板型号,所以当我订购时,我本来想要的是旧板,但我收到了新的。 Re: FRDM-KL25Z miss U7 MMA8451Q 几年前,恩智浦将大部分 Accel/Gyros 的现有库存全部卖给了罗彻斯特电子公司。如今,意法半导体或模拟设备是寻找微机电的更好去处。 如果您要开始新的设计,Kinetis 产品线并不适合。 https://www.rocelec.com/global-search/MMA8451Q Re: FRDM-KL25Z miss U7 MMA8451Q 你好@王建兵 感谢您与我们联系。很抱歉,我们只提供新版本(Rev.I),旧版本将不再生产。正如 FRDM-KL25Z 主页上所指出的那样:"新设计不再推荐使用 MMA8451Q 加速计。 你可以尝试联系代理商或其他第三方平台,检查他们是否还有先前版本的库存。 感谢您的理解。 BR 爱丽丝 Re: FRDM-KL25Z miss U7 MMA8451Q 好吧,我明白了。我遇到了一个问题,请查看如何解决。此版本更改只删除了 U7?如果我把这个 U7 MMA8451Q 焊接到板上。是否可以像旧版本一样使用?现在我需要一个解决方案来处理它。谢谢!
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