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FS85 闪存引导加载程序和应用程序的初始化 我在我的项目中使用 FS85,它具有闪存引导加载程序和应用软件。我初始化 FS85 的预期设计是: 上电复位后,引导加载程序软件将首先运行,并且 SBC 应在 WDG 禁用的情况下初始化并释放 FS0B。应用程序验证成功后,软件将跳入应用程序并将 SBC 置于 INIT_FS,以使用不同的配置集重新配置 FS85,启用窗口 WDG,然后转到 NORMAL_FS。 FS85 是否有任何文件可以作为此案的建议? 我们有 Fs85 的安全应用说明吗? 在引导加载程序中禁用 WDG 是否违反了 Fs85 安全应用说明中的任何一点? 因为 SBC 在开机复位后需要初始化两次,这种设计有什么缺点吗?例如,FS85 是否有任何寄存器只能在上电复位后配置并且之后不能更改?或者只要 SBC 处于 FS_INIT 状态,就可以配置所有寄存器(OTP 寄存器除外)? 非常感谢。 FS85和FS84 功能安全 电源解决方案
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Where can i download the BSDL for mimx8ud7cvp08sc? Where can i download the BSDL for mimx8ud7cvp08sc? Re: Where can i download the BSDL for mimx8ud7cvp08sc? Thank you so much. Re: Where can i download the BSDL for mimx8ud7cvp08sc? Hi  @Corebb! Yes you are right, apparently the files are named wrong because downloading the 9x9 version contain the 15x15 package. You can download the correct one here. I will report this issue to the apps team to correct the file names. Best Regards! Chavira Re: Where can i download the BSDL for mimx8ud7cvp08sc? Thank you. But i think your link is incorrect. It is a zip, extract it has a folder name: BSDL File for i.MX 8ULP (15x15 package) inside the folder, the filename is imx8ulp_fccsp512_full.bsdl open it using notepad, it shows Package Type: MAPBGA_9x9 But the mimx8ud7cvp08sc should only has 485 pins, not 512, and the package of it should be 15x15, not 9x9. So maybe the download zip file is incorrect? Or am i misunderstanding? Re: Where can i download the BSDL for mimx8ud7cvp08sc? Hi @Corebb! Thank you for contacting NXP Support! You can download the BSDL file in the link below: IMX8ULP-15X15-BSDL  Best Regards! Chavira
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mimx8ud7cvp08sc の BSDL はどこでダウンロードできますか? mimx8ud7cvp08sc の BSDL はどこでダウンロードできますか? 日時: mimx8ud7cvp08sc の BSDL はどこでダウンロードできますか? どうもありがとうございます。 日時: mimx8ud7cvp08sc の BSDL はどこでダウンロードできますか? ありがとうございます。しかし、私はあなたのリンクが間違っていると思います。 これはzipで、フォルダ名があります:i.MX 8ULP(15x15パッケージ)のBSDLファイル。 フォルダ内では、ファイル名は imx8ulp_fccsp512_full.bsdl です メモ帳を使用して開くと、パッケージタイプが表示されます:MAPBGA_9x9 しかし、mimx8ud7cvp08sc は 512 ピンではなく 485 ピンしか持たず、パッケージは 9x9 ではなく 15x15 にする必要があります。 では、ダウンロードしたzipファイルが正しくないのでしょうか?それとも誤解しているのでしょうか?
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iMXRT1176 EVK デバイスメモリに関連するリファレンスドキュメントが必要 こんにちはチーム、 iMXRT1176のメモリの詳細について、別のドキュメント/マニュアルが利用可能かどうかを知る必要があります。 FlexSPIメモリ(256MB)にはセクタレベルのメモリパーティションがありますか?
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When using Flash to emulate EEPROM, the data is only written to FlexRAM and not to FlexNVM When using the Flash EEPROM emulation feature of the S32K146 chip, I configured 32KB of FlexNVM as EEPROM Backup and 2KB of FlexRAM as EEPROM. During emulation, upon checking the memory, I found that the written data only resides in FlexRAM and has not been written to FlexNVM. I am unsure of the reason behind this and would appreciate any assistance. Re: When using Flash to emulate EEPROM, the data is only written to FlexRAM and not to FlexNVM Hi@813270556 This is not feasible Re: When using Flash to emulate EEPROM, the data is only written to FlexRAM and not to FlexNVM @Senlent  FlexRAM is used as EEPROM (with a size of 4KB), and FlexNVM is used as EEPROM Backup (with a size of 32KB). The chip I am using is S32K146. When I write data, can the size of the written data exceed 4KB? If so, how can the data exceeding 4KB be read from FlexNVM? Re: When using Flash to emulate EEPROM, the data is only written to FlexRAM and not to FlexNVM Hi@813270556 After the MCU is powered off and restarted, FlexNVM can synchronize the backed-up data to the FlexRAM area. You can use this principle to confirm whether your last backup was successful. Re: When using Flash to emulate EEPROM, the data is only written to FlexRAM and not to FlexNVM How can I prove that the data I have written has been backed up to FlexNVM? Re: When using Flash to emulate EEPROM, the data is only written to FlexRAM and not to FlexNVM Hi@813270556 After successfully executing the EEE partition command,the FlexNVM area (EEE_Flash) used as EEE backup is not visible to the CPU, and user code cannot directly access (read and write) this address mapping area, otherwise a bus error will occur and enter the kernel HardFault exception (default configuration) or BusFault exception (after using BusFault exception). At the same time, in the Memory window of the debug interface, the EEE_Flash area is displayed as an unknown state (???). https://mp.weixin.qq.com/s?__biz=MzI0MDk0ODcxMw==&mid=2247486584&idx=1&sn=3b8651b928edd19c642b17838a8c75bd&chksm=e91248fede65c1e87214ce913baab45431f816d0bfd0362e00aea1ed4232f200d5ae2720cd71&scene=21#wechat_redirect
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[S32K3] S32K324 Lpspi 0~6とDMAチャネルの対応 S32K344 では、各種 DMA チャネルは LPSPI 0 ~ 6 と固定的に対応していますか? DMA_IP_HW_CH_5 を LPSPI0 TX として、DMA_IP_HW_CH_5=4 を LPSPI0 RX として、LPSPI0 をスレーブ SPI として設定しましたが、マスター SPI がまだ初期化されていないときに RX の DMA 割り込みがトリガーされました。 DMA_IP_HW_CH_5 が LPSPI0 RX に設定され、DMA_IP_HW_CH_5=4 が LPSPI0 TX に設定されている場合、マスター SPI がメッセージの送信を開始すると、最初に TX 割り込みがトリガーされます。SPI0 に対応する DMA チャネルの設定が間違っていたのでしょうか? Re: 【S32K3】S32K324 Lpspi 0~6 と DMA チャネルの対応 ご返信ありがとうございます、問題は解決しました、ありがとうございます。
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Load Error : S32K144 SDK & S32 DS for S32 platform S32K144EVB  S32DS-S32PLATFORM S32DS-ARM  Hi,  I have a trouble when I'm trying to let my S32DS-S32PLATFORM  get the S32K144 SDK. Because I can't find the S32K144 SDK just like S32DS for ARM as the following picture, I download the S32SDK_S32K1xx_RTM_4.0.2.exe and install.  After installing the SDK and choosing sdk_manifest.xml to load,  there is another error: incorrect root tag as the following picture:  Then I try the online updating, it tells me that I have installed the development package as the following picture. But I still can't see the S32K144 SDK appears in the SDK management.  Why S32DS-S32PLATFORM can't load it and how can I fix it and let it load the SDK?? Re: Load Error : S32K144 SDK & S32 DS for S32 platform Hi Senlent,  I got it!! I find that it can be chosen by myself just now!! Thanks for your support!!     Re: Load Error : S32K144 SDK & S32 DS for S32 platform Hi@Endimionchen I mean you need to select GCC 6.3 Re: Load Error : S32K144 SDK & S32 DS for S32 platform Hi Senlent,  My GCC version is 10.2.  Re: Load Error : S32K144 SDK & S32 DS for S32 platform Hi@Endimionchen I think you chose the wrong version of GCC.   Re: Load Error : S32K144 SDK & S32 DS for S32 platform Hi Senlent,  Yes, I can open and complie the routines by default. The S32K144_SDK has attached on them.  Re: Load Error : S32K144 SDK & S32 DS for S32 platform Hi@Endimionchen I understand your question. I want you to confirm whether you can open and compile the routines we provide by default. Re: Load Error : S32K144 SDK & S32 DS for S32 platform Hi Senlent,  Thanks for your replay.  It's right that he Project from Example has attached the S32K144_SDK. But my demand is to new a project by myself. It seems that in v3.5 still can't let me choose S32K144_SDK even I have installed the both package. Can it be solved??          Re: Load Error : S32K144 SDK & S32 DS for S32 platform Hi@Endimionchen Please check below two highlight part have been installed. If all requirements are installed correctly, you can see the examples and the build is successful. Re: Load Error : S32K144 SDK & S32 DS for S32 platform Hi senlent,  I tried v3.5. It could install the SDK, but there were other problems here:  1. After I install the SDK and the SDK management appeared, I tried to new an Application project. The SDKs still didn't appear the S32K144_SDK to choose as the following picture.  2.  I opened the SDK management. There were S32K144_SDK but there were nothing in it after I check the show attached.  How can I fix it??  Re: Load Error : S32K144 SDK & S32 DS for S32 platform Hi@Endimionchen Please try to install a version below S32 DS V3.6, such as S32 DS V3.4 and S32 DS V3.5 S32 DS V3.6 should not have pushed the S32K1 SDK package. In S32 DS V3.4 and S32 DS V3.5, users can see the S32K1 SDK package pushed on this interface S32 DS V3.5 Or S32 DS V3.4 with S32K1xx development package installed, you will see S32SDK.
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フラッシュを使用してEEPROMをエミュレートする場合、データはFlexRAMにのみ書き込まれ、FlexNVMには書き込まれません S32K146チップのFlash EEPROMエミュレーション機能を使用する場合、EEPROMバックアップとしてFlexNVMを32KB、EEPROMとしてFlexRAMを2KBに設定しました。エミュレーション中にメモリを確認すると、書き込まれたデータはFlexRAMにのみ存在し、FlexNVMには書き込まれていないことがわかりました。 私はこの背後にある理由がわかりませんので、どんな援助でもいただければ幸いです。 Re: Flash を使用して EEPROM をエミュレートすると、データは FlexRAM にのみ書き込まれ、FlexNVM には書き込まれません Hi@813270556 これは実現可能ではありません Re: Flash を使用して EEPROM をエミュレートすると、データは FlexRAM にのみ書き込まれ、FlexNVM には書き込まれません @Senlent  FlexRAMはEEPROM(4KB)として、FlexNVMはEEPROMバックアップ(32KB)として使用されます。私が使っているチップはS32K146です。 データを書き込むとき、書き込むデータのサイズは4KBを超えますか? その場合、4KBを超えるデータをFlexNVMからどのように読み取ることができますか? Re: Flash を使用して EEPROM をエミュレートすると、データは FlexRAM にのみ書き込まれ、FlexNVM には書き込まれません Hi@813270556 MCUの電源をオフにして再起動すると、FlexNVMはバックアップデータをFlexRAMエリアに同期できます。この原則を使用して、最後のバックアップが成功したかどうかを確認できます。 Re: Flash を使用して EEPROM をエミュレートすると、データは FlexRAM にのみ書き込まれ、FlexNVM には書き込まれません 書き込んだデータがFlexNVMにバックアップされていることをどのように証明できますか? Re: Flash を使用して EEPROM をエミュレートすると、データは FlexRAM にのみ書き込まれ、FlexNVM には書き込まれません Hi@813270556 EEE パーティション コマンドを正常に実行した後、EEE バックアップとして使用される FlexNVM エリア (EEE_Flash) は CPU から見えず、ユーザー コードはこのアドレス マッピング エリアに直接アクセス(読み取りおよび書き込み)できません。そうしないと、バス エラーが発生し、カーネルの HardFault 例外 (デフォルト設定) または BusFault 例外 (BusFault 例外を使用した後) が発生します。 同時に、デバッグ インターフェイスの Memory ウィンドウで、EEE_Flash 領域が不明な状態 (???) として表示されます。 https://mp.weixin.qq.com/s?__biz=MzI0MDk0ODcxMw==&mid=2247486584&idx=1&sn=3b8651b928edd19c642b17838a8c75bd&chksm=e91248fede65c1e87214ce913baab45431f816d0bfd0362e00aea1ed4232f200d5ae2720cd71&scene=21#wechat_redirect
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S32K322のVREFH VREFHはS32K322内部で測定されますか?
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使用 Flash 模拟 EEPROM 时,数据仅写入 FlexRAM,而不写入 FlexNVM 在使用S32K146芯片的Flash EEPROM仿真功能时,我配置了32KB的FlexNVM作为EEPROM备份,2KB的FlexRAM作为EEPROM。在仿真过程中,检查内存后发现写入的数据仅驻留在 FlexRAM 中,尚未写入 FlexNVM。 我不确定这背后的原因,并希望得到任何帮助。 回复:使用 Flash 模拟 EEPROM 时,数据仅写入 FlexRAM,而不写入 FlexNVM 你好@ 813270556 这是不可行的 回复:使用 Flash 模拟 EEPROM 时,数据仅写入 FlexRAM,而不写入 FlexNVM @Senlent FlexRAM 用作 EEPROM(大小为 4KB),FlexNVM 用作 EEPROM 备份(大小为 32KB)。我使用的芯片是S32K146。 当我写入数据时,写入的数据大小可以超过4KB吗? 如果是这样,如何从 FlexNVM 读取超过 4KB 的数据? 回复:使用 Flash 模拟 EEPROM 时,数据仅写入 FlexRAM,而不写入 FlexNVM 你好@ 813270556 当MCU断电重启后,FlexNVM可以将备份的数据同步到FlexRAM区域。您可以利用这个原则来确认您上次的备份是否成功。 回复:使用 Flash 模拟 EEPROM 时,数据仅写入 FlexRAM,而不写入 FlexNVM 我如何证明我写入的数据已经备份到FlexNVM? 回复:使用 Flash 模拟 EEPROM 时,数据仅写入 FlexRAM,而不写入 FlexNVM 你好@ 813270556 成功执行EEE分区命令后,作为EEE备份的FlexNVM区域(EEE_Flash)对CPU不可见,用户代码不能直接访问(读写)该地址映射区域,否则会发生总线错误,进入内核HardFault异常(默认配置)或者BusFault异常(使用BusFault异常后)。 同时在调试界面的Memory窗口中,EEE_Flash区域显示为未知状态(???)。 https://mp.weixin.qq.com/s?__biz=MzI0MDk0ODcxMw==&mid=2247486584&idx=1&sn=3b8651b928edd19c642b17838a8c75bd&chksm=e91248fede65c1e87214ce913baab45431f816d0bfd0362e00aea1ed4232f200d5ae2720cd71&scene=21#wechat_redirect
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Need Reference document related to iMXRT1176 EVK Device Memory Hi Team, I need to know whether any separate document/manual available for the Memory details of the iMXRT1176.  Do the FlexSPI memory (256 MB) having any sector level memory partition? Re: Need Reference document related to iMXRT1176 EVK Device Memory Hi @KAVIN_M , Chapter 3 in RM describes the memory map at the chip level.  NXP does not provide Flexspi memory sector level memory distribution, this needs to depend on the specific memory you connect externally, such as nor/nand flash, and the vendors of flash provide the datasheet. Have a nice day! Bests, Gavin
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【S32K3】S32K324 Lpspi 0~6与DMA channel的对应关系 请问在S32K344中,DMA的各个channel是否与LPSPI 0~6有固定的对应关系? 我将DMA_IP_HW_CH_5 配置为LPSPI0 TX,DMA_IP_HW_CH_5=4 配置为LPSPI0 RX,LPSPI0 为slave SPI,在master SPI 还没有初始化时,RX的DMA中断就触发了。 如果反过来将DMA_IP_HW_CH_5 配置为LPSPI0 RX,DMA_IP_HW_CH_5=4 配置为LPSPI0 TX,那么当master spi开始发消息后,先触发的是TX中断。是否是我配置错了SPI0对应的DMA通道? Re: 【S32K3】S32K324 Lpspi 0~6与DMA channel的对应关系 感谢您的回复,问题已得到解决,谢谢。
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what is a "recurrent" PI controller ? @Daniel_Popa, Hello Daniel, there are quite some mentioning of a "recurrent" PI controller form in the amclib doc but it seems the term in the industry is to do with Neural network based PID. i doubt this is the case in the amclib. can you explain what exactly is a "standard recurrent form" of PI controller in the amclib? what are the differences between this form and the common parallel form? Re: what is a "recurrent" PI controller ? The AMMCLib User's Guide describes how the continuous-time PI controller can be discretized to obtain the difference equation suitable for implementation in the digital microcontroller. The equations GFLIB_ControllerPIp_Eq3 and GFLIB_ControllerPIp_Eq4 describe the calculation of the discretized proportional and integral part independently in parallel, thus the name 'parallel form'. The equation GFLIB_ControllerPIr_Eq3 describes the calculation of the discretized proportional and integral parts together in one common recurrence equation, thus the name 'recurrent form' (also sometimes referred to as 'serial form'). Both forms are functionally equivalent. The parallel form is perhaps more convenient for manual tweaking of the P and I gain, since it allows setting them independently. The recurrent form is often used in industrial controllers and can be tuned with existing tuning tools which expect this form.
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[S32K3] Correspondence between S32K324 Lpspi 0~6 and DMA channel In S32K344, do the various DMA channels have a fixed correspondence with LPSPI 0~6? I configured DMA_IP_HW_CH_5 as LPSPI0 TX, DMA_IP_HW_CH_5=4 as LPSPI0 RX, LPSPI0 as slave SPI, and the DMA interrupt of RX was triggered when the master SPI was not initialized. If DMA_IP_HW_CH_5 is configured as LPSPI0 RX and DMA_IP_HW_CH_5=4 is configured as LPSPI0 TX, then when the master spi starts to send a message, the TX interrupt is triggered first. Did I configure the DMA channel corresponding to SPI0 incorrectly? Re: 【S32K3】S32K324 Lpspi 0~6 correspondence with DMA channel Thank you for your reply, the problem has been solved, thank you. Re: 【S32K3】S32K324 Lpspi 0~6与DMA channel的对应关系 Hello @TianyaoLi, The DMA channels are not fixed to LPSPI module. Can you please share the project or the configuration files? From the description, I can't tell what configuration is incorrect. Thank you, BR, Daniel
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S32K322上的VREFH VREFH 是否在 S32K322 内部测量?
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VREFH on S32K322 Is VREFH measured internally in the S32K322? Re: VREFH on S32K322 Hi Yes. Have a look at Table 340. ADC channel mapping and 60.3.17.2 Self-test of S32K3XXRM: Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------
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需要与iMXRT1176 EVK设备内存相关的参考文档 大家好, 我需要知道是否有单独的文档/手册可用于 iMXRT1176 的内存详细信息。 FlexSPI 内存(256 MB)是否有任何扇区级内存分区?
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MIPI_CSIx_DPHY_COMMON_CTRL - HSSETTLE on Imx8MP Dear NXP Support, please describe the IMX8MP MIPI_CSIx_DPHY_COMMON_CTRL register HSSETTLE field: There are multiple sources with tables relating to a number to frequency, eg: https://community.nxp.com/t5/i-MX-Processors/raw12-camera-on-imx8mp-isi/m-p/1663012/highlight/true#M207043 But I would like a formal description, since the values that I am experimenting with do not fit the table of other posts. My MIPI CSI Phy runs at 300Mhz/600Mbps, and a csis-hs-settle = <6> is generating a lot of SOT errors. When I use csis-hs-settle = <13> there are no errors. Thank you for your support. Best regards, Ian i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: MIPI_CSIx_DPHY_COMMON_CTRL - HSSETTLE on Imx8MP Hi @Eximius  The suggested setting in that table will make the Ths-settle in the middle of the range (about 95ns to 156.67ns for 600Mbps). Re: MIPI_CSIx_DPHY_COMMON_CTRL - HSSETTLE on Imx8MP Hi @qiang_li-mpu-sw Could you also inform the generated ths-settle timings in nano seconds for each value? Thanks Ian Re: MIPI_CSIx_DPHY_COMMON_CTRL - HSSETTLE on Imx8MP Hi @Eximius  The left column of the table is Mbps, date rate, it is not MIPI clock frequency, so your data rate is 600Mbps, value 13 is the correct one. Re: MIPI_CSIx_DPHY_COMMON_CTRL - HSSETTLE on Imx8MP sent to you via mail, pls check Re: MIPI_CSIx_DPHY_COMMON_CTRL - HSSETTLE on Imx8MP @joanxie @qiang_li-mpu_se 
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最新 SDK 版本和 MCUXpresso IDE 版本 各位 我有一段时间没来这里了,我还在使用 MIMXRT1024-EVK,并再次基于它规划一个新项目,然后尝试更新我的 SDK,刚刚注意到它突然从 v2.15.0 跳转到 v24.12.0,IDE 也是如此,从 v11.8.x 跳转到 v24.x,只是想知道有什么大的变化和兼容性问题,即我必须同时使用 v24 吗? 谢谢! Ping 回复:最新 SDK 版本和 MCUXpresso IDE 版本 你好@ping1 在这里我想澄清一下MCUXpresso SDK和MCUXpresso IDE版本之间的关系如下: IDE v24.x 支持所有以前的 SDK 版本,体现了向下兼容性。 SDK v24.x 需要更高版本的 IDE,这是一个版本依赖性的变化,而不是兼容性问题。 你可以保留不同的 IDE 版本(例如IDE v24、v11.xx)和不同的 SW SDK 版本(例如SDK v2.15/16、v24.12)。 如果您想使用最新的 SDK v24.12,您必须使用 IDE v24。 如果您想使用以前的 SDK,例如 v2.15、v2.16,您可以使用最新的 IDE v24 或以前的 IDE v11.xx。
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How to inhibit creation of new keys on SE050 Hi all, I'm a perfect newbie to SE050 and I'm trying to inhibit the creation of new EC public keys after I finished creating the ones I need; also, I want to ensure that the values of the keys I created is not modified after that point. Someone suggested that a secure session can be established and that after that the access to the I2C bus is inhibited to unauthenticated users. I wonder if this is true and if the session's being secured "survives" a power cycle, which I think is not true. For what I understand, a secured session cannot be "sniffed" by a third party, but if the machine is rebooted (or perhaps even before), commands can be transmitted to the SE without authentication. Could someone please clarify this? Thank you very much Andrea Paolini Re: How to inhibit creation of new keys on SE050 Thank you very much! Re: How to inhibit creation of new keys on SE050 Hi @apaolini , If you refers to the platformSCP session as the secured session, it is possible to mandate it, so that any use has to do authentication after the power cycle. Please refer to simw-top/doc/demos/se05x/se05x_MandatePlatformSCP/Readme.html for more details. Have a great day, Kan ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------
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