Dear NXP Support,
please describe the IMX8MP MIPI_CSIx_DPHY_COMMON_CTRL register HSSETTLE field:
There are multiple sources with tables relating to a number to frequency, eg:
https://community.nxp.com/t5/i-MX-Processors/raw12-camera-on-imx8mp-isi/m-p/1663012/highlight/true#M...
But I would like a formal description, since the values that I am experimenting with do not fit the table of other posts. My MIPI CSI Phy runs at 300Mhz/600Mbps, and a csis-hs-settle = <6> is generating a lot of SOT errors. When I use csis-hs-settle = <13> there are no errors.
Thank you for your support.
Best regards,
Ian
Hi @Eximius
The suggested setting in that table will make the Ths-settle in the middle of the range (about 95ns to 156.67ns for 600Mbps).
Could you also inform the generated ths-settle timings in nano seconds for each value?
Thanks
Ian
Hi @Eximius
The left column of the table is Mbps, date rate, it is not MIPI clock frequency, so your data rate is 600Mbps, value 13 is the correct one.
sent to you via mail, pls check