Cloud Lab Overview Welcome to use the Cloud lab.com. The Cloud lab is NXP’s first global platform where allows users to explore the latest NXP hardware, software or solutions online. Here users can remotely connect an evaluation board and do code debugging or technical evaluation online. All these EVKs are set in our onsite lab, each one is equipped with a high-definition camera, which monitors its status in real time. Users simply book the resource they are interested in, then they can use it within the predetermined period of time. After each usage period ending, the platform will automatically reinstall the system and clear the history to protect the privacy of each user. Our vision is to provide users with open resources, convenient and secure services and a cost-saving and resource-saving R&D experience. The Cloud Lab is willing to be a new fertile ground for every developer to test their ideas on new hardware platforms in time, experience the changes brought about by the latest NXP technologies, and receive real-time and professional technical support from NXP engineers. Let’s go! Explore the Cloud Lab and unlock your potential!  Click to visit ：NXP Cloud Lab | NXP Semiconductors 欢迎使用云实验室官网。云实验室是恩智浦在全球范围内第一个可供用户线上使用恩智浦最新硬件、软件或解决方案的平台。 在这里，用户可以远程访问开发板进行线上调试和开发。这些开发板都安装在线下的实验室中，每块板子上方配有一个高清摄像头，可实时监控板子的状态。 用户只需在网站简单的预定其感兴趣的资源，就可在预定时间内尽情使用。每当一段预定时间结束，平台会自动重装系统、清理历史记录来保护每位用户的隐私。 我们的愿景是为用户提供开放的资源、便捷又安全的服务以及节约成本和资源的研发体验。 云实验室愿作每一位开发者的新沃土，让大家可以及时在新的硬件平台上测试他们的想法，体验最新恩智浦技术带来的变化，并获得恩智浦工程师实时和专业的技术支持。 来吧，让我们开启云实验室的大门，解锁无限之可能！ 点击访问：恩智浦云实验室 | 一站式云上开发平台，助力轻松开展嵌入式设计 Cloud Lab-Hardware Cloud Lab-Software Cloud Lab-Solution

Cloud Lab Login and Usage Guide Visit the NXP Cloud Labs website: NXP Cloud Labs | A one-stop cloud development platform to help you easily conduct embedded design. Find answers to questions related to using the cloud lab, as well as tips and tricks for troubleshooting related problems during the use of the cloud lab. 1. Registration How do I register a cloud lab account? No additional account registration is required to log in to NXP Cloud Labs; you can log in and experience the Cloud Labs with an NXP account. Understanding NXP Account Registration | NXP Account FAQs | NXP Semiconductors 2. Log in How do I log in to the cloud lab? Enter the email address and password you registered with NXP.COM After successfully logging in, you will see the following page prompt. Click "Log in" and you will be taken to the homepage of Cloud Experiment. 3. Reservation How can I reserve the development board that interests me? Click on the hardware/software/system solution/application example that interests you. Taking "hardware" as an example, you will see currently popular hardware. You can also click to view all the development boards currently online in the cloud experiment. Select one of the development boards that interests you and click "Pre-order Now". Here you can choose to use it immediately or schedule a trial period. Use Now: Start using the service from the current time. After selecting the end time, click "Confirm Reservation". To reserve a use: Select the desired date, start time, and end time, then click "Confirm Reservation".   After successful reservation, you will be directed to your reservation page (please note that each customer can only reserve one development board for debugging at the same time). How can I check the development board I ordered? On the "My Orders" page, you will see all the development boards you have ordered and be able to manage your orders. Click "Debug" below to start experiencing it! 4. Debugging Once I enter the debugging interface, what should I do? Drag your mouse to the bottom of the command box, and you'll see "Download cloud lab manual." Click it to download the cloud lab operation guide. How do I watch the video after entering the debugging interface? Watching the live video of the development board will show its status and the indicator lights. Note that the video will automatically cancel after 30 seconds. To replay it, click the play button in the upper right corner of the video. How to debug? Once the camera is turned on, the command line at the bottom will automatically enter the development board's serial port. Currently, all development boards use Linux 6.1.36 and support network boot. Please log in to the Linux file system as "root" during debugging.  During the debugging process, I encountered some problems. Can I restart my pre-ordered development board? Yes, clicking the "PowerReset EVK" button in the upper right corner of the command line can power off and restart the development board. During debugging, if my pre-installed development board shows that the port is occupied, what should I do? Click the "Reconnection" button in the upper right corner to reconnect. During the debugging process, I encountered a problem. Can I reinstall the system on my pre-ordered development board or restore the Image/dtb/ file system to its original version? Yes. Click the "Reinstall system" button. (This operation will take a long time, please proceed with caution. This operation will delete any files you create/modify during use, please save any necessary files before clicking this button.) How do I upload / download the files I need during the debugging process ? Click "upload files to EVK" to upload all the files you need during the debugging process.  Please note: If you want to upload test files to the development board's Network File System (NFS), you will find the uploaded files in the /home/root path of the development board after a successful upload; if you want to use your own compiled Image or dtb files, select the TFTP button. 5. Technical Support How can I get technical support from NXP engineers? Users can ask questions and get help by logging into the NXP Community Cloud Lab section ( https://community.nxp.com/t5/Cloud-Lab/bd-p/Cloud-Lab ), or by clicking the debug window. The "Community Q&A" section will redirect you to the NXP Community Cloud Labs area to ask your questions. 6. Contact Us If you encounter any problems during use or have any suggestions for our cloud lab, please contact us via email: ( [email protected] ) Cloud Lab-Hardware Cloud Lab-Software Cloud Lab-Solution

Compilation Error on imx-95-FRDM unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. tar: ./usr/include: Cannot mkdir: Bad address tar: ./usr/include/xen/gntdev.h: Cannot open: No such file or directory got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. tar: ./usr/include: Cannot mkdir: Bad address tar: ./usr/include/xen/evtchn.h: Cannot open: No such file or directory Re: Compilation Error on imx-95-FRDM Hi @Asadeds  What is your BSP version? I checked it on my Imx95 FRDM and there are no problems. B.R

What kind of port does the T Embed have? I have the standard model T Embed, but i have no Idea what kind of port it has (the other port, not usb c), because the official site says its a grove port, the lilygo Wiki site says its a qwiic port. Can anyone help me please?

I.MX93 boot waiting for known usb device Bought IMX93 from Mouser  for NXPLinux summer school program, I used there the automated script to boot the board,  ./scripts/ loss.py boot command . After executing the command I keep getting waiting  for known usb device. Will appreciate all the help to enable me progress Ias am stuck . FRDM-i.MX93  Re: I.MX93 boot waiting for known usb device @Fidelbanks thanks a lot for your interest in i.MX FRDM board. I think your problem is similar with  https://community.nxp.com/t5/i-MX-Processors/I-MX93-UUU-emmc-sdcard-LIBUSB-ERROR-TIMEOUT-Error/td-p/2402801 @pengyong_zhang Linux kernel summer school is a project that wants to help people getting started with learning linux kernel by using the i.MX93 frdm board.  https://nxp-research.github.io/lkss-main/2026/about.html#getting-started We provided a script that helps users boot the board using the serial download mode Re: I.MX93 boot waiting for known usb device Hi @Fidelbanks  What project are you referring to? If you want to get started with the development board, you can directly use the demo image from the NPX website. I'm not familiar with how your summer school program is implemented. B.R

PPF0900AMBA1ES Hi NXP team, I'm working on a custom board based on the i.MX95 (MIMX9596, 19x19 package, LPDDR5), using the PPF0900AMBA1ES PMIC. Could you please confirm: 1.Does this part number ship with OTP already programmed, or is it a non-programmed engineering sample? 2.If it is non-programmed, what is the recommended procedure to program (or emulate) the OTP configuration for bring-up and evaluation purposes? 3.Is a reference OTP configuration file (.CFG) available for an i.MX95 + LPDDR5 (19x19) implementation that we could use as a starting point? For context, our schematic closely follows the i.MX95 EVK reference design (PF09 + PF5301 + PF5302), and we're currently doing initial power-on bring-up. Thank you. PMIC Re: PPF0900AMBA1ES  PPF0900AMBA1ES is OTP part which mean had already done OTP. https://www.nxp.com/docs/en/supporting-information/MPF0900AMBA1ES.zip OTP file please download from above link.

S32G2 Enabling Multicore Application Hi, nxp fellows: We are preparing to use multi-core to run programs in the S32G274A chip, using A53 to run Linux and M7 to run LLCE_CAN. We referred to "Enabling Multicore Application on S32G2 using S32G2 Platform Software Integration", according to 5.2. Configure the bootloader, installed the recommended software packages, and configured them following the steps. There is an error in 5.3. Build The Bootloader during compilation. The launch.bat file was edited. An error occurred after running launch.bat.  After commenting out the relevant code. I found the CryptoDal.h file in the installation directory. Where could there be any mistakes? Thanks. Re: S32G2 Enabling Multicore Application Hi，zhipeng Is Secure Boot enabled in the configuration? Try to enable the Secure boot, check if the issue will disappear. BR Joey Re: S32G2 Enabling Multicore Application Hi, @Joey_z  Yes, after adding, it will show "undeclared" on the third image. Commenting out will show "No such file or directory", on the fifth image. "CryptoDal.h" is located in D:\NXP\Integration_Reference_Examples_S32G2_2022_06\code\framework\realtime\bsw\dal\cryptodal\generic\include "Hse_Ip.h" is located in D:\NXP\SW32G_RTD_4.4_3.0.2_HF01\eclipse\plugins\Crypto_TS_T40D11M30I2R0\include I have found both files in their respective folders, and the file paths are also written in launch.bat. The current problem feels like the plugin path was not included during the compilation process. BR Re: S32G2 Enabling Multicore Application Hi,zhipeng For your issue, will there be an error if the following contents are added? Is it commenting out won't cause an error? BR Joey

Skid-steer robot state space modelling???? Hey everyone! I'm a beginner and just started working at a decently big lab with a bunch of people and I needed to figure a few things out. We're working on a skid-steer robot. I understand the dynamic and kinematic equations mathematically, but I don't know HOW exactly to convert them into state space. (which was the requirement) My team has the CAD model and they need to extract the Inertial Mass Parameters. They're a very chaotic group and I tried asking them, but they themselves don't have it together.😭 There's no well put resource for this kinda stuff either, and I'm genuinely at a loss of how to proceed with anything meaningful. Any pointers, help, and resources are appreciated! Cheers. Re: Skid-steer robot state space modelling???? Hello @prash, Could you please, provide me the following information? -Which NXP product are you currently using? Are you working with one of our EVKs, a custom board based on NXP MCU/MPU product, or another hardware solution? -Which IDE you are using? BR Habib

Compatibility of Camera module with OX05B1S Sensor and in-built ISP with i.MX95 FRDM Hi All, Want to know if camera module with ox05b1s sensor and in-built ISP (similar to 5MP RGB-IR Global Shutter GMSL2 Camera for NVIDIA Jetson AGX Orin would be compatible with i.MX95 FRDM board). I do understand that i.MX95 only have MIPI_CSI2 port hence I need to find GMSL2 to MIPI_CSI2 converter, however my question is specifically related to compatibility of existing driver that is part of NXP Linux BSP. Will driver Camera driver of NXP Linux release directly work with this camera module? Do I need to make modification in dtb file? Any other modifications would or additional work that I need to plan for?

Whether USB serial download mode can work or not Hi Sir, In our current project, our product has only “one” “USB-C” port, running USB 2.0 High Speed. Our target application is to use this USB port as USB host role to connect USB stick or solid state drives for local recording. However, our next revision PCB circuitry is to pull up 56K Ohm to VCC_5V0 on both CC pins of USB-C, as shown below. That is, we hardwire fixed the USB port to USB host based on CC configuration definition. There is no separate Jumper / Switch / Type-C Controller(DRP(Dual Role Port) logic IC) circuitry that can switch the CC pin between host and device. We would like to know, based on this circuitry, can i.MX8M+ USB Serial Download Mode still work? We understand when i.MX8M+ Boot ROM activates USB Serial Download mode, the port is automatically configured as a USB device(for USB Serial Download mode to work), but that should mean the chip's ROM code only controls the internal USB PHY to be device mode, it cannot override the hardware's external CC resistor states(Type-C Port role). As a result, the PC is entirely unable to enumerate the i.MX 8M Plus via USB(both cannot finish handshaking(Type-C Attach) from USB physical layer point of view), which causes the UUU programming to fail. If the above statement is correct, the USB Serial Download Mode will become inoperable before boot(i.e. will not work at all), resulting in the loss of factory production flashing and system unbricking capabilities. Is our understanding correct? Best regards Re: Whether USB serial download mode can work or not Hi @Esther_Liu  You are right, If you force CC to be a pull-up, it will remain in HOST mode, and UUU will likely malfunction. B.R

S32K324 write DFlash by FEE Hello, There is a question about S32K324 write DFlash by FEE: I plan to write approximately 50 bytes of data into the DFalsh of S32K324 using the FEE method. Since the hardware power supply on the circuit board has a backup time of around 0.743ms, I need to save the critical data within this time frame. Is it feasible to write to the DFlash using the FEE method? If it is not feasible, are there any other options? Thanks. Re: S32K324 write DFlash by FEE Hi@mmyjh_123 For a power-off backup window of 0.743 milliseconds, FEE is not safe. Even "close to 1 millisecond," the write execution time for a single Fls_MainFunction block already exceeds your available hold time. You could try using C40_Ip. Using Quad-page (1024 bits) program time， a 50-byte write would theoretically take 450 microseconds. However, within 0.743 milliseconds, any erase operation during an emergency hold is impossible; erasing an 8 KB sector could take up to 30 milliseconds. Therefore, when implementing this functionality using C40_Ip, always erase the DFLASH address to be programmed during idle periods. Furthermore, if the board can detect input voltage drops before the MCU power failure, commit operations should begin at the earliest possible threshold. Otherwise, add a large capacity capacitor/backup power to ensure the guaranteed window covers the worst-case software path and flash programming margin. The above is only a theoretical analysis; multiple real-world tests are recommended, ensuring sufficient design margins. Re: S32K324 write DFlash by FEE Ok, thanks a lot.

I.MX93 - UUU emmc/sdcard LIBUSB_ERROR_TIMEOUT Error Hi NXP Team, We are trying to flash an i.MX93 board using a .wic image file provided by our team. We have two i.MX93 boards with the same hardware revision (SCH-96411 REV_B2). On one board, we are able to successfully flash the .wic image. However, when attempting to flash the same image on the second board, we encounter an error. We have tested both: emmc_all (for eMMC flashing) sd_all (using an SD card) In both cases, the same issue occurs on the second board. We would appreciate your support in troubleshooting and resolving this issue. Please let us know if you need any additional logs, error messages, or board information. Providing both uuu command and debugProviding both uuu command and debugProviding both uuu command and debugProviding both uuu command and debug uuu supported listuuu supported listuuu supported listuuu supported list i.mx93 usb identifiedi.mx93 usb identifiedi.mx93 usb identifiedi.mx93 usb identified Re: I.MX93 - UUU emmc/sdcard LIBUSB_ERROR_TIMEOUT Error Hi, Thank you for your interest in NXP Semiconductor products, It's good to have schematic identification, I would recommend confirming i.MX 93 top marking though. Confirm that they share TOP marking. Please download latest prebuilt image release from Linux. Finally, you are trying to flash both of them in serial download and do they have any fuses blown? Regards Re: I.MX93 - UUU emmc/sdcard LIBUSB_ERROR_TIMEOUT Error Hi Please find the attached images. We noticed some changes in the IC part numbers. We also tried flashing the SD card externally and then inserting it into the i.MX93 board, but we are still encountering the same issue. Additionally, we would like to bring to your attention that an image is already present in the eMMC, and the board is able to boot successfully from it. However, when we attempt to flash a new image, we encounter errors. Please find the attached debug logs below. One observation is that the preloaded image that came with the board is showing U-Boot SPL 2025.04, whereas the image we are attempting to use shows U-Boot SPL 2024.04. We downloaded the latest Linux 6.18.20_2.0.0 (i.MX93 EVK, FRDM) release. However, we could only find the 14x14 EVK WIC image and were unable to locate an 11x11 FRDM WIC image package. Could you please confirm whether the 14x14 image is the correct one to use for our board, or if there is a separate 11x11 FRDM image available? SD Card Boot: U-Boot SPL 2024.04+gde16f4f1722+p0 (Sep 02 2024 - 10:44:35 +0000) SOC: 0xa1009300 LC: 0x2040010 PMIC: PCA9451A PMIC: Over Drive Voltage Mode DDR: 3733MTS DDR: 3733MTS M33 prepare ok eMMC Boot: U-Boot SPL 2025.04-g99518e6b6f20 (Feb 02 2026 - 05:52:54 +0000) PMIC: PCA9451A PMIC: Over Drive Voltage Mode DDR: 3733MTS found DRAM 2CS_2GB DRAM matched M33 prepare ok Normal Boot Trying to boot from BOOTROM Boot Stage: Primary boot image offset 0x8000, pagesize 0x200, ivt offset 0x0 Load image from 0x57800 by ROM_API NOTICE: TRDC init done NOTICE: BL31: v2.12.0(release):lf-6.18.2-1.0.0 NOTICE: BL31: Built : 07:53:18, Feb 10 2026 /****************************************************/ Regarding the fuse being blown, could you please let us know how we can verify whether the fuses have been programmed or blown on the board? Thank you. Issue board - imx93Issue board - imx93Issue board - imx93 Working board - imx93Working board - imx93Working board - imx93 Re: I.MX93 - UUU emmc/sdcard LIBUSB_ERROR_TIMEOUT Error I've got similar issues and per my understanding, the Chinese manufacturer who is behind FRDM series changed DDR RAM IC. This requires re-training DDR and update to u-boot, which was done for the board software, committed to nxp's u-boot repo, but the BSPs, Yocto layers and binary images on web site wasn't updated. Basically newer boards work with built-in u-boot only, everything your developers build with BSPs (and u-boot from 2024) will not even start due to invalid ddr configuration. You could confirm this issue by booting from board's u-boot, stop it using keyboard and then manually load your custom linux kernel and DT from the SD card.

To simulate full load condition on the imx95lpddr5 evk How to simulate the full-load operating condition on the i.MX95 LPDDR5 EVK board. Is there any image available or pre-compiled application for this? I am using linux multimedia image. Re: To simulate full load condition on the imx95lpddr5 evk Hello, You can use this application note as reference: https://www.nxp.com/docs/en/application-note/AN14449.pdf There are different use case scenarios to reach high CPU load testing. I suggest you take a look in: CA55 CoreMark eIQ Benchmark (GPU) eIQ Benchmark (NPU) Best regards. 

Support for mobile SDRAM (1V8) on RT1171CVM8B We are investigating the use of RT1171CVM8B on a new product. Does this i.MX RT family member support mobile (low power, 1.8V) SDRAM? It is not immediately clear from the datasheet, reference manual and available application notes and schematics that it does; it is inferred by the port drivers being specified for both 1V8 and 3V3 (NVCC_EMC1,2). It is also inferred from similar questions and answers in the affirmative for the i.MX RT1060 and RT1050. I would like to avoid a gotcha where some obscure part of the EMC or SDRAM interface fails with 1V8 parts;  Otherwise, why is it not clearly listed in the datasheet!? Kind regards, George Tzanatos. Re: Support for mobile SDRAM (1V8) on RT1171CVM8B Dear @georgetzanatos , The RT1171 does support Mobile SDRAM (low-power 1.8 V SDRAM). We agree that the current documentation does not state this explicitly. In the datasheet and reference manual, the memory protocol support and I/O voltage modes are described separately rather than being combined into a single "Mobile SDRAM support" statement. I understand your concern. Please feel free to use Mobile SDRAM on the RT1171. The key requirement is to configure the relevant NVCC_EMC1/2 power domains for 1.8V operation to match the SDRAM I/O voltage level.   Best Regards, Shelly

MC9S08QG8 COMPILER, how do i get the c compiler for this chip well, i have a product developed with a MC9S08QG8 chip. i need to make some c code changes. i am using windows11. What software product do i use to generate the debugger for the chip. I am using a Wiztronics interface board from the pc usb port to the chip in my product. i have tried 8 different software packages, and none of them have the final debugger working. What softwage package do u suggest to use for debugging.  I am lost in ur devlopment center . Re: MC9S08QG8 COMPILER, how do i get the c compiler for this chip Hello The CodeWarrior tool version 11.1, is supported in windows 11, this tool supports different connections [P&E USB Multilink Universal / USB Multilink, P&E Cyclone, Open Source BDM, P&E Full chip simulation] You can download the tool from this link: CodeWarrior® for MCUs (Eclipse IDE) v11.1 I look for the MC9S08QG8 device and is available in this version. Best Regards, Luis

FRDM-MCX N947 and OV5640 Camera I am currently porting a camera streaming pipeline (previously working on ESP32-S3) to the FRDM-MCXN947. The target resolution is 1080p capturing from an OV5640 camera module, processing via MCXN947 hardware accelerators, and streaming over SPI to an ESP32-C5 for Wi-Fi transmission. Hardware Pipeline: OV5640 Camera (DVP 8-bit) -> MCXN947 (FlexIO / SmartDMA) -> External PSRAM -> SPI -> ESP32-C5 -> Wi-Fi Current Progress & Setup SCCB / I2C Control: Fully functional. Camera register read/write operations succeed, and initialization passes. SmartDMA Baseline: Tested the stock NXP SDK SmartDMA examples for the OV7670 (using internal SRAM), which works as expected. Goal: Expand this to 1080p resolution using the OV5640 with external PSRAM buffering and FlexIO capture. Issue 1: FlexIO Pin Remapping & Invalid Data on D4/D5 When attempting 8-bit parallel capture via FlexIO, data lines D4 and D5 fail to read valid pixel data, while lines D0-D3, D6, and D7 behave correctly. Initial Pin Mapping: D0-D3: P1_4, P1_5, P1_6, P1_7 D4-D5: P3_4, P3_5 (Problematic: No valid pixel data) D6-D7: P1_10, P1_11 Control: VSYNC -> P1_18, HREF -> P1_19, XCLK -> P2_2 SCCB: SCL -> P3_2, SDA -> P3_3 Troubleshooting Attempted: I attempted remapping D4 and D5 to alternative pins and updated the corresponding FlexIO and Pin Mux configurations: Remapped D4: P2_8 Remapped D5: P2_9 Even with this remapping, D4 and D5 still do not capture valid data. Issue 2: SmartDMA Routing to External PSRAM for 1080p Because 1080p frame buffers exceed internal SRAM capacity, frames must be buffered into external PSRAM in real time. I am seeking best practices and configuration steps to configure SmartDMA to route incoming FlexIO camera data directly to external PSRAM without CPU intervention or frame tearing. Any insights, pin mapping suggestions, or reference code would be greatly appreciated! Board Design Communication & Control(I3C | I2C | SPI | FlexCAN | Ethernet | FlexIO) MCXN Re: FRDM-MCX N947 and OV5640 Camera Hi @DocMonster7  We have verified the official SDK example frdmmcxn947_smartdma_camera_flexio_mculcd_cm33_core0 on the FRDM-MCXN947 board with an OV7670 camera connected through the J9 camera interface. In this reference design, CAMERA_D4 and CAMERA_D5 are mapped to P3_4 and P3_5 respectively, and image capture works correctly. Based on this validation, P3_4 and P3_5 appear to be functioning correctly as camera data inputs. Therefore, the issue is unlikely to be caused by a limitation of these MCU pins themselves. We would recommend further checking the OV5640 hardware connections, signal integrity, pin mux configuration, and any modifications made to the original SmartDMA camera capture implementation. BR Harry

IMX8MP linux uboot need to be set up with the default environment + extra variables IMX8MP linux uboot need to set up the default environmnet + few more variables after the flashing the bootloader via uuu. Use case: The IMX8MP SoM comes with default uboot from vendor. So for the first time writing need to flash the new uboot image, we set it to the default environment and set few more board specific environment variables on the factory process. So when I'm using the command, uuu -b emmc_all bl-imx8mp.bin image.wic.zst its using the builtin script uuu_version 1.4.149 # @_flash.bin | bootloader, which can extract from wic image # @_image [_flash.bin] | wic image burn to emmc. # This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ SDP: boot -f bl-imx8mp.bin -scanlimited 0x800000 # This command will be run when ROM support stream mode # i.MX8QXP, i.MX8QM SDPS: boot -scanterm -f bl-imx8mp.bin -scanlimited 0x800000 # These commands will be run when use SPL and will be skipped if no spl # SDPU will be deprecated. please use SDPV instead of SDPU # { SDPU: delay 1000 SDPU: write -f bl-imx8mp.bin -offset 0x57c00 SDPU: jump -scanlimited 0x800000 # } # These commands will be run when use SPL and will be skipped if no spl # if (SPL support SDPV) # { SDPV: delay 1000 SDPV: write -f bl-raptor-imx8mp.bin -skipspl -scanterm -scanlimited 0x800000 SDPV: jump -scanlimited 0x800000 # } FB: ucmd setenv fastboot_dev mmc FB: ucmd setenv mmcdev ${emmc_dev} FB: ucmd mmc dev ${emmc_dev} FB: flash -raw2sparse all image.wic.zst/* FB: flash -scanterm -scanlimited 0x800000 bootloader bl-imx8mp.bin FB: ucmd if env exists emmc_ack; then ; else setenv emmc_ack 0; fi; FB: ucmd mmc partconf ${emmc_dev} ${emmc_ack} 1 0 FB: done So my requirement is Flash the bootloader + rootfs / image Reset to defaults. Add new variables. Reboot with proper working new bootloader with expected env. But now its first flashing the rootfs and then the new bootloader. So when I executed env default -f -a, after it, it causes the default of environment of old bootloader in the SoM board. When it resetted, it starts then with new bootloader but with old defaults from old bootloader. Is there any suggestion to solve this issue? Re: IMX8MP linux uboot need to be set up with the default environment + extra variables Hello @jake4  Hope you are doing very well. You can try making your own custom script and add the below: FB: ucmd env default -f -a Example of complete script: uuu_version 1.4.149 SDP: boot -f bl-imx8mp.bin -scanlimited 0x800000 SDPS: boot -scanterm -f bl-imx8mp.bin -scanlimited 0x800000 SDPU: delay 1000 SDPU: write -f bl-imx8mp.bin -offset 0x57c00 SDPU: jump -scanlimited 0x800000 SDPV: delay 1000 SDPV: write -f bl-imx8mp.bin -skipspl -scanterm -scanlimited 0x800000 SDPV: jump -scanlimited 0x800000 FB: ucmd setenv fastboot_dev mmc FB: ucmd setenv mmcdev ${emmc_dev} FB: ucmd mmc dev ${emmc_dev} FB: flash -raw2sparse all image.wic.zst/* FB: flash -scanterm -scanlimited 0x800000 bootloader bl-imx8mp.bin FB: ucmd if env exists emmc_ack; then ; else setenv emmc_ack 0; fi; FB: ucmd mmc partconf ${emmc_dev} ${emmc_ack} 1 0 FB: ucmd env default -f -a FB: ucmd setenv board_version "1.0" FB: ucmd setenv my_custom_var "value" FB: ucmd saveenv FB: ucmd reset FB: done Best regards, Salas. Re: IMX8MP linux uboot need to be set up with the default environment + extra variables Hi @Manuel_Salas , We would have only eth fastboot enabled in the uboot , so we cant use the boot switch of SDP. Can you please let me know if there is a option with only the fastboot command. Thanks

How use adjust SOI -EOI with use MC33 PT2000 IC just as topic, we need the help which can esstablished whole process , which use PT2000 to apply fule injection SOI -EOI measurement  H-Bridge Driver Small Engine Driver Solenoid Controller Re: How use adjust SOI -EOI with use MC33 PT2000 IC appreciated! Re: How use adjust SOI -EOI with use MC33 PT2000 IC Dear Kaijinbin,  there is an PT2000 end of injection detection application note available to download from the PT2000 product page, with a valid NDA.  If you don't have an NDA yet and you would like to sign one, please create a new ticket here and our representative for NDA matters will help you with the process.  Additionally please download the PT2000SWUG and PT2000-IDEUG from the FRDMPKPT2000EVM product page. You can download the PT2000 Developer Studio IDE and Software Files for Peak and Hold and DCDC software from the same page. You can then test the software example on the FRDMPKPT2000EVM Evaluation Board.  With Best Regards, Jozef

Detail about S32K338 Good morning, I need to know if the S32K388 microcontroller has three independent cores, like the K324 (which has two), and if two of these cores can also be used in Lockstep. If I want one single core + one Lockstep core, should I use the K358? Thanks Re: Detail about S32K338 Hello @gianpiero_lenta , Lockstep operation is not a software-configurable feature that can be enabled between two independent cores. Instead, Lockstep is a dedicated hardware configuration implemented in specific S32K3 derivatives. Therefore, if your application requires one independent Cortex-M7 core together with a Lockstep Cortex-M7 pair, I recommend using the S32K358, which is designed with this hardware configuration. Best regards, Pavel

rt1189 Boot Flow 1. As shown in the figure, does the "Authenticate Image" process verify the hash value during the SHA-512 hashing stage?  2. If I set the hash value, will the BootROM verify the image integrity? And if the BootROM verification fails, will it enter recovery mode? Re: rt1189 Boot Flow 1. Is hash verification enabled only when the signature authentication feature is enabled? How can hash verification be enabled independently? How can the device be transitioned into the OEM_CLOSED lifecycle state? 2. I will enable the Recovery Boot fuse. 3. My goal is to use an unencrypted image. The Boot ROM should calculate and verify the image hash. If the hash verification fails, the Boot ROM should enter the recovery boot flow and boot the recovery image from the LPSPI NOR Flash. Re: rt1189 Boot Flow Hi @yanyanwang , A1: Yes. RT1180 uses AHAB with two authentication layers: Signature layer: ECDSA (SHA-256 / SHA-384) verifies the Container header and image array entry (which stores each image's Hash). Hash layer: The ROM re-computes the digest of the loaded image body and compares it against the Hash stored in the image array entry. The SHA hashing stage in your figure is exactly this mandatory integrity check, which does verify the hash value. A2:The ROM always computes and compares the hash, but whether a failure is enforced depends on the device life cycle: the out-of-fab default is the Open configuration, where authentication runs but all authentication errors are ignored and the image still executes. Only after the device is moved to OEM_CLOSED will a hash mismatch actually block boot. Whether it enters recovery depends on the Recovery Boot fuse. if enabled, a primary-boot authentication failure triggers a re-load and re-authentication from the recovery device; if not enabled, the flow falls through to Serial Downloader / Fatal Mode / reset loop. Best regards, Gavin Re: rt1189 Boot Flow As shown in the figure above, if I only sign the image and do not encrypt it, will it be able to go through the bootrom verification flow? Additionally, with oem_close enabled, will it still be able to enter the bootrom verification flow?     Re: rt1189 Boot Flow Please find answers to your two questions below: 1. Can a signed-only (non-encrypted) image go through the BootROM verification flow? Yes. In the RT1180 AHAB, signing (authentication) is the mandatory part of secure boot, ensuring image authenticity and integrity, while encryption (OTFAD/IEE) is an independent, optional anti-cloning feature and is NOT a prerequisite for verification. Therefore, a signed-only image will go through the full AHAB signature verification flow normally, this is also the standard approach in NXP's official SPSDK rt118x_secure_boot example. 2. With oem_close (OEM_CLOSED) enabled, will it still enter the verification flow? Yes, and verification becomes mandatory. Recommendation: Before performing oem_close, please program the signed image in the OEM_OPEN state first and confirm it boots successfully with no ELE events, then close the device (SRKH is irreversible once fused) to avoid bricking the part. (Please refer to: i.MX RT1180 Security Reference Manual. After signing the NDA through your company account, submit a request to the online technic sales representative.)