******************************************************************************** * Detailed Description: * Example demonstates Shifted PWM generating via eMIOS. * The shift is 25% duty cycle. * ------------------------------------------------------------------------------ * Test HW:  MPC5644A + XPC564A minimodule + XPC56XX mother board * Maskset:  OM14X * Target :  Internal Flash * Fsys:     16MHz IRC * * EVB settings: * PJ8 pin 0 is eMIOS CH[0] * PJ8 pin 2 is eMIOS CH[2] ******************************************************************************** Revision History: 1.0     Jun-23-2016     b21190(Vlna Peter)  Initial Version *******************************************************************************/

******************************************************************************** * Detailed Description: * * * This example shows usage of FlexPWM and Sine Wave generator (SGEN) modules. * The setting is selected in the way to have a PWM output signal synhronized with * SGEN output signal. This is necessary for resolver usage in motor control appls. * * See attached Excel sheet for calculation of parammeters used here (AUX0_clk_DIV0, * AUX0_clk_DIV1, SGEN_IOFREQ, PWM_PRESCALER, PWM_MODULO). * * This example is set for 2.44140625 kHz SGEN/PWM frequency. * * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * * EVB connection: * * P20.1 - D[7] .. SGEN output *          connected to FEC PHY's MIIMODE input on motherboard, *          to see full amplitude remove J26    * * P8.12    - A[11] .. FlexPWM A[0] output * P8.11    - A[10] .. FlexPWM B[0] output * * ********************************************************************************

******************************************************************************** * Detailed Description: * This example demonstrates how to use lauterbach multicore project. * All MPC5748G cores (z4a, z4b, z2) are active. Micro boots with core z4a. * On z4a is micro configuration executed and then in Core_Init(); function * are started other 2 cores (z4b and z2). * Example also include Lauterbach multicore (multi powerview) example script * + T32 configuration file * ------------------------------------------------------------------------------ * Test HW:  MPC57xx MB + * Maskset:  1N81M * Target :  SRAM * Fsys:     160 MHz PLL * ******************************************************************************** Revision History: 1.0     Oct-29-2014     b21190(Vlna Peter)  Initial Version 1.1    Nov-20-2014    b21190(Vlna Peter)  Modified for Cut2.0 1.2    Nov-20-2014    b21190(Vlna Peter)  Added SWT_0 dissabling in startup 1.3    Feb-12-2016    b21190(Vlna Peter)  Modified for multicore project *******************************************************************************/

******************************************************************************** * Detailed Description: * MPU is initialized to cover all resources (flash, RAM, peripheral bridges). * All masters are allowed to read-write-execute from all resources. * * Simple test case is used to check the behavior of MPU in case of access * violation: * - the MPU is reconfigured to disable write access to first 1KB or RAM memory *   (0x4000_0000 - 0x4000_03FF). * - if we write this RAM area, machine check exception is triggered * ------------------------------------------------------------------------------ * Test HW:         XPC567XKIT516 - MPC5674ADAT516 Rev.C, MPC567XEVBFXMB Rev.B * MCU:             PPC5674FMVYA264 * Fsys:            264MHz * Debugger:        Lauterbach Trace32 * Target:          RAM, internal_FLASH * ********************************************************************************

******************************************************************************** * Detailed Description:   * Example shows MCU's temperature measurement with the help of TSENS. * Calibration constants for TSENS are read from TSENS registers and * eQADC is set to measure Vbg and TSENS outputs. eQADC calibration is also done. * Calculated internal temperature can be displayed on the Terminal. * * See results on PC terminal (19200, 8N1, None). You should see following text * (with different values for sure) * *    fsys = 150MHz * *    TSENS temperature calculation * *    Calibration constants read from TSENS registers * *    T_LOW = 25 *    T_HIGH = 145 *    TSENS_CODE_T_LOW = 5441 *    TSENS_CODE_T_HIGH = 7305 *    VBG_CODE_T_LOW = 4010 * * *                 (TSENS_CODE_T*beta - TSENS_CODE_T_LOW)*(T_HIGH - T_LOW) *    T = T_LOW - --------------------------------------------------------- [degC] *                       (TSENS_CODE_T_HIGH - TSENS_CODE_T_LOW) * * *    VBG_CODE_T (ch45)  = 3959 => beta = 1.01288 *    TSENS_CODE_T (ch128) = 5608 * *    Temp = 31.80 degC *    * ------------------------------------------------------------------------------ * Test HW:        XPC564AKIT208S and XPC564AKIT324S * MCU:            SPC5644AMMG1,0M14X and SPC5644AMVZ1,0M14X * Fsys:           150/132/120/12 MHz * Debugger:       Lauterbach Trace32 *                 PeMicro USB-ML-PPCNEXUS * Target:         RAM, internal_FLASH * Terminal:       19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ********************************************************************************

******************************************************************************** * Detailed Description: * * Configures the FlexCAN to transmit and receive a CAN message. * ECC reporting in the FlexCAN module is enabled. * * In this config, CAN_A transmits a message. CAN_B receives the message. * CAN_A MB8 is configured to send data. CAN_A sends message each 1sec. * This interval is generated by PIT. * CAN_B MB9 is configured to receive a message, SW polling is used. * * Install jumpers J37 1-2 and J38 1-2 * * Connect CAN0-CANH on P15-1 to CAN1-CANH on P14-1 * Connect CAN0-CANL on P15-2 to CAN1-CANL on P14-2 * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A *           use USB connector (J21) on minimodule * * EVB connection:  ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) *                  ETPUA31 (PortP P23-14) --> USER_LED_2 (P7-2) * * ********************************************************************************

******************************************************************************** * Detailed Description: * * This example shows usage of FlexPWM to generate independent * PWM signals from Submodule0. The PWMX output is set for 50% duty. * PWMA/PWMB outputs vary its duty cycles. * The DMA module is used to reload VAL2-5 registers. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  RAM, internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * * EVB connection: * P8.12    - A[11] .. FlexPWM A[0] output * P8.11    - A[10] .. FlexPWM B[0] output * P11.10 - D[9] .. FlexPWM X[0] output * ********************************************************************************

******************************************************************************** * Detailed Description: * The example uses serial flash memory S25FL129P (connected to DSPI_PCS1) * that is connected to DSPI_B module (PCS1). No Dual or Quad I/O has been used. * SW uses polling mechanism. * The example at first read device ID, performs bulk erase of S25FL129P and then * programs some sample data specified in main function. Check reading is then * performed. During that some notices are displayed on the terminal window. * ------------------------------------------------------------------------------ * Test HW:         XPC567XKIT516 - MPC567xADAT516 Rev.D, MPC567XEVBFXMB Rev.C * MCU:             PPC5676RDMVY1 3N23A * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * Fsys:            180MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          RAM, internal_FLASH * EVB connection:  default ********************************************************************************

******************************************************************************** * Detailed Description: * Initializes eQADC module, performs calibration and cyclically converts PMC * internal channel as specified by macros CHOOSEN_PMC_ADC_CHNL, * CHOOSEN_PMC_ADC_SCALE and CHOOSEN_PMC_ADC_COMMAND to check particular voltage * level, displaying it into terminal window. * Example configures decimation filter to scale signal down by 1/16, this is * achieved by FIR filter (user could choose real filter by proper coeficient * selection). * Example also sums filtered samples by integrator that is configured to be * triggered and zeroed by eTPU signal (for simplicity it uses general purpose * outputs). Integrated values are displayed in terminal window as well. * No external connection required excluding terminal via eSCI. * ------------------------------------------------------------------------------ * Test HW:         XPC567XKIT516 - MPC567xADAT516 Rev.D, MPC567XEVBFXMB Rev.C * MCU:             PPC5676RDMVY1 3N23A * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * Fsys:            180MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          RAM, internal_FLASH * EVB connection:  default ********************************************************************************

******************************************************************************** * Version:          1.0 * Date:             Oct-22-2014 * Classification:   General Business Information * Brief:        This example demonstrate SWT functionality *                 On SWT timeout it sent signal to FCCU where is long *                 functional reset reaction on SWT timeout configured *                 FCCU then sent signal to RGM module which triggers long *                 functional reset. ******************************************************************************** * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference ******************************************************************************** Revision History: 1.0     Oct-22-2014     b21190(Vlna Peter)  Initial Version 1.1     Mar-24-2015    b21190(Vlna Peter)  Added SWT long reset *******************************************************************************/

******************************************************************************** * Detailed Description: * This example shows how to use eDMA for transfering 32-bit data multiple time using minor loop from internal flash to SRAM memory as well as how to configure AIPS (peripheral bridge) to grant eDMA access to peripherals. * * For closer details on how eDMA works I suggest you to check reference manual as this module is quite complex. * This example sets system clock for 200MHz running from PLL0 module. * The constant stored in internal flash is transfered via eDMA to SRAM memory. * Initialization functions are AIPS_0_Init for peripheral bridge and DMA_0_Init. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 0N15P * Target :  internal_FLASH* ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * setup clock for peripherals, Setup access right for Masters and Peripherals * on AIPS_0 * * LINFlex UART mode with FIFO transmit using DMA * LINFlex UART mode with FIFO receive using DMA * * ICache and DCache are both disabled in startup file using CACHE_ENABLE macro. * You can change the value of the macro at the following path: * project Properties/C/C++ General/Paths and Symbols/Symbols * If you change the value to 1, ICahce and DCache will be enabled in startup. * * * ------------------------------------------------------------------------------ * Test HW:         MPC5775K-356DS, MPC57xx Motherboard * MCU:             PPC5775KMMY3A 0N38M * Terminal:        19200-8-no parity-1 stop bit-no flow control on LINFlexD_0 * Fsys:            PLL0 266MHz *                    Z4 Core 133MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  J14.2 to P12.6 Connect LINFlexD_0 RXD to main RS232 *                  J13.2 to P12.7 Connect LINFlexD_0 TXD to main RS232 * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * start both Z7 cores, interrupts initialization, blinking three LED by interrupts, * initializes and display notice via UART terminal and then terminal ECHO. * Each core serves one interrupt and one LED. * * The example configures the device for maximum performance by initialization of * instruction/data cache and enabling of branch prediction for each core * (startup.s files). * * ------------------------------------------------------------------------------ * Test HW:         MPC5775K-356DS, MPC57xx Motherboard * MCU:             PPC5775KMMY3A 0N38M * Terminal:        19200-8-no parity-1 stop bit-no flow control on LINFlexD_0 * Fsys:            PLL0 266MHz *                    Z4 Core 133MHz *                    Both Z7 Cores 266MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  USER LED1 connected to P19.0, LED2 connected to P19.5 *                  LED3 connected to P19.8 *                  For correct UART functionality connect: *                  J14.2 to P12.6 *                  J13.2 to P12.7 * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, initializes interrupts and external * interrupt for IRQ0 pin (alternative function of ETPUC9 pin). * User needs to connect ETPUC9 pin to user switch and general purpose output * ETPUA30 to user LED 1: * ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) * ETPUC9  (PortV P30-8) --> USER_SWITCHES (P6-4) * * If rising edge is detected (i.e. button is pressed), interrupt is triggered * and LED1 on is toggled. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection:  ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) *                  ETPUC9  (PortV P30-8) --> USER_SWITCHES (P6-4) ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, * initializes and display notice via UART terminal and then terminal ECHO. * ------------------------------------------------------------------------------ * Test HW:        XPC5604B 100LQFP, XPC56XX EVB MOTHEBOARD Rev.C * MCU:             PPC5604BE MLL 1M27V * Fsys:             64/48 MHz * Debugger:      Lauterbach Trace32 *                      PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH, (not enough memory for RAM target) * Terminal:       19200-8-no parity-1 stop bit-no flow control on LINFLEX_0 * EVB connection: default * ********************************************************************************

******************************************************************************** * Detailed Description: * This example shows, how to communicate with RTC module PCA8565TS/1 via I2C bus. * For this purpose is used I2C driver created by Petr Stancik. Information from * RTC are sent using DMA via UART. The whole example consists from two parts. * Second part is PC application called GraphicalTerminalExample. This application * handles data from RTC and displays them. RTC also can be set using PC application. * Microcontroller receives data from PC application using DMA via UART. * Received data are written to RTC module. * * UART connection parameters: * Baud rate 19200b/s * 8 data bits * 1 stop bit * none parity * * For correct function of java application, it is required Java 1.8.0_40 * * ------------------------------------------------------------------------------ * Test HW:         MPC5775K-356DS, MPC57xx Motherboard * MCU:             PPC5775KMMY3B 0N76P * Fsys:            PLL0 266MHz *                    Z4 Core 133MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection: *                     UART connection *                     J14.1 connected to P12.6 (RX) *                     J13.1 connected to P12.7 (TX) * *                     RTC connection *                     RTC pin 4 - connected to any GROUND pin *                     RTC pin 8 - connected to any 3.3V pin *                     RTC pin 6 - connected to P8.10 (SCL - I2C clock) *                     RTC pin 5 - connected to P8.11 (SDA - I2C data) * ********************************************************************************

******************************************************************************** * Detailed Description: * Initializes and calibrates eQADC module and cyclically converts choosen * channel, displaying it into terminal window. * User could connect EVB pot's wiper to pin header W (see below) to see valid * conversion result. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection:  For ADC: J53-1 (EVB pot's wiper) --> PS0  - ANA17 *                                                       PS1  - ANA18 *                                                       PS2  - ANA19 *                                                       PS3  - ANA20 * ********************************************************************************

******************************************************************************** * Detailed Description: * This example shows how to use eDMA for transfering 32-bit data from internal flash to SRAM memory as well as how to configure AIPS (peripheral bridge) to grant eDMA access to peripherals. * * For closer details on how eDMA works I suggest you to check reference manual as this module is quite complex. * This example sets system clock for 200MHz running from PLL0 module. * The constant stored in internal flash is transfered via eDMA to SRAM memory. * Initialization functions are AIPS_0_Init for peripheral bridge and DMA_0_Init. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 1N65H * Target :  internal_FLASH* ********************************************************************************

******************************************************************************** * Detailed Description: * * eQADC mode: Continuous scan with external trigger. * Periodic trigger from eMIOS_0 ch16. * ANA ch5 is converted and result is sent to RFIFO0. * * eMIOS ch0 duty cycle is modified based on result data, so LED is dimming * if connected to eMIOS ch0 output. * * ADC result is also displayed on terminal each second. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A *           use USB connector (J21) on minimodule * * EVB connection:  ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) *                  ETPUA31 (PortP P23-14) --> USER_LED_2 (P7-2) * *           eMIOS ch0 (PortG P14-16)--> USER_LED_4 (P7-4) *                  ANA0       (PortQ P24-5) --> RV1 (J53.1) * ********************************************************************************

******************************************************************************** * Detailed Description: * Inject and handles HVD and LVD faults. Application also configures FCCU_F pins * to see possible faults externally - normally these two pins toggles antiphase, * in case error these pins toggles inphase. If you step the code not allowing * alarm interrupt to be handled on time, device goes to safe mode and FCCU_F * pins toggles in phase. * ------------------------------------------------------------------------------ * Test HW:         xPC564xLKIT, PPC5643L Cut3 silicon * Target :         internal_FLASH, RAM * Fsys:            120 MHz PLL0 * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Terminal:        19200-8-no parity-1 stop bit-no flow control via LINFlex0 * EVB connection:  FCCU_F0 and FCCU_F1 connected to the scope - pay attention to *                  J16 and J18 jumpers on mini-module (FCCU_F0 and FCCU_F1). * ********************************************************************************