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* Detailed Description:
* Application performs basic initialization, setup PLL to maximum allowed freq.,
* setup clock for peripherals, Setup access right for Masters and Peripherals
* on AIPS_0
*
* LINFlex UART mode with FIFO transmit using DMA
* LINFlex UART mode with FIFO receive using DMA
*
* ICache and DCache are both disabled in startup file using CACHE_ENABLE macro.
* You can change the value of the macro at the following path:
* project Properties/C/C++ General/Paths and Symbols/Symbols
* If you change the value to 1, ICahce and DCache will be enabled in startup.
*
*
* ------------------------------------------------------------------------------
* Test HW: MPC5775K-356DS, MPC57xx Motherboard
* MCU: PPC5775KMMY3A 0N38M
* Terminal: 19200-8-no parity-1 stop bit-no flow control on LINFlexD_0
* Fsys: PLL0 266MHz
* Z4 Core 133MHz
* Debugger: Lauterbach Trace32
* PeMicro USB-ML-PPCNEXUS
* Target: internal_FLASH (debug mode, release mode)
* EVB connection: J14.2 to P12.6 Connect LINFlexD_0 RXD to main RS232
* J13.2 to P12.7 Connect LINFlexD_0 TXD to main RS232
*
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