**************************************************************************************** Detailed Description: This is a rather simple example that shows LPI2C0 in Master mode. MPL3115A2 sensor is used as a slave device. I2C bus at PTA2 SDA, PTA3 SCL (2-pin open drain mode), external pull-up resistors on BRKTSTBC-P3115 board. BRKTSTBC-P3115 supplied from P3V3 (J3.7). Baud rate 400kHz, source SIRCDIV2 8MHz. The master reads periodically MPL3115A2 status register (every 200ms) and temperature / altitude data once they are ready. ------------------------------------------------------------------------------------------------------- Test HW: S32K144EVB-Q100, BRKTSTBC-P3115 MCU: S32K144 0N57U IDE: S32DSR1, OpenSDA Target: internal_FLASH ****************************************************************************************

Dear all, I'd like to share some useful tips about S32DS for ARM v2018.R1 IDE and S32K1xx development  in Chinese as below: 《S32DS使用Tips--SDK使用常见问题(FAQ)答疑》； 《S32K SDK使用详解之S32 SDK软件编程思想详解》； 《S32K SDK使用详解之S32 SDK软件架构详解》； 《 S32K1xx系列MCU使用Tips--功能介绍及软件开发和硬件设计FAQ》； 《 S32K1xx系列MCU使用Tips--Flash加密后不断复位无法连接调试器的问题解决》； 《S32DS使用Tips--S32DS for Power V1.2 链接文件和启动过程详解》； 《S32K1xx系列MCU使用Tips之SDK软件架构和使用详解》； 《S32DS使用Tips--SDK使用常见问题(FAQ)答疑》； 《S32DS IDE使用Tips--应用工程调试常见问题(FAQ)答疑》； 《 S32DS 使用Tips之S32DS for Power不同版本之间的GNU工具链差异与外设寄存器位域访问问题总结》； 《 S32DS使用Tips之S32DS for Power v1.1应用工程升级到v1.2重新编译运行程序跑飞问题解决》； 《S32DS 使用tips--S32DS for ARM v1.3工程到S32DS for ARM V2.0迁移升级方法和注意事项》； 《  S32DS 使用 tips--工程属性配置(编译选项和C编译器、汇编器及链接器设置)》； 《 S32DS使用Tips--如何编译生成和调用静态库》； 《S32DS使用Tips--如何通过创建新的编译目标(Build Target)在同一个S32DS工程中同时编译静态库和应用程序》； 《 S32DS使用Tips--如何配置和使能Attach功能定位软件程序bug和完成bootloader与应用程序工程的联合调试》； 《 CodeWarrior与S32DS IDE使用 Tips之如何在应用工程中保留定义但未使用的全局常量、变量(用于参数标定)》； 《 S32DS 使用 tips--使用Flash from file下载S19或elf文件》； 《S32DS for ARM v2018.R1安装IAR Eclipse插件调用IAR工具链开发S32K系列MCU应用程序详解》 For more contents, please follow below link: “汽车电子expert成长之路”微信公众号最新最全原创技术分享文章列表 ; Hope this can help you and have a nice day~! Best regard, Enwei Hu(胡恩伟)

******************************************************************************* * * The purpose of this demo application is to present a usage of the ADC_SAR and * BCTU IP Driver for the S32K3xx MCU. * * The example uses the PIT0 trigger to trigger BCTU conversion list. Five standard * ADC channels are selected to be converted. * Converted result from BCTU data register are moved by DMA into result array. * This result array should be placed into no cacheable area if data cache is enabled. * * ADC channel S10 is connected to board's potentiometer, and converted value is * used to dim board's LED. * * * ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K344 * Compiler: S32DS3.4 * SDK release: RTD 1.0.0 * Debugger: Lauterbach * Target: internal_FLASH ********************************************************************************

The purpose of this demo application is to show you the usage of the FlexCAN module configured to use Flexible Data Rate using the S32 SDK API. - In the first part, the application will setup the board clocks, pins and other system functions such as SBC if the board uses this module as a CAN transceiver. - Then it will configure the FlexCAN module features such as FD, Bitrate and Message buffers - The application will wait for frames to be received on the configured message buffer or for an event raised by pressing one of the two buttons which will trigger a frame send to the recipient. - Pressing SW3 button of board 1 shall trigger a CAN transfer that results in toggling the RED led on board 2. - Pressing SW2 button of board 1 shall trigger a CAN transfer that results in toggling the GREEN led on board 2. - This demo application requires two boards, one configured as master and the other one configured as slave (see MASTER/SLAVE defines in application code) or single board connected with CAN tool. - Both the event and error callbacks are installed, callback_test variable indicates event entering bit0 .. RX complete bit1 .. TX complete bit2 .. ERR INT flag set bit3 .. BOFF INT flag set - to enter bus off simply short CANH with GND and send message using either SW1 or SW2, FlexCAN enters bus off (error event) and blue LED is ON. Also TX MB is aborted. Remove short connection and send message again normally, blue LED is off.   ------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: FS32K1441 0N57U * Compiler: S32DS.ARM.2.2 * SDK release: S32SDK_S32K1xx_RTM_3.0.3 * Debugger: Lauterbach, OpenSDA * Target: internal_FLASH  

  EV/HEV is the mega trend and NXP focused area. E-Compressor controller is a key and additional component of EV/HEV vs. traditional vehicle. While S32K14x is the perfect product for mainstream E-compressor application. To accelerate customer develop period in automotive E-compressor application, we develop the S32K142-ECC RDB. Actually, S32K142-ECC is not only suitable for E-compressor, but also can be used in other high voltage PMSM/BLDC application in automotive industry. This RDB (Reference Design Board) hardware is based on NXP S32K142 high-performance automotive-grade MCU and UJA1075A SBC (system basic chip) provides the following features: ◼ Support high voltage up to 400V and power range up to 3.7kW BLDC/PMSM applications. ◼ Support high voltage isolated 12V power supply, which for SBC, IPM and MCU power supply. ◼ Hardware support 3 types of current sampling solutions: single shunt, dual shunts and triple shunts; software support dual shunts in V1.0. ◼ Support multiple diagnose and protection covering UV, OV, OT, OC, Short, Stall Detection, etc.; ◼ Support speed/control commands from CAN/LIN/FreeMASTER; ◼ Support external watch dog for safety. the RDB hardware system block diagram is as below: The software package of S32K142-ECC RDB is available to enable user to evaluate the S32K142 based high voltage e-compressor motor control performance with out-of-box and build their own e-compressor motor control product prototype as a general high voltage motor control hardware platform. The software package has the following features: ◼ Support e-compressor control by FreeMASTER CAN/UART; ◼ Support e-compressor speed control and state feedback by CAN DBC file; ◼ Implemented advanced motor control algorithm, including low speed torque compensation, MTPA, 2-stage current alignment and enhanced ATO to make sure the motor robust start up and high efficiency; ◼ Support rich motor control diagnostic and protection: OV, UV, OC, OT, stall and phase loss and so on; ◼ Provide S32DS IDE and IAR for ARM IDE projects, support U-Multilink and J-LINK debugger; We have several S32K142-ECC RDB in stock, if you have the project and need the RDB for evaluation, please contact your local NXP or NXP dist FAE, Sales and Marketing. For technique support, contact raymond.tang@nxp.com  thanks, Best regards, Raymond

******************************************************************************** Detailed Description: This example shows SRAM ECC injection. By default, a double-bit ECC error is injected on read access of a location in SRAM_U region. This can be changed with the SRAM_U and DOUBLE_BIT macros. The errors can be detected by both the ERM and MCM modules and the corresponding interrupts can be called. Although only ERM is needed, for demonstration purposes, the MCM interrupt is enabled as well with a lower priority than the ERM interrupts. The ERM interrupts that are called first disable the injection mechanism so that subsequent errors can not be detected during a stack read access. The default S32 Design Studio start_up file copies the vector table to the SRAM_L region. To be able to inject ECC errors in this SRAM region and call the interrupts, the copying is disabled by __flash_vector_table__ symbol  declared in the start_up.h file and defined in the S32K144_64_flash linker file. -------------------------------------------------------------------------------------------- Test HW: S32K144EVB-Q100 MCU: S32K144 0N57U Debugger: S32DSR1 Target: internal_FLASH ********************************************************************************

******************************************************************************** * Detailed Description: * * This example shows how to init DMA for simple memory to memory copy. * Eight 16-bit values are copied upon SW start. * * ------------------------------------------------------------------------------ * Test HW:         FRDM-S32K144 * MCU:             PS32K144HFVLL 0N77P * Fsys:            default * Debugger:        S32DS * Target:          internal_FLASH * ******************************************************************************** Original Attachment has been moved to: Example-S32K144-DMA-RAM2RAM-test-v1_0-S32DS.zip

This page supports the NXP Tech Days training session AUT-T4978 for "Hands-On Workshop: The Safety Peripheral Driver in the S32K3 - The Next Level to Achieve Safety". The full installation pre-requisites are attached below, as well as the required S32DS demo application project.

******************************************************************************** Detailed Description: This example shows the use of SRAM retention after SW reset. The SW reset is triggered by pressing the SW3 button on the S32K144 EVB The reset is delayed in RCM module: 514 LPO cycles. In the RCM interrupt, SRAMU_RETEN and SRAML_RETEN are cleared allowing to retain SRAM data during the reset. After software reset, SRAMU_RETEN and SRAML_RETEN are set to1 to allow accesses to SRAM.  During software initialization in the startup_S32K144.S, ECC RAM initialization is skipped.  After that, we can check the written data before reset are still placed in the SRAM.  ------------------------------------------------------------------------------ Test HW: S32K144EVB-Q100 MCU: S32K 0N57U Debugger: S32DSR1 ********************************************************************************

****************************************************************************************************************** Detailed Description: The example code shows CMP in Round-robin mode. CMP is clocked (125kHz) and triggered (80ms) by LPTMR, operates in VLPS. Input channels are CMP0_IN1 (PTA1), CMP0_IN2 (PTC4), CMP0_IN3 (PTE8), CMP0_IN4 (PTC3). The initial state of CMP outputs is 0 (Input analog pins < DAC input (Vin1/2)) The input pins are pulled down internally for debugging purposes. CPM will wake up the MCU if an input has changed. BLUE LED flashes 1x if CMP_IN1 has changed, 2x CMP0_IN2, 3x CMP0_IN3, 4x CMP0_IN4. After that, the MCU goes back to VLPS. ------------------------------------------------------------------------------------------------------------------------------------- Test HW: S32144EVB-Q100X MCU: S32K144 (0N47T) Debugger: S32DS2.0, OpenSDA Target: internal_FLASH ******************************************************************************************************************

 ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** For S32K312, please use this correct clock HSE to AIPS clock should be ½. Please make these changes in the below all example code clock setting. HSE clock to 60 MHZ.   S32K312 PIT BTCU ADC-1 BCTU_ADC_DATA_REG DMA :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-PIT-BTCU-ADC-1-BCTU-ADC-DATA-REG-DMA-DS3-5/ta-p/1787778 S32K312 UART Transmit & Receive Using DMA :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-UART-Transmit-amp-Receive-Using-DMA-DS3-5-RTD300/ta-p/1787799 S32K312 EIRQ Interrupt :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-EIRQ-Interrupt-DS3-5-RTD300/ta-p/1787860 S32K312 SPI Transmit & Receive Using DMA :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-SPI-Transmit-amp-Receive-Using-DMA-DS3-5-RTD300/ta-p/1787856 S32K312 CAN Transmit & Receive Using Polling mode :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-CAN-Transmit-amp-Receive-Using-Polling-mode-DS3/ta-p/1789191 S32K312 CAN Transmit & Receive Using MB & FIFO DMA :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-CAN-Transmit-amp-Receive-Using-MB-amp-FIFO-DMA/ta-p/1789196 S32K312 ADC :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-ADC-DS3-5-RTD300/ta-p/1789282 S32K312 Switch Debouncing :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Switch-Debouncing-DS3-5-RTD300/ta-p/1789290 S32K312 UART Freemaster :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-UART-Freemaster-DS3-5-RTD300/ta-p/1789306 S32K312 PIT BTCU parallel ADC FIFO DMA  :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-PIT-BTCU-parallel-ADC-FIFO-DMA-DS3-5-RTD300/ta-p/1789908 S32K312 placing variables in DCTM & code in ICTM  :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-placing-variables-in-DCTM-amp-code-in-ICTM-DS3-5/ta-p/1790101 Example S32K312 Standby mode & Standby RAM and PAD keeping DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Standby-mode-amp-Standby-RAM-and-PAD-keeping-DS3/ta-p/1797713 Example S32K312 SWT DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-SWT-DS3-5-RTD300/ta-p/1800559 Example S32K312 Printf Semihosting DS3.5 RTD300 :--- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Printf-Semihosting-DS3-5-RTD300/ta-p/1801354 Example S32K312 I2C Transmit & Receive Using DMA DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-I2C-Transmit-amp-Receive-Using-DMA-DS3-5-RTD300/ta-p/1801357 Example S32K312 HARDFAULT Handling Interrupt DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Handling-Interrupt-DS3-5-RTD300/ta-p/1806259 Example S32K312 Bootloader to Application Jump DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Bootloader-to-Application-Jump-DS3-5-RTD300/ta-p/1809810 Example S32K312 PIT timer Toggle LED DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-PIT-timer-Toggle-LED-DS3-5-RTD300/ta-p/1809932 Example S32K312 HARDFAULT Interrupt Handling using a script DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Interrupt-Handling-using-a-script-DS3/ta-p/1818507 Example S32K312 UART Transmit & Receive Using Interrupt DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-UART-Transmit-amp-Receive-Using-Interrupt-DS3-5/ta-p/1818775 Example S32K312 CAN Transmit & Receive Using MB Interrupt DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-CAN-Transmit-amp-Receive-Using-MB-Interrupt-DS3/ta-p/1818790 Example S32K312 STANDBY wake up using CAN-0-RX and GPIO Switch DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-STANDBY-wake-up-using-CAN-0-RX-and-GPIO-Switch/ta-p/1891411 Example S32K312 STANDBY wake up using RTC DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-STANDBY-wake-up-using-RTC-DS3-5-RTD300/ta-p/1930115  

************************************************************************************************ Detailed Description: WDOG tested in SystemInit() function (system_S32K116.c) after POR. For debugging purposes: - WDOG counter reference clock is pre-scaled to slow the test (CS_PRES = 1). - During CNT_LOW test, BLUE LED (PTE8) ON. - During CNT_HIGH test, RED LED (PTD16) ON. - Once both tests have passed, GREEN LED (PTD15) ON. If either of the test fails, WDOG will stay in its default configuration and rest the MCU. ---------------------------------------------------------------------------------------------------------------- Test HW: S32K116EVB-Q048 REV.B MCU: S32K116 0N96V Debugger: S32DSR1, OpenSDA Target: internal_FLASH ************************************************************************************************

To restrict the S32K3 MCU access by JTAG the process depends on whether HSE FW is used or not. With HSE FW (not covered in this document): 1. Set up ADKP (Application Debug Key/Password). 2. Make sure the password mode or challenge-response mode. 3. Move the lifecycle to the IN-FIELD stage. NOTE: All the above steps can only be done via HSE services (not via IVT or by direct flash programming). Without HSE FW: WARNING: ONCE YOU REALIZE THIS PROCESS YOU CAN NOT CONFIGURE HSE IN THE DEVICE. NOTE: All the following codes represent just the essential part of the application and, where made using the S32K344 (not EVB), S32DS v3.5, the S32K3 Real-Time Drivers Version 3.0.0 (released on March 31, 2023) and a modified version of the C40_Ip_Example_S32K344, unless otherwise mentioned. As the debugger the PEmicro’s USB Multilink Universal FX was used, unless otherwise mentioned. 1. Program the field CUST_DB_PSWD_A: The UTEST Sector is an OTP (One Time Programmable). This causes the erase operations not to be allowed. You only going to be able to append new data or configuration and read data. This UTEST memory field is defined with a size of 32 bytes located from addresses 1B00_0080h to 1B00_009Fh, but its real size is 16 bytes because from 1B00_0090h to 1B00_009Fh is reserved (Table 184. UTEST memory location usage by SBAF of the S32K3xx Reference Manual, Rev. 7). To write the desired password in the UTEST Sector is the same process used to program data in other blocks. I. First, the sector needs to be unlocked to realize program operations. UTEST has its register PFCBLKU_SPELOCK[SLCK]. II. Once the sector is unlocked, write the 16-byte lend password at 1B00_0080h. The following changes need to be done in the example code: /*============================================================================ * LOCAL MACROS ============================================================================*/ #define FLS_MASTER_ID 0U #define FLS_BUF_SIZE 16U #define FLS_SECTOR_ADDR 0x1B000080U #define FLS_SECTOR_TEST C40_UTEST_ARRAY_0_S000 NOTE: Make sure that the definition FLS_MAX_VIRTUAL_SECTOR located in C40_Ip_Cfg.h has the same value as the C40_UTEST_ARRAY_0_S000 and that C40_SECTOR_ERROR is one value greater than C40_UTEST_ARRAY_0_S000.  For example instead of: #define FLS_MAX_VIRTUAL_SECTOR (527U) … #define C40_SECTOR_ERROR (528U) Needs to be: #define FLS_MAX_VIRTUAL_SECTOR (528U) … #define C40_SECTOR_ERROR (529U) /*============================================================================ * GLOBAL CONSTANTS ============================================================================*/ uint8 TxBuffer[FLS_BUF_SIZE] = {0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F}; /* Password */ You can confirm the password was written by using the Memory Viewer (not covered by this document).   2. Advance the MCU's lifecycle: I. First, set the address of the lifecycle configuration word in the IVT/boot header. For more information refer to sections 32.5 (Image vector table) and 32.5.3 (Structure definition of image vector table) of the S32K3xx Reference Manual, Rev. 7. NOTE: Make sure that the structure of the boot_header (located in Project_Settings -> Startup_Code -> startup_cm7.s) is defined as shown below:     #define LF_CONFIG_ADDR (0x007D2000) /* The LC word can be at any flash address, taking care that does not interfere with HSE */     II. Once defined LF_CONFIG_ADDR, write in such address the value for the LC word corresponding to the target lifecycle: Life cycle stage Valid Values for LC Advancement OEM_PROD DADA_DADAh IN_FIELD BABA_BABAh The following changes need to be done in the example code (the changes can be done in the same project used before):     /*=========================================================================== * LOCAL MACROS ===========================================================================*/ #define FLS_MASTER_ID 0U #define FLS_BUF_SIZE 8U #define FLS_SECTOR_ADDR 0x007D2000U #define FLS_SECTOR_TEST C40_CODE_ARRAY_0_BLOCK_3_S489 /* Look into C40_Ip_Cfg.h file to find the corresponding sector */ /*=========================================================================== * GLOBAL CONSTANTS ===========================================================================*/ uint8 LC_TxBuffer[FLS_LC_SIZE] = {0xDA, 0xDA, 0xDA, 0xDA, 0x0, 0x0, 0x0, 0x0}; /* Minimum data length 8 bytes */     Once the LC word is written in the memory, you can confirm the LC word was written by using the Memory viewer (not covered by this document). III. Reset the MCU NOTE: Directly from the reset pin (RESET_B), not the debugger. If the procedure was done correctly you should see the following message: Now to unlock the MCU, PEmicro provides some Python scripts (PEmicro support files package) to facilitate the authentication of the debugger when the password is set. In summary: I. Make sure to have already installed Python (3.5 or later). II. Open Command Prompt. III. Use cd to change the current working directory to where the file package is. IV. Run the script using: py authenticate_password_mode.py -hardwareid=USB1 -password=… Where hardwareid, is the debug hardware IP address, name, serial number, or port name. And the password is the preconfigured 16-byte hexadecimal. NOTE: This steps need to be done each time the MCU is reset or power cycled.  Once the debugger has been authenticated, you are going to be able to securely debug the device under S32DS. NOTE: Just make sure that In S32DS when you configure the Debug Configurations of a project, change the Target to the one that says "SECUREDEBUG". This is because during debug entry a hard reset is toggled which clears the authentication. You can follow the below steps for this:  

******************************************************************************************** * Detailed Description: * LPIT_ch0 triggers DMA_ch0 periodically (1ms). * Every trigger starts a minor DMA loop (8 bytes) transfer to the LPSPI1 TX FIFO. * There are 8 minor loops per one major loop (64 bytes in 8ms). * LPSPI1 sends two 32bit frames every 1ms. * LPSPI1 RX data are masked, they are not stored in the RX FIFO. * ------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: S32K144 0N57U * Debugger: S32DS 2.2, OpenSDA * Target: internal_FLASH ********************************************************************************************

*******************************************************************************************************  Detailed Description:  Configures the MCU to run system clock from XOSC.  LPUART1 is set to respond to LIN header sent from master.  Based on ID received the LPUART1 either receive frame's data and compare checksum  or publish requested data with calculated checksum. Enhanced checksum is used.  Interrupt is used for RX and TX operation and 2 versions of interrupt routine are available.  VER 1 ... during response transmission receiver disabled and transmit interrupt enabled  VER 2 ... during response transmission receiver is kept enabled  ------------------------------------------------------------------------------  Test HW: S32K116 EVB-Q048  MCU: PS32K116LAM 0N96V  Fsys: 40MHz  Debugger: Lauterbach  Target: internal_FLASH ******************************************************************************************************

************************************************************************************************************************** * Detailed Description: * * Connect PTC24 (PWM) to PTC25 (IC) * * PWM signal generated by EMIOS_1_ch0 (in OPWFMB mode) is measured by EMIOS_1_ch_1 (IPWM mode). * * EMIOS_1 global global clock (core clock = 48MHz) prescaled in EMIOS_Mcl driver (/48) = 1MHz. * * BUS_A generated by EMIOS_1_ch_23 * Tick = 10us (1MHz global clock prescaled by 10 = 100kHz) * * PWM (OPWFMB), EMIOS_1_ch_0, PTC24 * Tick = 10us (1MHz global clock prescaled by 10 = 100kHz) * * IC (IPWM), EMIOS_1_ch_1, PTC25 * Clocked by BUS_A * Tick = 10us * * ------------------------------------------------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K344 * Debugger: S32DS 3.4, PEMicro Multilink rev.C * Target: internal_FLASH **************************************************************************************************************************

Some customers inquire how to use FreeMASTER with S32K3. But there is no exists example projects which demonstrate usage of the FreeMASTER serial communication driver in S32K3 Real Time Drivers at the moment. So this article will introduce how to use FreeMaster SDKs in S32K3 RTD 0.9.0. Download S32DS \ S32K3 Development Package \ RTD (SDK) \ FreeMASTER Driver Login your account on NXP website, and download the S32K3 Standard software from TOOLS &SOFTWARE of S32K3 webpage. If you have already installed the S32DS3.4 \ S32K3 Development Package 3.4.0 \ RTD 0.9.0, then you can skip the following part and start directly from 4.Install FreeMASTER Driver 3.0 for S32K3 Install S32K3 Development Package 3.4.0 After install the S32 Design Studio v3.4, we should install S32K3 Development Package 3.4.0(SW32K3_S32DS_3.4.0_D2012.zip): go to menu "Help" -> "Install New Software" and click on "Add..." button Here we uncheck S32 Design Studio S32K3 SDK (RTD S32K3 0.8.1), because we will install the newer version S32K3 RTD 0.9.0 later. Install S32K3 Real Time Drivers Version 0.9.0 S32K3 Real Time Drivers Version 0.9.0 can be installed by refer the Offline Package Installation Setup of S32DS Extensions & Updates: Explanation and How To Use. Install FreeMASTER Driver 3.0 for S32K3 Attach FreeMASTER_S32K3 to S32K344_UART_Printf_Sample_090_34 The reason for choosing the S32K344_UART_Printf_Sample_090_34 project to demonstrate the combination of FreeMaster SDKs is that the project has already configured the LPUART of the S32K3X4EVB-Q257 development board. Select LPUART peripheral as host communication Through the description in the Requirements and Release Description chapter of FreeMASTER Driver Release Notes(FMSTRS32K3RN), we can see that currently only UART interface is supported. The S32K3 FreeMASTER 3.0 version 1.0.0 only support NXP GCC 6.3 or 9.2 for ARM at the moment, but the latest S32K3 Real Time Drivers Version 1.0.0 is based on NXP GCC 10.2.0. This is the reason why RTD 0.9.0 is selected in this article.  The README.txt also shows that: Current package provides FreeMASTER Communication Driver support for S32K344 over LPUART module   LPUART13 is selected in this project for S32K3X4EVB-Q257, so we need to define the base address for FreeMASTER: #define FMSTR_LPUART_BASE           0x404A0000 Modify the main function according to the README.txt: Connect FreeMASTER3.1 to S32K3X4EVB-Q257 board Here we can see that the FreeMASTER3.1 is connected to S32K3X4EVB-Q257 board.  

       This routine implements all four different mask setting methods.Users can refer to these routines to implement some application scenarios.Please note that this routine is for reference only.When posting this routine, I only did some limited tests, and I don't make sure that there are no problems. If you find it, please leave a message and I will revise it in time.       When the program was flashed into the S32K142EVB, the Blue Led will toggles every 500ms, this Led shows that the program is running on well condictions. If a message was received by S32K142EVB from external CAN bus, the Green Led will toggle,at the same time, the S32K142EVB will sent a message to CAN Bus which have the same data with the message received,and the ID is 0x02.At the last,the Red Led will toggle when a CAN error is occurd.   1.FlexCAN Mask Setting Overview          S32K1XX FlexCAN support  Frame mask function ,as you can see the FlexCAN mask can be set to Global Mask or Individual Mask,and user can choose to use FIFO or MB to receive message,but only MB can be used for sending messages.and one more thing you should be care is that the FIFO can not be used for CAN FD,this is because the FIFO data filed only support 8 bit datafiled.           If you use MB14 or MB15, have to set the mask of these tow MBs separately，and you can take a look at the two functions in the below. ->FLEXCAN_DRV_SetRxMb14Mask();  ->FLEXCAN_DRV_SetRxMb15Mask();   2.Hardware Needs. 1.S32k142EVB,(or own made board which can support CAN communications.) 2.CAN TOOL's which used for send or receive messages from CAN Bus on your computer.   If you don't have such tools ,you can use another board which can replace the CAN tools to send or receive CAN messages. 3.S32K142EVB should be powered by external 12V DC, and don't forget to connect the J107 to 1-2.   3.Software Needs. 1.This demo build on S32 Design Studio for ARM V2.2  2.The SDK version is SDK_S32K1XX_15   4.FlexCAN_RX_MB_Mask_Setting 4.1.Set the Mask Type to Global Mask Type.      In this case, we can only receive the messages which ID from 0x300~0x37F and 0x400~0x47F.      If you try to sent the messages with other ID's, the S32K142EVB will not have any reponse!  4.2.Set the Mask Type to Individual Mask Type.      In this routine,we can only receive frames with IDs in the range of 0x400~0x47F. 5.FlexCAN_RX_FIFO_Mask_Setting 5.1.Set the Mask Type to Global Mask Type.      In this routine,we can only receive frames with IDs in the range of 0x10~0x17, 0x20~0x27,0x30~0x37,0x40~0x47, 0x50~0x57,0x60~0x67,0x70~0x77,0x80~0x87. 5.2.Set the Mask Type to Individual Mask Type.      In this routine, we can only receive frames with IDs in the range of 0x10~0x17,0x20~0x27,0x30~0x37,0x40~0x47, 0x50~0x57,0x60~0x67,0x70~0x77,0x80~0x87.   End       If you need to use CAN FD, please note that FIFO cannot be used. Regarding FIFO, it has three filtering formats, you can refer to the following chapters in the data sheet for details. S32K-RM Rev 13. Chapter:55.4.2.15 Rx FIFO Global Mask register (RXFGMASK) Chapter:55.4.6 Rx FIFO structure          

Due to K3 hasn't been mass-produced yet, this content is moved to S32K3 Internal forum: https://community.nxp.com/t5/S32K3-Internal-Community/S32K3-Low-power-lab/ta-p/1280219 Any question, pls contact Jeremy.he@nxp.com.

Hi,     I would like to share with you the follow solution for S32K14x which could be attached while couldn't be re-programmed and stopped at RAM initializing.     If you met the issue as title, please check the SIM_CHIPCTL's value in IDE with attach function. Maybe you can find that the value is 0x0, which is not as default value after reset which is 0x0030_0000.     If you check the meaning on SIM_CHIPCTL, you can find that SRAMU and SRAML are retained across resets.  To solute the issue, you should add 'WRITE_LONG=00300000/40048004/ ;' in front of it the algorithm (it's better after reset) of freescale_s32k144f512m15_pflash_dflash_eeprom.arp which is at  'C:\NXP\S32DS_ARM_v20\eclipse\plugins\com.pemicro.debug.gdbjtag.pne_3.3.3.201712132114\win32\gdi\P&E\supportFiles_ARM\NXP\S32K1xx' After that, you can download your project as normal. Cheers! Oliver