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* Detailed Description:
* LPIT_ch0 triggers DMA_ch0 periodically (1ms).
* Every trigger starts a minor DMA loop (8 bytes) transfer to the LPSPI1 TX FIFO.
* There are 8 minor loops per one major loop (64 bytes in 8ms).
* LPSPI1 sends two 32bit frames every 1ms.
* LPSPI1 RX data are masked, they are not stored in the RX FIFO.
* ------------------------------------------------------------------------------
* Test HW: S32K144EVB-Q100
* MCU: S32K144 0N57U
* Debugger: S32DS 2.2, OpenSDA
* Target: internal_FLASH
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