S32K Knowledge Base

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This is an example project which is created to do an internal wake up from VLPS mode using LPTMR0. From S32KRM, it tells us that internal wakeup is achievable using LPTMR0. What code does? ======================================= 1) LPTMR0 is configured for 5 Seconds. So for interrupt occurs for every 5 seconds 2)LPTMR0 wakes up MCU for every 5 seconds and again it goes back to sleep for next 5 seconds. This cycle repeats forever. 3) When MCU is in RUN mode, GREEN color LED will be ON and it will in OFF if it goes to VLPS. Project Configurations: ======================================= Other Informations: ======================================= Design studio: S32DS3.4 SDK : RTM 4.0.2 EVB : S32K118EVB2Q048 Note: Following symbols should be included if you are creating the project from scratch to properly put MCU to sleep and wakeup from POR. Thanks & regards, Krishnakumar V

******************************************************************************* The purpose of this demo application is to present a usage of the MEM_InFls MCAL Driver for the S32K3x1 MCU. The example uses MEM_InFls driver to write 128 bytes to FLASH memory address 0x47_A000 starting of FLS_CODE_ARRAY_0_BLOCK_0_S61. ------------------------------------------------------------------------------ * MCU: S32K310 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Flash end address = 0x480000 Size of each block = 8192 = 0x2000 Start Address of 63 block = 0x480000 - 0x2000 = 0x47E000 = 4710400 Start Address of 62 block = 0x480000 - 0x4000 = 0x47C000 = 4702208 Start Address of 61 block = 0x480000 - 0x6000 = 0x47A000 = 4694016 Ram location where FLASH writing erase code is placed :-- I placed the code at 0x256 byte below the MAX address of the RAM size 16*1024 = 16384 = 0x4000 End of RAM = 0x20400000 + 0x4000 = 0x20404000 0x20404000 - 0x256 = 0x20403DAA 0x20403DAA = 541081002 Size of RAM need to save the flashing routine, as per the MAP & linker file :-- 0x00407b80 - 0x00407b54 = 0x2C = 44 byte S32K3 FLASH Memory Terminology :--

*************************************************************************************************************** Detailed Description: Example shows implementation of Analog Comparator ‘45.7.5 Windowed mode (#s 5A & 5B)’ of S32K1XXRM using S32 SDK API. The Comparator is configured to compare analog input 0(AIN0) with half the reference voltage generated with the internal DAC. PDB is used to generate pulse output which is used as sampling windows of CMP block via TRGMUX. PDB period is 5ms, the first 2.5ms WINDOW=1 and the next 2.5ms WINDOW=0. Pdb0PulseOut not only be TRGMUX to Cmp0Sample but also to TrgmuxOut0, so that we are able to observe WINDOW at TRGMUX_OUT0(PTA1) pin. Based on the input from CMP0_IN0 (1kHz external triangle wave) the LEDs light by the following rules: 1) Vin < DAC voltage : RED on, GREEN off 2) Vin > DAC voltage : RED off, GREEN on 3) Unknown state : RED on, GREEN on EVB connection: Signal Function pin S32K144EVB-Q100 WINDOW TRGMUX_OUT0 PTA1 J5.5 2.5ms WINDOW=1 and 2.5ms WINDOW=0 Plus input CMP0_IN0 PTA0 J5.7 Need to connect external 1khz triangle wave COUTA CMP0_OUT PTE3 J1.16 square wave PTC1 PTC1 J5.13 If there is no external triangle wave, a square wave(PTC1) is generated and output to CMP0 (PTA1) * * ------------------------------------------------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: S32K144UAVLL 0N47T * Target: Debug_FLASH * Compiler: S32DS3.4 * SDK release: S32SDK_S32K1XX_RTM_4.0.3 * Debugger: PEMicro OpenSDA * ------------------------------------------------------------------------------------------------------------------------ Revision History: Ver Date Author Description of Changes 1.0 Nov-9-2023 Robin Shen Initial version, based on cmp_dac_s32k144 and pdb_periodic_interrupt_s32k144 ***************************************************************************************************************

Hi team, First let me explain about the code about what it does. ======================================= 1) From POR, LED starts blinking - In this state RTC won't be initialized. 2) Once SW5 is pressed in S32K312 EVB - RTC will be initialized before MCU goes to sleep. 3) RTCCNT will be incrementing during sleep 4) Once SW6 is pressed , MCU wakes from the sleep and we could able see the updated RTC time and date. WAR(Work Around)done to keep RTC alive during sleep: ======================================= Tried to test the RTC with sleep mode, observed that RTCCNT value is getting reset once after every wakeup. So that time and date was not able to preserve the value. In order to avoid this, I have done two workarounds to solve this RTCCNT value reset issue. 1) RTC will not be initialized for if MCU wakeup from the sleep - Made the check to initialize when MCU is not from the wakeup before it goes to sleep. wake_up_event will be incremented if MCU reset reason is wakeup as shown below. 2) Updating "Rtc_Ip_u32ChState" array variable for "ticksPerSecond" member in "Rtc_Ip.c" file manually after the code generation is completed. Note: With auto generated code the value of "ticksPerSecond "will be "0". Any other alternatives other than this approach is highly appreciated. Thanks in advance!

The following article is intended to give an example on the use of the FS26 in standby mode with the S32K3 MCU also in standby to get lower consumptions on costumer designs and waking up both through an external wake (EXTWAKE) and the PGOOD SBC signal. Software requirements: The attached codes uses the following SW requirements: S32K3 RTD 4.0.0 HF02 FS26 SBC RTD 3.0.0 HW Requirements: There are a few reworks needed on the EVB in order to make the code work. S32K3X8EVB-Q289 Rev B2: 1.- Remove resistor R2301 and place R2304 instead, this change is because the PTA8 signal has the EXTWAKE option on the user push-button, this allows that when you send a WKPU request from the MCU (with the push-button) what the MCU does when it has PGOOD activated is that it sends an EXTWAKE signal to WAKE1 of the FS26. 2.- Change the J685 jumper position to 2-3, this jumper is the VDEBUG mode. 3*.- Optional: FS26 DS recommend FCCU lines with certain values of resistors on their lines that are not present by default on the S32K3X8EVB-Q289. I've attached the example program on a ZIP file, hope it helps.

****************************************************************************************************** * Detailed Description: These demos showcase how to configure the eMIOS module on the S32K3 series, highlighting various operational modes and their implementations using the RTD high-level drivers, commonly known as MCAL drivers. The implementations demonstrated in these examples follow the approach outlined in the community thread: S32M27x/S32K3 – eMIOS Usage. * Connections: ******************************************************************************************************* * Test HW: S32K31XEVB-Q100 * MCU: S32K311 * Debugger: S32DS 3.6.2, OpenSDA/ PEmicro Multilink Universal FX * Target: internal_FLASH ******************************************************************************************************* * Important information: The OPWMT channel does not support the notification function. In this mode, the Sn[FLAG] bit is only set upon an AS2 match, which defines the generation of a trigger event within the PWM period. As a result, OPWMT mode cannot support notifications based on signal edges. A bus exception may occur during the execution of Mcl_Init() if the eMIOS clock is not properly enabled. To avoid this issue, ensure that the eMIOS peripheral clock is activated in the configuration settings under: MCU driver → McuModuleConfiguration → McuModeSettingConf → McuPeripheral *******************************************************************************************************

This example code brief :-- 1> Tested without the SL of BMS, so no dependency on the BMS Safety library. 2> Its tested on 2 AFE MC33775 board connected in TPL 3> Change following macro in mc33775_cfg.h file to change the numbers of AFE connected in TPL. RTD : 3.0.0 P07 BMS SDK : 1.0.2 This example does this task :-- Application Measurement. SYNC measurement Periodic Measurement. Read AFE temperature. Cell balancing timer method. Reading the Cell balancing status register & fault registers. =================== Setup used ============ Attached code is tested with TWO MC33775 AFE connected in TPL mode. =============== MCU Pins used =========== FRDM665SPIEVB Jumper setting :--- K1, K2 & K4 connector of S32J344 EVB :-- K1 on MC33665 & S32K334 evb :-- K2 on MC33665 & S32K334 evb :-- K4 on MC33665 & S32K334 evb :-- ================= EVB Link ================== https://www.nxp.com/design/design-center/development-boards-and-designs/18-cell-battery-pack-emulator-to-supply-mc33774-bcc-evbs:BATT-18EMULATOR https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM665SPIEVB https://www.nxp.com/design/design-center/development-boards-and-designs/RD33775ADSTEVB https://www.nxp.com/design/design-center/development-boards-and-designs/automotive-development-platforms/s32k-mcu-platforms/s32k3x4evb-t172-evaluation-board-for-automotive-general-purpose:S32K3X4EVB-T172 ============= Using Debugger ============ Debugger breakpoint will cause the communication timeout at the AFE, which will RESET the AFE. To use the debugger while development you need to disable the communication timeout. In S32DS MEX file you cannot disable the timeout function ( limit the value of 0~255) Disable Communication timeout in code :-- ================= Results for TWO AFE ===========================

******************************************************************************** The purpose of this demo application is to show you how to use the Temperature Sensor module in S32DS. It includes two methods to obtain temperature. -The first one starts a normal software conversion with one-shot mode on temp sense channel and calculates the temperature on chip from the data conversion. -The second one calculates the temperature based on given data (if read directly using ADC). Note: Please adjust the ADC reference voltage according to the board you are using * ------------------------------------------------------------------------------ * Test HW: S32K344EVB-T172 * MCU: S32K344 1P55A * Compiler: S32DS.ARM.3.5/6 * SDK release: S32K3_RTD_6.0.0/5.0.0/4.0.0_P24 * Debugger: OpenSDA/PE&Micro * Target: internal_FLASH *Jumper:J18-1:2,5V used. ********************************************************************************* Note that if you use "sprintf", you need to check the following option.

This document provides a brief explanation of the Excel-based calculator developed to assist with the computation of TX Arbitration Start Delay as described in the S32K3 reference manual. The tool implements the formula provided in the datasheet, allowing users to input relevant parameters and automatically calculate the delay values. It is intended to support engineers in evaluating CAN transmission timing and optimizing arbitration performance in S32K3-based applications. 1.Fill in the clock and CBT and FDCBT configuration parameters according to your requirements. For example, we fill the parameters according Case 3: Then we can get the TASD value for non-FD frames is 24.05. Please note that this summary is not officially released by NXP. It is a personal summary for reference only. If there are any errors, please contact me.

This post is an additional project to the S32K3 Low Power Management AN and demos. A simple FlexCAN routine is configured for RX/TX and wakeup through the CAN0_RX pin (PTA6/WKPU19). The example is based on the S32K3X4EVB-T172, meaning that transceiver TJA1443 is used. TJA1443 only needs CAN0_EN & CAN0_STB pins in HIGH for normal configuration. In the example, the GREEN led is used to indicate that the MCU is in RUN mode. Once SW5 is pressed, MCU enters low power (STANDBY), and led is turned off. BLUE led toggles each time a CAN frame is received. MCU can be woken up with SW6 (WKPU42) or through a CAN RX. Note that CAN is not enabled in low-power, rather PTA6 (WKPU19) is configured for wake up, and once a rising edge signal is detected on the pin, MCU wakes up and reconfigures CAN module. ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 * MCU: S32K344 * Compiler: S32DS3.6.2 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH ------------------------------------------------------------------------------ This example is provided as is with no guarantees and no support.

------------------------------------------------------------------------------ * Test HW: S32K31XEVB-Q100 * MCU: S32K311 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** S32K31XEVB-Q100 :-- S32K31XEVB-Q100 Evaluation Board for Automotive General Purpose | NXP Semiconductors Example MCAL S32K311 MEM_InFls DS3.5 RTD300 :-- Example MCAL S32K311 MEM_InFls DS3.5 RTD300 - NXP Community

**************************************************************************************************** * Detailed Description: * * - CMU errors cannot be injected by any means other than manipulating the CMU thresholds, * except for FXOSC_CLK, which can be physically disrupted on the PCB. * * - CMU_FC_0 (FXOSC_CLK) is configured for **synchronous interrupt** on both LFF and HFF CMU events. * - CMU_FC_3 (CORE_CLK) is configured for **asynchronous destructive reset** triggered only by the LFF event; the HFF event is ignored. * - CMU_FC_4 (CORE_CLK) is configured identically to CMU_3: **asynchronous destructive reset** on LFF only; HFF is ignored. * - CMU_FC_5 (HSE_CLK) can be configured by the HSE_B core only. * Refer to the Reference Manual rev.10, Figure 122. Frequency checking (FC) instances * * - The configuration must be identical in both the MCU MCAL driver and the Clock Configuration Tool (clock details). * - To inject a specific CMU error, define one of the following macros: `INJECT_CMU_0`, `INJECT_CMU_3`, or `INJECT_CMU_4`. * * Behavior After Destructive Reset: * - Following a destructive reset (either `MCU_CORE_CLK_FAIL_RESET` or `MCU_AIPS_PLAT_CLK_FAIL_RESET`), * execution will halt in the `while(wait)` loop. * ------------------------------------------------------------------------------------------------ * Test HW: S32K3X4EVB_Q257 * MCU: S32K344, 0P55A * SDK: RTD 6.0.0 * Debugger: PEMicro Multilink FX * Target: internal_FLASH ****************************************************************************************************

******************************************************************************* The purpose of this demo application is to present a usage of the EMIOS IP Driver in Interrupt mode for the S32K3xx MCU. The example use to :-- EMIOS-1 - ch-0 --> PTC24 --> Generate the PWM EMIOS-1 - ch-1 --> PTC25 --> is the ICU channel to measure the duty Pins used :-- This example is tested for SAIC & IPWM mode both. You can change the mode by this setting in MEX file :-- Difference between SAIC & IPWM, ICU Driver User Manual :-- These Two Macro :-- SAIC_MODE --> this maco will enable variables to store for SAIC mode CUSTOM_IRQ --> this MACRO will enable customized IRQ or RTD available IRQ Result :-- Sometimes Compiling error comes, in Autogenerated RTD file. Change the Header file name :-- ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************

*********************************************************************************** * Detailed Description: * The example locks * PFC PFCBLK2_SSPELOCK REG_PROT soft lock * and PFC REG_PROT hard lock. * ------------------------------------------------------------------------- * Test HW: : S32K344EVB-Q172 * MCU: : S32K344 * Project : RTD AUTOSAR 4.7 * Platform : CORTEXM * Peripheral : S32K3XX * Dependencies : none * * Autosar Version : 4.7.0 * Autosar Revision : ASR_REL_4_7_REV_0000 * SW Version : 5.0.0 * Build Version : S32K3_RTD_5_0_0_D2408_ASR_REL_4_7_REV_0000_20241002 ***********************************************************************************

**************************************************************************************************** * Detailed Description: * This code demonstrates how to inject an ECC (Error Correction Code) fault into either DTCM0 * (Data Tightly Coupled Memory) or SRAM0 using the EIM (ECC Injection Module). * * When the processor reads corrupted data from DTCM0 or SRAM0, an ECC error is detected, resulting in: * - A Bus Fault exception raised by the core. * - An error report generated by the ERM (Error Reporting Module), which can also trigger an interrupt. * * By default, the ERM interrupt has a lower priority than the Bus Fault exception. In this example, * the Bus Fault exception priority is intentionally lowered so that the ERM interrupt is serviced first. * This ensures the system can respond to the ERM interrupt before the core's Bus Fault handler executes. * * IMPORTANT: The interrupt vector table must not reside in SRAM0 or DTCM0 when injecting an * uncorrectable ECC fault into these memories. Otherwise, the ECC fault would corrupt the vector * table during a fetch, leading to unpredictable behavior. * Always check the VTOR (Vector Table Offset Register) * to confirm the vector table location before performing ECC fault injection. * * Memory Selection: * You can select which memory to inject the ECC fault into using the following macros: * #define SRAM0 * #define DTCM0 *************************************************************************************************** * ------------------------------------------------------------------------------------------------* * Test HW: S32K3X4EVB_Q257 * MCU: S32K344, 0P55A * SDK: NA * Debugger: Lauterbach Trace32 * Target: internal_FLASH ****************************************************************************************************

************************************************************************************************* * Detailed Description: * DCF record disables or enables POR_WDG depending on the POR_WDG_EN macro in main.c. * Find first available location in UTEST, by default, first available address is 0x1B000780 * * NOTE: There is a bug in this RTD version. * Change FLS_MAX_VIRTUAL_SECTOR to 272 in C40_Ip_Cfg.h * ------------------------------------------------------------------------------ * Test HW: : S32K312EVB-Q172 * MCU: : S32K312 * Project : RTD AUTOSAR 4.7 * Platform : CORTEXM * Peripheral : S32K3XX * Dependencies : none * * Autosar Version : 4.7.0 * Autosar Revision : ASR_REL_4_7_REV_0000 * Autosar Conf.Variant : * SW Version : 3.0.0 * Build Version : S32K3_RTD_3_0_0_D2303_ASR_REL_4_7_REV_0000_20230331 *************************************************************************************************

This example code brief :-- 1> Tested without the SL of BMS, so no dependency on the BMS Safety library. 2> Its tested on 2 AFE MC33775 board connected in TPL 3> Change following macro in mc33775_cfg.h file to change the numbers of AFE connected in TPL. RTD : 3.0.0 P07 BMS SDK : 1.0.2 This example does this task :-- Application Measurement. SYNC measurement Periodic Measurement. Read AFE temperature. Cell balancing timer method. Reading the Cell balancing status register & fault registers. =================== Setup used ============ Attached code is tested with TWO MC33775 AFE connected in TPL mode. =============== MCU Pins used =========== TPL1-TX :-- TPL1TXCSB --> PTC6/LPSPI0_PCS1 TPL1TXSCLK --> TPL12TXCLK --> PTE1/LPSPI0_SCK TPL1TXDATA --> TPL12TXDATA --> PTE2/LPSPI0_SOUT TPL1-RX :-- TPL1RXCSB --> PTB17/LPSPI1_PCS3 TPL1RXCLK --> PTB14/LPSPI1_SCK TPL1RXDATA --> PTB15/LPSPI1_SIN ================= EVB Link ================== https://www.nxp.com/design/design-center/development-boards-and-designs/18-cell-battery-pack-emulator-to-supply-mc33774-bcc-evbs:BATT-18EMULATOR https://www.nxp.com/design/design-center/development-boards-and-designs/analog-toolbox/evaluation-board-for-mc33664atl-isolated-network-high-speed-transceiver:FRDMDUALK3664EVB https://www.nxp.com/design/design-center/development-boards-and-designs/RD33775ADSTEVB https://www.nxp.com/design/design-center/development-boards-and-designs/automotive-development-platforms/s32k-mcu-platforms/s32k3x4evb-t172-evaluation-board-for-automotive-general-purpose:S32K3X4EVB-T172 ============= Using Debugger ============ Debugger breakpoint will cause the communication timeout at the AFE, which will RESET the AFE. To use the debugger while development you need to disable the communication timeout. In S32DS MEX file you cannot disable the timeout function ( limit the value of 0~255) Disable Communication timeout in code :-- ================= Results for FIRST AFE ===========================

S32K Knowledge Base

S32K Knowledge Base

Discussions

S32K118 : Internal Wakeup from VLPS mode using LPTMR0

Example MCAL S32K310 MEM_InFls DS3.5 RTD300

Example S32K144 CMP Windowed Mode use PDB S32DS3.4 RTM4.0.3

S32K312: RTC- Preserving RTC counter value from getting resets once after every wakeup

RTD Example FS26 WKUP with PGOOD and EXTWAKE using a S32K3X8EVB

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Example_S32K344_MCAL_MCU_ClockMonitor_v1_0_S32DS36_RTD600

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