S32K知识库

讨论

What is S32K1‘s IDLE feature: IDLE is set when the LPUART receive line becomes idle for a full character time after a period of activity.When CTRL[ILT] is cleared, the receiver starts counting idle bit times after the start bit. Why write this demo? Because the RTM driver does not support Lpuart's IDLE detect. What needs to be modified？ -1.add "UART_EVENT_DMA_IDLE = 0x04U" to “callbacks.h” -2 add "LPUART_DRV_RxIdleCallback" to ".lpuart_driver.c" -3 Define “LPUART_DRV_RxIdleCallback” function static void LPUART_DRV_RxIdleCallback(uint32_t instance) { DEV_ASSERT(instance < LPUART_INSTANCE_COUNT); LPUART_Type *base = s_lpuartBase[instance]; lpuart_state_t * lpuartState = (lpuart_state_t *)s_lpuartStatePtr[instance]; LPUART_ClearStatusFlag(base,LPUART_IDLE_LINE_DETECT); if(lpuartState->transferType == LPUART_USING_DMA) { lpuartState->rxSize = EDMA_DRV_GetRemainingMajorIterationsCount(lpuartState->rxDMAChannel); LPUART_DRV_StopRxDma(instance); lpuartState->rxCallback(lpuartState,UART_EVENT_DMA_IDLE,NULL);/*UART_EVENT_DMA_IDLE : 0x04*/ } } -4 add below code to "LPUART_DRV_IRQHandler" and be sure these code must be put before "LPUART_DRV_ErrIrqHandler(instance)" /* Handle idle line interrupt */ if (LPUART_GetIntMode(base, LPUART_INT_IDLE_LINE)) { if (LPUART_GetStatusFlag(base, LPUART_IDLE_LINE_DETECT)) { LPUART_DRV_RxIdleCallback(instance); } } -5 configure IDLE releated register in main function. LPUART1->CTRL |= LPUART_CTRL_ILT(1); LPUART1->CTRL |= LPUART_CTRL_IDLECFG(7); LPUART1->CTRL |= LPUART_CTRL_ILIE(1); Test environment： Hardware is base on S32K144EVB-Q100 Software is S32 Design Studio for Arm V 2.2 + RTM 3.0.X Demo Description： The baud rate of the serial port is set to 19200, and the function implemented is to send back the received data using DMA methods .

* ================================================================================================== Detailed Description: * This example shows how to implement the UART RX/TX using interrupt/callback under FreeRTOS. * LPUART6 is set for 115200, 8N1 using interrupt processing. Callback is called for single byte received. * Reception is advanced until buffer is full or "\n" is received. * 2 tasks (receive/send) and 1 Queue are created. * ReceiveTask starts new UART reception, waits for completion and puts received message into Queue. * SendTask gets the message from Queue, echoes it back and toggle pin (LED_PIN <-> PTA29). * ================================================================================================== * Test HW: S32K3x4EVB-T172 Rev B * MCU: S32K344_172HDQFP * Compiler: S32DS 3.6.2 * RTD release: S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0 * Debugger: On-Board Debugger (J41) * Target: Internal_FLASH * Serial: 115200, 8N1 * ================================================================================================== Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.

------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 * MCU: S32K344 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** Example S32K344 UART Transmit & Receive Using DMA DS3.5 RTD300 :-- Example S32K344 UART Transmit & Receive Using DMA DS3.5 RTD300 - NXP Community Example S32K344 UART Transmit & Receive Using Interrupt DS3.5 RTD300 :-- Example S32K344 UART Transmit & Receive Using Interrupt DS3.5 RTD300 - NXP Community

This is an example project which is created to do an internal wake up from VLPS mode using LPTMR0. From S32KRM, it tells us that internal wakeup is achievable using LPTMR0. What code does? ======================================= 1) LPTMR0 is configured for 5 Seconds. So for interrupt occurs for every 5 seconds 2)LPTMR0 wakes up MCU for every 5 seconds and again it goes back to sleep for next 5 seconds. This cycle repeats forever. 3) When MCU is in RUN mode, GREEN color LED will be ON and it will in OFF if it goes to VLPS. Project Configurations: ======================================= Other Informations: ======================================= Design studio: S32DS3.4 SDK : RTM 4.0.2 EVB : S32K118EVB2Q048 Note: Following symbols should be included if you are creating the project from scratch to properly put MCU to sleep and wakeup from POR. Thanks & regards, Krishnakumar V

******************************************************************************* The purpose of this demo application is to present a usage of the MEM_InFls MCAL Driver for the S32K3x1 MCU. The example uses MEM_InFls driver to write 128 bytes to FLASH memory address 0x47_A000 starting of FLS_CODE_ARRAY_0_BLOCK_0_S61. ------------------------------------------------------------------------------ * MCU: S32K310 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Flash end address = 0x480000 Size of each block = 8192 = 0x2000 Start Address of 63 block = 0x480000 - 0x2000 = 0x47E000 = 4710400 Start Address of 62 block = 0x480000 - 0x4000 = 0x47C000 = 4702208 Start Address of 61 block = 0x480000 - 0x6000 = 0x47A000 = 4694016 Ram location where FLASH writing erase code is placed :-- I placed the code at 0x256 byte below the MAX address of the RAM size 16*1024 = 16384 = 0x4000 End of RAM = 0x20400000 + 0x4000 = 0x20404000 0x20404000 - 0x256 = 0x20403DAA 0x20403DAA = 541081002 Size of RAM need to save the flashing routine, as per the MAP & linker file :-- 0x00407b80 - 0x00407b54 = 0x2C = 44 byte S32K3 FLASH Memory Terminology :--

*************************************************************************************************************** Detailed Description: Example shows implementation of Analog Comparator ‘45.7.5 Windowed mode (#s 5A & 5B)’ of S32K1XXRM using S32 SDK API. The Comparator is configured to compare analog input 0(AIN0) with half the reference voltage generated with the internal DAC. PDB is used to generate pulse output which is used as sampling windows of CMP block via TRGMUX. PDB period is 5ms, the first 2.5ms WINDOW=1 and the next 2.5ms WINDOW=0. Pdb0PulseOut not only be TRGMUX to Cmp0Sample but also to TrgmuxOut0, so that we are able to observe WINDOW at TRGMUX_OUT0(PTA1) pin. Based on the input from CMP0_IN0 (1kHz external triangle wave) the LEDs light by the following rules: 1) Vin < DAC voltage : RED on, GREEN off 2) Vin > DAC voltage : RED off, GREEN on 3) Unknown state : RED on, GREEN on EVB connection: Signal Function pin S32K144EVB-Q100 WINDOW TRGMUX_OUT0 PTA1 J5.5 2.5ms WINDOW=1 and 2.5ms WINDOW=0 Plus input CMP0_IN0 PTA0 J5.7 Need to connect external 1khz triangle wave COUTA CMP0_OUT PTE3 J1.16 square wave PTC1 PTC1 J5.13 If there is no external triangle wave, a square wave(PTC1) is generated and output to CMP0 (PTA1) * * ------------------------------------------------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: S32K144UAVLL 0N47T * Target: Debug_FLASH * Compiler: S32DS3.4 * SDK release: S32SDK_S32K1XX_RTM_4.0.3 * Debugger: PEMicro OpenSDA * ------------------------------------------------------------------------------------------------------------------------ Revision History: Ver Date Author Description of Changes 1.0 Nov-9-2023 Robin Shen Initial version, based on cmp_dac_s32k144 and pdb_periodic_interrupt_s32k144 ***************************************************************************************************************

******************************************************************************* The purpose of this demo application is to present a usage of the LPSPI IP Driver for the S32K3xx MCU. The example uses LPSPI2 for transmit & receive Twelve bytes using the DMA. This above mentioned operation is performed 10 times continuously MOSI MISO connected on Hardware in loopback. ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** For S32K312, please use this correct clock HSE to AIPS clock should be ½. Please make these changes in the below all example code clock setting. HSE clock to 60 MHZ. Use this MACRO to enable disable the non cacheable region variable placement :--

This post presents two complementary FlexCAN communication examples for the S32K3X4EVB-T172 evaluation board, showcasing both low-level IP layer and AUTOSAR MCAL layer implementations. These examples are basic routines for configuring the component in normal/user mode, as the RTD examples are configured for loopback mode. To test CAN communication, another board or a CAN analyzer must be used. ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 * MCU: S32K344 * Compiler: S32DS 3.6.2 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH ------------------------------------------------------------------------------ Example 1: FlexCAN IP Layer This project demonstrates a basic FlexCAN setup using the IP-level driver. It configures a standard CAN message; with transmission through polling and reception using interrupts. The TJA1153 transceiver is initialized through a custom configuration sequence. An ACK message is sent upon each reception. The GREEN LED toggles every 10 received messages. Message buffer is configured to accept STD ID 0x123 with FlexCAN_Ip_SetRxIndividualMask() & FlexCAN_Ip_ConfigRxMb() . Example 2: FlexCAN MCAL Layer This project uses the AUTOSAR MCAL stack, leveraging Can_43_FLEXCAN and CanIf modules for CAN communication. Transmission is done via polling, while reception is configured via interrupts. STD ID is set to 0x123, and acceptance mask is set to 0x0 (accept all IDs). The same TJA1153 transceiver is used. CAN messages are sent and received using CanIf callbacks. The GREEN LED toggles every 10 received messages. TJA1153 is used in both examples with macros TJA1153 & TJA1153_EVB_TRCV respectively. If not defined, standard transceiver initialization is done (CAN0_STB & CAN0_EN pins set to HIGH). These examples are provided as is with no guarantees and no support. These are basic routines meant to be used as reference only.

------------------------------------------------------------------------------ * Test HW: S32K31XEVB-Q100 * MCU: S32K311 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** S32K31XEVB-Q100 :-- S32K31XEVB-Q100 Evaluation Board for Automotive General Purpose | NXP Semiconductors Example MCAL S32K311 MEM_InFls DS3.5 RTD300 :-- Example MCAL S32K311 MEM_InFls DS3.5 RTD300 - NXP Community

This simple example demonstrates how to configure and handle UART interrupts using the LPUART module on the S32K312-EVB. It sets up a UART callback function and initiates reception in single-byte mode. After each byte is received, the buffer is updated using Lpuart_Uart_Ip_SetRxBuffer() , unless a newline character ( '\n' ) is detected, in which case a reception flag is set to signal the main loop. When the LPUART_UART_IP_EVENT_END_TRANSFER event occurs, reception is re-enabled using Lpuart_Uart_Ip_AsyncReceive() . Only basic event handling is implemented; other UART events are acknowledged but not processed. The example uses LPUART instance 6, enabling serial communication via the USB port (J40) on the S32K312-EVB. If using TeraTerm, ensure the transmit setting is configured to LF (Line Feed) to properly send newline characters when pressing Enter. ------------------------------------------------------------------------------ * Test HW: S32K312EVB-Q172 * MCU: S32K312 * IDE: S32DS3.6.2 * RTD release: 6.0.0 * Debugger: PE Micro * Target: internal_FLASH ------------------------------------------------------------------------------ Test result:

******************************************************************************* The purpose of this demo application is to present a usage of the FS26 watchdog timer refresh using the SBC_FS26 CDD ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * FS26 : CDD 2.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Please Modify attached code, and add this line of code, in this function Sbc_Wdg_Refresh_Notification :-- Gpt_StopTimer(GptConf_GptChannelConfiguration_GptChannelConfiguration_0); This change will make the example work for even starting FS26, driver at 6 msec and above. Watchdog type :-- NXP eval boards has ASIL-D FS26 part with challenger watchdog. The OTP of FS26 on the board uses challenger watchdog. Change watchdog in code :-- FS26 watchdog is started in disabled mode (means infinite period). Later on we change the watchdog time in the code :-- Array Index for watchdog refresh timing :-- Example will run once you press switch USER_SW0 connected on PTB26 on the Evaluation board :-- Please add this type of check in your code, during development process so that, avoid any error due to FS26 watchdog mis trigger. When you use Debug FLASH then in that case code goes to flash memory & can cause your MCU to frequent RESET, which caused issue for reprogramming the NEW firmware on the board FLASH memory. If we add this type of check then we can avoid the Faulty FS26 Software to stop misbehaving before flashing new firmware on the board. In CDD-2.0.0, FS26 goes to INIT_FS state here :--- Sbc_fs26_InitDevice() --> Sbc_fs26_CheckStateAndGotoInitFS() In CDD-2.0.0, If we start the Watchdog in enabled mode, watchdog notification function to refresh watchdog is called from this function :-- Sbc_fs26_InitDevice() --> Sbc_fs26_NormalFSSequence() --> In CDD 2.0.0, Following function call will exit Debug mode & Release FS0b & FS1B pin :-- Sbc_fs26_InitDevice() --> Sbc_fs26_NormalFSSequence() :--- --> Sbc_fs26_ExitDebugMode() --> Sbc_fs26_ReleaseSequence() In CDD 2.0.1, Following function call will exit Debug mode & Release FS0b & FS1B pin :-- Sbc_fs26_InitDevice() --> Sbc_fs26_NormalFSSequence() --> Sbc_fs26_ExitDebugMode() ===================== CDD-2.0.1 example ================= RTD used :-- S32K3XX_AASW_4_7_RTM_FS26_2_0_1_DS_updatesite_2311_signed.zip Watchdog started in the Disabled mode (i.e infinite Period) then watchdog period is changed in the code main() function :-- Driver configuration :-- These function get executed :-- One bug in RTD ---> S32K3XX_AASW_4_7_RTM_FS26_2_0_1_DS_updatesite_2311_signed.zip :-- RTD driver Bug is corrected like this :--

Hi team, First let me explain about the code about what it does. ======================================= 1) From POR, LED starts blinking - In this state RTC won't be initialized. 2) Once SW5 is pressed in S32K312 EVB - RTC will be initialized before MCU goes to sleep. 3) RTCCNT will be incrementing during sleep 4) Once SW6 is pressed , MCU wakes from the sleep and we could able see the updated RTC time and date. WAR(Work Around)done to keep RTC alive during sleep: ======================================= Tried to test the RTC with sleep mode, observed that RTCCNT value is getting reset once after every wakeup. So that time and date was not able to preserve the value. In order to avoid this, I have done two workarounds to solve this RTCCNT value reset issue. 1) RTC will not be initialized for if MCU wakeup from the sleep - Made the check to initialize when MCU is not from the wakeup before it goes to sleep. wake_up_event will be incremented if MCU reset reason is wakeup as shown below. 2) Updating "Rtc_Ip_u32ChState" array variable for "ticksPerSecond" member in "Rtc_Ip.c" file manually after the code generation is completed. Note: With auto generated code the value of "ticksPerSecond "will be "0". Any other alternatives other than this approach is highly appreciated. Thanks in advance!

*********************************************************************************** * Detailed Description: * C40_Ip driver is moved to SRAM in files: C40_Ip.h, SchM_Mem_43_INFLS.h * The function that launches the C40_Ip APIs from main() is also placed in the SRAM. * Check the addresses of the APIs in the .map file. * ------------------------------------------------------------------------------ * Test HW: : S32K312EVB-Q172 * MCU: : S32K312 * Project : RTD AUTOSAR 4.7 * Platform : CORTEXM * Peripheral : S32K3XX * Dependencies : none * * Autosar Version : 4.7.0 * Autosar Revision : ASR_REL_4_7_REV_0000 * Autosar Conf.Variant : * SW Version : S32DS 3.5, RTD 5.0.0 * Build Version : S32K3_RTD_5_0_0_D2408_ASR_REL_4_7_REV_0000_20241002 ***********************************************************************************

The following article is intended to give an example on the use of the FS26 in standby mode with the S32K3 MCU also in standby to get lower consumptions on costumer designs and waking up both through an external wake (EXTWAKE) and the PGOOD SBC signal. Software requirements: The attached codes uses the following SW requirements: S32K3 RTD 4.0.0 HF02 FS26 SBC RTD 3.0.0 HW Requirements: There are a few reworks needed on the EVB in order to make the code work. S32K3X8EVB-Q289 Rev B2: 1.- Remove resistor R2301 and place R2304 instead, this change is because the PTA8 signal has the EXTWAKE option on the user push-button, this allows that when you send a WKPU request from the MCU (with the push-button) what the MCU does when it has PGOOD activated is that it sends an EXTWAKE signal to WAKE1 of the FS26. 2.- Change the J685 jumper position to 2-3, this jumper is the VDEBUG mode. 3*.- Optional: FS26 DS recommend FCCU lines with certain values of resistors on their lines that are not present by default on the S32K3X8EVB-Q289. I've attached the example program on a ZIP file, hope it helps.

*********************************************************************************** * Detailed Description: * The example locks * PFC PFCBLK2_SSPELOCK REG_PROT soft lock * and PFC REG_PROT hard lock. * ------------------------------------------------------------------------- * Test HW: : S32K344EVB-Q172 * MCU: : S32K344 * Project : RTD AUTOSAR 4.7 * Platform : CORTEXM * Peripheral : S32K3XX * Dependencies : none * * Autosar Version : 4.7.0 * Autosar Revision : ASR_REL_4_7_REV_0000 * SW Version : 5.0.0 * Build Version : S32K3_RTD_5_0_0_D2408_ASR_REL_4_7_REV_0000_20241002 ***********************************************************************************

************************************************************************************************* * Detailed Description: * DCF record disables or enables POR_WDG depending on the POR_WDG_EN macro in main.c. * Find first available location in UTEST, by default, first available address is 0x1B000780 * * NOTE: There is a bug in this RTD version. * Change FLS_MAX_VIRTUAL_SECTOR to 272 in C40_Ip_Cfg.h * ------------------------------------------------------------------------------ * Test HW: : S32K312EVB-Q172 * MCU: : S32K312 * Project : RTD AUTOSAR 4.7 * Platform : CORTEXM * Peripheral : S32K3XX * Dependencies : none * * Autosar Version : 4.7.0 * Autosar Revision : ASR_REL_4_7_REV_0000 * Autosar Conf.Variant : * SW Version : 3.0.0 * Build Version : S32K3_RTD_3_0_0_D2303_ASR_REL_4_7_REV_0000_20230331 *************************************************************************************************

******************************************************************************** * Detailed Description: * The S32K144 MCU is configured as a LIN Slave node. * When a MasterReq frame (0x3C) is received with Go-to-sleep command, the stack goes to sleep. * The application can read: * l_flg_tst_LI0_MasterReq_flag() * l_ifc_read_status(LI0) * When a falling edge is detected on the LPUART RX pin, * LinWakeUpTimerNotification() is called. * The notification has to be enabled in MEX. * Gpt (LPIT) timer is used to calculated the length of the wake-up signal. * * ------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: S32K144 * Debugger: S32DS_ARM_3.6, S32K1_RTD_3_0_0_D2503 * Target: internal_FLASH ******************************************************************************** Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.

特色文章

The S32K3 family of 32-bit AEC-Q100 qualified MCUs combines a scalable family of Arm® Cortex-M7-based microcontrollers built on long-lasting features with a comprehensive suite of production-grade tools. S32K3 MCUs are included in NXP’s Product Longevity Program, guaranteeing a minimum of 15 years of assured supply. The S32K3 offers dedicated peripherals set for rapid motor control loop implementation: enhanced Modular IO Subsystem(eMIOS), Logic Control Unit (LCU), TRGMUX, BodyCross-triggering Unit (BCTU), Analog to Digital Converter(ADC), and Analog Comparator (CMP). The comprehensive motor control ecosystem based on Automotive Math and Motor Control Library(AMMCLib) set, FreeMASTER with Motor Control ApplicationTuning (MCAT) tool and Model-Based Design Toolbox (MBDT) helps to enable S32K3 MCU in wide range of motor control use cases. The table below points to the articles with more detailed description each of S32K3 motor control use cases, hardware description, links to appropriate application notes and their addendums, and software repositories. Device HW Article S32K344 MCSPTE1AK344 12 V development kit engineered for 3-phase PMSM and BLDC motor control applications FOC with dual shunt current measurement Article focuses on solution based Field Oriented Control (FOC) technique (typically used for 3-phase PMSM motors) with dual shunt current measurement and without any position sensor (sensorless). The Encoder sensor is supported by SW option, but missing on HW kit. The available example codes covers both ANSI-C and Matlab Simulink approaches and uses RTD drivers with high-level Autosar compliant API or low-level non-Autosar API. FOC with single shunt current measurement Article focuses on solution based Field Oriented Control (FOC) technique (typically used for 3-phase PMSM motors) with single shunt current measurement and without any position sensor (sensorless). The Encoder sensor is supported by SW option, but missing on HW kit. The single shunt current measurement is advanced technique that allows decrese the cost of Bill of Material (BOM). The available example codes covers both ANSI-C and Matlab Simulink approaches and uses RTD drivers with high-level Autosar compliant API or low-level non-Autosar API. FOC integrated with FreeRTOS Article focuses on integration of motor control software (based on FOC with dual shunt current measurement) and Real Time Operating System (FreeRTOS). The available example code is based ANSI-C code and uses RTD drivers with low-level non-Autosar API. Six-step commutation control. Article focuses on solution based Six-step commutation (6-step) technique (typically used for 3-phase BLDC motors) with Hall position sensor and without any position sensor (sensorless). The available example codes covers both ANSI-C and Matlab Simulink approaches and uses RTD drivers with low-level non-Autosar API. Note: the list of use cases cannot cover all combinations of MCU, current measurement scenario, control technique and sensor inputs, but should work as a base reference for most common configurations. This list is not final, please follow this acticle to be notified about updates with new use cases.

S32K知识库

S32K Knowledge Base

讨论

S32K1xx Lpuart IDLE detected with DMA transfer

Example S32K344 LPUART RX/TX ISR FreeRTOS S32DS36 RTD600

Example S32K312 SPI Transmit & Receive Using Polling DS3.5 RTD300

All Example S32K344 DS3.5 RTD-3.0.0

S32K118 : Internal Wakeup from VLPS mode using LPTMR0

Example MCAL S32K310 MEM_InFls DS3.5 RTD300

Example S32K144 CMP Windowed Mode use PDB S32DS3.4 RTM4.0.3

Example S32K312 Continuous SPI Transmit & Receive Using DMA DS3.5 RTD300

[RTD600 MCAL & IP] S32K3X4EVB-T172 FlexCAN Example Interrupt/Polling

All Example MCAL S32K310 DS3.5 RTD-3.0.0

All Example MCAL S32K311 DS3.5 RTD-3.0.0

AUT-T4984 Hands-On Workshop Battery Management System Software Stack, Installation procedure

[RTD600 IP] S32K312-EVB Lpuart interrupt echo

S32K312 : FS26 Watchdog trigger using the SBC_FS26 CDD

S32K312: RTC- Preserving RTC counter value from getting resets once after every wakeup

S32K312_C40_Ip_SRAM_RTD_500_DS35

RTD Example FS26 WKUP with PGOOD and EXTWAKE using a S32K3X8EVB

Example_Reg_Prot_Flash_Controller_S32K344

Example_S32K312_DCF_POR_WDG_EN_DS35_RTD300

S32K144 LIN Go-to-Sleep, Wake-up

S32K3 Motor control SW examples