S32K Knowledge Base

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******************************************************************************** The purpose of this demo application is to show you the usage of the FlexCAN module configured to use CAN FD and Enhance RXFIFO using the S32 RTD API. - This demo application requires two boards, or single board connected with CAN tool. - CAN FD is enabled with bitrate 500/2000 kbps - MB0 is configured to transmit either std. or ext ID - MB1 is configured to receive ext ID 0xFACE and MB2 to receive std ID 0x1 - Enhanced RXFIFO is enabled and 3 enhanced RXFIFO filter elements (filter + mask scheme) are defined ext ID 0xABCD with mask 0x1FFFFFFF std ID 0x123 with mask 0x7FF std ID 0x456 with mask 0x7FF - Callback function is used as well to handle TX and RX process in MBs and Enhanced RXFIFO - setupCanXCVR function can be called if TJA1153 is used on the board. It expects transceiver in Vanilla state and set TPL to pass all std and ext ID and do not block any message comming from bus. Finally leaving configuration mode without writing to non-volatile memory nor locking the transceiver. * * ------------------------------------------------------------------------------ * Test HW: S32K3444EVB-Q172 * MCU: PS32K344EHVPBS 1P55A * Compiler: S32DS.ARM.3.4 * SDK release: SW32K3_RTD_4_4_2_0_0_D2203 * Debugger: Lauterbach * Target: internal_FLASH * ********************************************************************************

Hi all, Recently, we completed S32K Sound Mixer reference code and demo, and glad to share this demo at here. Some key feature of this demo: - Demo HW based on S32K344/S32K148 + audio codec SGTL5000 + QSPI flash MX25L6433. - Demo SW based on S32K3 RTD RTM 2.0.0 and S32K1 RTD RTM 1.0.0. - Demo provided 2 kinds of sound mixing algorithm realization code, and corresponding audio materials and codec SGTL5000 driver. - Demo showed how to programming QSPI flash and its AHB accessing via audio storage and playing process. - Demo used mono audio as source for processing, and output stereo audio (I2S format) via SAI HW FIFO combine (Line_Mux) function with nearly no extra cost. HMI/Cluster apps need multiple audio sources (usually warning sounds) be played simultaneously, which brings sound mixing ability requirement. However, S32K1/3 lack of this HW/SW feature support. With the demand from local key customer, and considering potential customer requirements, we planned to enable a SW sound mixer with scheduled peripherals, to enhance the S32K family audio mixing ability. It shall be easy of using/porting on S32K1/3, and use QSPI flash (AHB mode read) to store the music. Attachment the Sound Mixer package includes 2 sound mixing examples based on S32K344 EVB and S32K148 T-Box RDB, and some slides to introduce this implementation and quick start guide. Thanks and welcome any comment from you. Best Regards, Shuailin Li

Symptoms Recently found the compatibility issue is a troublesome problem especially when we are supporting different version of RTD. Remove/install the RTD SDK and plug, but it is not a perfect way because reinstall the RTD would cause a lot of time, sometimes it is unreliable. Diagnosis After investigated the mechanism of CT and MEX file, and found a work around to let the old project can be run in new version of RTD basis. Solution Already tested it with several reference code and examples of RTD, it can work. Attached is the document.

******************************************************************************* * * The purpose of this demo application is to present a usage of the ADC_SAR and * BCTU IP Driver for the S32K3xx MCU. * * The example uses the PIT0 trigger to trigger BCTU conversion list. Five standard * ADC channels are selected to be converted. * Converted result from BCTU data register are moved by DMA into result array. * This result array should be placed into no cacheable area if data cache is enabled. * * ADC channel S10 is connected to board's potentiometer, and converted value is * used to dim board's LED. * * * ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K344 * Compiler: S32DS3.4 * SDK release: RTD 1.0.0 * Debugger: Lauterbach * Target: internal_FLASH ********************************************************************************

Hi, Firstly, you should get the flash block size of your S32K3xx. Table in RM could be the reference. Secondly, you should know that there are super sector and sector in S32K3xx. Sector Subdivision of the Flash Block that is independently erasable. Sector Size is always 8 KB. Super sector Subdivision of the flash block that includes a group of sectors. Super Sector Size is always 64 KB, and consists of 8 sectors. Thirdly, based on the information of PFCBLKx_SSPELOCK in RM, you can calculate the numbers of super sector and sector in each flash block. For example in S32K312, it has 2MB flash totally and each block is 1MB. So, in each 1MB, its first 768KB is with super sector granularity. The numbers of super sector is 768/64=12; the followed sector number is 256/8=32. Cheers! Oliver

******************************************************************************** * Detailed Description: * * Example shows possible setting for PWM duty cycle update using DMA. * FTM0 ch0 is set to Edge aligned mode with 20KHz period. * Initialization trigger is routed back to HW trigger 1 using TRGMUX, so this HW * trigger can be used for CnV synchronization. * DMA on FTM0 ch0 is enabled (on ch0 CHF flag) and DMA ch0 configured to update C0V * from duty cycle variable. * NOte CHF is not set for 0% and 100% duty cycle, thus no DMA trigger is generated. * * Green LED is dimming as duty is changing. * * ------------------------------------------------------------------------------ * Test HW: S32K118EVB-Q64 * MCU: PS32K118LAMLH 0N97V * Compiler: S32DS.ARM.2.2 * SDK release: S32SDK_S32K1xx_RTM_3.0.3 * Debugger: Lauterbach, OpenSDA * Target: internal_FLASH * ******************************************************************************** Revision History: 1.0 Sep-16-2021 Petr Stancik Initial Version *******************************************************************************/

The purpose of this demo application is to show you the usage of the FlexCAN module configured to use Flexible Data Rate using the S32 SDK API. - In the first part, the application will setup the board clocks, pins and other system functions such as SBC if the board uses this module as a CAN transceiver. - Then it will configure the FlexCAN module features such as FD, Bitrate and Message buffers - The application will wait for frames to be received on the configured message buffer or for an event raised by pressing one of the two buttons which will trigger a frame send to the recipient. - Pressing SW3 button of board 1 shall trigger a CAN transfer that results in toggling the RED led on board 2. - Pressing SW2 button of board 1 shall trigger a CAN transfer that results in toggling the GREEN led on board 2. - This demo application requires two boards, one configured as master and the other one configured as slave (see MASTER/SLAVE defines in application code) or single board connected with CAN tool. - Both the event and error callbacks are installed, callback_test variable indicates event entering bit0 .. RX complete bit1 .. TX complete bit2 .. ERR INT flag set bit3 .. BOFF INT flag set - to enter bus off simply short CANH with GND and send message using either SW1 or SW2, FlexCAN enters bus off (error event) and blue LED is ON. Also TX MB is aborted. Remove short connection and send message again normally, blue LED is off. ------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: FS32K1441 0N57U * Compiler: S32DS.ARM.2.2 * SDK release: S32SDK_S32K1xx_RTM_3.0.3 * Debugger: Lauterbach, OpenSDA * Target: internal_FLASH

******************************************************************************** * File: main.c * Owner: David Tosenovjan * Version: 0.0 * Date: Mar-12-2021 * Classification: General Business Information ******************************************************************************** * Detailed Description: * Example code configures the whole 4kB FlexRAM area for SRAM use. * By default or after mass erase, S32K1 device has only address range * 0x1400_0000-0x1400_0DFF (3.5kB) accessible for SRAM use. * To enable remaining 0.5kB it is needed to perform Program Partition Command * (with the setting shown in the example), but only once with the blank new * device (or previously mass erased). It sets up address range * 0x1400_0000-0x1400_0FFF for SRAM use. * ------------------------------------------------------------------------------ * Test HW: S32K146EVB-Q144 * MCU: PS32K146UAVLQ 0N73V QAC1735D * Fsys: default * Debugger: Lauterbach Trace32, OpenSDA * Target: Debug_RAM * Terminal: none * EVB connection: default ********************************************************************************

******************************************************************************** Detailed Description: This example shows SRAM ECC injection. By default, a double-bit ECC error is injected on read access of a location in SRAM_U region. This can be changed with the SRAM_U and DOUBLE_BIT macros. The errors can be detected by both the ERM and MCM modules and the corresponding interrupts can be called. Although only ERM is needed, for demonstration purposes, the MCM interrupt is enabled as well with a lower priority than the ERM interrupts. The ERM interrupts that are called first disable the injection mechanism so that subsequent errors can not be detected during a stack read access. The default S32 Design Studio start_up file copies the vector table to the SRAM_L region. To be able to inject ECC errors in this SRAM region and call the interrupts, the copying is disabled by __flash_vector_table__ symbol declared in the start_up.h file and defined in the S32K144_64_flash linker file. -------------------------------------------------------------------------------------------- Test HW: S32K144EVB-Q100 MCU: S32K144 0N57U Debugger: S32DSR1 Target: internal_FLASH ********************************************************************************

******************************************************************************************************* Detailed Description: Configures the MCU to run system clock from XOSC. LPUART1 is set to respond to LIN header sent from master. Based on ID received the LPUART1 either receive frame's data and compare checksum or publish requested data with calculated checksum. Enhanced checksum is used. Interrupt is used for RX and TX operation and 2 versions of interrupt routine are available. VER 1 ... during response transmission receiver disabled and transmit interrupt enabled VER 2 ... during response transmission receiver is kept enabled ------------------------------------------------------------------------------ Test HW: S32K116 EVB-Q048 MCU: PS32K116LAM 0N96V Fsys: 40MHz Debugger: Lauterbach Target: internal_FLASH ******************************************************************************************************

S32Kxxx Excel configurators MPC5xxx/S32Kxx: CAN / CAN FD bit timing calculation S32K1/S32M24x Documents Solution for S32K14x which could be attached while couldn't be re-programmed Fault handling on S32K144 FRDM-S32K144 EVB Useful tips about S32DS for ARM v2018.R1 IDE and S32K1xx development Using S32K CMSIS-SVD Files in EmbSysRegView Eclipse Plugin FlexNVM used as code/data Flash S32K3/S32M27x Excel configurators S32K344 DCF Configurator Debugger plugins Lauterbach FCCU_Utility plugin - S32K3xx Documents Restrict the debug access with a password when HSE is not used S32K3/S32M27x – eMIOS Usage S32K3/S32M27x – eMIOS/BTCU/ADC/DMA – [RTD600] S32K3/S32M27x – eMIOS/TRGMUX/LCU – [RTD600] S32K39-37-36 Documents S32K39-37-36 – eMIOS/BTCU/SAR-ADC/DMA – [RTD600] S32K39-37-36 – eFlexPWM/TRGMUX/BCTU/SAR-ADC/DMA – [RTD600]

******************************************************************************************************************************************** Detailed Description: This example shows use of RTC in VLPS mode. The MCU is put into the VLPS mode (Sleep-On-Exit). RTC alarm interrupt brings it to VLPR every 3s and toggles BLUE LED (PTD0). Since it works in the Sleep-On-Exit mode, after the ISR, the MCU goes to VLPS again without calling the WFI instruction. When BTN0 (S32K144 EVB) is pressed, the power mode switch from VLPS to VLPR and other way round. Interrupt is triggered on rising edge (PTC12), filtered by digital filter (clocked from LPO). In VLPR, RTC seconds interrupt is enabled as well and toggles RED LED (PTD15) in the ISR. RTC_CLKOUT (1Hz) and CLKOUT (bus_clk) can be monitored at PTD13 and PTD14 respectively. CLKOUT is not available in VLPS. The MCU needs to be power-cycled and run stand-alone. -------------------------------------------------------------------------------------------------------------------------------------------------------------------- Test HW: S32K144EVB-Q100 MCU: S32K 0N57U Debugger: S32DS_ARM_2.2, OpenSDA Target: internal_FLASH ********************************************************************************************************************************************

Welcome to the S32K Microcontrollers forum. Get expert advice from the NXP developer community. Our support team also monitors these forums to provide answers and take your feedback. Anyone can read the discussions, but only registered NXP Community members can post questions and comments. Before you ask a question, please search the community to find if someone has already offered a solution. If you don’t see a solution, then ask the community your question. S32K Web page S32K Reference manual S32K Data sheet S32K Application notes and other documents S32K Evaluation Board S32 Design Studio IDE https://community.nxp.com/docs/DOC-334170

******************************************************************************** Detailed Description: Example shows how to use FlexCAN 0 Pretended networking mode to allow FlexCAN module to wake up MCU from STOP mode using SDK. Wake up by Timeout and wake up by Match events are enabled. Also pin interrupt can be used to exit STOP mode. So MCU enters STOP mode by pressing SW3 button. MCU exits STOP mode when one of following happens: - no CAN message comes in 8sec (CAN PN timeout event) - message with standard ID 0x554 or 0x555 comes (CAN PN match event) - SW2 button is pressed (PTC12 interrupt) In run mode blue LED is dimming and the rate is different for each wakeup event ------------------------------------------------------------------------------ Test HW: S32K116EVB-Q48 MCU: PS32K116LAM 0N96V Compiler: S32DS.ARM.2.2 SDK release: S32SDK_S32K1xx_RTM_3.0.0 Debugger: Lauterbach, OpenSDA Target: internal_FLASH ********************************************************************************

******************************************************************************************** * Detailed Description: * LPIT_ch0 triggers DMA_ch0 periodically (1ms). * Every trigger starts a minor DMA loop (8 bytes) transfer to the LPSPI1 TX FIFO. * There are 8 minor loops per one major loop (64 bytes in 8ms). * LPSPI1 sends two 32bit frames every 1ms. * LPSPI1 RX data are masked, they are not stored in the RX FIFO. * ------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: S32K144 0N57U * Debugger: S32DS 2.2, OpenSDA * Target: internal_FLASH ********************************************************************************************

S32K Knowledge Base

S32K Knowledge Base

Discussions

Example S32K344 FlexCAN_Ip TX/RX/EnhanceRXFIFO test S32DS3.4 RTD200

S32K Sound Mixer

Investigated the mechanism of CT vs MEX file and workaround/MEX文件研究与RTD版本兼容性方案

S32K3_OTA_AB_SWAP_Demostration

Notice for Upgrade K3 RTD from 1.0 to 2.0

Example S32K344 PIT BTCU ADC DMA DS3.4 RTD100

How to find the sector number of each flash block in S32K3 family

Example S32K118 FTM PWM DMA S32DS 2.2

Example S32K144 FlexCAN TX/RX/Error ISR test S32DS2.2

Example S32K146-Set_whole_FlexRAM-as_RAM v0_0 S32DS.ARM.2.2

Example S32K14x SRAM ECC Injection

Example S32K116 LPUART LIN Slave TXRX ISR S32DS.ARM.2.2

SENT receiver for S32K118 Design Studio

S32K144 ISELED + Touch Sensor Demo

S32K/S32M – Documents & Tools

Example S32K144 RTC VLPS

S32K Launched!

S32K LPUART hardware flow control

Example S32K116 FlexCAN PN STOP S32DS.ARM.2.2

Example S32K144 LPIT DMA LPSPI

S32K3 Motor control SW examples