Hi Everyone, Here I'd like to share three S32K1xx SDK FlexCAN PD and PAL component sample projects to demonstrate its basic and advanced features: 1. S32K144_CAN_PAL_SamplePrj_Basic_TxRx_ID_FiltersConfig_SDKRTM3P0 Functions implementation key points and tips: This sample project is made to demonstrate the following S32K1xx FlexCAN features with SDK FlexCAN PAL driver: 1. Configure to receiver the following exact 16 standard ID CAN message with RxFIFO 8x ID filter table with format type-B(2x 16-bit ID) Standard ID: 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x111, 0x222, 0x333, 0x444, 0x555, 0x666, 0x777, 0x788 The RxFIFO is configured to use CPU interrupt for CAN message receive, and CAN_PAL cannot support DMA for RxFIFO directly. Note: A. FlexCAN of S32K1xx dose not support to receive CAN-FD message frame with RxFIFO, so no CAN-FD support in this demo project. B. All the filter table elements must be configured to contain only standard or extend ID, if it contains both standard and extend ID, the IDE-bit mask will be ignored.  C. After RxFIFO enabled, MB0~MB5 is used as the RX FIFO, at least MB6~MB7 are used as the ID filter table(to store the acceptance ID), the actual available MB number is determined by RxFIFO ID filter table size, details please refer to section--55.4.6 Rx FIFO structure of S32K1xx RM Rev.12.1  2. Configure two extra individual MBs to receive: RX_MB1: 16 standard ID CAN 2.0 message with the lower 4LSB masked(mask=0x7F0, acceptance ID = 0x123): 0x120 ~ 0x12F and  RX_MB2: 4 standard ID CAN 2.0 message with the ID8 and ID9 masked(mask=0x4FF, acceptance ID = 0x256): 0x056, 0x156, 0x256 and 0x356 Both the RxFIFO and individual MBs RX use non-blocking receive method/API with MB TX/RX complete ISR callback installed to set a new circle buffer for next message frame receive 3. Configure one individual MB to blocking transmit a standard CAN 2.0 message with ID = 0x100 periodically(period = 5ms), and also send back the received CAN messages(if it's available) to the CAN bus as a response. 4. Provide the FlexCAN bus-off manual recovery configuration API and interrupt ISR callback codes for reference, changing the macro CAN_BUSOFF_RECOVERY_MANUAL(in include/Config.h) to select the bus off recovery method(enable the macro definition: manual recovery, comment the macro definition: automatic recovery); Note: In this sample project, the macro CAN_BUSOFF_RECOVERY_MANUA is commented by default, so manual recovery codes does not work. To make the bus-off recovery callback work, user should replace the flexcan PD driver codes and S32K144_feature.h with S32K1xx RTM 4.0.0(which can be downloaded from nxp.com with registered account login and then installed stand-alone or installed via S32DS v3.3 IDE update). This is not done this sample project!!!  5. There 3 on-board RGB LED are used to indicate the FlexCAN working status: red RGB LED will be toggled after RXFIFO received a CAN message; blue RGB LED will be toggled after individual MB received a CAN message; green RGB LED will be turn ON after enter bus-off and turn OFF after exist bus-off(recover successfully). To run this sample project, the following HW and SW require: SW: S32DS for ARM v2.2 IDE with S32K1xx SDK RTM 3.0.3 installation HW: S32K144EVB-Q100 Rev.C with a DC-12V adapter for its power supply by J16 and a USB-to-CAN adapter(such as PEAK CAN) to connect PC with J13 of the EVB 2.S32K144_CAN_PAL_CANFD_ClassicCAN_Mix_TxRx_Wakeup_SDKRTM3P0 Functions implementation key points and tips: This sample project is made to demonstrate the following S32K1xx FlexCAN features with SDK FlexCAN PAL driver: 1. Configure to enable CAN-FD with 500 Kbit/s arbitration phase bitrate and 2Mbit/s data phase bitrate, so it can support both classic CAN 2.0 A/B and CAn-FD message frame transfer. Note: A. The RxFIFO is disabled to work with CAN-FD message frame. B. After CAN-FD enabled, CAN-FD message frame data length can support up to 64 Bytes, so the actual available MB number is determined by the max frame data length need to support, details please refer to section--55.4.5 FlexCAN message buffer memory map of S32K1xx RM Rev.12.1  C. In order to support bitrate bigger than 1Mbit/s for CAN-FD data phase with bitrate switch enabed, PE clock source of CAN_PAL should be configured to use peripheral clock(80MHz generated from SPLL) instead of 8MHz oscillator clock; 2. Configure 3 individual MBs to receive: RX_MB0: 16 extend ID CAN 2.0/FD message with the lower 4LSB masked(mask=0x1FFFFFF0, acceptance ID = 0xfff021): 0xfff020 ~ 0xfff02F RX_MB1: 16 standard ID CAN 2.0/FD message with the lower 4LSB masked(mask=0x7F0, acceptance ID = 0x123): 0x120 ~ 0x12F RX_MB2: 4 standard ID CAN 2.0/FD message with the ID8 and ID9 masked(mask=0x4FF, acceptance ID = 0x256): 0x056, 0x156, 0x256 and 0x356 Both the RxFIFO and individual MBs RX use non-blocking receive method/API with MB TX/RX complete ISR callback installed to set a new circle buffer for next message frame receive 3. Configure 3 individual MBs to transmit: TX_MB0: send back any CAN(2.0/FD) messages received from RX_MB0; TX_MB1: send back any CAN(2.0/FD) messages received from RX_MB1; TX_MB2: send back any CAN(2.0/FD) messages received from RX_MB2; 4. Configure one individual MB(TX_MB3) to blocking transmit a standard CAN FD message with ID = 0x100 periodically(period = 5ms) and length = 64 bytes, and also send back the received CAN messages(if it's available) to the CAN bus as a response. 5. Provide the FlexCAN bus-off manual recovery configuration API and interrupt ISR callback codes for reference, changing the macro CAN_BUSOFF_RECOVERY_MANUAL(in include/Config.h) to select the bus off recovery method(enable the macro definition: manual recovery, comment the macro definition: automatic recovery); Note: In this sample project, the macro CAN_BUSOFF_RECOVERY_MANUA is commented by default, so manual recovery codes does not work. To make the bus-off recovery callback work, user should replace the flexcan PD driver codes and S32K144_feature.h with S32K1xx RTM 4.0.0(which can be downloaded from nxp.com with registered account login and then installed stand-alone or installed via S32DS v3.3 IDE update). This is not done this sample project!!!  6. Provided the sample codes of how to configure FlexCAN as the VLPS low-power mode wakeup source, RXD of FlexCAN0 is configured as GPIO IRQ interrupt with falling edge trigger before entering VLPS mode, and after wakeup, re-configure it back to RXD function. Note: A. S32K1xx FlexCAN is unable to work as the VLPS wakeup source B. After wakeup, it's necessary to call SDK clock_manager's API--CLOCK_SYS_UpdateConfiguration() to reconfigure the system clock, or it will use 8MHz SIRC, 48 MHZ FIRC and SPLL are disabled after wakeup. c. By default, after receive ID = 0x123(it can be configured via macro LP_REQUEST_ID in /include/Config.h ) standard CAN(CAN 2.0 or CAN-FD), the MCU will go to VLPS mode 7. There 3 on-board RGB LED are used to indicate the FlexCAN working status: blue RGB LED will be toggled after individual MB received a CAN message; green RGB LED will be turn ON after enter bus-off and turn OFF after exist bus-off(recover successfully). To run this sample project, the following HW and SW require: SW: S32DS for ARM v2.2 IDE with S32K1xx SDK RTM 3.0.3 installation HW: S32K144EVB-Q100 Rev.C with a DC-12V adapter for its power supply by J16 and a USB-to-CAN adapter(such as PEAK CAN) to connect PC with J13 of the EVB 3.S32K144_FlexCAN_PD_SamplePrj_RxFIFO_DMA_Receive_SDKRTM3P0 Functions implementation key points and tips: This sample project is made to demonstrate the following S32K1xx FlexCAN features with SDK FlexCAN PD driver: 1. Configure to receiver the following exact 16 standard ID CAN message with RxFIFO 8x ID filter table with format type-B(2x 16-bit ID) Standard ID: 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x111, 0x222, 0x333, 0x444, 0x555, 0x666, 0x777, 0x788 The RxFIFO is also configured to use eDMA channel 0 for CAN message receive, user can easily change to use CPU interrupt for RxFIFO in processor expert flexcan component configuration if required. Note: A. FlexCAN of S32K1xx dose not support to receive CAN-FD message frame with RxFIFO, so no CAN-FD support in this demo project. B. all the filter table elements must be configured to contain only standard or extend ID, if it contains both standard and extend ID, the IDE-bit mask will be ignored.  C. After RxFIFO enabled, MB0~MB5 is used as the RX FIFO, at least MB6~MB7 are used as the ID filter table(to store the acceptance ID), the actual available MB number is determined by RxFIFO ID filter table size, details please refer to section--55.4.6 Rx FIFO structure of S32K1xx RM Rev.12.1  2. Configure one extra individual MB(MB8) to receive 16 standard ID CAN 2.0 message with the lower 4LSB masked(mask=0x7F0, acceptance ID = 0x123): 0x120 ~ 0x12F; Both RxFIFO and individual MB RX use non-blocking receive method/API with MB TX/RX complete ISR callback installed to set a new circle buffer for next message frame receive 3. Configure one individual MB(MB9) to blocking transmit a standard CAN 2.0 message with ID = 0x100 periodically(period = 5ms), and also send back the received CAN messages(if it's available) to the CAN bus as a response. 4. Provide the FlexCAN bus-off manual recovery configuration API and interrupt ISR callback codes for reference, changing the macro CAN_BUSOFF_RECOVERY_MANUAL(in include/Config.h) to select the bus off recovery method(enable the macro definition: manual recovery, comment the macro definition: automatic recovery); Note: In this sample project, the macro CAN_BUSOFF_RECOVERY_MANUA is enabled by default, and manual recovery codes works. To make the bus-off recovery callback work, user should replace the flexcan PD driver codes and S32K144_feature.h with S32K1xx RTM 4.0.0(which can be downloaded from nxp.com with registered account login and then installed stand-alone or installed via S32DS v3.3 IDE update). This is already done this sample project!!!  5. There 3 on-board RGB LED are used to indicate the FlexCAN working status: red RGB LED will be toggled after RXFIFO received any CAN message; blue RGB LED will be toggled after individual MB received any CAN message; green RGB LED will be turn ON after enter bus-off and turn OFF after exist bus-off(recover successfully). To run this sample project, the following HW and SW require: SW: S32DS for ARM v2.2 IDE with S32K1xx SDK RTM 3.0.3 installation HW: S32K144EVB-Q100 Rev.C with a DC-12V adapter for its power supply by J16 and a USB-to-CAN adapter(such as PEAK CAN) to connect PC with J13 of the EVB Attached are the sample project for your reference, and details can also be fiound with the detailed comments in source codes. Hope it can help you, and any comments/questions are welcomed, and you can just ask in this thread and I will try to anwser them. Best regard, Enwei Hu(胡恩伟).  

Hello everyone, SEGGER's Real Time Transfer (RTT) is the new technology for interactive user I/O in embedded applications. It combines the advantages of SWO and semihosting at very high performance. Bi-directional communication with the target application Very high transfer speed without affecting real-time behavior Uses debug channel for communication No additional hardware or pin on target required Supported by any J-Link model Supported by ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33 and Renesas RX100/200/600 Complete implementation code providing functionality and freedom Here, I'd like to share you the SEGGER RTT porting project on S32K144 as attached. SW requirements: S32DS for ARM v2.2 IDE + S32K1xx SDK RTM 3.0 HW requirements: S32K144-EVB  + J-LINK debugger   For SEGGER RTT, you can refer to: About Real-Time Transfer: https://www.segger.com/products/debug-probes/j-link/technology/about-real-time-transfer/   RTT SEGGER Wiki： https://wiki.segger.com/RTT#SEGGER_RTT_TerminalOut.28.29；   Using Segger Real Time Terminal (RTT) with Eclipse： https://mcuoneclipse.com/2015/07/07/using-segger-real-time-terminal-rtt-with-eclipse/   Hope this project can help you, and enjoy the RTT! Best regard, Enwei Hu.

******************************************************************************************************** Detailed Description: LPUART1 echoes RX signal at 115200 bps When an 's' char is received, the MCU enters VLPS. A falling edge of the RX signal brings the MCU from VLPS via LPUART RXEDGIF interrupt. BUS_CLK can be monitored at CLKOUT PTD14. In VLPS, BUS_CLK is gated off. -------------------------------------------------------------------------------------------------------------------------- Test HW: S32K144EVB-Q100 MCU: S32K 0N57U Debugger: S32DS_ARM_2.2, OpenSDA Target: internal_FLASH ********************************************************************************************************    

Hi,      The draft time gap, from power-on to clock output of S32K14x, is as below.    You can take a reference. Cheers! Oliver

NXP S32K1xx serial MCU is widely used in automotive body control and many general-purpose automotive applications, while to target some applications with special requirements such as requiring more peripherals instance than the portfolio can offer (e.g. 6x CAN-FD, 6x LIN or 4 I2C) like mid-end BCM or DCU, an on-board dual/multi MCU sync solution is proposed as an alternate solution to extend the S32K1xx MCU peripherals/memory resource and CPU process capability. The eRPC (Embedded Remote Procedure Call) is a Remote Procedure Call (RPC) system created by NXP(https://github.com/EmbeddedRPC/erpc/). An RPC is a mechanism used to invoke a software routine on a remote system using a sample local function call. eRPC software architecture Figure 1. eRPC software architecture In this project, we ported the eRPC protocol to S32K1xx platform, tested and figured out its performance. An out-of-box software package with detailed user guide (this document) is provided to simplify and accelerate users’ assessment of eRPC on S32K1xx. Two S32K144EVB boards are connected to demonstrate the usage of the eRPC protocol. One works as the client, another as the server. The client board starts an eRPC request and the server board responds to the request and executes the service. Figure 2. eRPC task workflow on S32K144-EVB There are three types of MCU extensions are demonstrated in the project: MCU IO extension: Set LED; MCU peripheral extension: CAN and LIN message forwarding, LED luminance regulator; CPU process capability extension: Matrix multiply and addition math operation. Please find the attached sample projects and user guide for more details. Figure 3. Table of Contents in User Guide •Note: Even though we did a lot of tests for the solution with the sample projects on S32K144-EVB, it’s still customer’s responsibility to ensure the total quality by themselves when it’s integrated in a real application project, all the sample codes and user guide documentation are just reference for customer. If you have any questions about this solution, please post here and we can have an open discussion. Best Regard, Enwei Hu(胡恩伟) GPIS System Apps Engineer.  

******************************************************************************** Detailed Description: Configures the FlexCAN 0 to transmit and receive a CAN message Baudrate to is set to 500kbps. In this config, RXFIFO is used to receive a messages. 16 filter elements are defined in the RXFIFO table. Both standard and extended IDs are used. DMA is enabled in component inspector to read RXFIFO. MB10 is moreover used to receive a message with given standard ID and MB11 is used to transmit a message upon button press. The callback function is installed as well and is it called each time message is received in MB10, RXFIFO or message is transmitted. Note: EVB must be powered by 12V to have SBC's CAN transceiver active * ------------------------------------------------------------------------------ * Test HW:        S32K144EVB-Q100 * MCU:            FS32K144UAVLL 0N57U * Target:         Debug_FLASH * EVB connection: PCAN-View with PCAN-USB Pro connected to CAN port J13 * Compiler:       S32DS.ARM.2018.R1 * SDK release:    S32SDK_S32K1xx_RTM_3.0.0 * Debugger:       Lauterbach Trace32 ******************************************************************************** Revision History: Ver    Date           Author          Description of Changes 0.1    Apr-04-2019    Petr Stancik    Initial version *******************************************************************************/

/******************************************************************************** Detailed Description: Example shows possible implementation of multiple ADC conversions using SDK. Here 25 channels are sampled periodically. 2 ADC modules and 2 PDBs are used. ADC0 is configured to sample 16 channels, ADC1 9 channels. PDBs are set to back-to-back mode to perform chain conversion. Within ADC component you need to select ADC input to be measured for each item in configuration list. For ADC0 channels ADC ch12 is selected, as it is connected to trimmer on the EVB. DMA is used to read result into single buffer, and DMA callbacks are issued to indicate end of transfer for each ADC module. Within those callbacks PTE14 and PTE15 is toggled. PDB0 output pulse is generated on the PTE16 to indicate start of ADC measurement. This is done periodically at LPIT ch0 rate, which is set to 30us. The ADC0 ch0 result is used to dim LEDs. * ------------------------------------------------------------------------------ * Test HW:       S32K144EVB-Q100 * MCU:           FS32K144UAVLL 0N57U * Target:        Debug_FLASH * EVB connection: * Compiler:      S32DS.ARM.2018.R1 * SDK release:   S32SDK_S32K1xx_RTM_3.0.0 * Debugger:     Lauterbach Trace32 ******************************************************************************** Revision History: Ver Date          Author          Description of Changes 0.1 May-04-2019   Petr Stancik    Initial version *******************************************************************************/

Hi,     If you try to compile the sample project within S32K14X_MCAL4_2_RTM_1_0_0, you should take care of the command if you use Linaro.    After you set the environment of compiling and run the command under command window, you should enter     "launch.bat MODE=USER TOOLCHAIN=linaro"    NOT    "launch.bat MODE=USER TOOLCHAIN=LINARO"      The command is case sensitivity.   Hope you can compile the project successfully.  Cheers! Oliver

Hello,      NXP does a big change on document structure.     Generally, you can find pin assignment table, interrupt mapping and memory map table in RM. But now, these information change to Excel files and attached in RM.   For example on S32K.    You will find the words in RM, like 'For reset values per port, see IO Signal Description Input Multiplexing sheet(s) attached to the Reference Manual.'    Then, please go to attachment tab of your PDF file viewer, like Adobe Acrobat Reader DC.     These steps are also fit for MPC57xx , S32R family. Cheers! Oliver

********************************************************************************  Detailed Description:  Example shows how to use FlexCAN 0 Pretended networking mode to allow FlexCAN  module to wake up MCU from STOP mode using SDK.  Wake up by Timeout and wake up by Match events are enabled.  Also pin interrupt can be used to exit STOP mode.  So MCU enters STOP mode by pressing SW3 button.  MCU exits STOP mode when one of following happens:  - no CAN message comes in 8sec (CAN PN timeout event)  - message with standard ID 0x554 or 0x555 comes (CAN PN match event)  - SW2 button is pressed (PTC12 interrupt)  In run mode blue LED is dimming and the rate is different for each wakeup event  ------------------------------------------------------------------------------  Test HW: S32K116EVB-Q48  MCU: PS32K116LAM 0N96V  Compiler: S32DS.ARM.2.2  SDK release: S32SDK_S32K1xx_RTM_3.0.0  Debugger: Lauterbach, OpenSDA  Target: internal_FLASH ********************************************************************************

*******************************************************************************************************  Detailed Description:  Configures the MCU to run system clock from XOSC.  LPUART1 is set to respond to LIN header sent from master.  Based on ID received the LPUART1 either receive frame's data and compare checksum  or publish requested data with calculated checksum. Enhanced checksum is used.  Interrupt is used for RX and TX operation and 2 versions of interrupt routine are available.  VER 1 ... during response transmission receiver disabled and transmit interrupt enabled  VER 2 ... during response transmission receiver is kept enabled  ------------------------------------------------------------------------------  Test HW: S32K116 EVB-Q048  MCU: PS32K116LAM 0N96V  Fsys: 40MHz  Debugger: Lauterbach  Target: internal_FLASH ******************************************************************************************************

Hi,        ARM Cortex-M have a DWT (Data Watchpoint and Trace) unit implemented, and it has a nice feature in that unit which counts the execution cycles. The DWT is usually implemented on most Cortex-M3, M4 and M7 devices, including e.g. the NXP S32K14x.      Attachment is the sample project on S32K142 to measure the running time of a function.     Password of extraction is nxp.     Enjoy the measuring!   Cheers! Oliver BTW, Measure the running time of one function on PowerPC could also be gotten through the link.

******************************************************************************************** * Detailed Description: * LPIT_ch0 triggers DMA_ch0 periodically (1ms). * Every trigger starts a minor DMA loop (8 bytes) transfer to the LPSPI1 TX FIFO. * There are 8 minor loops per one major loop (64 bytes in 8ms). * LPSPI1 sends two 32bit frames every 1ms. * LPSPI1 RX data are masked, they are not stored in the RX FIFO. * ------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: S32K144 0N57U * Debugger: S32DS 2.2, OpenSDA * Target: internal_FLASH ********************************************************************************************

********************************************************************************  Detailed Description:  Example shows how to use FlexCAN 0 Pretended networking mode to allow FlexCAN  module to wake up MCU from STOP mode.  Wake up by Timeout and wake up by Match events are enabled.  Also pin interrupt can be used to exit STOP mode.  So MCU enters STOP mode by pressing SW3 button.  MCU exits STOP mode when one of following happens:  - no CAN message comes in 8sec (CAN PN timeout event)  - message with standard ID 0x554 or 0x555 comes (CAN PN match event)  - SW2 button is pressed (PTC12 interrupt)  In run mode blue LED is dimming and the rate is different for each wakeup event  ------------------------------------------------------------------------------  Test HW: S32K144 EVB-Q100  MCU: FS32K144UAVLL 0N57U  Fsys: 160MHz  Debugger: Lauterbach, OpenSDA  Target: internal_FLASH ********************************************************************************

I write a doc and a demo about LPUART hardware flow control, runs on s32k144 evb board with RTM 3.0.0, the flow control function work normally. If you have any question please contact me. 

Using S32k144 ISELD SDK driver and adding Touch Sensor software, a demo is created to show different light combinations when electrodes of S32K144 EVB are touched. ADK ISELED board is attached to S32K144 EVB.

An example implementation of SENT protocol receiver with S32K118 evaluation board. The input is expected in J106, TICK duration is 2,75us. CRC is calculated and check, the decoded output is printed into terminal via UART (ASCII)

Often we need to implement a SENT receiver in order to read the information sent by some sensors. It is useful to have the possibility of transmitting different message patterns in order to test your implementation. With this project you can transmit via a computer terminal a group of messages (up to 64). The project runs on a S32K144 EVB board, the output signal goes through J206 pin.

Example of usage of AIPS-lite, Protects the access to GPIO port. This example can be used with UART terminal, 115200 bps. The interface menu shows like this: AIPS example has started Please press 0 + enter to set red LED in GPIO port Please press 1 + enter to set red LED in GPIO port Please press 2: GPIO peripheral will only accept accesses from trusted master, M0 (Core) is set as untrusted when a write access, AIPS cannot longer be modified from core and a reset will occur in the next GPIO access Please press 3: GPIO access is write protected, any write access to GPIO will produce a hard fault

You can find here a reference code for a march c software test in order to test RAM memories