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Prerequisites:  CLRC663 plus Low Power Card Detection   1// Antenna Size  The stronger the coupling between reader and card, the better the detection range.  Ideally, the NFC reader antenna should have a size and form factor similar to that of the target NFC tag antenna. In practice, the reader antenna is typically designed to be slightly larger—by approximately 10% to 20%—to ensure reliable coupling and performance.   2// Antenna Q-factor  Higher Q-factor typically serves higher detection range. The Q-factor should be selected in accordance with the target communication bit rate.(e.g. Q≈30 for 106 kbit/s).  The antenna Q factor is mainly defined by the mechanical design of the antenna itself, as well as by external damping resistors. However, for LPCD-insensitive systems, a zero-ohm damping resistor can be used, and the system should then be evaluated through testing.  3// Target tuning  The CLRC663 should typically be used with the asymmetrical tuning as there is no internal power regulation implemented.  However, in some cases, symmetrical tuning may be beneficial, as it can improve detection range and sensitivity. Care must be taken to ensure that, under varying conditions—such as antenna loading by different NFC tags or the presence of nearby metal, the TVDD current does not exceed the specified maximum limits.   In CLRC663 LPCD operation, detection performance improves with higher TX power. However, this also increases current consumption, so an appropriate trade-off must be determined.   As a starting point, an antenna impedance of approximately Z≈ 50 Ω can be used.   4// Receiver setting (external Rx resistors) Based on the AN11019 (chapter 4.4.1), the peak voltage between RxN and GND (or RxP and GND) shall be in the range of 1.2Vp - 1.7Vp. Generally, higher Rx voltage levels improve detection range. To increase LPCD sensitivity and range, it can be advantageous to operate close to the upper limit of the allowed Rx voltage.   Please note that excessively high RX voltage may lead to immediate false wake-ups.   5//LPCD Settings As a starting point, we recommend using the following settings:   These settings provide robust immunity against false wake-ups and are highly efficient in terms of current consumption. The typical detection range for standard NFC tags is approximately 10 mm to 20 mm or even less in an application where the antenna is placed near a metal environment. Detection performance can be further improved by lowering the threshold settings +0 and -0. If this settings is used, we strongly advice using LPCD_FILTER feature as well. Alternatively, the user can use "high detection range option" + LPCD_FILTER. After using these settings, we recommend running "Endless LPCD" for a while and checking for any false wake-up rates. Note: The LPCD filter feature helps prevent false wake-ups. This is especially important when the threshold is set to +0 and -0. When using thresholds of +0 and −0 it is also recommended to set the "CWMAX" parameter (address 0x2A) to 1b. 5.1// LPCD RF ON time  If the RF on-time is shorter than approximately 20 µs - 30 µs , the primary detuning effect is dominated by the physical design of the NFC tag. For longer RF on-times, the NFC tag becomes energized, and its electrical parameters begin to contribute significantly to the overall detuning. Based on this understanding, a longer RF on-time can help increase LPCD detection range. However, this comes at the cost of higher current consumption. Therefore, it is recommended to compensate by adjusting the RF off-time. See an example below.   5.2// LPCD Charge pump  This function allows the TX power to be increased exclusively during the LPCD RF On time.   This can be beneficial if you want to avoid increasing the power in active mode (e.g., by reducing the tuning impedance) but only increase it during LPCD operation.   By activating the LPCD charge pump, detection performance can be improved, but at the cost of increased current consumption.   If this feature is enabled, it is recommended to verify the LPCD RF ping using an oscilloscope. It may be necessary to increase the RF On time to allow the amplitude to properly settle. Especially for TVDD= 3.3V or lower. 6// Summary   Mode  Tuning function Target impedance Q-factor Receiver voltage LPCD Threshold LPCD Filter LPCD Charge -pump RF On time  Standard Asymmetrical  20 Ω - 80 Ω  10 - 30 1.5 Vp +1 and -1 disable disable 10 us High detection range  Asymmetrical /Symmetrical (1) 20 Ω - 50 Ω >25 (2) 1.7 Vp +0 and -0 enable enable/ disable (3)  20 us-100 us   Note (1): Symmetrical tuning can only be applied if the TVDD current does not exceed the maximum allowable value after antenna loading caused by a card or metal object. Please ensure that this condition is met. Note (2): If high detection performance is required, the external antenna damping resistors are typically replaced with 0 Ω resistors, resulting in a higher antenna Q-factor. In this case, the user must verify that NFC communication continues to operate reliably. Due to the increased Q-factor, this configuration is typically limited to communication speeds of 106 kbit/s Note (3): Once the charge pump is enabled, the RF On time should be verified and adjusted if necessary. Please also note that the relationship between TX power and detection distance is not linear or unlimited. Beyond a certain point, enabling the charge pump provides only marginal improvements in detection distance.     Please note that the High Detection mode is generally more susceptible to false wake-ups and results in higher current consumption than the standard mode.
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Introduction Many customers are using PN7220 + Android 16 recently. In this document, I will show you how to porting the PN7220 to Android 16. I use the i.MX95 FRDM board as a reference target board.   NOTE :  All the modifications are just for reference. They are NOT a NXP official patches for the newer release of AOSP porting. So the modifications may not be the best solution. Customer please base on their needs to modify the AOSP source code. This is not for production. Customer still need to perform full testing after the porting.    Hardware boards: i.MX95 FRDM Board (FRDM i.MX 95 Development Board | NXP Semiconductors)   PN7220 EVK -- PNEV7220BP1 (PNEV7220BP1 Development Board for PN7220 NFC Controller | NXP Semiconductors)   There is a 40pins connector on both PN7220 EVK and i.MX95 FRDM board. So PN7220 + i.MX95 FRDM connecting together is like this:   Build the Android BSP for i.MX95 FRDM board: The i.MX Android BSP that I used is Android 16.0.0_1.4.0 (L6.12.49_2.2.0 BSP). It could be downloaded from here: Android OS for i.MX Applications Processors | NXP Semiconductors   1. Download the "Documentation" and the "Install Source Package".  2. Follow the steps in Android User's Guide to build the Android BSP for "evk_95" first.  $ export MY_ANDROID=`pwd` $ source build/envsetup.sh $ lunch evk_95-nxp_stable-userdebug $ export TARGET_RELEASE=nxp_stable $ build_build_var_cache $ ./imx-make.sh -j4 2>&1 | tee build-log.txt   According to the android_build/.repo/manifests/aosp-android-16.0.0_1.4.0.xml, you will see the AOSP version is android-16.0.0_r4. According to the PN7220 Android 16 porting guide (PN7160/PN7220 – Android 16 porting guide), the patches is for AOSP release android-16.0.0_r2. So fortunately, the AOSP release version between them is not big different.    Now, we start the porting: 1. Kernel Driver To establish connection with the PN7220, the Android stack uses the nxpnfc kernel driver.  You could download the driver from github below: nfcandroid_platform_drivers/drivers at br_ar_16_comm_infra_dev · nxp-nfc-infra/nfcandroid_platform_drivers · GitHub   The command is : git clone "https://github.com/nxp-nfc-infra/nfcandroid_platform_drivers.git" -b br_ar_16_comm_infra_dev There is driver for Kernel 6.6 and 6.12. So, please download the correct one for your porting. For example, the kernel in i.MX Android BSP Android 16.0.0_1.4.0 is 6.12. So I will use the 6.12 driver for my porting.   In your porting, make sure the PATH in Makefile and Kconfig files are setting properly.  For example in my porting: android_build/vendor/nxp-opensource/kernel_imx/drivers/nfc/pn7220$ tree . ├── common.c ├── common.h ├── i2c_drv.c ├── i2c_drv.h ├── Kbuild ├── Kconfig └── Makefile 0 directories, 7 files   For simplifying everything, we will only add a support for I2C and not SPI. Replace drivers/nfc/pn7220/Makefile default code with following code (for easier understanding) nxpnfc-i2c-objs = i2c_drv.o common.o obj-$(CONFIG_NXP_NFC_I2C) += nxpnfc_i2c.o   The contents of drivers/nfc/Makefile. Add the PN7220 like below: # SPDX-License-Identifier: GPL-2.0 # # Makefile for nfc devices # obj-$(CONFIG_NXP_NFC_I2C) += pn7220/ obj-$(CONFIG_NFC_FDP) += fdp/ obj-$(CONFIG_NFC_PN544) += pn544/ obj-$(CONFIG_NFC_MICROREAD) += microread/ obj-$(CONFIG_NFC_PN533) += pn533/ obj-$(CONFIG_NFC_MEI_PHY) += mei_phy.o obj-$(CONFIG_NFC_SIM) += nfcsim.o obj-$(CONFIG_NFC_PORT100) += port100.o obj-$(CONFIG_NFC_MRVL) += nfcmrvl/ obj-$(CONFIG_NFC_TRF7970A) += trf7970a.o obj-$(CONFIG_NFC_ST21NFCA) += st21nfca/ obj-$(CONFIG_NFC_ST_NCI) += st-nci/ obj-$(CONFIG_NFC_NXP_NCI) += nxp-nci/ obj-$(CONFIG_NFC_S3FWRN5) += s3fwrn5/ obj-$(CONFIG_NFC_ST95HF) += st95hf/ obj-$(CONFIG_NFC_VIRTUAL_NCI) += virtual_ncidev.o   The contents of drivers/nfc/Kconfig. Add the PN7220 like below: source "drivers/nfc/microread/Kconfig" source "drivers/nfc/nfcmrvl/Kconfig" source "drivers/nfc/st21nfca/Kconfig" source "drivers/nfc/st-nci/Kconfig" source "drivers/nfc/nxp-nci/Kconfig" source "drivers/nfc/s3fwrn5/Kconfig" source "drivers/nfc/st95hf/Kconfig" source "drivers/nfc/pn7220/Kconfig" endmenu   2. Adding the "nxpnfc" to the i.MX95 FRDM board device tree file android_build/vendor/nxp-opensource/kernel_imx/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts   We need to check the connection between two boards and then to decide which pins to use in the device tree file. Here is the 40 pins connector on the PN7220: Here is the 40 pins connector on the i.MX95 FRDM board. According to the 40 pins connection between PN7220 EVK and the i.MX95 FRDM board, I decided to use the I2C6 and the GPIO2_20, GPIO2_21 and GPIO2_26. So, in the imx95-15x15-frdm.dts, I added: &lpi2c6 { clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lpi2c6>; status = "okay"; nxpnfc@28{ compatible = "nxp,nxpnfc"; reg = <0x28>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nfc>; nxp,nxpnfc-irq = <&gpio2 26 0>; nxp,nxpnfc-ven = <&gpio2 21 0>; nxp,nxpnfc-mode_sw = <&gpio2 20 0>; }; }; And the IOMUX settings in the imx95-15x15-frdm.dts. pinctrl_nfc: nfcgrp { fsl,pins = < IMX95_PAD_GPIO_IO26__GPIO2_IO_BIT26 0x39e // IRQ IMX95_PAD_GPIO_IO21__GPIO2_IO_BIT21 0x39e // VEN IMX95_PAD_GPIO_IO20__GPIO2_IO_BIT20 0x39e // MODE_SW >; }; pinctrl_lpi2c6: lpi2c6grp { fsl,pins = < IMX95_PAD_GPIO_IO02__LPI2C6_SDA 0x40000b9e IMX95_PAD_GPIO_IO03__LPI2C6_SCL 0x40000b9e >; };   3. Modify the imx95_gki.fragment File:  android_build/vendor/nxp-opensource/kernel_imx/arch/arm64/configs/imx95_gki.fragment Add the "CONFIG_NXP_NFC_I2C=m" into the imx95_gki.fragment   4. Add the settings in your corresponding board configuration files in Android - Go to the android_build/device/nxp/imx9/evk_95/  - Modify the BoardConfig.mk. # Add KVM support BOARD_BOOTCONFIG += androidboot.hypervisor.vm.supported=true + # ---- selinux permissive ---- + BOARD_KERNEL_CMDLINE += androidboot.selinux=permissive # -------@block_sepolicy------- BOARD_SEPOLICY_DIRS := \ $(CONFIG_REPO_PATH)/imx9/sepolicy \ $(IMX_DEVICE_PATH)/sepolicy \ + vendor/nxp/nfc/sepolicy \ + vendor/nxp/nfc/sepolicy/nfc +include vendor/nxp/nfc/BoardConfigNfc.mk    - Add the "nxpnfc_i2c.ko" to the ShareBoardConfig.mk. Make sure the path and the filename are correct. ifeq ($(LOADABLE_KERNEL_MODULE),true) IMX_ANDROID_FIRST_STAGE_MODULES += \ $(KERNEL_OUT)/drivers/hwmon/hwmon.ko \ $(KERNEL_OUT)/drivers/hwmon/scmi-hwmon.ko \ .... .... .... $(KERNEL_OUT)/drivers/soc/imx/soc-imx9.ko \ $(KERNEL_OUT)/drivers/gpio/gpio-adp5585.ko \ $(KERNEL_OUT)/drivers/gpio/gpio-pca953x.ko \ $(KERNEL_OUT)/drivers/gpio/gpio-vf610.ko \ + $(KERNEL_OUT)/drivers/nfc/pn7220/nxpnfc_i2c.ko .... .... BOARD_VENDOR_KERNEL_MODULES += \ $(KERNEL_OUT)/drivers/media/i2c/ap1302.ko \ $(KERNEL_OUT)/drivers/media/i2c/ox03c10.ko \ $(KERNEL_OUT)/drivers/media/i2c/max96717_lib.ko \ .... .... $(KERNEL_OUT)/drivers/net/ethernet/freescale/enetc/fsl-enetc-vf.ko \ $(KERNEL_OUT)/drivers/net/ethernet/freescale/enetc/fsl-enetc4.ko \ $(KERNEL_OUT)/drivers/net/phy/realtek.ko \ $(KERNEL_OUT)/drivers/hwmon/pwm-fan.ko \ + $(KERNEL_OUT)/drivers/nfc/pn7220/nxpnfc_i2c.ko   - Add the following to the compatibility_matrix.xml <compatibility-matrix version="1.0" type="device"> <hal format="native" optional="false"> <name>netutils-wrapper</name> <version>1.0</version> </hal> <hal format="aidl" updatable-via-apex="true"> <name>android.hardware.emvco</name> <version>1</version> <interface> <name>IEmvco</name> <instance>default</instance> </interface> </hal> </compatibility-matrix>   - Add the INxpNfc and INxpEmvco to the device_framework_matrix.xml <compatibility-matrix version="1.0" type="framework"> <hal format="aidl" optional="true"> <name>nxp.hardware.secureime</name> <version>1</version> <interface> <name>ISecureIME</name> <instance>default</instance> </interface> </hal> <hal format="aidl" optional="true"> <name>nxp.hardware.ele</name> <version>1</version> <interface> <name>ISecureEnclave</name> <instance>default</instance> </interface> </hal> <hal format="aidl" optional="true"> <name>nxp.hardware.imx_dek_extractor</name> <version>1</version> <interface> <name>IDek_Extractor</name> <instance>default</instance> </interface> </hal> <hal format="aidl" optional="true"> <name>vendor.nxp.nxpnfc_aidl</name> <version>2</version> <interface> <name>INxpNfc</name> <instance>default</instance> </interface> </hal> <hal format="aidl" optional="true"> <name>vendor.nxp.emvco</name> <version>1</version> <interface> <name>INxpEmvco</name> <instance>default</instance> </interface> </hal> </compatibility-matrix>    - Add the following to the evk_95.mk # ------nfc------- $(call inherit-product, vendor/nxp/nfc/device-nfc.mk) $(call inherit-product, vendor/nxp/emvco/device-emvco.mk) PRODUCT_PACKAGES += \ android.hardware.nfc2-service.nxp PRODUCT_PACKAGES += \ com.nxp.emvco \ com.nxp.nfc \ nfc_nci_nxp_pn72xx   - Add the nxpnfc_i2c in init.rc exec u:r:vendor_modprobe:s0 -- /vendor/bin/modprobe -a -d \ /vendor/lib/modules nxpnfc_i2c write /sys/power/wake_lock nosleep   - Add nxpnfc to ueventd.nxp.rc /dev/ttymxc1 0666 nfc nfc /dev/ttymxc2 0666 nfc nfc /dev/nxpnfc 0666 nfc nfc   5. Apply the NXP AOSP patches I write a script to download the patches from the github. The script file and the android_build folder is on the same directory. Run the AOSP_adaptation.sh.  AOSP_adaptation.sh # nfcandroid_nfc_modules git clone "https://github.com/nxp-nfc-infra/nfcandroid_modules_nfc.git" cd nfcandroid_modules_nfc git checkout br_ar_16_comm_infra_dev cp -rf * ../android_build/packages/modules/Nfc cd .. # nfcandroid_nfc_hidlimpl git clone "https://github.com/nxp-nfc-infra/nfcandroid_nfc_hidlimpl.git" cd nfcandroid_nfc_hidlimpl git checkout br_ar_16_comm_infra_dev cp -rf * ../android_build/hardware/nxp/nfc cd .. # nfcandroid_frameworks git clone "https://github.com/nxp-nfc-infra/nfcandroid_frameworks.git" cd nfcandroid_frameworks git checkout br_ar_16_comm_infra_dev mkdir ../android_build/packages/modules/Nfc/framework cp -rf * ../android_build/packages/modules/Nfc/framework cd .. # nfcandroid_emvco_aidlimpl git clone "https://github.com/nxp-nfc-infra/nfcandroid_emvco_aidlimpl.git" cd nfcandroid_emvco_aidlimpl git checkout br_ar_16_comm_infra_dev mkdir ../android_build/hardware/nxp/emvco cp -rf * ../android_build/hardware/nxp/emvco cd .. # nfcandroid_platform_reference git clone "https://github.com/nxp-nfc-infra/nfcandroid_platform_reference.git" cd nfcandroid_platform_reference git checkout br_ar_16_comm_infra_dev cp -rf vendor/nxp/* ../android_build/vendor/nxp/ cd ..   Apply a patch. $ cd android_build/system/logging $ patch -p1 < ../../../nfcandroid_platform_reference/build_cfg/build_pf_patches/AROOT_system_logging.patch   Add TDA Test support: # Clone repositories for test applications and TDA support # nfcandroid_infra_test_apps git clone https://github.com/nxp-nfc-infra/nfcandroid_infra_test_apps.git cd nfcandroid_infra_test_apps/ git checkout br_ar_16_comm_infra_dev cd test_apps/ cp -rf SMCU_Switch/ ../../android_build/packages/apps/ cp -rf EMVCoModeSwitchApp/ ../../android_build/packages/apps/ cd ../.. # nfcandroid_infra_comm_libs git clone "https://github.com/nxp-nfc-infra/nfcandroid_infra_comm_libs.git" cd nfcandroid_infra_comm_libs git checkout br_ar_16_comm_infra_dev cp -rf nfc_tda/ ../android_build/packages/modules/Nfc/libnfc-nci/ cp -rf emvco_tda/ emvco_tda_test/ ../android_build/hardware/nxp/emvco/ cp -rf NfcTdaTestApp/ ../android_build/packages/apps/ cd ..   6. Put changes into hardwatre/interfaces/compatibility_matrices  File: hardware/interfaces/compatibility_matrices/compatibility_matrix.202504.xml <hal format="aidl"> <name>android.hardware.audio.effect</name> <version>1-3</version> <interface> <name>IFactory</name> <instance>default</instance> </interface> </hal> <hal format="aidl" optional="true"> <name>nxp.hardware.imx_dek_extractor</name> <version>1</version> <interface> <name>IDek_Extractor</name> <instance>default</instance> </interface> </hal> <hal format="aidl" optional="true"> <name>nxp.hardware.ele</name> <version>1</version> <interface> <name>ISecureEnclave</name> <instance>default</instance> </interface> </hal> <hal format="aidl" optional="true"> <name>vendor.nxp.nxpnfc_aidl</name> <version>2</version> <interface> <name>INxpNfc</name> <instance>default</instance> </interface> </hal> <hal format="aidl" optional="true"> <name>vendor.nxp.emvco</name> <version>1</version> <interface> <name>INxpEmvco</name> <instance>default</instance> </interface> </hal> <hal format="aidl" updatable-via-apex="true"> <name>android.hardware.authsecret</name> <version>1</version> <interface> <name>IAuthSecret</name> <instance>default</instance> </interface> </hal>   7. Add the firmware $ git clone https://github.com/NXP/nfc-NXPNFCC_FW.git $ cp -r nfc-NXPNFCC_FW/InfraFW/pn7220/64-bit-2.5/pn7220_64bits.so android_build/vendor/nxp/pn7220/firmware/lib64/libpn72xx_fw.so   8. Add the NXPAndroidDTA $git clone https://github.com/NXPNFCProject/NXPAndroidDTA.git $cd NXPAndroidDTA $git checkout br_ar_new_dta_arch cp -r NXPAndroidDTA android_build/vendor/nxp/   9. Some fixes before build: $ cd android_build $ mv hardware/nxp/nfc/snxxx/Android.bp hardware/nxp/nfc/snxxx/_Android.bp $ mv hardware/nxp/nfc/snxxx/halimpl/power-tracker/Android.bp hardware/nxp/nfc/snxxx/halimpl/power-tracker/_Android.bp $ mv hardware/nxp/secure_element/snxxx/aidl/Android.bp hardware/nxp/secure_element/snxxx/aidl/_Android.bp $ cd hardware/nxp/nfc $ rm pn8x -rf   Now, build the Android BSP again. Use "mm" to build the Android source code. After fixed all the errors of the AOSP build, use "imx-make.sh" to build the whole i.MX Android image.    When building the Android, there may have some errors during the build. I listed some errors and the workaround below for your reference.   Error: error: packages/modules/Nfc/tests/cts/tests/Android.bp:20:1: "CtsNfcTestCases" depends on undefined module "CtsAppTestStubsShared". Workaround : Comment out "CtsAppTestStubsShared" in packages/modules/Nfc/tests/cts/tests/Android.bp     Error: error: hardware/nxp/nfc/snxxx/halimpl_v2/power-tracker/Android.bp:17:1: "power_tracker_v2" depends on undefined module "nfc_nci_nxp_snxxx_headers_v2". Workaround: mv hardware/nxp/nfc/snxxx/halimpl_v2/power-tracker/Android.bp hardware/nxp/nfc/snxxx/halimpl_v2/power-tracker/_Android.bp     Error: error: platform_testing/Android.bp:255:1: module "continuous_native_tests" variant "android_common": depends on //packages/modules/Nfc/NfcNci/nci/jni:libnfc-nci-jni-tests which is not visible to this module You may need to add "//platform_testing" to its visibility error: platform_testing/Android.bp:255:1: module "continuous_native_tests" variant "android_common": depends on //packages/modules/Nfc/libnfc-nci/tests:libnfc-nci-tests which is not visible to this module You may need to add "//platform_testing" to its visibility Workaround: nano packages/modules/Nfc/NfcNci/nci/jni/Android.bp In cc_test {     name: "libnfc-nci-jni-tests", .. ..     visibility: [         "//platform_testing:__subpackages__",     ], Same in packages/modules/Nfc/libnfc-nci/tests/Android.bp     Error: FAILED: out/soong/.intermediates/packages/modules/Nfc/framework/framework-nfc.stubs.source.system/android_common/exportable/framework-nfc.stubs.source.system-stubs.srcjar out/soong/.intermediates/packages/modules/Nfc/framework/framework-nfc.stubs.source.system/android_common/exportable/framework-nfc.stubs.source.system_annotations.zip out/soong/.intermediates/packages/modules/Nfc/framework/framework-nfc.stubs.source.system/android_common/exportable/framework-nfc.stubs.source.system_api.txt out/soong/.intermediates/packages/modules/Nfc/framework/framework-nfc.stubs.source.system/android_common/exportable/framework-nfc.stubs.source.system_removed.txt out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.system.latest/gen/framework-nfc.api.system.latest:52: error: Binary breaking change: Removed method android.nfc.NfcOemExtension.emulateNfcTechnologyATag(boolean,byte,byte,byte,byte[],byte,byte[]) [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.system.latest/gen/framework-nfc.api.system.latest:64: error: Binary breaking change: Removed method android.nfc.NfcOemExtension.overwriteRoutingTable(int,int,int,int,int) [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.system.latest/gen/framework-nfc.api.system.latest:77: error: Binary breaking change: Removed field android.nfc.NfcOemExtension.EMULATE_NFC_A_TAG_STATUS_FAILED_INTERNAL [RemovedField] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.system.latest/gen/framework-nfc.api.system.latest:78: error: Binary breaking change: Removed field android.nfc.NfcOemExtension.EMULATE_NFC_A_TAG_STATUS_FAILED_NFC_NOT_ENABLED [RemovedField] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.system.latest/gen/framework-nfc.api.system.latest:79: error: Binary breaking change: Removed field android.nfc.NfcOemExtension.EMULATE_NFC_A_TAG_STATUS_OK [RemovedField] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.system.latest/gen/framework-nfc.api.system.latest:120: error: Binary breaking change: Removed method android.nfc.NfcOemExtension.Callback.onRoutingChangeCompleted() [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.system.latest/gen/framework-nfc.api.system.latest:160: error: Binary breaking change: Removed method android.nfc.RoutingStatus.getDefaultFelicaRoute() [RemovedMethod] Aborting: Found compatibility problems checking the public API (/home/nxa08017/android16_1.4.0/android_build/out/soong/.temp/sbox/d1717a17fe92a8b2da806db0f1cb87830019487b/packages/modules/Nfc/framework/java) against the API in /home/nxa08017/android16_1.4.0/android_build/out/soong/.temp/sbox/d1717a17fe92a8b2da806db0f1cb87830019487b/./out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest exit status 255 Workaround: Comment out the lines 52,64,77,78,79,120,160 in out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.system.latest/gen/framework-nfc.api.system.latest     Error: out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest:77: error: Binary breaking change: Removed method android.nfc.NfcAdapter.isExitFramesSupported() [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest:80: error: Binary breaking change: Removed method android.nfc.NfcAdapter.isPowerSavingModeEnabled() [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest:81: error: Binary breaking change: Removed method android.nfc.NfcAdapter.isPowerSavingModeSupported() [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest:91: error: Binary breaking change: Removed method android.nfc.NfcAdapter.setPowerSavingMode(boolean) [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest:196: error: Binary breaking change: Removed method android.nfc.cardemulation.CardEmulation.getPollingLoopFiltersForService(android.content.ComponentName) [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest:197: error: Binary breaking change: Removed method android.nfc.cardemulation.CardEmulation.getPollingLoopPatternFiltersForService(android.content.ComponentName) [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest:202: error: Binary breaking change: Removed method android.nfc.cardemulation.CardEmulation.isDeviceScreenOnRequiredForService(android.content.ComponentName) [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest:203: error: Binary breaking change: Removed method android.nfc.cardemulation.CardEmulation.isDeviceUnlockRequiredForService(android.content.ComponentName) [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest:214: error: Binary breaking change: Removed method android.nfc.cardemulation.CardEmulation.setRequireDeviceScreenOnForService(android.content.ComponentName,boolean) [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest:215: error: Binary breaking change: Removed method android.nfc.cardemulation.CardEmulation.setRequireDeviceUnlockForService(android.content.ComponentName,boolean) [RemovedMethod] out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest:248: error: Binary breaking change: Removed method android.nfc.cardemulation.CardEmulation.NfcEventCallback.onOffHostAidSelected(String,String) [RemovedMethod] Aborting: Found compatibility problems checking the public API (/home/nxa08017/android16_1.4.0/android_build/out/soong/.temp/sbox/6245059c063e0ae76fa4356a9b840b923ddb8764/packages/modules/Nfc/framework/java) against the API in /home/nxa08017/android16_1.4.0/android_build/out/soong/.temp/sbox/6245059c063e0ae76fa4356a9b840b923ddb8764/./out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest exit status 255 Workaround: Same as the previous workaround. Comment out the lines (error) in out/soong/.intermediates/prebuilts/sdk/framework-nfc.api.public.latest/gen/framework-nfc.api.public.latest.     Error: vendor/nxp/nfc/sepolicy/nfc/nfc.te:7:ERROR 'unknown type hal_emvco_service' at token ';' on line 24388: allow nfc hal_emvco_service:service_manager find; allow nfc nfc_vendor_data_file:file { create rename setattr unlink { { getattr open read ioctl lock map watch watch_reads } { open append write lock map } } }; checkpolicy:  error(s) encountered while parsing configuration Workaround: nano vendor/nxp/nfc/sepolicy/nfc/nfc.te # allow NFC process to call into the NFC HAL +type hal_emvco_service, hal_service_type, service_manager_type; +type hal_emvco_default, domain; allow nfc nfc_data_file:dir create_dir_perms; allow nfc nxpnfc_hwservice:hwservice_manager find; allow nfc nfc_vendor_data_file:dir { create_dir_perms add_name search read write create remove_name }; allow nfc nfc_vendor_data_file:file create_file_perms; allow nfc hal_emvco_service:service_manager find; allow nfc hal_emvco_default:binder call; allow nfc hal_emvco_default:binder transfer; allow nfc vendor_hal_nxpnfc_service:service_manager find;     Error: FAILED: out/soong/.intermediates/hardware/nxp/nfc/intf/nxpnfc/aidl/vendor.nxp.nxpnfc_aidl_interface/checkhash_2.timestamp if [ $(cd 'hardware/nxp/nfc/intf/nxpnfc/aidl/aidl_api/vendor.nxp.nxpnfc_aidl/2' && { find ./ -name "*.aidl" -print0 | LC_ALL=C sort -z | xargs -0 sha1sum && echo 1; } | sha1sum | cut -d " " -f 1) = $(tail -1 'hardware/nxp/nfc/intf/nxpnfc/aidl/aidl_api/vendor.nxp.nxpnfc_aidl/2/.hash') ]; then touch out/soong/.intermediates/hardware/nxp/nfc/intf/nxpnfc/aidl/vendor.nxp.nxpnfc_aidl_interface/checkhash_2.timestamp; else cat 'system/tools/aidl/build/message_check_integrity.txt' && exit 1; fi ############################################################################### # ERROR: Modification detected of stable AIDL API file                        # ############################################################################### Above AIDL file(s) has changed, resulting in a different hash. Hash values may be checked at runtime to verify interface stability. If a device is shipped with this change by ignoring this message, it has a high risk of breaking later when a module using the interface is updated, e.g., Mainline modules. Workaround: echo $(cd 'hardware/nxp/nfc/intf/nxpnfc/aidl/aidl_api/vendor.nxp.nxpnfc_aidl/2' && { find ./ -name "*.aidl" -print0 | LC_ALL=C sort -z | xargs -0 sha1sum && echo 1; } | sha1sum | cut -d " " -f 1) d9e99a62ff5ebed44083a79577ec7ed32d264775 Then,  nano hardware/nxp/nfc/intf/nxpnfc/aidl/aidl_api/vendor.nxp.nxpnfc_aidl/2/.hash replace the value to d9e99a62ff5ebed44083a79577ec7ed32d264775   A runtime error: Problem: You will find the following failed about the permission in the log. java.lang.IllegalStateException: Signature|privileged permissions not in privileged permission allowlist: {com.android.nfc (/apex/com.android.nfcservices/priv-app/[email protected]😞 android.permission.OBSERVE_ROLE_HOLDERS}   Workaround: Add :     <privapp-permissions package="com.android.nfc">         <permission name="android.permission.OBSERVE_ROLE_HOLDERS"/>     </privapp-permissions> To the file : out/target/product/evk_95/system/etc/permissions/privapp-permissions-platform.xml     10. Download the image to the target board: - We use the tool UUU to download the image to the i.MX boards. Download the UUU from here : Releases · nxp-imx/mfgtools - Download the Android 16 BSP i.MX95 EVK demo image from the Android i.MX BSP web page first. There are UUU script and necessary image files already in the demo image package.  - Put the UUU executable file into the demo image folder. uuu_imx_android_flash.bat is the script also in the same folder. - After your Android BSP building is completed and succeed, copy the images to the demo image folder. The image files are located in android_build/out/target/product/evk_95/. - Switch the boot mode to "Download" mode on the i.MX95 FRDM board. - Run the UUU script to download the images to the FRDM board. uuu_imx_android_flash.bat -f imx95 -a -e -u 15x15-frdm -d 15x15-frdm     Run the "TagInfo" on the board: - Download the TagInfo apk file from the NXP TagInfo App web page . - Use the "adb install" command to install the TagInfo to the FRDM board. C:\>adb install com.nxp.taginfo-6.2.0-play-release-protected.apk * daemon not running; starting now at tcp:5037 * daemon started successfully Performing Streamed Install Success   After TagInfo installed, the TagInfo icon will be available on the GUI.   Run the TagInfo, and then put a card on the board. The information of the card will be show on the TagInfo App.     Reference: PN7160/PN7220 – Android 16 porting guide PN7220 NFC Frontend IC with Integrated Power Management | NXP Semiconductors Android OS for i.MX Applications Processors | NXP Semiconductors nxp-nfc-infra · GitHub        
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Introduction We have an official PN7160/PN7220 Android 15 porting guide (PN7160/PN7220 – Android 15 porting guide). But the patches only for Android 15 AOSP r1 (android-15.0.0_r1). If customer want to porting to the newer release of AOSP, there will have many errors during the source code compiling. This document is for customer reference to solve the error one by one.    NOTE :  All the modifications are just for reference. They are NOT a NXP official patches for the newer release of AOSP porting. So the modifications may not be the best solution. Customer please base on their needs to modify the AOSP source code. This is not for production. Customer still need to perform full testing after the porting.    Hardware boards: i.MX8MN EVK (i.MX 8M Nano Evaluation Kit | NXP Semiconductors)   PN7160 EVK (OM27160| Development Kits for PN7160 Plug'n Play NFC Controller | NXP Semiconductors)     The connection between i.MX8MN EVK and PN7160 OM29110ARD-B i.MX8M Nano EVK pin PN7160 pin 3.3V J1003-1 VDD(3.3v) J1-4 5V J1003-2 VBAT (5v) J1-5  I2C3 SDA J1003-3 SDA J2-2 I2C3 SCL J1003-5 SCL J2-1 GPIO3_22 J1003-37 IRQ J2-10 GPIO3_21 J1003-38 REQ J4-2 GND J1003-39 GND J1-6 GPIO3_20 J1003-40 VEN J4-1     Build the Android for i.MX8MN EVK The i.MX Android BSP that I used is Android 15.0.0_2.0.0 (L6.12.20_2.0.0 BSP). It could be downloaded from here: Android OS for i.MX Applications Processors | NXP Semiconductors 1. Download the "Documentation" and the "Install Source Package".  2. Follow the steps in Android User's Guide to build the Android BSP for i.MX8MN EVK first.    According to the android_build/.repo/manifests/aosp-android-15.0.0_2.0.0.xml, you will see the AOSP version is android-15.0.0_r32.   Reference documents for porting: PN7160/PN7220 – Android 15 porting guide  Porting PN7160 to Android 14 on i.MX8M Nano board   Now, we start the porting:  1. Kernel Driver To establish connection with the PN7220 or PN7160, the Android stack uses the nxpnfc kernel driver.  You could download the driver from github below: nfcandroid_platform_drivers/drivers at br_ar_16_comm_infra_dev · nxp-nfc-infra/nfcandroid_platform_d...   The command is : git clone "https://github.com/nxp-nfc-infra/nfcandroid_platform_drivers.git" -b br_ar_16_comm_infra_dev   There is driver for Kernel 6.6 and 6.12. So, please download the correct one for your porting. For example, the kernel in i.MX Android BSP Android 15.0.0_2.0.0 is 6.12. So I will use the 6.12 driver for my porting.   In your porting, make sure the PATH in Makefile and Kconfig files are setting properly.  For example in my porting: . ├── Kconfig ├── Makefile └── pn7160 ├── common.c ├── common.h ├── i2c_drv.c ├── i2c_drv.h ├── Kbuild ├── Kconfig ├── Makefile ├── spi_drv.c └── spi_drv.h   For simplifying everything, we will only add a support for I2C and not SPI. Replace drivers/nfc/pn7160/Makefile default code with following code (for easier understanding) nxpnfc-i2c-objs = i2c_drv.o common.o obj-$(CONFIG_NXP_NFC_I2C) += nxpnfc_i2c.o   The contents of drivers/nfc/Kconfig. Add the PN7160 like below: source "drivers/nfc/pn7160/Kconfig" source "drivers/nfc/fdp/Kconfig" source "drivers/nfc/pn544/Kconfig" source "drivers/nfc/pn533/Kconfig" source "drivers/nfc/microread/Kconfig" source "drivers/nfc/nfcmrvl/Kconfig" source "drivers/nfc/st21nfca/Kconfig" source "drivers/nfc/st-nci/Kconfig" source "drivers/nfc/nxp-nci/Kconfig" source "drivers/nfc/s3fwrn5/Kconfig" source "drivers/nfc/st95hf/Kconfig" endmenu   The contents of drivers/nfc/Makefile. Add the PN7160 like below: # SPDX-License-Identifier: GPL-2.0 # # Makefile for nfc devices # obj-$(CONFIG_NXP_NFC_I2C) += pn7160/ obj-$(CONFIG_NFC_FDP) += fdp/ obj-$(CONFIG_NFC_PN544) += pn544/ obj-$(CONFIG_NFC_MICROREAD) += microread/ obj-$(CONFIG_NFC_PN533) += pn533/ obj-$(CONFIG_NFC_MEI_PHY) += mei_phy.o obj-$(CONFIG_NFC_SIM) += nfcsim.o obj-$(CONFIG_NFC_PORT100) += port100.o obj-$(CONFIG_NFC_MRVL) += nfcmrvl/ obj-$(CONFIG_NFC_TRF7970A) += trf7970a.o obj-$(CONFIG_NFC_ST21NFCA) += st21nfca/ obj-$(CONFIG_NFC_ST_NCI) += st-nci/ obj-$(CONFIG_NFC_NXP_NCI) += nxp-nci/ obj-$(CONFIG_NFC_S3FWRN5) += s3fwrn5/ obj-$(CONFIG_NFC_ST95HF) += st95hf/ obj-$(CONFIG_NFC_VIRTUAL_NCI) += virtual_ncidev.o   2. Adding the "nxpnfc" to the i.MX8MN EVK device tree file &i2c3 { clock-frequency = <100000>; pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; pinctrl-1 = <&pinctrl_i2c3_gpio>; scl-gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; status = "okay"; nxpnfc@28{ compatible = "nxp,nxpnfc"; reg = <0x28>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nfc>; nxp,nxpnfc-irq = <&gpio3 22 0>; nxp,nxpnfc-ven = <&gpio3 20 0>; nxp,nxpnfc-fw-dwnld = <&gpio3 21 0>; }; The GPIO settings in the IOMUXC: &iomuxc { pinctrl_nfc: nfcgrp { fsl,pins = < MX8MN_IOMUXC_SAI5_RXC_GPIO3_IO20 0X19 // VEN MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21 0X19 // FW-DWNLD MX8MN_IOMUXC_SAI5_RXD1_GPIO3_IO22 0X19 // IRQ >; };   3. Modify the imx8mn_gki.fragment File:  android_build/vendor/nxp-opensource/kernel_imx/arch/arm64/configs/imx8mn_gki.fragment Add the "CONFIG_NXP_NFC_I2C=m" into the imx8mn_gki.fragment   4. Add the settings in your corresponding board configuration files in Android - Go to the android_build/device/nxp/imx8m/evk_8mn/  - Modify the BoardConfig.mk. # selinux permissive + BOARD_KERNEL_CMDLINE += androidboot.selinux=permissive BOARD_SEPOLICY_DIRS := \ $(CONFIG_REPO_PATH)/imx8m/sepolicy \ $(IMX_DEVICE_PATH)/sepolicy \ + vendor/nxp/nfc/sepolicy \ + vendor/nxp/nfc/sepolicy/nfc + include vendor/nxp/nfc/BoardConfigNfc.mk   - Add the "nxpnfc_i2c.ko" to the ShareBoardConfig.mk. Make sure the path and the filename are correct. $(KERNEL_OUT)/drivers/net/phy/realtek.ko \ $(KERNEL_OUT)/drivers/pps/pps_core.ko \ $(KERNEL_OUT)/drivers/ptp/ptp.ko \ $(KERNEL_OUT)/drivers/net/ethernet/freescale/fec.ko + $(KERNEL_OUT)/drivers/nfc/pn7160/nxpnfc_i2c.ko endif $(KERNEL_OUT)/drivers/trusty/trusty-core.ko \ $(KERNEL_OUT)/drivers/trusty/trusty-log.ko \ $(KERNEL_OUT)/drivers/trusty/trusty-ipc.ko \ $(KERNEL_OUT)/drivers/trusty/trusty-virtio.ko \ + $(KERNEL_OUT)/drivers/nfc/pn7160/nxpnfc_i2c.ko else BOARD_VENDOR_RAMDISK_KERNEL_MODULES += \ $(KERNEL_OUT)/drivers/input/touchscreen/goodix_ts.ko \ $(KERNEL_OUT)/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_i2c.ko Endif   - Add the following to the Compatibility_matrix.xml <compatibility-matrix version="1.0" type="device"> <hal format="native" optional="false"> <name>netutils-wrapper</name> <version>1.0</version> </hal> <hal format="aidl" optional="true"> <name>android.hardware.emvco</name> <version>1</version> <interface> <name>IEmvco</name> <instance>default</instance> </interface> </hal> </compatibility-matrix>   - Add the following to the device_framework_matrix.xml <compatibility-matrix version="1.0" type="framework"> <hal format="aidl" optional="true"> <name>nxp.hardware.secureime</name> <version>1</version> <interface> <name>ISecureIME</name> <instance>default</instance> </interface> </hal> <hal format="aidl" optional="true"> <name>nxp.hardware.imx_dek_extractor</name> <version>1</version> <interface> <name>IDek_Extractor</name> <instance>default</instance> </interface> </hal> <hal format="aidl" optional="true"> <name>vendor.nxp.nxpnfc</name> <version>2</version> <interface> <name>INxpNfc</name> <instance>default</instance> </interface> </hal> <hal format="aidl" optional="true"> <name>android.hardware.emvco</name> <version>1</version> <interface> <name>IEmvco</name> <instance>default</instance> </interface> </hal> </compatibility-matrix>   - Add the following to the evk_8mn.mk # ------nfc------- $(call inherit-product, vendor/nxp/nfc/device-nfc.mk) $(call inherit-product, vendor/nxp/emvco/device-emvco.mk) PRODUCT_PACKAGES += \ android.hardware.nfc-service.nxp PRODUCT_PACKAGES += \ com.nxp.emvco \ com.nxp.nfc \ nfc_nci_nxp_pn72xx   - Add the nxpnfc_i2c in init.rc # Grant permission for fetching available_pages info of statsd chown system system /proc/pagetypeinfo chmod 0440 /proc/pagetypeinfo exec u:r:vendor_modprobe:s0 -- /vendor/bin/modprobe -a -d \ /vendor/lib/modules nxpnfc_i2c write /sys/power/wake_lock nosleep on post-fs-data && property:vendor.skip.charger_not_need=0 setprop vold.post_fs_data_done 1   - Add nxpnfc to ueventd.nxp.rc /sys/devices/virtual/thermal/thermal_zone* trip_point_0_hyst 0660 system system /sys/devices/virtual/thermal/thermal_zone* trip_point_1_hyst 0660 system system /dev/dmabuf_imx 0664 system system /sys/class/backlight/* brightness 0660 system system /dev/ttymxc1 0666 nfc nfc /dev/ttymxc2 0666 nfc nfc /dev/nxpnfc 0666 nfc nfc # for libcamera /dev/media* 0660 system camera /dev/v4l-subdev* 0660 system camera   5. Apply the NXP AOSP patches As the official NXP NFC patches is only for AOSP android-15.0.0_r1, and there are big different between android-15.0.0_r1 and android-15.0.0_r32. So, before apply the patches, I copy the nfc folders from android-15.0.0_r1 to replace the nfc folders in android-15.0.0_r32.   First, download the AOSP android-15.0.0_r1 from github. $ mkdir android-15.0.0_r1 $ cd android-15.0.0_r1 $ repo init -u https://android.googlesource.com/platform/manifest -b android-15.0.0_r1 $ repo sync   Then, remove the following folders from android-15.0.0_r32. And then copy the following nfc folders from android-15.0.0_r1 to replace the same folders in android-15.0.0_r32. packages/apps/Nfc frameworks/base/nfc frameworks/base/nfc-extras system/nfc   for example: $ rm -rf android_build/packages/apps/Nfc $ cp -ra android-15.0.0_r1/packages/apps/Nfc android_build/packages/apps/   I write a script to download the patches from the github. Customer could put the following scripts on the same directory with android_build. AOSP_adaptation.sh # nxp_nci_hal_nfc git clone "https://github.com/nxp-nfc-infra/nxp_nci_hal_nfc.git" cd nxp_nci_hal_nfc git checkout br_ar_15_comm_infra_dev cp -rf * ../android_build/packages/apps/Nfc/ cd .. # nxp_nci_hal_libnfc-nci git clone "https://github.com/nxp-nfc-infra/nxp_nci_hal_libnfc-nci.git" cd nxp_nci_hal_libnfc-nci git checkout br_ar_15_comm_infra_dev cp -rf * ../android_build/system/nfc/ cd .. # nfcandroid_nfc_hidlimpl git clone "https://github.com/nxp-nfc-infra/nfcandroid_nfc_hidlimpl.git" cd nfcandroid_nfc_hidlimpl git checkout br_ar_15_comm_infra_dev cp -rf * ../android_build/hardware/nxp/nfc cd .. # nfcandroid_frameworks git clone "https://github.com/nxp-nfc-infra/nfcandroid_frameworks.git" cd nfcandroid_frameworks git checkout br_ar_15_comm_infra_dev mkdir ../android_build/vendor/nxp/frameworks cp -rf * ../android_build/vendor/nxp/frameworks cd .. # nfcandroid_emvco_aidlimpl git clone "https://github.com/nxp-nfc-infra/nfcandroid_emvco_aidlimpl.git" cd nfcandroid_emvco_aidlimpl git checkout br_ar_15_comm_infra_dev mkdir ../android_build/hardware/nxp/emvco cp -rf * ../android_build/hardware/nxp/emvco cd .. # nfcandroid_platform_reference git clone "https://github.com/nxp-nfc-infra/nfcandroid_platform_reference.git" cd nfcandroid_platform_reference git checkout br_ar_15_comm_infra_dev cp -rf vendor/nxp/* ../android_build/vendor/nxp/ cd .. # nfcandroid_infra_test_apps git clone https://github.com/nxp-nfc-infra/nfcandroid_infra_test_apps.git cd nfcandroid_infra_test_apps/ git checkout br_ar_15_comm_infra_dev cd test_apps/ cp -rf SMCU_Switch/ ../../android_build/packages/apps/ cp -rf EMVCoModeSwitchApp/ ../../android_build/packages/apps/Nfc/ cp -rf load_unload/ ../../android_build/hardware/nxp/nfc/ cp -rf SelfTestAidl/ ../../android_build/hardware/nxp/nfc/ cd ../.. # nfcandroid_infra_comm_libs git clone "https://github.com/nxp-nfc-infra/nfcandroid_infra_comm_libs.git" cd nfcandroid_infra_comm_libs git checkout br_ar_15_comm_infra_dev cp -rf nfc_tda/ ../android_build/system/ cp -rf emvco_tda/ emvco_tda_test/ ../android_build/hardware/nxp/emvco/ cp -rf NfcTdaTestApp/ ../android_build/packages/apps/Nfc/ cd ..   Apply_patches.sh cd android_build/build/bazel/ patch -p1 < ../../../nfcandroid_platform_reference/build_cfg/build_pf_patches/AROOT_build_bazel.patch cd ../release patch -p1 < ../../../nfcandroid_platform_reference/build_cfg/build_pf_patches/AROOT_build_release.patch cd ../../external/libchrome patch -p1 < ../../../nfcandroid_platform_reference/build_cfg/build_pf_patches/AROOT_external_libchrome.patch cd ../../frameworks/base patch -p1 < ../../../nfcandroid_platform_reference/build_cfg/build_pf_patches/AROOT_frameworks_base.patch cd ../../system/logging patch -p1 < ../../../nfcandroid_platform_reference/build_cfg/build_pf_patches/AROOT_system_logging.patch   So, run the AOSP_adaptation.sh first, then run the Apply_patches.sh.   6. Put changes into hardwatre/interfaces/compatibility_matrices Different compatibility matrix for different Android versions. File: android_build/hardware/interfaces/compatibility_matrices/compatibility_matrix.202404.xml <hal format="aidl"> <name>android.hardware.audio.effect</name> <version>1-2</version> <interface> <name>IFactory</name> <instance>default</instance> </interface> </hal> + <hal format="aidl" optional="true"> + <name>nxp.hardware.imx_dek_extractor</name> + <version>1</version> + <interface> + <name>IDek_Extractor</name> + <instance>default</instance> + </interface> + </hal> + <hal format="aidl" optional="true"> + <name>vendor.nxp.nxpnfc</name> + <version>2</version> + <interface> + <name>INxpNfc</name> + <instance>default</instance> + </interface> + </hal> + <hal format="aidl" optional="true"> + <name>vendor.nxp.emvco</name> + <version>1</version> + <interface> + <name>INxpEmvco</name> + <instance>default</instance> + </interface> + </hal> <hal format="aidl"> <name>android.hardware.audio.sounddose</name> <version>1-3</version>   7. Change the device specific .mk For pn7160, NXP_NFC_HW should equal to pn7160. For pn7220, NXP_NFC_HW should equal to pn7220_i2cs.   File : android_build/vendor/nxp/nfc/device-nfc.mk ##### ##### NXP NFC Device Configuration makefile ###### NXP_NFC_HOST := $(TARGET_PRODUCT) ifndef TARGET_NXP_NFC_HW NXP_NFC_HW := pn7160 else NXP_NFC_HW := $(TARGET_NXP_NFC_HW) endif NXP_NFC_PLATFORM := pn54x NXP_VENDOR_DIR := nxp NXP_I2CM_S := $(TARGET_NXP_I2C_M_S)   File: android_build/vendor/nxp/emvco/device-emvco.mk NXP_VENDOR_DIR := nxp NXP_NFC_HW := $(TARGET_NXP_NFC_HW) ifeq ($(strip $(TARGET_NXP_NFC_HW)),) NXP_NFC_HW := pn7160 endif # Nfc service has dependency with EMVCo JAR PRODUCT_PACKAGES += \ com.nxp.emvco   8. Now, you can start to build the Android BSP For i.MX8MN EVK,  $ source build/envsetup.sh $ lunch evk_8mn-nxp_stable-userdebug $ export TARGET_RELEASE=nxp_stable $ build_build_var_cache $ ./imx-make.sh -j4 2>&1 | tee build-log.txt   When building the BSP, there will have many errors during the build. I list some errors and the reference solution below for customer reference.  Error :  Complain about the nfc_aconifg_flags.   Workaround : packages/apps/Nfc/flags/Android.bp aconfig_declarations { // name: "nfc_aconfig_flags", name: "com.android.nfc.flags-aconfig", package: "com.android.nfc.flags", container: "system", srcs: ["nfc_flags.aconfig"], } java_aconfig_library { // name: "nfc_aconfig_flags_lib", // aconfig_declarations: "nfc_aconfig_flags", name: "com.android.nfc.flags-aconfig-java", aconfig_declarations: "com.android.nfc.flags-aconfig", min_sdk_version: "33", apex_available: [ "//apex_available:platform", "com.android.nfcservices", ], } java_library { name: "nfc_flags_lib", sdk_version: "system_current", min_sdk_version: "33", srcs: [ "lib/**/*.java", ], static_libs: [ "com.android.nfc.flags-aconfig-java", ],   Error: platform_testing/build/tasks/tests/native_test_list.mk: error: continuous_native_tests: Unknown installed file for module 'libnfc-nci-jni-tests'   Workaround: remove 'libnfc-nci-jni-tests' in  native_test_list.mk   Error: error: packages/apps/Nfc/tests/instrumentation/Android.bp:6:1: module "NfcNciInstrumentationTests" variant "android_common": cannot depend directly on java_sdk_library "android.test.runner"; try depending on "android.test.runner.stubs", "android.test.runner.stubs.system", "android.test.runner.stubs.test", or "android.test.runner.impl" instead   Workaround:  The hints are gave in the error message.. Change the "android.test.runner" to "android.test.runner.stubs", "android.test.runner.stubs.system", "android.test.runner.stubs.test", or "android.test.runner.impl".   Error: error: vendor/nxp/frameworks/nfc/Android.bp:12:1: module "com.nxp.nfc" variant "android_common": depends on //frameworks/base/nfc:framework-nfc.impl which is not visible to this module You may need to add "//vendor/nxp/frameworks/nfc" to its visibility   Workaround: File : frameworks/base/nfc/Android.bp permitted_packages: [ "android.nfc", "com.android.nfc", ], impl_library_visibility: [ "//frameworks/base:__subpackages__", "//cts/hostsidetests/multidevices/nfc:__subpackages__", "//cts/tests/tests/nfc", "//vendor:__subpackages__", "//packages/apps/Nfc:__subpackages__", ],     Error: packages/apps/Nfc/nci/src/com/android/nfc/dhimpl/NativeT4tNfceeManager.java:20: error: duplicate class: com.android.nfc.dhimpl.NativeT4tNfceeManager   Workaround: Edit the file packages/apps/Nfc/nci/src/com/android/nfc/dhimpl/NativeT4tNfceeManager.java then comment out the duplicated class.   Error: android/R.java:12483: error: could not resolve field FLAG_NFC_ASSOCIATED_ROLE_SERVICES     .annotation.FlaggedApi(android.nfc.Flags.FLAG_NFC_ASSOCIATED_ROLE_SERVICES)   Workaround: Edit the file frameworks/base/nfc/java/android/nfc/flags.aconfig Add the below flag. flag { name: "nfc_associated_role_services" is_exported: true namespace: "nfc" description: "Share wallet role routing priority with associated services" bug: "366243361" }   Error: FAILED: platform_testing/build/tasks/tests/native_test_list.mk: error: continuous_native_tests: Unknown installed file for module 'libnfc-nci-tests'   Workaround: Remove the libnfc-nci-tests in native_test_list.mk.   Error: prebuilts/clang/host/linux-x86/clang-r536225/include/c++/v1/string:780:43: error: implicit instantiation of undefined template 'std::char_traits<unsigned char>'   780 |   static_assert((is_same<_CharT, typename traits_type::char_type>::value),       |                                           ^ packages/apps/Nfc/nci/jni/NativeNfcTda.cpp:32:35: note: in instantiation of template class 'std::basic_string<unsigned char>' requested here    32 | static std::basic_string<uint8_t> sRxTdaDataBuff;       |                                   ^   Workaround: Edit the packages/apps/Nfc/nci/jni/NativeNfcTda.cpp using android::base::StringPrintf; extern bool nfc_debug_enabled; SyncEvent sCtLibSyncEvt; //static std::basic_string<uint8_t> sRxTdaDataBuff; static std::basic_string<char> sRxTdaDataBuff;   Error: packages/apps/Nfc/nci/jni/NativeT4tNfcee.cpp:493:21: error: no matching member function for call to 'append'   493 |       sRxDataBuffer.append(data.p_data, data.len);       |       ~~~~~~~~~~~~~~^~~~~~   Workaround:  Edit the packages/apps/Nfc/nci/jni/NativeT4tNfcee.cpp void NativeT4tNfcee::t4tReadComplete(tNFA_STATUS status, tNFA_RX_DATA data) { mT4tOpStatus = status; if (status == NFA_STATUS_OK) { if (data.len > 0) { sRxDataBuffer.insert(sRxDataBuffer.end(), data.p_data, data.p_data + data.len); LOG(DEBUG) << StringPrintf("%s: Read Data len new: %d ", __func__, data.len); } } SyncEventGuard g(mT4tNfcEeRWCEvent); mT4tNfcEeRWCEvent.notifyOne(); }   Error: frameworks/base/core/java/android/provider/Settings.java:2351: error: could not resolve field FLAG_NFC_ACTION_MANAGE_SERVICES_SETTINGS     @FlaggedApi(android.nfc.Flags.FLAG_NFC_ACTION_MANAGE_SERVICES_SETTINGS)   Workaround:  File: frameworks/base/nfc/java/android/nfc/flags.aconfig Add the following to the flags.aconfig flag { name: "nfc_action_manage_services_settings" is_exported: true namespace: "nfc" description: "Add Settings.ACTION_MANAGE_OTHER_NFC_SERVICES_SETTINGS" bug: "358129872" }   There are some errors are not listed in the table because there will have some hints to correct the error in the error message. Customer could follow the hints and base on the needs to modify the source code. Sometime, customer could compare the source code between r1 and r32. Here is the AOSP source code android-15.0.0_r32  and the android-15.0.0_r1.   9. Download the image to the i.MX8MN EVK board - Switch to download mode on the 8MN EVK board - Download the Android 15 BSP i.MX8MN EVK demo image from the Android BSP web page first. Because there are UUU script and necessary image files already in the demo image package.  - Download the UUU from here : Releases · nxp-imx/mfgtools - Put the UUU executable file into the demo image folder. uuu_imx_android_flash.bat is the script also in the same folder. - After your building is succeed, Copy the images to the demo image folder. The images are located in android_build/out/target/product/evk_8mn/ - Run the UUU script to download the images to the EVK board.     Reference: i.MX6ULL EVK running Yocto Linux + PN7160 Porting PN7160 to Android 14 on i.MX8M Nano board Android OS for i.MX Applications Processors | NXP Semiconductors PN7160/PN7220 – Android 15 porting guide Plug-n-Play NFC Frontend with Integrated Firmware | NXP Semiconductors  
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RF power regulation is a critical factor in the development of NFC devices, as it directly influences performance, reliability, and compliance with industry standards. There are three main reasons for this:  If the PN7642 VUP current exceeds the limit given by the product Data sheet, the PN7642 can be damaged. If too high RF power is radiated from the antenna, there exists a risk for NFC Cards. Too high RF power might lead to exceeding a given RF limit (NFC Forum, ISO, EMVCo). NXP provides comprehensive documentation on Dynamic Power Control for the PN7642 and PN5190. Designers are expected to adhere to these guidelines, especially when aiming for compliance with standards such as EMVCo. PN5190 Dynamic Power Control Quick Calibration and TxShaping Demo Automatic DPC Calibration for PN7642 and PN5190 However, if the user's design is intended for infrastructure applications, such as a smart lock. At a minimum, Dynamic Power Control (DPC) should be enabled to serve as a current limiter. The evaluation can be done with the help of NFC Cockpit.  1// Start DPC Calibration  "Press" Start DPC Calibration  "Press" Load protocol  Make sure that the DPC is "Enabled" 2// Adjust current reduction table  Set all entries to "0" Write into EEPROM   3// Set the "Target" current Use approx. the same current as "TxLDO Values"  The limit may be set higher, e.g., to 300 mA, if the purpose is solely to provide overcurrent protection for the IC. Save to EEPROM Restart the board (Close port -> Press VEN->Open port)   4// Check the power regulation  Start DPC Calibration  Place a card or any metal object in the antenna's proximity  Observe VDDPA and "TxLDO" current  The current should stay around the given target  The VDDPA will drop once the antenna is loaded  5// Set a minimum VDDPA in DPC  In the case that the current is still too high, a user can define a minimum VDDPA that is used for the DPC regulation. By default, this value is set to 2.2V. The user can decrease it up to 1.5V.  In that case, NXP also recommends disabling the RDOn control.  Note: The User has to consider the "DPC_TXLDO_MAX_DROPOUT" parameter, which defines the maximum voltage drop on TXLDO. By default, it is set to 3.6 V. That means if the user wants to use the minimum VDDPA 1.5 V, then the maximum TXLDO input shall not exceed 5.1 V. This feature protects the TXLDO from overheating.    Once the evaluation is done, the customer shall program the following EEPROM entries in their application. For more info, see PN7642 Product Data sheet.  DPC_CONFIG (Address: 0x0068) -> example: enabled -> 0x01 DPC_TARGET_CURRENT (Address: 0x0069) -> example: 229 mA -> 0xE5 DPC_TXLDO_MAX_DROPOUT (Addresses: 0x0073 - 0x0074) -> example: 3.6 V -> 0x10,0x0E DPC_TXLDOVDDPALow (Address: 0x006F) -> example: 1.5 V -> 0x00 DPC_HYSTERESIS_LOADING (Address: 0x006B) -> example: 20 mA -> 0x14 DPC_HYSTERESIS_UNLOADING (Address: 0x006E) -> example: 10 mA - 0x0A DPC lookup table entries (Addresses: 0x007D - 0x0125) -> example: for current limitation only -> all 0x00 If a user does not want to use a maximum range of VDDPA during DPC (5.7V), e.g., their system uses a 3.3V supply domain. Then, the maximum VDDPA in DPC can be limited by the following EEPROM settings:  TXLDO_VDDPA_MAX_RDR (Address: 0x0007)-> example: 3.0 V -> 0x0F Note: TXLDO has approx. 0.3V voltage drop. Always set this parameter 0.3V lower. Once this is done, the user has to check the "TxLDO" current and adjust the target current accordingly. In this case, to approximately 150 mA. If you don´t change it, the DPC starts to limit the power around 229 mA, as has been set in a previous step. 
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This article describes how to evaluate ULPCD feature together with PN7642 EVK (OM27642EVK) and NFC Cockpit.  1// Disable DC-DC in EEPROM  OM27642EVK does not required any HW changes for ULPCD (**). User is only required to change the following settings in EEPROM  (disable DC-DC converter). Address: 0x0000 (Secure_Lib_Config) Value: 0x21  Reset the board after writing the value.  **Note: To ensure an accurate and reliable ULPCD evaluation—particularly for ULPCD current measurements. We strongly recommend implementing the following hardware modifications on the OM27642EVK. Note: New revision of the board already have R4=DNP, R8=0Ω. Kindly check this on your board. 2//Set required ULPCD settings in EEPROM  ULPCD VDDPA -> Typically 1.5V. If the HF attenuator is 0x00, increase e.g. to 1.8 Since the detection range does not significantly depend on the power level, there is no need to set VDDPA above 2 V. Higher VDDPA results in increased current consumption in ULPCD, but does not significantly improve detection performance. RF On Guard time -> This value can be reduced to the minimum -> 5.2 us RSSI Guard time -> Recommended value is 25 RSSI Threshold -> Typically 4~6 Number of RSSI samples -> Typically -> 0 (4 rounds) 3// Perform "Reads HF Attenuator"  Once the required ULPCD settings is set (Guard times, Threshold....). Then User has to perform "Reads HF Attenuator". Make sure that the "HF Attenuator" option is checked.  As written above, the value must not be 0x00. If so, increase VDDPA. 4// Perform ULPCD Calibration and check RSSI Value  For OM27642EVK, the RSSI value for unloaded antenna is typically around 1400dec - 1600dec. 5//Enter ULPCD mode  User can enter the ULPCD mode. The board will again be connected once the load change is detected (e.g. NFC card or smartphone in the antenna proximity). 6// Typical detection performance for 65 mm x 65 mm Antenna tuned to 35Ω.   MIFARE DESFire EV3: Class 1 Antenna  ICODE SLIX: Class 1 Antenna  ICODE 3: Class 6 Antenna 
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Prerequities:  PN7642 design-in recommendations   1// Impedance tuning  PN76 family antenna design guide The target impedance is chosen based on the target application. If full power is required (e.g., POS terminals). The target impedance of 15-17 Ω is recommended. For lower power applications using ULPCD, the higher impedance is typically preferred, 30-50 Ω (symmetrical tuning).   2// Dynamic power control  PN7642 - Basic RF power limitation using DPC   3// H-Field check  There are given limits, especially for the maximum H-field radiated by the reader. Exceeding these limits might lead to destroying the NFC Card/NFC Tag.   The H-Field can be measured with the help of test equipment, as  ISO 10373-6 Test PICC EMVCo 3.0 Test PICC  For indication only, the customers can use "smart" Field Strength Probes as shown below :        Note: The most critical position occurs when the card is placed directly on the NFC antenna . In this case, if the H-field exceeds the maximum allowed level, the output power must be reduced using DPC settings. 4// HF Attenuator value  Turn on the RF Field with the DPC set and enabled from the previous step  Read the CLIF_RXCTRL_STATUS register and check the HF_ATT_VAL as shown below.    The value for the "unloaded" condition with full power shall be approximately 35-45dec.  If the value is out of this range, the customer is required to adjust the Rx resistors to reach this value.  5// Receiver settings  Check the "Power" range and Communication Range with the default settings provided by NXP.  Power Range -> The distance at which the NFC Tag can still generate its answer, but the NFC Reader does not see it  Communication Range -> The distance at which the NFC Tag can still communitate with the NFC Reader  Ideally, Power Range ≈ Communication Range Also, the NFC Reader should not generate any false communications as e.g., "HAL COLLISION ERROR".  The optimisation of the receiver can be done in the following way:  Enter DPC Calibration  Go to the "ARC" menu and "disable" the ARC algorithm     This will force the IC to use the RX settings from the following Register/EEPROM SIGPRO_RM_TECH_REG DGRM_RSSI_REG   5.1// SIGPRO_RM_TECH_REG (RM_MF_GAIN parameter) This parameter basically defines the gain of the input amplifier.  Select SIGPRO_RM_TECH_REG  Switch "operation" to EEPROM and choose the required technology  Increase the RM_MF_GAIN to 0x02 (it depends on the setup).     5.2// DGRM_RSSI_REG (DGRM_SIGNAL_DETECT_TH_OVR_VAL parameter) This parameter defines a threshold from which the internal logic starts to decode the incoming signal.  If the threshold is too low or very close to the noise floor, the system can detect the noise as an NFC Communication.  It is therefore,  Threshold + margin > noise floor The best routine is to perform "Signal Detection Threshold" analysis. This can be done with the help of the NFC Cockpit (described in PN7642 design-in recommendations) As a result, the user can obtain the mean value of the "Noise," and suggested "DGRM_SIGNAL_DETECT_TH_OVR_VAL" threshold based on the inserted "Margin."  Maring (m) + Noise mean value (μ) = Threshold  6+16=23 Then this value shall be written in "DGRM_RSSI_REG" EEPROM as shown below.      6// ULPCD Settings  We recommend the following ULPCD Settings as a starting point.  ULPCD VDDPA should be chosen in such a way that the HF Attenuator value is not 0x00! The typical value for HF Attenuator in ULPCD is around 0x05-0x0B.   6.1// RSSI Threshold evaluation  For a proper RSSI Threshold selection, it is recommended to perform the ULPCD Calibration, e.g., 20 times, and check the "jitter" of the RSSI signal for your device.    If you see that the RSSI value is jittering, e.g., 1 unit as shown above. The absolute minimum threshold for this case is 2. However, it is always recommended to include adequate margin (To prevent false wake-ups).   Generally, the margin of 2 units is sufficient. So in this case, the optimum threshold will be 4. 
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A user can evaluate the current consumption of PN7642 in low power modes with the help of the PN7642 Evaluation Board (OM27642) and:  MCUXpresso SKD example (LPCD)  NFC Cockpit or MCUXpresso SKD example (ULPCD) NXP defines the current consumption in ULPCD/LPCD as VBAT current + VDDIO current for the LPCD/ULPCD cycle time of 330 ms. Make sure that DC/DC is disabled (for ULPCD).  Where:  VBAT current = VBAT_Current + VBATPWR_Current + VUP_Current See the snapshot from the PN7642 Datasheet below:    See where to measure the currents on PN7642 EVK: J63 and J64 are used for enabling/disabling the LEDs that are connected to PN7642 GPIOs. They must be disabled for a proper VDDIO current measurement.  A modification of R69 and R70 is necessary to perform the current measurement on VDDIO in LPCD mode.   1. ULPCD current consumption evaluation For the ULPCD evaluation, the NFC Cockpit or SDK example can be used. In this article, we will focus on evaluation using the NFC Cockpit.  See the used ULPCD configuration:  Note: The current should be measured as an average over, e.g., 30 seconds.  1.1 Overall ULPCD current measurement  To measure all currents together on PN7642 EVK, a user can create a measurement fixture as shown below:  Real setup :  Then the overall results look as follows: Note: The Antenna is tuned to approx. 35 Ohms  In this case, the ULPCD current is approximately 21 μA. This current can be further optimized, for more details, see -> AN14518(Start-up optimization in ULPCD (PN5190/PN7642/PN76AC)) 2. LPCD current consumption evaluation The user has to import the example (pnev7642fama_nfc_low_power_mode_Pub) from the PN7642 SDK.  Before building it, the following change in the code has to be made:  -> Comment line 84   A user can adjust the LPCD cycle time as shown below:   1.1 VBAT Current measurement    In this case, the VBAT current is approximately 123 μA. 1.2 VBATPWR current measurement  In this case, the VBAT_PWR current is approximately 91,8 μA. 1.3 VUP Current measurement  In this case, the VBAT_PWR current is approximately 32,8 μA.  Note: This current depends on the LPCD VDPPA settings + Antenna Impedance tuning  1.4 VDDIO Current measurement Note: Before VDDIO measurement, place jumpers J63 and J64 on PN7642 EVK. This will disable LEDs that are connected to PN7642 GPIOs.  The VDDIO current measurement requires the following steps:  Run the "pnev7642fama_nfc_low_power_mode_Pub" example  Once the example is running, disconnect the debugger (J-link, LPC-Link...) from J21 (NFC Debug connector)    Remove R70  Populate a 10K resistor on the R69 position (it disables the SWD interface) Once the measurement is done, change it back to the default state (R70=0R, R69=Open). Note: It is recommended to prepare the board with the option to easily populate or remove R70 and R69 when the LPCD example is running. E.g., with the help of jumpers/pin headers as shown below.   Only then will the correct VDDIO be measured on PN7642 EVK.  See the VDDIO current measurement below:    In this case, the VDDIO current is approximately 5,48 μA.  Then the overall current comsumption in LPCD is I_VBAT + I_VDDIO= (123 + 91,8 + 32,8 + 5,48) = 253,08 μA Note: For this measurement, the NFC Cockpit is not suitable because the IC does not go into standby mode between LPCD RF pings. Meaning LPCD works normally, but a user can measure higher current consumption. Used Ampere meter -> Power Profiler Kit II Measurement has been performed with FW 2.6  Board supply (jumpers J1, J2 and J4) -> 3.3V Please note that this measurement is indication only! 
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This post provides guidance on how to port the example projects from the NXP NCI 2.0 NFC library to the MCXW71 Wireless MCU using SPI interface to communicate with PN7160 SPI EVK. To follow this guide, please use the following environment: MCUXpresso IDE 25.06.136. FRDM-MCXW71 SDK v25.12.00 (last available for MCUXpresso IDE). FRDM-MCXW71. OM27160B1 (PN7160 SPI EVK). Hardware Setup. The MCXW71 complies with the Arduino header standard as the OM27160B1 board, therefore you can connect directly the shield over the FRDM-MCXW71 as the pin connection match among both, allowing an easy connection between the devices. Take into consideration that this setup forces us to use the LPSPI1 instance of the MCXW71, it is possible to use another instance, but we would not be able to connect the boards directly, rather we would need to do the connections with jumpers. Downloading base projects and adapting for MCXW71 port. To start with the porting work, download the NXP-NCI example project from this page. This compressed file contains the base project for different boards that will allow us to do the required modifications to add support for the MCXW71. Once downloaded, extract the SW6705 file into a known path (e.g. the Downloads folder) to later import the project to the IDE. The extracted folder should contain a .zip file with the examples that we will later import to the IDE. Download the FRDM-MCXW71's SDK from the SDK Builder page, make sure to select the 25.12.00 version, as it is the latest SDK available to use along the MCUXpresso IDE. Now we have to import the NXP-NCI2.0_MCUXpresso_examples.zip file we previously extracted to the IDE's workspace, to do so, click on the Import project(s) from file system and in the Project archive (zip) tab, browse for the extracted file of step 1 (NXP-NCI2.0_MCUXpresso_examples.zip) and click on Next >. NOTE: Don’t worry if the IDE shows an error message for not having the SDKs of the default boards (iMXRT1170, LPC55S6x, LPC82x) or having a different version, close the warning message, we only need these examples to copy the NCI library and example files. Your workspace should now look like the following image: Import the hello_world example from the FRDM-MCXW71 SDK: Add the SPI drivers to the imported project by right clicking over the project, hover the cursor over the SDK Management option and select the option Manage SDK Components: Select the driver, click Ok and if you are asked to refresh files accept it, after this you should be able to see the driver in the "drivers" folder of the project. Copy the contents of the source folder of the iMXRT1170 project, as well as the NfcLibrary folder and paste them into the imported hello_world project:          Make sure to delete the hello_world.c and hello_word.mex files as we won't need it again.             After this process your project should look like the following image: To avoid compiling issues, exclude from the build the files nfc_example_P2P.c and nfc_example_RW.c, to do so right click on the file, go to Resource Configurations and select Exclude from Build… and select for all configurations. Do this for each file. Add the preprocessor macro: BOARD_NXPNCI_INTERFACE_SPI, as this is used by the example to select the interface with the board. To do this, right-click on the project and select Properties, then drop-down the C/C++ Build option and go to the Settings tab. Here, add the macro in the Preprocessor option, click on Apply and accept the index rebuild. Add the root folder in C/C++ General > Paths and Symbols > Source Location tab, click on Ok and then Apply: Still in Paths and Symbols, go to the Includes tab and add the source, TML and tool folders from workspace, click Ok and Apply. Make sure to add them one by one. Now, go to C/C++ Build > Settings > Includes and add the following folders from Workspace. You can select all of them and add them at the same time or also do it one by one. Once done, click on Apply and Apply and Close. If you are asked to rebuild the index, do it. "${workspace_loc:/${ProjName}/source/TML}" "${workspace_loc:/${ProjName}/source/tool}" "${workspace_loc:/${ProjName}/NfcLibrary}" "${workspace_loc:/${ProjName}/NfcLibrary/inc}" "${workspace_loc:/${ProjName}/NfcLibrary/NdefLibrary}" "${workspace_loc:/${ProjName}/NfcLibrary/NdefLibrary/inc}" "${workspace_loc:/${ProjName}/NfcLibrary/NdefLibrary/src}" "${workspace_loc:/${ProjName}/NfcLibrary/NxpNci20}" "${workspace_loc:/${ProjName}/NfcLibrary/NxpNci20/inc}" "${workspace_loc:/${ProjName}/NfcLibrary/NxpNci20/src}" Source Code Changes. In the board folder, open the board.h file and add the following definitions to refer to the peripherals and clocks to be used. Please notice that you may change the LPSPI instance, however you would need to connect jumpers instead of connecting directly the shield over the FRDM. #ifdef BOARD_NXPNCI_INTERFACE_SPI #define BOARD_NXPNCI_SPI_CLOCK (CLOCK_GetIpFreq(kCLOCK_Lpspi1)) #define BOARD_NXPNCI_SPI_INSTANCE (LPSPI1) #define BOARD_NXPNCI_SPI_BAUDRATE (400000) #endif #define BOARD_NXPNCI_IRQ_PORT (GPIOC) // J2.10 - GPIO0 [PN7160] - IRQ -> J2.10 GPIOC0 [MCXW71] #define BOARD_NXPNCI_VEN_PORT (GPIOA) // J4.1 - GPIO1 [PN7160] - VEN -> J1.8 GPIOA21 [MCXW71] #define BOARD_NXPNCI_DWL_PORT (GPIOA) // J4.2 - GPIO2 [PN7160] - REQ -> J1.7 GPIOA20 [MCXW71] #define BOARD_NXPNCI_IRQ_PIN (0U) #define BOARD_NXPNCI_VEN_PIN (21U) #define BOARD_NXPNCI_DWL_PIN (20U)   Now we need to add the required clock, peripheral and pin initialization for our board. To do this, go to the hardware_init.c file inside the board folder, and overwrite the BOARD_InitHardware function with the following: void BOARD_InitHardware(void) { BOARD_InitPins(); BOARD_BootClockRUN(); BOARD_InitDebugConsole(); CLOCK_SetIpSrc(kCLOCK_Lpspi1, kCLOCK_IpSrcFro192M); CLOCK_SetIpSrcDiv(kCLOCK_Lpspi1, kSCG_SysClkDivBy16); }   To add the correct pin multiplexing and configuration for our SPI and GPIO pins, go to the pin_mux.c file (also in the board folder) and overwrite the BOARD_InitPins function with the following: void BOARD_InitPins(void) { /* Clock Configuration: Peripheral clocks are enabled; module does not stall low power mode entry */ CLOCK_EnableClock(kCLOCK_GpioA); CLOCK_EnableClock(kCLOCK_GpioC); CLOCK_EnableClock(kCLOCK_PortA); CLOCK_EnableClock(kCLOCK_PortB); CLOCK_EnableClock(kCLOCK_PortC); /*IF SHORTING SH11, SH12, SH13, SH14 needed for LPSPI1*/ const port_pin_config_t portb0_pin46_config = {/* Internal pull-up resistor is enabled */ (uint16_t)kPORT_PullUp, /* Low internal pull resistor value is selected. */ (uint16_t)kPORT_LowPullResistor, /* Fast slew rate is configured */ (uint16_t)kPORT_FastSlewRate, /* Passive input filter is disabled */ (uint16_t)kPORT_PassiveFilterDisable, /* Open drain output is disabled */ (uint16_t)kPORT_OpenDrainDisable, /* Low drive strength is configured */ (uint16_t)kPORT_LowDriveStrength, /* Normal drive strength is configured */ (uint16_t)kPORT_NormalDriveStrength, /* Pin is configured as LPSPI0_PCS0 */ (uint16_t)kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ (uint16_t)kPORT_UnlockRegister}; /* PORTB0 (pin 46) is configured as LPSPI1_PCS0 */ PORT_SetPinConfig(PORTB, 0U, &portb0_pin46_config); const port_pin_config_t portb1_pin47_config = {/* Internal pull-up resistor is enabled */ (uint16_t)kPORT_PullUp, /* Low internal pull resistor value is selected. */ (uint16_t)kPORT_LowPullResistor, /* Fast slew rate is configured */ (uint16_t)kPORT_FastSlewRate, /* Passive input filter is disabled */ (uint16_t)kPORT_PassiveFilterDisable, /* Open drain output is disabled */ (uint16_t)kPORT_OpenDrainDisable, /* Low drive strength is configured */ (uint16_t)kPORT_LowDriveStrength, /* Normal drive strength is configured */ (uint16_t)kPORT_NormalDriveStrength, /* Pin is configured as LPSPI0_SIN */ (uint16_t)kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ (uint16_t)kPORT_UnlockRegister}; /* PORTB1 (pin 47) is configured as LPSPI1_SIN */ PORT_SetPinConfig(PORTB, 1U, &portb1_pin47_config); const port_pin_config_t portb3_pin1_config = {/* Internal pull-up resistor is enabled */ (uint16_t)kPORT_PullUp, /* Low internal pull resistor value is selected. */ (uint16_t)kPORT_LowPullResistor, /* Fast slew rate is configured */ (uint16_t)kPORT_FastSlewRate, /* Passive input filter is disabled */ (uint16_t)kPORT_PassiveFilterDisable, /* Open drain output is disabled */ (uint16_t)kPORT_OpenDrainDisable, /* Low drive strength is configured */ (uint16_t)kPORT_LowDriveStrength, /* Normal drive strength is configured */ (uint16_t)kPORT_NormalDriveStrength, /* Pin is configured as LPSPI0_SOUT */ (uint16_t)kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ (uint16_t)kPORT_UnlockRegister}; /* PORTB3 (pin 1) is configured as LPSPI1_SOUT */ PORT_SetPinConfig(PORTB, 3U, &portb3_pin1_config); const port_pin_config_t portb2_pin48_config = {/* Internal pull-up resistor is enabled */ (uint16_t)kPORT_PullUp, /* Low internal pull resistor value is selected. */ (uint16_t)kPORT_LowPullResistor, /* Fast slew rate is configured */ (uint16_t)kPORT_FastSlewRate, /* Passive input filter is disabled */ (uint16_t)kPORT_PassiveFilterDisable, /* Open drain output is disabled */ (uint16_t)kPORT_OpenDrainDisable, /* Low drive strength is configured */ (uint16_t)kPORT_LowDriveStrength, /* Normal drive strength is configured */ (uint16_t)kPORT_NormalDriveStrength, /* Pin is configured as LPSPI0_SCK */ (uint16_t)kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ (uint16_t)kPORT_UnlockRegister}; /* PORTA19 (pin 14) is configured as LPSPI1_SCK */ PORT_SetPinConfig(PORTB, 2U, &portb2_pin48_config); /*IF SHORTING SH11, SH12, SH13, SH14 needed for LPSPI1*/ const port_pin_config_t irq_pin = {/* Internal pull-up/down resistor is disabled */ (uint16_t)kPORT_PullUp, /* Low internal pull resistor value is selected. */ (uint16_t)kPORT_LowPullResistor, /* Fast slew rate is configured */ (uint16_t)kPORT_FastSlewRate, /* Passive input filter is disabled */ (uint16_t)kPORT_PassiveFilterDisable, /* Open drain output is disabled */ (uint16_t)kPORT_OpenDrainDisable, /* Low drive strength is configured */ (uint16_t)kPORT_LowDriveStrength, /* Normal drive strength is configured */ (uint16_t)kPORT_NormalDriveStrength, /* Pin is configured as PTC0 */ (uint16_t)kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ (uint16_t)kPORT_UnlockRegister}; /* PORTC0 (pin 37) is configured as PTC0 */ PORT_SetPinConfig(PORTC, 0U, &irq_pin); const port_pin_config_t ven_pin = {/* Internal pull-up/down resistor is disabled */ (uint16_t)kPORT_PullDisable, /* Low internal pull resistor value is selected. */ (uint16_t)kPORT_LowPullResistor, /* Fast slew rate is configured */ (uint16_t)kPORT_FastSlewRate, /* Passive input filter is disabled */ (uint16_t)kPORT_PassiveFilterDisable, /* Open drain output is disabled */ (uint16_t)kPORT_OpenDrainDisable, /* Low drive strength is configured */ (uint16_t)kPORT_LowDriveStrength, /* Normal drive strength is configured */ (uint16_t)kPORT_NormalDriveStrength, /* Pin is configured as PTA20 */ (uint16_t)kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ (uint16_t)kPORT_UnlockRegister}; /* PORTA20 (pin 17) is configured as PTA20 */ PORT_SetPinConfig(PORTA, 20U, &ven_pin); const port_pin_config_t req_pin = {/* Internal pull-up/down resistor is disabled */ (uint16_t)kPORT_PullDisable, /* Low internal pull resistor value is selected. */ (uint16_t)kPORT_LowPullResistor, /* Fast slew rate is configured */ (uint16_t)kPORT_FastSlewRate, /* Passive input filter is disabled */ (uint16_t)kPORT_PassiveFilterDisable, /* Open drain output is disabled */ (uint16_t)kPORT_OpenDrainDisable, /* Low drive strength is configured */ (uint16_t)kPORT_LowDriveStrength, /* Normal drive strength is configured */ (uint16_t)kPORT_NormalDriveStrength, /* Pin is configured as PTA21 */ (uint16_t)kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ (uint16_t)kPORT_UnlockRegister}; /* PORTA21 (pin 18) is configured as PTA21 */ PORT_SetPinConfig(PORTA, 21U, &req_pin); const port_pin_config_t portc2_pin39_config = {/* Internal pull-up/down resistor is disabled */ (uint16_t)kPORT_PullDisable, /* Low internal pull resistor value is selected. */ (uint16_t)kPORT_LowPullResistor, /* Fast slew rate is configured */ (uint16_t)kPORT_FastSlewRate, /* Passive input filter is disabled */ (uint16_t)kPORT_PassiveFilterDisable, /* Open drain output is disabled */ (uint16_t)kPORT_OpenDrainDisable, /* Low drive strength is configured */ (uint16_t)kPORT_LowDriveStrength, /* Normal drive strength is configured */ (uint16_t)kPORT_NormalDriveStrength, /* Pin is configured as LPUART1_RX */ (uint16_t)kPORT_MuxAlt3, /* Pin Control Register fields [15:0] are not locked */ (uint16_t)kPORT_UnlockRegister}; /* PORTC2 (pin 39) is configured as LPUART1_RX */ PORT_SetPinConfig(PORTC, 2U, &portc2_pin39_config); const port_pin_config_t portc3_pin40_config = {/* Internal pull-up/down resistor is disabled */ (uint16_t)kPORT_PullDisable, /* Low internal pull resistor value is selected. */ (uint16_t)kPORT_LowPullResistor, /* Fast slew rate is configured */ (uint16_t)kPORT_FastSlewRate, /* Passive input filter is disabled */ (uint16_t)kPORT_PassiveFilterDisable, /* Open drain output is disabled */ (uint16_t)kPORT_OpenDrainDisable, /* Low drive strength is configured */ (uint16_t)kPORT_LowDriveStrength, /* Normal drive strength is configured */ (uint16_t)kPORT_NormalDriveStrength, /* Pin is configured as LPUART1_TX */ (uint16_t)kPORT_MuxAlt3, /* Pin Control Register fields [15:0] are not locked */ (uint16_t)kPORT_UnlockRegister}; /* PORTC3 (pin 40) is configured as LPUART1_TX */ PORT_SetPinConfig(PORTC, 3U, &portc3_pin40_config); }   To add the required interfacing APIs specific of our chip, we need to modify the tml.c file from the TML folder, in this file overwrite the functions: INTF_INIT, INTF_WRITE and INTF_READ with the following: static void INTF_INIT(void) { lpspi_master_config_t userConfig; uint32_t srcFreq = 0; /*SPI configuration*/ LPSPI_MasterGetDefaultConfig(&userConfig); userConfig.baudRate = BOARD_NXPNCI_SPI_BAUDRATE; srcFreq = BOARD_NXPNCI_SPI_CLOCK; userConfig.whichPcs = (lpspi_which_pcs_t)kLPSPI_Pcs0; userConfig.pcsActiveHighOrLow = (lpspi_pcs_polarity_config_t)kLPSPI_PcsActiveLow; /*Initialize SPI*/ LPSPI_MasterInit(BOARD_NXPNCI_SPI_INSTANCE, &userConfig, srcFreq); } static status_t INTF_WRITE(uint8_t *pBuff, uint16_t buffLen) { uint8_t temp[1000]; temp[0] = 0x7F; memcpy(temp+1, pBuff, buffLen); masterXfer.txData = temp; masterXfer.rxData = NULL; masterXfer.dataSize = buffLen+1; masterXfer.configFlags = kLPSPI_MasterPcs0 | kLPSPI_MasterPcsContinuous | kLPSPI_MasterByteSwap;; return LPSPI_MasterTransferBlocking(BOARD_NXPNCI_SPI_INSTANCE, &masterXfer); } static status_t INTF_READ(uint8_t *pBuff, uint16_t buffLen) { status_t status; uint8_t temp[257]; temp[0] = 0xFF; masterXfer.txData = temp; masterXfer.rxData = temp; masterXfer.dataSize = buffLen+1; masterXfer.configFlags = kLPSPI_MasterPcs0 | kLPSPI_MasterPcsContinuous | kLPSPI_MasterByteSwap;; status = LPSPI_MasterTransferBlocking(BOARD_NXPNCI_SPI_INSTANCE, &masterXfer); if(status == kStatus_Success) memcpy(pBuff, temp+1, buffLen); SDK_DelayAtLeastUs(10, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY); return status; } #endif   We also need to overwrite the functions: tml_Init, tml_DeInit and tml_Reset to adapt them to use the specific APIs for the GPIOs of our board. static Status tml_Init(void) { gpio_pin_config_t in_config = {kGPIO_DigitalInput, 0}; gpio_pin_config_t out_config = {kGPIO_DigitalOutput, 0}; GPIO_PinInit(BOARD_NXPNCI_IRQ_PORT, BOARD_NXPNCI_IRQ_PIN, &in_config); GPIO_PinInit(BOARD_NXPNCI_VEN_PORT, BOARD_NXPNCI_VEN_PIN, &out_config); GPIO_PinInit(BOARD_NXPNCI_DWL_PORT, BOARD_NXPNCI_DWL_PIN, &out_config); INTF_INIT(); return SUCCESS; } static Status tml_DeInit(void) { GPIO_PortClear(BOARD_NXPNCI_VEN_PORT, 1U << BOARD_NXPNCI_VEN_PIN); return SUCCESS; } static Status tml_Reset(void) { /* Set DWL_REQ low for NCI protocol */ GPIO_PortClear(BOARD_NXPNCI_DWL_PORT, 1U << BOARD_NXPNCI_DWL_PIN); GPIO_PortClear(BOARD_NXPNCI_VEN_PORT, 1U << BOARD_NXPNCI_VEN_PIN); Sleep(10); GPIO_PortSet(BOARD_NXPNCI_VEN_PORT, 1U << BOARD_NXPNCI_VEN_PIN); Sleep(10); return SUCCESS; }   Finally, modify the main file so it uses the APIs to initialize our board clocks and pins: #include <stdio.h> #include <string.h> #include "app.h" #include "board.h" #include "pin_mux.h" #include "fsl_debug_console.h" extern void nfc_example (void); int main(void) { BOARD_InitHardware(); #ifdef BOARD_NXPNCI_INTERFACE_I2C PRINTF("\nRunning the NXP-NCI2.0 example (I2C interface)\n"); #else PRINTF("\nRunning the NXP-NCI2.0 example (SPI interface)\n"); #endif nfc_example(); } Testing the example. At this point we have everything set to build and flash our example with SPI interface, you may proceed to build and debug/flash the example by pressing the blue beetle button: Once the example is flashed, open a serial terminal such as Teraterm with the following settings: Baudrate: 115200. Data: 8 bits. Parity: None. Stop bits: 1 bit. No flow control. While running, the example should output the following logs to the terminal: When a tag is placed near the antenna, the example should print the tag information in the terminal as shown:  
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The PN7642/PN5190/PN7220 requires a calibration before the RF field is switched on for the first time with unloaded condition. "Unloaded" means: Without any additional metal in proximity of the antenna, except for the NFC reader components itself. During development of new readers, this calibration shall be done each time the antenna design, antenna matching, or EMC filter is modified. See a workflow of the Initial calibration for PN7642 done in NFC Cockpit.  During this procedure, the RF Field is switched on for approx. 11 ms, and the calibration data is saved in the memory. Note: Please note that the registers and EEPROM addresses might differ for a different products. Always check the Datasheet for the used product. 
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DISCLAIMER APPLICABLE TO THIS DOCUMENT CONTENTS:   PN5190-NTAG 5 boost High Speed Communication Demo This article describes the unique feature of these two chips when interacting with each other at contactless interface: Passthrough demonstrator at high bit rates for ISO 15693 between PN5190 and NTAG5 Boost. Scope of demonstrator: ▪ Demonstrating a unique feature of NXP Semiconductors. High bit rates for ISO15693 communication (212 kbps) between a PN5190 reader IC and an NTAG5 boost connected to LPC55S69 host MCU, when implementing passthrough mode using the SRAM of the NTAG 5 boost. ▪ Through MCUXpresso console, the user can configure the contactless bit rate (26.4kbps or 212kbps options) as well as the amount of data to exchange using passthrough mode. ▪ Passthrough mode is implemented from NFC reader to LPC side only. ▪ The PN5190 prints on the MCUXpresso console the outcome of the transaction and baud rate achieved. ▪ In order to handle passthrough communication, we are using GPIO interrupt handlers on the NTAG 5 boost + LPC55S69 side and hard coded timeout on the PN5190 + MCU side. Required hardware and software material: Hardware ▪ PNEV5190BP development board ▪ LPCXpresso55S69 Development Board ▪ OM2NTA5332 - NTAG5 boost development kit ▪ 3 x USB micro cables Software ▪ Firmware Source Code for PN5190 is attached to this article, containing keywork pn5190: HIGHSPEED_PN5190_NTAG5boost1.zip ▪ SDK_2.x_FRDM-K82F is already included in bundle mentioned above. ▪ Firmware Source Code for LPCXpresso55S69 is attached to this article, containing keyword lpc55s69: NTAG5boost_LPC55S69.zip ▪ MCUXpresso IDE recent version (v24.12.148 or newer) Demonstrator bring up: Hardware assembly for LPCXpresso55S69: • Connect NTAG5 Boost board to LPCXpresso55S69 • Make sure SW6 is on position 2-3 to enable 5V power on tag side (it will also work at 3.3V but maybe with less readrange). • Connect LPCXpresso55S69 board to your computer (Debug Link Input). • No additional power source is needed. Hardware assembly for PNEV5190BP: • Connect two USB micro cables to PNEV5190B board for power and flashing firmware via UART connection (alternatively, you may change jumper J9 to position 2-3 and connect an external power supply, Vin > 7 Volts) • Red LED indicates power is enabled • Green LED debugging/UART status Software loading on LPC55S69: Import “lpcxpresso55s69_ntag5_passthrough_nolib” project (included in NTAG5boost_LPC55S69.zip) into MCUXpresso IDE. • Install SDK_2_12_0_LPCXpresso55S69. This SDK can be downloaded from • https://www.nxp.com/security/login?service=https%3A%2F%2Fmcuxpresso.nxp.com%2Flogin%2F  • Build project and flash a binary file using GUI Flash Tool. After flashing, reboot your board. Blue LED must be enabled which means tag is waiting for field to be detected. Under MCUXpresso: 1. Import project from file system 2. Select lpcxpresso55s69 project 3. Uncheck copy projects into workspace Software loading on PNEV5190B: • Unzip the “HIGHSPEED_PN5190_NTAG5boost1.zip” in a folder. • Import all projects inside “HIGHSPEED_PN5190_NTAG5boost1” project to MCUXpresso IDE • Install SDK_2.x_FRDM-K82F. Such SDK is included in project file tree: • nxp-connected-tags-pn5190\Platform\SDK_2.x_FRDM-K82F • Build project and flash a binary file using GUI Flash Tool. After flashing, reboot your board. Blue LED must be enabled which means reader is waiting for NTAG5 to be detected. • Start Debug session to see available bitrate options on the console. Under MCUXpresso: 1. Import project from file system 2. Select all the projects 3. Uncheck copy projects into workspace LED User Interface Specifications (same for LPCXpresso55S69 an PNEV5190B) • Steady blue - waiting for Tag - discovery loop, • Blinking green - passthrough transfer ongoing • Steady green - all data transferred successfully. • Steady red - error - tag lost during transfer. Menu options when two boards have NFC antennas facing each other: Two options of bitrate are available for transfer amount of data from host to NTAG5 Boost: ▪  standard 26.4 kbps or ▪  highest bit rate 212 kbps It is possible to configure amount of data to be exchanged between PN5190 and NTAG 5 boost (check option 3, and then choose among following file dimensions): ▪1KByte ▪2KBytes ▪10KBytes ▪512KBytes Demonstration flow: Once one of these options is selected, reader is ready to detect a tag. ▪ When tag is detected, reader configures selected bitrate and starts data exchange. ▪ Blinking green LED indicates transfer ongoing and the console shows a progress. Here are some results of transaction at the different bit rates and data sizes offered by this demonstrator: Data Size (Bytes) Selected bitrate (kbps) Result Bitrate (kbps) Transfer time (ms) 1024 26.4 2.8 357 1024 212 12.35 81 2048 26.4 2.8 714 2048 212 12.42 161 10240 26.4 2.7 3569 10240 212 12.41 806 512000 26.4 2.8 177739 512000 212 12.63 39576   High speed demo user manual can be also find attached to this article: 22-10-11 NXP - Connected Tags demonstrator User Manual.pdf Conclusions: This demonstrator HW & SW can show that high speed interaction can be achieved between PN5190 (NFC Front end) and NTAG 5 boost, making use of available commands described in product support package. Disclaimer: All SW available here is aimed only for evaluation purposes and NXP disclaims any direct or indirect liability damages, since referred SW bundles are not official part of PN5190/NTAG 5 boost standard product support packages available in nxp.com.  
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PN5190-NTAG X DNA High Speed Communication Demo: This article describes important feature of these two chips when interacting with each other at contactless interface: Passthrough demonstrator at high bit rates for ISO/IEC14443-A between PN5190 and NTAG X DNA Scope of demonstrator: ▪ Demonstrating a unique feature of NXP Semiconductors. High bit rates for ISO14443 communication (up to 848 kbps) between a PN5190 reader IC and an NTAG X DNA when connected to MCXA153 host MCU, when simulating the transmission of a dummy file as big as 101 kbytes. ▪ Through MCUXpresso console, the user can configure the contactless bit rate: 106 kbps 212 kbps 424 kbps or 848 kbps The amount of data is fixed in this demo. ▪ transmission mode is implemented from NFC reader library at K82 MCU built in the PNEV5190BP evaluation kit. On the other side, NTAG X DNA + Level shifter (represented by evaluation kit NTAG-X-DNA-EVAL) is connected to a Freedom Board, equipped with MCXA153 - FRDM-MCXA153). ▪ The PN5190 prints on the MCUXpresso console (debug mode) the outcome of the transaction and average baud rate achieved. ▪ In order to handle full file transmission from K82 to MCXA153 (MCU <-> MCU communication), we are using NTAG X DNA GPIO wires as well as proper settings on the NTAG X DNA <-> MCXA153 side and hard coded timeout on the PN5190 + MCU side. For more details, please open attached file PN5190_NTAGXDNA_MCXA153_DualInterface_HBR_Demo_SetupInstructions_Q32025.pdf. Required hardware and software enablement: Hardware ▪ PNEV5190BP Development Board ▪ FRDM-MCXA153 Development Board ▪ NTAG X DNA Development Board ▪ 2 x USB micro cables (for PNEV5190BP dev. br., one for DC power, other for Jlink debug on MCUxpresso IDE) ▪ 1 x USB-C cable (for FRDM-MCXA153 dev. br., only for DC power) Software ▪ MCUxpresso project (firmware Source Code) for PNEV5190BP is attached to this article, containing keywork pn5190: pn5190-ntagxdna-highspeed-demo1.zip. Instructions will be given in from future release of NFC Reader Library public v07.14.00 (NxpNfcRdLib_PN5190_v07.14.00_Pub.zip). ▪ SDK_2.x_FRDM-K82F is already included in bundle mentioned above. ▪ Firmware Source Code for FRDM-MCXA153 is attached to this article, containing keyword MCXA153: MCXA153.zip ▪ MCUXpresso IDE recent version, for instance v24.12.148 or above. Demonstrator bring up: Hardware assembly for FRDM-MCXA153: • Connect NTAG X DNA to level shifter (see Fig. 1) • Connect bundle NTAG X DNA+ level shifter bundle to flat cable (contained in demokit box) to FRDM-MCXA153 according to Fig. 2. • Make sure each wire is connected to proper position in Arduino socket: - black wire IO2 goes to J1-14 - white wire IO1 goes to J1-16 - gray wire SCL goes to J2-20 - violet wire SDA goes to J2-18 - blue wire GND goes to J3-14 - green wire VCC goes to J3-8 • Connect FRDM-MCXA153 via J15 (MCU-Link) to your computer (Debug Link Input), for the first time that you have to flash binary in it. Then after storing binary, you may just connect USB-C cable from a power supply to J6 port (named Ext-debugger). • No additional power source is needed. Hardware assembly for PNEV5190B: • Connect two USB micro cables to PNEV5190B board for power, flashing firmware and UART connection (see Fig. 3): • microUSB on J7 is necessary for DC power. Check that jumper J9 is in the position USB dc supply • microUSB on J20 is the Jlink debug port, and it will be connected to your Windows computer, where MCUxpresso has been installed. • Red LED indicates power is enabled • Green LED debugging/UART status Alternatively, if you have a DC power supply (voltage above 7 V), you may change Jumper J9 to Ext power supply, and avoid using second microUSB cable. Software loading on FRDM-MCXA153: 1. Create a new workspace for MCXA153 MCUxpresso example: 2. Make sure you have installed MCXA153 SDK: - install MCXA153 SDK which can be downloaded from: https://mcuxpresso.nxp.com/  3. Unzip "MCXA153.zip" file in local C: directory, with reasonable path length. 4. Import existing projects from file system, into MCUXpresso IDE: 5. Select proper root directory (keyword is MCXA153): 6. Click "Finish" 7. If you get this warning, simply click "OK": 8. Highlight project, click "build", and check that there are no errors: Finished building target: MCXA153_NTAGXDNA_DualInterface_DataRead_Demo.axf Performing post-build steps arm-none-eabi-size "MCXA153_NTAGXDNA_DualInterface_DataRead_Demo.axf"; # arm-none-eabi-objcopy -v -O binary "MCXA153_NTAGXDNA_DualInterface_DataRead_Demo.axf" "MCXA153_NTAGXDNA_DualInterface_DataRead_Demo.bin" ; # checksum -p MCXA153 -d "MCXA153_NTAGXDNA_DualInterface_DataRead_Demo.bin";    text        data         bss         dec         hex     filename   23524          20        3684       27228        6a5c      MCXA153_NTAGXDNA_DualInterface_DataRead_Demo.axf 16:27:26 Build Finished. 0 errors, 0 warnings. (took 5s.787ms) 9. Now, flash the binary into MCXA153 MCU using GUI Flash tool; select suitable  MCUxpresso probe (CMSIS-DAP). Make sure USB-c cable is connected to J15 in Freedom board (MCU-link port for flashing FW). 10. Select binary file *.axf as indicated below: It may happen that your MCXA153 has outdated FW on CMSIS-DAP, but you can continue, it will make no harm; click then Ok to flash. 11. After flashing, reboot your board. Following LEDs should be on: - D15 RGB led should be "white" lit. - D7 should be blinking "red" - D8 and D4 should be "green" lit. D15 will blink "white" only during file transmission. You may disconnect USB-c from J15 (the one used with MCUxpresso for flah and connect it to J8. Then, plug the other cable tip to any USB  5 volt battery charger. Now your Freedom board FRDM-MCXA153 is ready to receive data from PNEV5190 board, once project will be imported too in MCUxpresso. Software loading on PNEV5190BP: 1. Unzip *.zip file in directory with reasonable path length. 2. Import existing projects from file system 3. Select Example 12 "NfcrdlibEx12_NTAGXDNA" 4. Uncheck the choice "copy projects into workspace" 5. Install SDK_2.x_FRDM-K82F if not yet done. Such SDK is included in project file tree: • ...Examples\Platform\SDK_2.x_FRDM-K82F • This specific SDK can be obtained from https://mcuxpresso.nxp.com/ by selecting following K82F tab related "PN5180" : • FRDM-K82F-PN5180 (MK82FN256xxx15) • SDK 2.0 is no longer officially available, but SDK 2.2 and newer are backward compatible and recommended by NXP • Build project and check that there are no errors ("warnings" are allowed). • Start Debug session to see available bitrate options on the console. Hardware combination of PNEV5190B and NTAG X DNA connected to FRDM-MCXA153: Under MCUXpresso: 1. Click "Debug" icon on quick access left panel. Accept agreement in case of J-Link tool: 2. Click on icon "Run" on top side of MCUxpresso, and observe the following on "Console" tab: [MCUXpresso Semihosting Telnet console for 'NfcrdlibEx12_NTAGXDNA_mcux JLink DebugFRDMK82F' started on port 59973 @ 127.0.0.1] SEGGER J-Link GDB Server V8.12a - Terminal output channel *** NTAG X DNA Example *** Please place NTAG X DNA Card and Select Demo option. 1 : Perform Data Read Write using AES128 Key Authentication 2 : Perform Data Read Write using ECC Sigma-I Authentication Host as Initiator with NIST P-256 Curve, session key AES128 3 : Perform Data Read Write using ECC Sigma-I Authentication Host as Responder with NIST P-256 Curve, session key AES128 4 : Perform HBR transfer to Microcontroller through NTAG X DNA. 5 : Configure NTAG X DNA for HBR transfer Enter your option : Menu options when two boards have NFC antennas facing each other: There are 5 options in console menu as soon as you "Run" the debug. 1 - options from 1 until and including 3 are related to crypto functionality (symmetric and asymmetric) and are out of the scope of this article. 2 - Then option 5 is used for the first time that you are configuring your NTAG X DNA product. It will set registers and GPIO properly for High bit rate transfer. Once you have run option 5, then go to option 4: 3 - Four options of bitrate are available for transfer a fixed amount of data from host (K82) to NTAG X DNA MCU (MCXA153) using PN5190 as tunnel: Please configure the required baud rate 1 : 106 Kbps 2 : 212 Kbps 3 : 424 Kbps 4 : 848 Kbps Enter your option : Demonstration flow: Once one of these option is selected, reader is ready to detect a tag. ▪ When tag is detected, reader configures selected bitrate and starts data exchange. ▪ Blinking RGB LED D15 indicates transfer ongoing and the console shows a progress. Here are some results of transaction at the different bit rates and data sizes offered by this demonstrator: 1 - 106 Kbps - Baud rate 7.6 kBytes/s - elapsed time: 13.99 s Type A Tag is discovered. ***** Perform Transfer sequence ******* Select Application Successful Select File Successful Data transferring NFC -> NTAG X DNA -> Microcontroller... Amount of data exchanged 101200 Bytes, Baudrate (total) = 7.6 kB/s, Time = 13.99 s Please Remove the Card   After removing the card, K82 firmware starts again prompting for a new selection, in the previous menu. First select 4 again and then chose again another new baud rate: 2 - 212 Kbps - Baud rate 10.51 kBytes/s - elapsed time: 9.39 s 3 - 424 Kbps - Baud rate 13.92 kBytes/s - elapsed time: 7.90 s 4 - 848 Kbps - Baud rate 16.60 kBytes/s - elapse time: 5.95 s   Using Example 12 of NFC Reader Library v.07.14.00 to prepare High Speed demo on PNEV5190BP and NTAG X DNA: 1. Go to https://nxp.com web site and type "NFC Reader Library" in Search tab. Follow the instructions until you get to this screenshot: 2. Start by downloading NFC Reader library V.07.14.00 from NXP website; agree with Terms and Conditions. Then download the bundle to your local C: drive: 3. Click on “down arrow” to download version 07.14.00. Once zip file is received, unzip previous bundle to a local drive directory.   4. Start a new workspace, then choose "Import from Existing Projects into Workspace": 5. De-select all useless Examples and keep only example 12; please including all other essential items; click "Finish": 6. If you find this error, it means you need to install K82F SDK: 7. Click install, then MCUxpresso SDKs pages will open. Select K82F from Processor tab: Click “Install” button; after installation is completed, you will get a screen showing all installed sdk's. Afterwards you may get the prompt "Make SDK persistent"; just click ok. 8. Highlight project NfcrdlibEx12_NTAGXDNA_mcux and click build; check if there are errors: Finished building target: NfcrdlibEx12_NTAGXDNA_mcux.axf Performing post-build steps arm-none-eabi-size "NfcrdlibEx12_NTAGXDNA_mcux.axf" ; arm-none-eabi-objcopy -O binary "NfcrdlibEx12_NTAGXDNA_mcux.axf" "NfcrdlibEx12_NTAGXDNA_mcux.bin" ; #checksum -p MK82FN256xxx15 -d "NfcrdlibEx12_NTAGXDNA_mcux.bin"    text        data         bss         dec         hex     filename  222400          92       86816     309308       4b83c      NfcrdlibEx12_NTAGXDNA_mcux.axf 17:32:59 Build Finished. 0 errors, 3 warnings. (took 33s.718ms) 9. Now, check in MCUxpresso the tab Windows > Preferences > Run/Debug. Untick the box related to General Options Build (if required) before launching; it will save you much time! Then, click button “Apply and Close”. 10. Using this Example 12 as it is given by NXP in this library, when you will debug it, you will realize that there are only 3 Menu options related to NTAG X DNA cryptography (and no high speed options). In order to “unlock” the high-speed demo option, please do the following. 11. Go to Quick Settings → Defined Symbols and open it in a new window: Now add after last symbol, the following line: "PH_EX12_ENABLE_DUALINTERFACE_HBR", by clicking on “add button” ("+" shown in green) on top right side of above window; add it manually then click OK two times. Now, build Ex12 again and check that there are no errors. 12. Debug Example 12, then press Run button and check if Console has 5 options in its Menu: Please place NTAG X DNA Card and Select Demo option. 1 : Perform Data Read Write using AES128 Key Authentication 2 : Perform Data Read Write using ECC Sigma-I Authentication Host as Initiator     with NIST P-256 Curve, session key AES128 3 : Perform Data Read Write using ECC Sigma-I Authentication Host as Responder     with NIST P-256 Curve, session key AES128 4 : Perform HBR transfer to Microcontroller through NTAG X DNA. 5 : Configure NTAG X DNA for HBR transfer Enter your option : 13. Let's focus on the last two options: 4 – perform HBR (high bit rate) transfer, and 5 – Configure your NTAG X DNA for HBR. 14. If this is the first time you are using this NTAG X DNA connected to MCXA153, then choose option 5 so that PN5190 will write proper configuration data to NTAG X DNA next to it. For this reason, turn on NTAG X DNA connected to FRDM-MCXA153 board (after powering it up with a simple 5V-USB source), and place NTAG X DNA antenna over PNEV5190BP board antenna (connected to MCUxpresso), as in picture shown above. Enter your option : 5 Ready to detect Type A Tag is discovered.       Select NDEF Application Successful       Authenticate Application Successful       SetConfig Successful       StdDataFile with File ID 0xE106 already exists. Please Remove the Card 15. Remove NTAG X DNA antenna from PN5190 antenna, until you get back to initial menu. Then, choose option 4 on previous menu: 4 : Perform HBR transfer to Microcontroller through NTAG X DNA. 5 : Configure NTAG X DNA for HBR transfer Enter your option : 4  Please configure the required baud rate 1 : 106 Kbps 2 : 212 Kbps 3 : 424 Kbps 4 : 848 Kbps Enter your option : 16. Now, choose the lowest speed "1"; check final result: Ready to detect Type A Tag is discovered. ***** Perform Transfer sequence *******       Select Application Successful       Select File Successful       Data transferring NFC -> NTAG X DNA -> Microcontroller...       Amount of data exchanged 101200 Bytes, Baudrate (total) = 5.72 kB/s, Time = 17.25 s Please Remove the Card 17. Separate both antennas, and then, choose option "2"; check final result: Enter your option : 2 Ready to detect Type A Tag is discovered. ***** Perform Transfer sequence *******       Select Application Successful       Select File Successful       Data transferring NFC -> NTAG X DNA -> Microcontroller… Amount of data exchanged 101200 Bytes, Baudrate (total) = 10.49 kB/s, Time = 9.41 s 18. Separate both antennas, and then, choose option "3"; check final result: Enter your option : 3 Ready to detect Type A Tag is discovered. ***** Perform Transfer sequence *******       Select Application Successful       Select File Successful       Data transferring NFC -> NTAG X DNA -> Microcontroller...       Amount of data exchanged 101200 Bytes, Baudrate (total) = 13.89 kB/s, Time = 7.11 s Please Remove the Card 19. Separate both antennas, and then, choose option "4"; check final result:  Enter your option : 4 Ready to detect Type A Tag is discovered. ***** Perform Transfer sequence *******       Select Application Successful       Select File Successful       Data transferring NFC -> NTAG X DNA -> Microcontroller...       Amount of data exchanged 101200 Bytes, Baudrate (total) = 16.57 kB/s, Time = 5.96 s Please Remove the Card Conclusions: This demonstrator HW & SW can show that high speed interaction can be achieved between PN5190 (NFC Front end) and NTAG X DNA (NFC connected tag), making use of available commands described in its product support package (https://www.nxp.com/products/NTAG-X-DNA). Disclaimer:All SW available here is aimed only for evaluation purposes and NXP disclaims any direct or indirect liability damages, since referred SW bundles are not yet official part of PN5190/NTAG X DNA standard product support packages currently available at nxp.com.  
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Step 1:  Disable the DCDC in settings (Valid for PNEV5190B and OM27642EVK) Write 0x21 into EEPROM PWR_CONFIG (address: 0x0000) This disables the DCDC. & selects that the VUP must be supplied with the same supply voltage as VBAT = VBATPWR. Do not enable RF afterwards, before the hardware is modified properly! Enabling the RF without supplying the VUP might kill the PN5190/PN7642! Step 2: Supply VUP = VBATPWR  Connect jumper J13 positions: 1-2: This supplies the VUP with VBATPWR = 3.3V PN5190 EVK: Please note that for a final application using ULPCD, the "DC-DC" inductor (L2) has to be replaced by a zero resistor/short.    PN7642 EVK:  The OM27642EVK does not require any jumper settings (DC-DC is not used by default), the User must only disable DC-DC in EEPROM (address 0x0000, value 0x21) Then you can turn-on RF and perform ULPCD   Please note that for a final application using ULPCD, the "DC-DC" inductor (L2) has to be replaced by a zero resistor/short.  Also, R8 shall be placed   
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LPCD (Low Power Card Detection) works on the principle that the I and Q values are extracted from the RF signal captured on the RX pins. These values are then compared with the I and Q data obtained using LPCD calibration. If the difference is greater than the chosen I and Q threshold, the load is detected and the IC wakes up.  1// LPCD Way of working  Run LPCD Calibration  It is recommended to use an external power supply to supply the EVK board. If the USB supply is used, the value can fluctuate because of the transition effects.  Run "Single LPCD" and check the performance  Adjust the I and Q thresholds  Low value -> Better detection range, more false wake-ups  High value -> Worse detection range, fewer false wake-ups  The number of samples, RSSI, and VDDPA parameters typically remain at their default values.  2// Auto LPCD  When the "Auto LPCD" is used, the LPCD algorithm always performs LPCD Calibration before entering the LPCD. 3//Semi-autonomous LPCD mode (PN5190 only)   The user can evaluate the I and Q values behaviour under loaded/unloaded conditions. Based on that, the LPCD threshold can be properly selected.  Use the same "Register" RSSI Target and Hysteresis as for "EEPROM" Calibrate LPCD Run "Endless I/Q read"  Check how the I and Q values change With no card/object in the antenna proximity  with a NFC card/object in the antenna proximity
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This might be convenient if the user wants to use NFC Cockpit on their device.  See the photo of PNEV5190BP EVK with the instructions.          1. Place R5 and R7, keep R6 open    2. Place R20, keep R19 open Note: This step depends on the voltage domain used in the external hardware. If R19 is placed -> 1.8V domain, if R20 is placed -> 3.3V domain.    3. Remove VBAT, VBAT_PWR, and VUP jumpers to disconnect the "internal" PN5190 located on the EVK    4. Connect the following SPI lines to external PN5190 (e.g., customer HW) SPI_CLK SPI_MOSI SPI_MISO SPI_CS NFC_IRQ GND Note: It is also necessary to disconnect the external PN5190 from the customer MCU. 5. Connect VEN to the external PN5190  NFC_VEN   Now, the external PN5190 HW should communitate with the MCU located in PNEV5190BP, and the NFC Cockpit can be used. The user should see that the blue LED is on. If the red LED is blinking, there is an issue, and the user should check the connections/supply. 
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The PN7642 includes a USB interface, which allows USB communication with the PC.  Once the PN7642 USB communication is established, the NFC Cockpit tool can be used for RF debugging.  Note: This also requires flashing the NFC Cockpit application with the help of the mass storage mode or SWD interface.  Basically, the user has to connect a USB cable/Connector to the following PN7642 pins.  USB Signal  PN7642 Pin  5V  USB_VBUS Data - ATX_D Data + ATX_C GND GND   See an example below. This is a very basic connection (for evaluation or debugging only) where the USB cable is directly connected to the PN7642 pads.  This situation may arise during debugging on customer hardware where the USB interface is not yet implemented on the PCB. But a user wants to debug with the help of NFC Cockpit.    Please note that the proper USB interface might require special layout rules, such as impedance, overvoltage protection, etc.. For more info, see the PN7642 EVK reference schematic or USB PCB design guide. 
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This document show the detail steps of following the Personalization example in AN12196. Tool : Pegoda3 and RFIDDiscover.    
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this is a step by step guider to port PN7160 to Android 14 on i.MX 8M Nano board
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This article provides information on the expected NFC communication range for NXP products (Connected tags) when used with various mobile phones and the CLRC663 reader.   1// NFC Antenna 54 mm vs 27 mm (NTAG 5 Boost Antenna 10 mm vs 10 mm)    1.1// Used antenna   1.2// Results  Note: NTAG5 Link - Energy harvesting is disabled      2// NFC Antenna 25 mm vs 18 mm    2.1// Used antenna   2.2// Results Note: NTAG5 Link - Energy harvesting is disabled      3//NFC Antenna 25 mm vs 18 mm with "filling"    3.1// Used antenna    3.2// Results    Note: NTAG5 Link - Energy harvesting is disabled 
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Prerequisites:  PN5190 instruction layer-> https://www.nxp.com/docs/en/user-manual/UM11942.pdf NFC Cockpit -> https://www.nxp.com/products/rfid-nfc/nfc-hf/nfc-readers/nfc-cockpit-configuration-tool-for-nfc-ics:NFC-COCKPIT   In case of PN5190, the NFC cockpit can only show a generic error messages. More detailed error description has to be decoded from the received "FrontEnd Packets" 1. See an example of the error returned after ULPCD calibration    2.  The Errors description is descibred in  PN5190 instruction layer UM. However, the error has to be "decoded"  →> Take the received packets before the error ntf. in NFC Cockpit → 80 00 0C 02 02 00 00 BB 07 00 00 23 00 00 00 Where:  2.1. Decode the "Event" 02 02 (Little endian format) → General_Error_Event + LPCD_Calibration_Done_Event   2.2 Check LPCD_CALIBRATION_DONE_EVENT  07 BB (Little endian format) → Measured RSSI Value    2.3. Check the GENERAL_ERROR_EVENT  00 23 (Little endian format) → Definition of the general error event → Error is : GPADC_ERROR, CLOCK_ERROR and XTAL_START_ERROR  
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