S32K312MIN-EVB开发板外部晶振 请问下S32K312MIN-EVB开发板外部晶振是16MHZ吗？ Re: S32K312MIN-EVB开发板外部晶振 好的 Re: S32K312MIN-EVB开发板外部晶振 Hi@米化 找到你电脑中正确的JLinkGDBServerCL.exe的路径地址，在调试器的配置界面上替换上正确的路径地址 Re: S32K312MIN-EVB开发板外部晶振 你好 请问下你那边给我发的那些demo程序可以使用仿真器下载么？我在我们自己的板子上面使用仿真器下载没有问题  在这个S32K312nimi-evb开发板下载会提示错误导(服务启动序列错误，我现在使用的是官方提供的type-C下载口进行程序下载，就是GDB-PEMicro)致没办法下载成功 Re: S32K312MIN-EVB开发板外部晶振 我基于S32K312_UART_Interrupt这个demo程序写了回调函数里面的数据处理 但是程序没有跑起来？你能帮忙看下我写的程序问题出在哪里吗？ Re: S32K312MIN-EVB开发板外部晶振 void UART_event_cbk(const uint8 HwInstance, const Lpuart_Uart_Ip_EventType Event, void *UserData) { (void) UserData; uint32_t remainingBytes； if (HwInstance == 6) { status_flag = Lpuart_Uart_Ip_GetReceiveStatus(HwInstance,&remainingBytes); switch(Event) { case LPUART_UART_IP_EVENT_RX_FULL： if (bufferIdx1< sizeof(rx_data_uart1) - 1) { bufferIdx1 += 1; Lpuart_Uart_Ip_SetRxBuffer(HwInstance,&rx_data_uart1[bufferIdx1], 1)； } else { bufferIdx1 = 0; Lpuart_Uart_Ip_SetRxBuffer(HwInstance,&rx_data_uart1[bufferIdx1], 1); } break; case LPUART_UART_IP_EVENT_END_TRANSFER： Lpuart_Uart_Ip_AsyncReceive(HwInstance, (uint8_t*)rx_data_uart1, 1u); break; case LPUART_UART_IP_EVENT_ERROR： Lpuart_Uart_Ip_AsyncReceive(HwInstance, (uint8_t*)rx_data_uart1, 1u); break; 默认值： break; } } Re: S32K312MIN-EVB开发板外部晶振 好的 你现在图片里面程序不是那天分享给我demo程序吧？ Re: S32K312MIN-EVB开发板外部晶振 这有啥看不明白的？满了要自己去清接收的buffer Re: S32K312MIN-EVB开发板外部晶振 这个程序就是你之前给我附件里面原始demo程序 Re: S32K312MIN-EVB开发板外部晶振 我的意思是你这个串口中断demo程序只是进行简单数据收发，针对串口接收的数据处理，接收缓存数组存储满后不会自动清除么？ Re: S32K312MIN-EVB开发板外部晶振 Hi@米化 写的乱起八糟的，看不懂，附件是我之前写的demo，你参考下： Re: S32K312MIN-EVB开发板外部晶振 使用的是这个demo程序 Re: S32K312MIN-EVB开发板外部晶振 好的 明白了 我这边还有一个问题  这个demo程序我下载到板子里面后接受rx_data数据我使用串口上位机重复发送数据不会更新（数据就是第一接收的数据），且我没有发送数据，Lpuart_Uart_Ip_StatusType的状态一直等于ox02U  我没有看懂程序  麻烦解释下这个demo程序对于串口6发送及解析逻辑？我这边想实现的状态设定一个接收缓存数组，数据接收满了之后清楚重新接收这个功能

FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 你好，我最近遇到一个关于sk148 EnterFreezeMode等不到FRZACK，执行softreset之后，MCR寄存器异常的问题。代码如下：             if (((base->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT) == 0U)             {                 /* Save registers before Soft Reset */                 uint32_t tempIMSK1, tempMCR;                 /* Save IMASK1 value */                 tempIMSK1 = base->IMASK1;                         /* Save MCR value */                 tempMCR = base->MCR;                         //memcpy(&tempBase,base,sizeof(tempBase));                 /* Soft Reset FlexCan */                 base->MCR |= CAN_MCR_SOFTRST(1U);                 while (((base->MCR & CAN_MCR_SOFTRST_MASK) >> CAN_MCR_SOFTRST_SHIFT) != 0U) {}                         /* Restore IMASK1 value */                 base->IMASK1 = tempIMSK1;                         /* Restore MCR value */                 base->MCR = tempMCR;             } 以上是你们的sdk代码，它存在问题：               /* Soft Reset FlexCan */                 base->MCR |= CAN_MCR_SOFTRST(1U);                 while (((base->MCR & CAN_MCR_SOFTRST_MASK) >> CAN_MCR_SOFTRST_SHIFT) != 0U) {}执行后，flexcan并没有真正完成复位，导致后续对MCR寄存器赋值操作失效。必须要在softreset之后delay一下才没有问题。 1.请问是否是已知问题？ 2.如果是已知问题，为什么我在你们公开的errata文件中并没有找到关于这个问题的描述 盼望回复，谢谢！   Re: FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 你们帖子回复是有字节限制嘛？我回复了复现步骤，版本代码各种信息，发了七八遍，一发出来就被自动删除 Re: FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 我不知道如何添加工程附件发送给你，我只能文字描述一下   1.当前我们工程的SDK版本是S32K1xx RTM SDK 3.0.0   2.  问题描述如下：        环境：MCU型号：nxp sk148       调试手段：加日志、变量监控         复现步骤：我们的产品，两块相同的使用SK148作为主控MCU的单板A和B，烧录同一版本软件。AB板将同一路CAN连接到一起。A板先上电，间隔时间t（可能是0~1000ms的任意值）后，B板上电。继电器双通道自动步进1ms轮询0~1000ms范围间隔时间t,先后控制A、B板上下电，自动化测试环境，低概率会出现上电过程中，后上电的B板的felxcan模块初始化失败，导致can功能异常。我定位到异常时刻， FLEXCAN_EnterFreezeMode 走到了异常分支（DEBUG_POINT5、6、7），可以确实每次出问题都是走了你们新加的flexcan的softreset分支，在这之后flexcan模块的MCR寄存器的值被异常篡改成0x000000f，会导致can模块彻底死机无法使用。   我的定位结论：你们的“寄存器的描述，该位具有“同步”的机制，肯定是成功了之后该位才会置零。”并不如预期，事实上该位并不是真正同步的，设置softreset之后需要等待3~5个can时钟周期，硬件寄存器才能真正完成复位，在硬件寄存器没有真正复位之前，操作寄存器会导致异常。   “trace_log_done.txt”是我采用变量打点保存寄存器的方式，观察到问题时刻MCR寄存器的值的变化过程（其中EnterFMode_in代表DEBUG_POINT1，EnterFMode_out代表DEBUG_POINT10）,setps表示函数调用的先后顺序，counts表示程序第几次走到这里，每次走到这里的MCR寄存器值我都会采用绝对地址访问读取并保存下来。   trace_log_done.txt： EnterFMode_in     counts[00]: MCR:0x5980000F, steps:1. EnterFMode_in EBUG_POINT2       counts[00]: MCR:0x5980000F, steps:2. DEBUG_POINT2 EBUG_POINT3       counts[00]: MCR:0x5980000F, steps:3. DEBUG_POINT3 EBUG_POINT4       counts[00]: MCR:0x5980000F, steps:4. DEBUG_POINT4 nterFMode_out     counts[00]: MCR:0x5980000F, steps:5. EnterFMode_out nterFMode_in      counts[01]: MCR:0x0080000F, steps:6. EnterFMode_in EBUG_POINT2       counts[01]: MCR:0x5080000F, steps:7. DEBUG_POINT2 EBUG_POINT3       counts[01]: MCR:0x5080000F, steps:8. DEBUG_POINT3 EBUG_POINT4       counts[01]: MCR:0x5980000F, steps:9. DEBUG_POINT4 EnterFMode_out    counts[01]: MCR:0x5980000F, steps:10. EnterFMode_out EnterFMode_in     counts[02]: MCR:0x2002101F, steps:11. EnterFMode_in DEBUG_POINT2      counts[02]: MCR:0x7002101F, steps:12. DEBUG_POINT2 DEBUG_POINT3      counts[02]: MCR:0x7002101F, steps:13. DEBUG_POINT3 DEBUG_POINT4      counts[02]: MCR:0x7902101F, steps:14. DEBUG_POINT4 EnterFMode_out    counts[02]: MCR:0x7902101F, steps:15. EnterFMode_out EnterFMode_in     counts[03]: MCR:0x2022101F, steps:16. EnterFMode_in DEBUG_POINT2      counts[03]: MCR:0x2022101F, steps:17. DEBUG_POINT2 DEBUG_POINT3      counts[03]: MCR:0x2022101F, steps:18. DEBUG_POINT3 DEBUG_POINT4      counts[03]: MCR:0x2022101F, steps:19. DEBUG_POINT4 EnterFMode_out    counts[03]: MCR:0x2022101F, steps:20. EnterFMode_out EnterFMode_in     counts[04]: MCR:0x2022101F, steps:21. EnterFMode_in DEBUG_POINT2      counts[04]: MCR:0x2022101F, steps:22. DEBUG_POINT2 DEBUG_POINT3      counts[04]: MCR:0x2022101F, steps:23. DEBUG_POINT3 DEBUG_POINT4      counts[04]: MCR:0x2022101F, steps:24. DEBUG_POINT4 EnterFMode_out    counts[04]: MCR:0x2022101F, steps:25. EnterFMode_out EnterFMode_in     counts[05]: MCR:0x2022101F, steps:26. EnterFMode_in DEBUG_POINT2      counts[05]: MCR:0x7022101F, steps:27. DEBUG_POINT2 DEBUG_POINT3      counts[05]: MCR:0x7022101F, steps:28. DEBUG_POINT3 DEBUG_POINT4      counts[05]: MCR:0x7922101F, steps:29. DEBUG_POINT4 EnterFMode_out    counts[05]: MCR:0x7922101F, steps:30. EnterFMode_out EnterFMode_in     counts[06]: MCR:0x2022101F, steps:31. EnterFMode_in DEBUG_POINT2      counts[06]: MCR:0x2022101F, steps:32. DEBUG_POINT2 DEBUG_POINT3      counts[06]: MCR:0x2022101F, steps:33. DEBUG_POINT3 DEBUG_POINT4      counts[06]: MCR:0x2022101F, steps:34. DEBUG_POINT4 EnterFMode_out    counts[06]: MCR:0x2022101F, steps:35. EnterFMode_out EnterFMode_in     counts[07]: MCR:0x2022101F, steps:36. EnterFMode_in DEBUG_POINT2      counts[07]: MCR:0x7022101F, steps:37. DEBUG_POINT2 DEBUG_POINT3      counts[07]: MCR:0x7022101F, steps:38. DEBUG_POINT3 DEBUG_POINT4      counts[07]: MCR:0x7922101F, steps:39. DEBUG_POINT4 EnterFMode_out    counts[07]: MCR:0x7922101F, steps:40. EnterFMode_out EnterFMode_in     counts[08]: MCR:0x2022101F, steps:41. EnterFMode_in DEBUG_POINT2      counts[08]: MCR:0x7022101F, steps:42. DEBUG_POINT2 DEBUG_POINT3      counts[08]: MCR:0x7022101F, steps:43. DEBUG_POINT3 DEBUG_POINT4      counts[08]: MCR:0x7922101F, steps:44. DEBUG_POINT4 EnterFMode_out    counts[08]: MCR:0x7922101F, steps:45. EnterFMode_out EnterFMode_in     counts[09]: MCR:0x2022101F, steps:46. EnterFMode_in DEBUG_POINT2      counts[09]: MCR:0x2022101F, steps:47. DEBUG_POINT2 DEBUG_POINT3      counts[09]: MCR:0x2022101F, steps:48. DEBUG_POINT3 DEBUG_POINT4      counts[09]: MCR:0x2022101F, steps:49. DEBUG_POINT4 EnterFMode_out    counts[09]: MCR:0x2022101F, steps:50. EnterFMode_out EnterFMode_in     counts[10]: MCR:0x2022101F, steps:51. EnterFMode_in DEBUG_POINT2      counts[10]: MCR:0x2022101F, steps:52. DEBUG_POINT2 DEBUG_POINT3      counts[10]: MCR:0x2022101F, steps:53. DEBUG_POINT3 DEBUG_POINT4      counts[10]: MCR:0x2022101F, steps:54. DEBUG_POINT4 EnterFMode_out    counts[10]: MCR:0x2022101F, steps:55. EnterFMode_out EnterFMode_in     counts[11]: MCR:0x2022101F, steps:56. EnterFMode_in DEBUG_POINT2      counts[11]: MCR:0x7022101F, steps:57. DEBUG_POINT2 DEBUG_POINT3      counts[11]: MCR:0x7022101F, steps:58. DEBUG_POINT3 DEBUG_POINT4      counts[11]: MCR:0x7922101F, steps:59. DEBUG_POINT4 EnterFMode_out    counts[11]: MCR:0x7922101F, steps:60. EnterFMode_out EnterFMode_in     counts[12]: MCR:0x2022101F, steps:61. EnterFMode_in DEBUG_POINT2      counts[12]: MCR:0x2022101F, steps:62. DEBUG_POINT2 DEBUG_POINT3      counts[12]: MCR:0x2022101F, steps:63. DEBUG_POINT3 DEBUG_POINT4      counts[12]: MCR:0x2022101F, steps:64. DEBUG_POINT4 EnterFMode_out    counts[12]: MCR:0x2022101F, steps:65. EnterFMode_out EnterFMode_in     counts[13]: MCR:0x2022101F, steps:66. EnterFMode_in DEBUG_POINT2      counts[13]: MCR:0x7022101F, steps:67. DEBUG_POINT2 DEBUG_POINT3      counts[13]: MCR:0x7022101F, steps:68. DEBUG_POINT3 DEBUG_POINT4      counts[13]: MCR:0x7022101F, steps:69. DEBUG_POINT4 DEBUG_POINT5      counts[00]: MCR:0x7022101F, steps:70. DEBUG_POINT5 DEBUG_POINT6      counts[00]: MCR:0x5280000F, steps:71. DEBUG_POINT6 DEBUG_POINT7      counts[00]: MCR:0x5980000F, steps:72. DEBUG_POINT7 EnterFMode_out    counts[13]: MCR:0x5980000F, steps:73. EnterFMode_out EnterFMode_in     counts[14]: MCR:0x0080000F, steps:74. EnterFMode_in DEBUG_POINT2      counts[14]: MCR:0x5080000F, steps:75. DEBUG_POINT2 DEBUG_POINT3      counts[14]: MCR:0x5080000F, steps:76. DEBUG_POINT3 DEBUG_POINT4      counts[14]: MCR:0x5980000F, steps:77. DEBUG_POINT4 EnterFMode_out    counts[14]: MCR:0x5980000F, steps:78. EnterFMode_out EnterFMode_in     counts[15]: MCR:0x0000000F, steps:79. EnterFMode_in DEBUG_POINT2      counts[15]: MCR:0x0000000F, steps:80. DEBUG_POINT2 DEBUG_POINT3      counts[15]: MCR:0x0000000F, steps:81. DEBUG_POINT3 DEBUG_POINT4      counts[15]: MCR:0x0000000F, steps:82. DEBUG_POINT4 EnterFMode_out    counts[15]: MCR:0x0000000F, steps:83. EnterFMode_out DEBUG_POINT11     counts[00]: MCR:0x0000000F, steps:84. DEBUG_POINT11 DEBUG_POINT12     counts[00]: MCR:0x0000000F, steps:85. DEBUG_POINT12 EnterFMode_in     counts[16]: MCR:0x0000000F, steps:86. EnterFMode_in DEBUG_POINT2      counts[16]: MCR:0x5000000F, steps:87. DEBUG_POINT2 DEBUG_POINT3      counts[16]: MCR:0x5000000F, steps:88. DEBUG_POINT3 DEBUG_POINT4      counts[16]: MCR:0x5900000F, steps:89. DEBUG_POINT4 EnterFMode_out    counts[16]: MCR:0x5900000F, steps:90. EnterFMode_out EnterFMode_in     counts[17]: MCR:0x0000000F, steps:91. EnterFMode_in DEBUG_POINT2      counts[17]: MCR:0x5000000F, steps:92. DEBUG_POINT2 DEBUG_POINT3      counts[17]: MCR:0x5000000F, steps:93. DEBUG_POINT3 DEBUG_POINT4      counts[17]: MCR:0x5900000F, steps:94. DEBUG_POINT4 EnterFMode_out    counts[17]: MCR:0x5900000F, steps:95. EnterFMode_out EnterFMode_in     counts[18]: MCR:0x0000000F, steps:96. EnterFMode_in DEBUG_POINT2      counts[18]: MCR:0x5000000F, steps:97. DEBUG_POINT2 DEBUG_POINT3      counts[18]: MCR:0x5000000F, steps:98. DEBUG_POINT3 DEBUG_POINT4      counts[18]: MCR:0x5900000F, steps:99. DEBUG_POINT4  EnterFMode_out   counts[18]: MCR:0x5900000F, steps:100. EnterFMode_out     /*FUNCTION**********************************************************************  *  * Function Name : FLEXCAN_EnterFreezeMode  * Description   : Enter the freeze mode.  *  *END**************************************************************************/ void FLEXCAN_EnterFreezeMode(CAN_Type * base) {     bool enabled = false;       DEBUG_TRACE_POINT(1);       base->MCR = (base->MCR & ~CAN_MCR_FRZ_MASK) | CAN_MCR_FRZ(1U);     base->MCR = (base->MCR & ~CAN_MCR_HALT_MASK) | CAN_MCR_HALT(1U);     DEBUG_TRACE_POINT(2);       if (((base->MCR & CAN_MCR_MDIS_MASK) >> CAN_MCR_MDIS_SHIFT) == 0U) { enabled = true;         DEBUG_TRACE_POINT(3); } else { base->MCR &= ~CAN_MCR_MDIS_MASK; }   #ifdef ERRATA_E9595     /* Check Low-Power Mode Acknowledge Cleared */     while (((base->MCR & CAN_MCR_LPMACK_MASK) >> CAN_MCR_LPMACK_SHIFT) == 1U) {}     /* Check if is a Bus-Off Error corresponding to 1x */     if ((((base->ESR1 & CAN_ESR1_FLTCONF_MASK) >> CAN_ESR1_FLTCONF_SHIFT) & 2U) != 0U)     {     /* Save registers before Soft Reset */         !!!!!!!!!!     uint32_t tempIMSK[2],tempMCR;     tempIMSK[0] = base->IMASK1;     tempIMSK[1] = base->IMASK2;     tempMCR = base->MCR;     /* Soft Reset FlexCan */     base->MCR |= CAN_MCR_SOFTRST(1U);     while (((base->MCR & CAN_MCR_SOFTRST_MASK) >> CAN_MCR_SOFTRST_SHIFT) == 0U) {}     /* Restore registers after Soft Reset */     base->IMASK1 = tempIMSK[0];     base->IMASK2 = tempIMSK[1];     base->MCR = tempMCR;     }     else     {     base->MCR = (base->MCR & ~CAN_MCR_HALT_MASK) | CAN_MCR_HALT(1U);     } #endif   base->TIMER = 0U; uint32_t aux = 0U;   #if FEATURE_CAN_HAS_FD /* MCR[FDEN] was reset to 0, wait for timeout */ if (!FLEXCAN_IsFDEnabled(base)) { while (!FLEXCAN_GetFreezeMode(base) && (aux < 180U)) { /* Wait until finish counting 180 bit times and exit*/ aux = (uint32_t)base->TIMER; } } else { while (!FLEXCAN_GetFreezeMode(base) && (aux < 730U)) { /* Wait until finish counting 730 bit times and exit*/ aux = (uint32_t)base->TIMER; } } #else while (!FLEXCAN_GetFreezeMode(base) && (aux < 180U)) { #error /* Wait until finish counting 180 bit times and exit*/ aux = (uint32_t)base->TIMER; } #endif /* FEATURE_CAN_HAS_FD */             DEBUG_TRACE_POINT(4); if (((base->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT) == 0U) {                 DEBUG_TRACE_POINT(5); /* Save registers before Soft Reset */ volatile uint32_t tempIMSK1, tempMCR; /* Save IMASK1 value */ tempIMSK1 = base->IMASK1;   /* Save MCR value */ tempMCR = base->MCR;   //memcpy(&tempBase,base,sizeof(tempBase)); /* Soft Reset FlexCan */ base->MCR |= CAN_MCR_SOFTRST(1U);                 DEBUG_TRACE_POINT(6); while (((base->MCR & CAN_MCR_SOFTRST_MASK) >> CAN_MCR_SOFTRST_SHIFT) != 0U) {}   /* Restore IMASK1 value */ base->IMASK1 = tempIMSK1;   /* Restore MCR value */ base->MCR = tempMCR;                 DEBUG_TRACE_POINT(7); }       if (false == enabled)     {     base->MCR |= CAN_MCR_MDIS_MASK;         DEBUG_TRACE_POINT(8);     /* Wait until disable mode acknowledged */         while (((base->MCR & CAN_MCR_LPMACK_MASK) >> CAN_MCR_LPMACK_SHIFT) == 0U) {}         DEBUG_TRACE_POINT(9);     }     DEBUG_TRACE_POINT(10); } Re: FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 你们这个网站一直自动删我的回复帖子，我真的服了，发不出来 Re: FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 Hi@MrYin 麻烦你告知我你所使用的SDK的版本，并且提供复现问题的步骤以及工程，我首先要复现你的问题我才能提供建议。 Re: FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 我不知道如何添加工程附件发送给你，我只能文字描述一下   1.当前我们工程的SDK版本是S32K1xx RTM SDK 3.0.0   2.  问题描述如下：        环境：MCU型号：nxp sk148       调试手段：加日志、变量监控         复现步骤：我们的产品，两块相同的使用SK148作为主控MCU的单板A和B，烧录同一版本软件。AB板将同一路CAN连接到一起。A板先上电，间隔时间t（可能是0~1000ms的任意值）后，B板上电。继电器双通道自动步进1ms轮询0~1000ms范围间隔时间t,先后控制A、B板上下电，自动化测试环境，低概率会出现上电过程中，后上电的B板的felxcan模块初始化失败，导致can功能异常。我定位到异常时刻， FLEXCAN_EnterFreezeMode 走到了异常分支（DEBUG_POINT5、6、7），可以确实每次出问题都是走了你们新加的flexcan的softreset分支，在这之后flexcan模块的MCR寄存器的值被异常篡改成0x000000f，会导致can模块彻底死机无法使用。   我的定位结论：你们的“寄存器的描述，该位具有“同步”的机制，肯定是成功了之后该位才会置零。”并不如预期，事实上该位并不是真正同步的，设置softreset之后需要等待3~5个can时钟周期，硬件寄存器才能真正完成复位，在硬件寄存器没有真正复位之前，操作寄存器会导致异常。   “trace_log_done.txt”是我采用变量打点保存寄存器的方式，观察到问题时刻MCR寄存器的值的变化过程（其中EnterFMode_in代表DEBUG_POINT1，EnterFMode_out代表DEBUG_POINT10）,setps表示函数调用的先后顺序，counts表示程序第几次走到这里，每次走到这里的MCR寄存器值我都会采用绝对地址访问读取并保存下来。   trace_log_done.txt： EnterFMode_in counts[00]: MCR:0x5980000F, steps:1. EnterFMode_in EBUG_POINT2 counts[00]: MCR:0x5980000F, steps:2. DEBUG_POINT2 EBUG_POINT3 counts[00]: MCR:0x5980000F, steps:3. DEBUG_POINT3 EBUG_POINT4 counts[00]: MCR:0x5980000F, steps:4. DEBUG_POINT4 nterFMode_out counts[00]: MCR:0x5980000F, steps:5. EnterFMode_out nterFMode_in counts[01]: MCR:0x0080000F, steps:6. EnterFMode_in EBUG_POINT2 counts[01]: MCR:0x5080000F, steps:7. DEBUG_POINT2 EBUG_POINT3 counts[01]: MCR:0x5080000F, steps:8. DEBUG_POINT3 EBUG_POINT4 counts[01]: MCR:0x5980000F, steps:9. DEBUG_POINT4 EnterFMode_out counts[01]: MCR:0x5980000F, steps:10. EnterFMode_out EnterFMode_in counts[02]: MCR:0x2002101F, steps:11. EnterFMode_in DEBUG_POINT2 counts[02]: MCR:0x7002101F, steps:12. DEBUG_POINT2 DEBUG_POINT3 counts[02]: MCR:0x7002101F, steps:13. DEBUG_POINT3 DEBUG_POINT4 counts[02]: MCR:0x7902101F, steps:14. DEBUG_POINT4 EnterFMode_out counts[02]: MCR:0x7902101F, steps:15. EnterFMode_out EnterFMode_in counts[03]: MCR:0x2022101F, steps:16. EnterFMode_in DEBUG_POINT2 counts[03]: MCR:0x2022101F, steps:17. DEBUG_POINT2 DEBUG_POINT3 counts[03]: MCR:0x2022101F, steps:18. DEBUG_POINT3 DEBUG_POINT4 counts[03]: MCR:0x2022101F, steps:19. DEBUG_POINT4 EnterFMode_out counts[03]: MCR:0x2022101F, steps:20. EnterFMode_out EnterFMode_in counts[04]: MCR:0x2022101F, steps:21. EnterFMode_in DEBUG_POINT2 counts[04]: MCR:0x2022101F, steps:22. DEBUG_POINT2 DEBUG_POINT3 counts[04]: MCR:0x2022101F, steps:23. DEBUG_POINT3 DEBUG_POINT4 counts[04]: MCR:0x2022101F, steps:24. DEBUG_POINT4 EnterFMode_out counts[04]: MCR:0x2022101F, steps:25. EnterFMode_out EnterFMode_in counts[05]: MCR:0x2022101F, steps:26. EnterFMode_in DEBUG_POINT2 counts[05]: MCR:0x7022101F, steps:27. DEBUG_POINT2 DEBUG_POINT3 counts[05]: MCR:0x7022101F, steps:28. DEBUG_POINT3 DEBUG_POINT4 counts[05]: MCR:0x7922101F, steps:29. DEBUG_POINT4 EnterFMode_out counts[05]: MCR:0x7922101F, steps:30. EnterFMode_out EnterFMode_in counts[06]: MCR:0x2022101F, steps:31. EnterFMode_in DEBUG_POINT2 counts[06]: MCR:0x2022101F, steps:32. DEBUG_POINT2 DEBUG_POINT3 counts[06]: MCR:0x2022101F, steps:33. DEBUG_POINT3 DEBUG_POINT4 counts[06]: MCR:0x2022101F, steps:34. DEBUG_POINT4 EnterFMode_out counts[06]: MCR:0x2022101F, steps:35. EnterFMode_out EnterFMode_in counts[07]: MCR:0x2022101F, steps:36. EnterFMode_in DEBUG_POINT2 counts[07]: MCR:0x7022101F, steps:37. DEBUG_POINT2 DEBUG_POINT3 counts[07]: MCR:0x7022101F, steps:38. DEBUG_POINT3 DEBUG_POINT4 counts[07]: MCR:0x7922101F, steps:39. DEBUG_POINT4 EnterFMode_out counts[07]: MCR:0x7922101F, steps:40. EnterFMode_out EnterFMode_in counts[08]: MCR:0x2022101F, steps:41. EnterFMode_in DEBUG_POINT2 counts[08]: MCR:0x7022101F, steps:42. DEBUG_POINT2 DEBUG_POINT3 counts[08]: MCR:0x7022101F, steps:43. DEBUG_POINT3 DEBUG_POINT4 counts[08]: MCR:0x7922101F, steps:44. DEBUG_POINT4 EnterFMode_out counts[08]: MCR:0x7922101F, steps:45. EnterFMode_out EnterFMode_in counts[09]: MCR:0x2022101F, steps:46. EnterFMode_in DEBUG_POINT2 counts[09]: MCR:0x2022101F, steps:47. DEBUG_POINT2 DEBUG_POINT3 counts[09]: MCR:0x2022101F, steps:48. DEBUG_POINT3 DEBUG_POINT4 counts[09]: MCR:0x2022101F, steps:49. DEBUG_POINT4 EnterFMode_out counts[09]: MCR:0x2022101F, steps:50. EnterFMode_out EnterFMode_in counts[10]: MCR:0x2022101F, steps:51. EnterFMode_in DEBUG_POINT2 counts[10]: MCR:0x2022101F, steps:52. DEBUG_POINT2 DEBUG_POINT3 counts[10]: MCR:0x2022101F, steps:53. DEBUG_POINT3 DEBUG_POINT4 counts[10]: MCR:0x2022101F, steps:54. DEBUG_POINT4 EnterFMode_out counts[10]: MCR:0x2022101F, steps:55. EnterFMode_out EnterFMode_in counts[11]: MCR:0x2022101F, steps:56. EnterFMode_in DEBUG_POINT2 counts[11]: MCR:0x7022101F, steps:57. DEBUG_POINT2 DEBUG_POINT3 counts[11]: MCR:0x7022101F, steps:58. DEBUG_POINT3 DEBUG_POINT4 counts[11]: MCR:0x7922101F, steps:59. DEBUG_POINT4 EnterFMode_out counts[11]: MCR:0x7922101F, steps:60. EnterFMode_out EnterFMode_in counts[12]: MCR:0x2022101F, steps:61. EnterFMode_in DEBUG_POINT2 counts[12]: MCR:0x2022101F, steps:62. DEBUG_POINT2 DEBUG_POINT3 counts[12]: MCR:0x2022101F, steps:63. DEBUG_POINT3 DEBUG_POINT4 counts[12]: MCR:0x2022101F, steps:64. DEBUG_POINT4 EnterFMode_out counts[12]: MCR:0x2022101F, steps:65. EnterFMode_out EnterFMode_in counts[13]: MCR:0x2022101F, steps:66. EnterFMode_in DEBUG_POINT2 counts[13]: MCR:0x7022101F, steps:67. DEBUG_POINT2 DEBUG_POINT3 counts[13]: MCR:0x7022101F, steps:68. DEBUG_POINT3 DEBUG_POINT4 counts[13]: MCR:0x7022101F, steps:69. DEBUG_POINT4 DEBUG_POINT5 counts[00]: MCR:0x7022101F, steps:70. DEBUG_POINT5 DEBUG_POINT6 counts[00]: MCR:0x5280000F, steps:71. DEBUG_POINT6 DEBUG_POINT7 counts[00]: MCR:0x5980000F, steps:72. DEBUG_POINT7 EnterFMode_out counts[13]: MCR:0x5980000F, steps:73. EnterFMode_out EnterFMode_in counts[14]: MCR:0x0080000F, steps:74. EnterFMode_in DEBUG_POINT2 counts[14]: MCR:0x5080000F, steps:75. DEBUG_POINT2 DEBUG_POINT3 counts[14]: MCR:0x5080000F, steps:76. DEBUG_POINT3 DEBUG_POINT4 counts[14]: MCR:0x5980000F, steps:77. DEBUG_POINT4 EnterFMode_out counts[14]: MCR:0x5980000F, steps:78. EnterFMode_out EnterFMode_in counts[15]: MCR:0x0000000F, steps:79. EnterFMode_in DEBUG_POINT2 counts[15]: MCR:0x0000000F, steps:80. DEBUG_POINT2 DEBUG_POINT3 counts[15]: MCR:0x0000000F, steps:81. DEBUG_POINT3 DEBUG_POINT4 counts[15]: MCR:0x0000000F, steps:82. DEBUG_POINT4 EnterFMode_out counts[15]: MCR:0x0000000F, steps:83. EnterFMode_out DEBUG_POINT11 counts[00]: MCR:0x0000000F, steps:84. DEBUG_POINT11 DEBUG_POINT12 counts[00]: MCR:0x0000000F, steps:85. DEBUG_POINT12 EnterFMode_in counts[16]: MCR:0x0000000F, steps:86. EnterFMode_in DEBUG_POINT2 counts[16]: MCR:0x5000000F, steps:87. DEBUG_POINT2 DEBUG_POINT3 counts[16]: MCR:0x5000000F, steps:88. DEBUG_POINT3 DEBUG_POINT4 counts[16]: MCR:0x5900000F, steps:89. DEBUG_POINT4 EnterFMode_out counts[16]: MCR:0x5900000F, steps:90. EnterFMode_out EnterFMode_in counts[17]: MCR:0x0000000F, steps:91. EnterFMode_in DEBUG_POINT2 counts[17]: MCR:0x5000000F, steps:92. DEBUG_POINT2 DEBUG_POINT3 counts[17]: MCR:0x5000000F, steps:93. DEBUG_POINT3 DEBUG_POINT4 counts[17]: MCR:0x5900000F, steps:94. DEBUG_POINT4 EnterFMode_out counts[17]: MCR:0x5900000F, steps:95. EnterFMode_out EnterFMode_in counts[18]: MCR:0x0000000F, steps:96. EnterFMode_in DEBUG_POINT2 counts[18]: MCR:0x5000000F, steps:97. DEBUG_POINT2 DEBUG_POINT3 counts[18]: MCR:0x5000000F, steps:98. DEBUG_POINT3 DEBUG_POINT4 counts[18]: MCR:0x5900000F, steps:99. DEBUG_POINT4 EnterFMode_out counts[18]: MCR:0x5900000F, steps:100. EnterFMode_out /*FUNCTION********************************************************************** * * Function Name : FLEXCAN_EnterFreezeMode * Description : Enter the freeze mode. * *END**************************************************************************/ void FLEXCAN_EnterFreezeMode(CAN_Type * base) { bool enabled = false; DEBUG_TRACE_POINT(1); base->MCR = (base->MCR & ~CAN_MCR_FRZ_MASK) | CAN_MCR_FRZ(1U); base->MCR = (base->MCR & ~CAN_MCR_HALT_MASK) | CAN_MCR_HALT(1U); DEBUG_TRACE_POINT(2); if (((base->MCR & CAN_MCR_MDIS_MASK) >> CAN_MCR_MDIS_SHIFT) == 0U) { enabled = true; DEBUG_TRACE_POINT(3); } else { base->MCR &= ~CAN_MCR_MDIS_MASK; } #ifdef ERRATA_E9595 /* Check Low-Power Mode Acknowledge Cleared */ while (((base->MCR & CAN_MCR_LPMACK_MASK) >> CAN_MCR_LPMACK_SHIFT) == 1U) {} /* Check if is a Bus-Off Error corresponding to 1x */ if ((((base->ESR1 & CAN_ESR1_FLTCONF_MASK) >> CAN_ESR1_FLTCONF_SHIFT) & 2U) != 0U) { /* Save registers before Soft Reset */ !!!!!!!!!! uint32_t tempIMSK[2],tempMCR; tempIMSK[0] = base->IMASK1; tempIMSK[1] = base->IMASK2; tempMCR = base->MCR; /* Soft Reset FlexCan */ base->MCR |= CAN_MCR_SOFTRST(1U); while (((base->MCR & CAN_MCR_SOFTRST_MASK) >> CAN_MCR_SOFTRST_SHIFT) == 0U) {} /* Restore registers after Soft Reset */ base->IMASK1 = tempIMSK[0]; base->IMASK2 = tempIMSK[1]; base->MCR = tempMCR; } else { base->MCR = (base->MCR & ~CAN_MCR_HALT_MASK) | CAN_MCR_HALT(1U); } #endif base->TIMER = 0U; uint32_t aux = 0U; #if FEATURE_CAN_HAS_FD /* MCR[FDEN] was reset to 0, wait for timeout */ if (!FLEXCAN_IsFDEnabled(base)) { while (!FLEXCAN_GetFreezeMode(base) && (aux < 180U)) { /* Wait until finish counting 180 bit times and exit*/ aux = (uint32_t)base->TIMER; } } else { while (!FLEXCAN_GetFreezeMode(base) && (aux < 730U)) { /* Wait until finish counting 730 bit times and exit*/ aux = (uint32_t)base->TIMER; } } #else while (!FLEXCAN_GetFreezeMode(base) && (aux < 180U)) { #error /* Wait until finish counting 180 bit times and exit*/ aux = (uint32_t)base->TIMER; } #endif /* FEATURE_CAN_HAS_FD */ DEBUG_TRACE_POINT(4); if (((base->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT) == 0U) { DEBUG_TRACE_POINT(5); /* Save registers before Soft Reset */ volatile uint32_t tempIMSK1, tempMCR; /* Save IMASK1 value */ tempIMSK1 = base->IMASK1; /* Save MCR value */ tempMCR = base->MCR; //memcpy(&tempBase,base,sizeof(tempBase)); /* Soft Reset FlexCan */ base->MCR |= CAN_MCR_SOFTRST(1U); DEBUG_TRACE_POINT(6); while (((base->MCR & CAN_MCR_SOFTRST_MASK) >> CAN_MCR_SOFTRST_SHIFT) != 0U) {} /* Restore IMASK1 value */ base->IMASK1 = tempIMSK1; /* Restore MCR value */ base->MCR = tempMCR; DEBUG_TRACE_POINT(7); } if (false == enabled) { base->MCR |= CAN_MCR_MDIS_MASK; DEBUG_TRACE_POINT(8); /* Wait until disable mode acknowledged */ while (((base->MCR & CAN_MCR_LPMACK_MASK) >> CAN_MCR_LPMACK_SHIFT) == 0U) {} DEBUG_TRACE_POINT(9); } DEBUG_TRACE_POINT(10); } ​ 以下是我对你们SDK代码的修改，实测在设置reset之后必须加几微秒的延时，才能解决这个问题。 if (((base->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT) == 0U) { /* Save registers before Soft Reset */ uint32_t tempIMSK1, tempMCR; /* Save IMASK1 value */ tempIMSK1 = base->IMASK1; /* Save MCR value */ tempMCR = base->MCR; //memcpy(&tempBase,base,sizeof(tempBase)); /* Soft Reset FlexCan */ base->MCR |= CAN_MCR_SOFTRST(1U); while (((base->MCR & CAN_MCR_SOFTRST_MASK) >> CAN_MCR_SOFTRST_SHIFT) != 0U) {} /* Wait for 3 us to ensure that the reset is completed */ S32_WaitUs(3); /* Restore IMASK1 value */ base->IMASK1 = tempIMSK1; /* Restore MCR value */ base->MCR = tempMCR; }​ Re: FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 以下是我对你们SDK代码的修改，实测在设置reset之后必须加几微秒的延时，才能解决这个问题。 if (((base->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT) == 0U) { /* Save registers before Soft Reset */ uint32_t tempIMSK1, tempMCR; /* Save IMASK1 value */ tempIMSK1 = base->IMASK1; /* Save MCR value */ tempMCR = base->MCR; //memcpy(&tempBase,base,sizeof(tempBase)); /* Soft Reset FlexCan */ base->MCR |= CAN_MCR_SOFTRST(1U); while (((base->MCR & CAN_MCR_SOFTRST_MASK) >> CAN_MCR_SOFTRST_SHIFT) != 0U) {} /* Wait for 3 us to ensure that the reset is completed */ S32_WaitUs(3); /* Restore IMASK1 value */ base->IMASK1 = tempIMSK1; /* Restore MCR value */ base->MCR = tempMCR; } Re: FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 我不知道如何添加工程附件发送给你，我只能文字描述一下   1.当前我们工程的SDK版本是S32K1xx RTM SDK 3.0.0   2.  问题描述如下：        环境：MCU型号：nxp sk148       调试手段：加日志、变量监控         复现步骤：我们的产品，两块相同的使用SK148作为主控MCU的单板A和B，烧录同一版本软件。AB板将同一路CAN连接到一起。A板先上电，间隔时间t（可能是0~1000ms的任意值）后，B板上电。继电器双通道自动步进1ms轮询0~1000ms范围间隔时间t,先后控制A、B板上下电，自动化测试环境，低概率会出现上电过程中，后上电的B板的felxcan模块初始化失败，导致can功能异常。我定位到异常时刻， FLEXCAN_EnterFreezeMode 走到了异常分支（DEBUG_POINT5、6、7），可以确实每次出问题都是走了你们新加的flexcan的softreset分支，在这之后flexcan模块的MCR寄存器的值被异常篡改成0x000000f，会导致can模块彻底死机无法使用。   我的定位结论：你们的“寄存器的描述，该位具有“同步”的机制，肯定是成功了之后该位才会置零。”并不如预期，事实上该位并不是真正同步的，设置softreset之后需要等待3~5个can时钟周期，硬件寄存器才能真正完成复位，在硬件寄存器没有真正复位之前，操作寄存器会导致异常。   “trace_log_done.txt”是我采用变量打点保存寄存器的方式，观察到问题时刻MCR寄存器的值的变化过程（其中EnterFMode_in代表DEBUG_POINT1，EnterFMode_out代表DEBUG_POINT10）,setps表示函数调用的先后顺序，counts表示程序第几次走到这里，每次走到这里的MCR寄存器值我都会采用绝对地址访问读取并保存下来。   trace_log_done.txt： EnterFMode_in counts[00]: MCR:0x5980000F, steps:1. EnterFMode_in EBUG_POINT2 counts[00]: MCR:0x5980000F, steps:2. DEBUG_POINT2 EBUG_POINT3 counts[00]: MCR:0x5980000F, steps:3. DEBUG_POINT3 EBUG_POINT4 counts[00]: MCR:0x5980000F, steps:4. DEBUG_POINT4 nterFMode_out counts[00]: MCR:0x5980000F, steps:5. EnterFMode_out nterFMode_in counts[01]: MCR:0x0080000F, steps:6. EnterFMode_in EBUG_POINT2 counts[01]: MCR:0x5080000F, steps:7. DEBUG_POINT2 EBUG_POINT3 counts[01]: MCR:0x5080000F, steps:8. DEBUG_POINT3 EBUG_POINT4 counts[01]: MCR:0x5980000F, steps:9. DEBUG_POINT4 EnterFMode_out counts[01]: MCR:0x5980000F, steps:10. EnterFMode_out EnterFMode_in counts[02]: MCR:0x2002101F, steps:11. EnterFMode_in DEBUG_POINT2 counts[02]: MCR:0x7002101F, steps:12. DEBUG_POINT2 DEBUG_POINT3 counts[02]: MCR:0x7002101F, steps:13. DEBUG_POINT3 DEBUG_POINT4 counts[02]: MCR:0x7902101F, steps:14. DEBUG_POINT4 EnterFMode_out counts[02]: MCR:0x7902101F, steps:15. EnterFMode_out EnterFMode_in counts[03]: MCR:0x2022101F, steps:16. EnterFMode_in DEBUG_POINT2 counts[03]: MCR:0x2022101F, steps:17. DEBUG_POINT2 DEBUG_POINT3 counts[03]: MCR:0x2022101F, steps:18. DEBUG_POINT3 DEBUG_POINT4 counts[03]: MCR:0x2022101F, steps:19. DEBUG_POINT4 EnterFMode_out counts[03]: MCR:0x2022101F, steps:20. EnterFMode_out EnterFMode_in counts[04]: MCR:0x2022101F, steps:21. EnterFMode_in DEBUG_POINT2 counts[04]: MCR:0x2022101F, steps:22. DEBUG_POINT2 DEBUG_POINT3 counts[04]: MCR:0x2022101F, steps:23. DEBUG_POINT3 DEBUG_POINT4 counts[04]: MCR:0x2022101F, steps:24. DEBUG_POINT4 EnterFMode_out counts[04]: MCR:0x2022101F, steps:25. EnterFMode_out EnterFMode_in counts[05]: MCR:0x2022101F, steps:26. EnterFMode_in DEBUG_POINT2 counts[05]: MCR:0x7022101F, steps:27. DEBUG_POINT2 DEBUG_POINT3 counts[05]: MCR:0x7022101F, steps:28. DEBUG_POINT3 DEBUG_POINT4 counts[05]: MCR:0x7922101F, steps:29. DEBUG_POINT4 EnterFMode_out counts[05]: MCR:0x7922101F, steps:30. EnterFMode_out EnterFMode_in counts[06]: MCR:0x2022101F, steps:31. EnterFMode_in DEBUG_POINT2 counts[06]: MCR:0x2022101F, steps:32. DEBUG_POINT2 DEBUG_POINT3 counts[06]: MCR:0x2022101F, steps:33. DEBUG_POINT3 DEBUG_POINT4 counts[06]: MCR:0x2022101F, steps:34. DEBUG_POINT4 EnterFMode_out counts[06]: MCR:0x2022101F, steps:35. EnterFMode_out EnterFMode_in counts[07]: MCR:0x2022101F, steps:36. EnterFMode_in DEBUG_POINT2 counts[07]: MCR:0x7022101F, steps:37. DEBUG_POINT2 DEBUG_POINT3 counts[07]: MCR:0x7022101F, steps:38. DEBUG_POINT3 DEBUG_POINT4 counts[07]: MCR:0x7922101F, steps:39. DEBUG_POINT4 EnterFMode_out counts[07]: MCR:0x7922101F, steps:40. EnterFMode_out EnterFMode_in counts[08]: MCR:0x2022101F, steps:41. EnterFMode_in DEBUG_POINT2 counts[08]: MCR:0x7022101F, steps:42. DEBUG_POINT2 DEBUG_POINT3 counts[08]: MCR:0x7022101F, steps:43. DEBUG_POINT3 DEBUG_POINT4 counts[08]: MCR:0x7922101F, steps:44. DEBUG_POINT4 EnterFMode_out counts[08]: MCR:0x7922101F, steps:45. EnterFMode_out EnterFMode_in counts[09]: MCR:0x2022101F, steps:46. EnterFMode_in DEBUG_POINT2 counts[09]: MCR:0x2022101F, steps:47. DEBUG_POINT2 DEBUG_POINT3 counts[09]: MCR:0x2022101F, steps:48. DEBUG_POINT3 DEBUG_POINT4 counts[09]: MCR:0x2022101F, steps:49. DEBUG_POINT4 EnterFMode_out counts[09]: MCR:0x2022101F, steps:50. EnterFMode_out EnterFMode_in counts[10]: MCR:0x2022101F, steps:51. EnterFMode_in DEBUG_POINT2 counts[10]: MCR:0x2022101F, steps:52. DEBUG_POINT2 DEBUG_POINT3 counts[10]: MCR:0x2022101F, steps:53. DEBUG_POINT3 DEBUG_POINT4 counts[10]: MCR:0x2022101F, steps:54. DEBUG_POINT4 EnterFMode_out counts[10]: MCR:0x2022101F, steps:55. EnterFMode_out EnterFMode_in counts[11]: MCR:0x2022101F, steps:56. EnterFMode_in DEBUG_POINT2 counts[11]: MCR:0x7022101F, steps:57. DEBUG_POINT2 DEBUG_POINT3 counts[11]: MCR:0x7022101F, steps:58. DEBUG_POINT3 DEBUG_POINT4 counts[11]: MCR:0x7922101F, steps:59. DEBUG_POINT4 EnterFMode_out counts[11]: MCR:0x7922101F, steps:60. EnterFMode_out EnterFMode_in counts[12]: MCR:0x2022101F, steps:61. EnterFMode_in DEBUG_POINT2 counts[12]: MCR:0x2022101F, steps:62. DEBUG_POINT2 DEBUG_POINT3 counts[12]: MCR:0x2022101F, steps:63. DEBUG_POINT3 DEBUG_POINT4 counts[12]: MCR:0x2022101F, steps:64. DEBUG_POINT4 EnterFMode_out counts[12]: MCR:0x2022101F, steps:65. EnterFMode_out EnterFMode_in counts[13]: MCR:0x2022101F, steps:66. EnterFMode_in DEBUG_POINT2 counts[13]: MCR:0x7022101F, steps:67. DEBUG_POINT2 DEBUG_POINT3 counts[13]: MCR:0x7022101F, steps:68. DEBUG_POINT3 DEBUG_POINT4 counts[13]: MCR:0x7022101F, steps:69. DEBUG_POINT4 DEBUG_POINT5 counts[00]: MCR:0x7022101F, steps:70. DEBUG_POINT5 DEBUG_POINT6 counts[00]: MCR:0x5280000F, steps:71. DEBUG_POINT6 DEBUG_POINT7 counts[00]: MCR:0x5980000F, steps:72. DEBUG_POINT7 EnterFMode_out counts[13]: MCR:0x5980000F, steps:73. EnterFMode_out EnterFMode_in counts[14]: MCR:0x0080000F, steps:74. EnterFMode_in DEBUG_POINT2 counts[14]: MCR:0x5080000F, steps:75. DEBUG_POINT2 DEBUG_POINT3 counts[14]: MCR:0x5080000F, steps:76. DEBUG_POINT3 DEBUG_POINT4 counts[14]: MCR:0x5980000F, steps:77. DEBUG_POINT4 EnterFMode_out counts[14]: MCR:0x5980000F, steps:78. EnterFMode_out EnterFMode_in counts[15]: MCR:0x0000000F, steps:79. EnterFMode_in DEBUG_POINT2 counts[15]: MCR:0x0000000F, steps:80. DEBUG_POINT2 DEBUG_POINT3 counts[15]: MCR:0x0000000F, steps:81. DEBUG_POINT3 DEBUG_POINT4 counts[15]: MCR:0x0000000F, steps:82. DEBUG_POINT4 EnterFMode_out counts[15]: MCR:0x0000000F, steps:83. EnterFMode_out DEBUG_POINT11 counts[00]: MCR:0x0000000F, steps:84. DEBUG_POINT11 DEBUG_POINT12 counts[00]: MCR:0x0000000F, steps:85. DEBUG_POINT12 EnterFMode_in counts[16]: MCR:0x0000000F, steps:86. EnterFMode_in DEBUG_POINT2 counts[16]: MCR:0x5000000F, steps:87. DEBUG_POINT2 DEBUG_POINT3 counts[16]: MCR:0x5000000F, steps:88. DEBUG_POINT3 DEBUG_POINT4 counts[16]: MCR:0x5900000F, steps:89. DEBUG_POINT4 EnterFMode_out counts[16]: MCR:0x5900000F, steps:90. EnterFMode_out EnterFMode_in counts[17]: MCR:0x0000000F, steps:91. EnterFMode_in DEBUG_POINT2 counts[17]: MCR:0x5000000F, steps:92. DEBUG_POINT2 DEBUG_POINT3 counts[17]: MCR:0x5000000F, steps:93. DEBUG_POINT3 DEBUG_POINT4 counts[17]: MCR:0x5900000F, steps:94. DEBUG_POINT4 EnterFMode_out counts[17]: MCR:0x5900000F, steps:95. EnterFMode_out EnterFMode_in counts[18]: MCR:0x0000000F, steps:96. EnterFMode_in DEBUG_POINT2 counts[18]: MCR:0x5000000F, steps:97. DEBUG_POINT2 DEBUG_POINT3 counts[18]: MCR:0x5000000F, steps:98. DEBUG_POINT3 DEBUG_POINT4 counts[18]: MCR:0x5900000F, steps:99. DEBUG_POINT4 EnterFMode_out counts[18]: MCR:0x5900000F, steps:100. EnterFMode_out   /*FUNCTION********************************************************************** * * Function Name : FLEXCAN_EnterFreezeMode * Description : Enter the freeze mode. * *END**************************************************************************/ void FLEXCAN_EnterFreezeMode(CAN_Type * base) { bool enabled = false; DEBUG_TRACE_POINT(1); base->MCR = (base->MCR & ~CAN_MCR_FRZ_MASK) | CAN_MCR_FRZ(1U); base->MCR = (base->MCR & ~CAN_MCR_HALT_MASK) | CAN_MCR_HALT(1U); DEBUG_TRACE_POINT(2); if (((base->MCR & CAN_MCR_MDIS_MASK) >> CAN_MCR_MDIS_SHIFT) == 0U) { enabled = true; DEBUG_TRACE_POINT(3); } else { base->MCR &= ~CAN_MCR_MDIS_MASK; } #ifdef ERRATA_E9595 /* Check Low-Power Mode Acknowledge Cleared */ while (((base->MCR & CAN_MCR_LPMACK_MASK) >> CAN_MCR_LPMACK_SHIFT) == 1U) {} /* Check if is a Bus-Off Error corresponding to 1x */ if ((((base->ESR1 & CAN_ESR1_FLTCONF_MASK) >> CAN_ESR1_FLTCONF_SHIFT) & 2U) != 0U) { /* Save registers before Soft Reset */ !!!!!!!!!! uint32_t tempIMSK[2],tempMCR; tempIMSK[0] = base->IMASK1; tempIMSK[1] = base->IMASK2; tempMCR = base->MCR; /* Soft Reset FlexCan */ base->MCR |= CAN_MCR_SOFTRST(1U); while (((base->MCR & CAN_MCR_SOFTRST_MASK) >> CAN_MCR_SOFTRST_SHIFT) == 0U) {} /* Restore registers after Soft Reset */ base->IMASK1 = tempIMSK[0]; base->IMASK2 = tempIMSK[1]; base->MCR = tempMCR; } else { base->MCR = (base->MCR & ~CAN_MCR_HALT_MASK) | CAN_MCR_HALT(1U); } #endif base->TIMER = 0U; uint32_t aux = 0U; #if FEATURE_CAN_HAS_FD /* MCR[FDEN] was reset to 0, wait for timeout */ if (!FLEXCAN_IsFDEnabled(base)) { while (!FLEXCAN_GetFreezeMode(base) && (aux < 180U)) { /* Wait until finish counting 180 bit times and exit*/ aux = (uint32_t)base->TIMER; } } else { while (!FLEXCAN_GetFreezeMode(base) && (aux < 730U)) { /* Wait until finish counting 730 bit times and exit*/ aux = (uint32_t)base->TIMER; } } #else while (!FLEXCAN_GetFreezeMode(base) && (aux < 180U)) { #error /* Wait until finish counting 180 bit times and exit*/ aux = (uint32_t)base->TIMER; } #endif /* FEATURE_CAN_HAS_FD */ DEBUG_TRACE_POINT(4); if (((base->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT) == 0U) { DEBUG_TRACE_POINT(5); /* Save registers before Soft Reset */ volatile uint32_t tempIMSK1, tempMCR; /* Save IMASK1 value */ tempIMSK1 = base->IMASK1; /* Save MCR value */ tempMCR = base->MCR; //memcpy(&tempBase,base,sizeof(tempBase)); /* Soft Reset FlexCan */ base->MCR |= CAN_MCR_SOFTRST(1U); DEBUG_TRACE_POINT(6); while (((base->MCR & CAN_MCR_SOFTRST_MASK) >> CAN_MCR_SOFTRST_SHIFT) != 0U) {} /* Restore IMASK1 value */ base->IMASK1 = tempIMSK1; /* Restore MCR value */ base->MCR = tempMCR; DEBUG_TRACE_POINT(7); } if (false == enabled) { base->MCR |= CAN_MCR_MDIS_MASK; DEBUG_TRACE_POINT(8); /* Wait until disable mode acknowledged */ while (((base->MCR & CAN_MCR_LPMACK_MASK) >> CAN_MCR_LPMACK_SHIFT) == 0U) {} DEBUG_TRACE_POINT(9); } DEBUG_TRACE_POINT(10); } Re: FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 我不知道如何添加工程附件发送给你，我只能文字描述一下 1.当前我们工程的SDK版本是S32K1xx RTM SDK 3.0.0 2.  问题描述如下：      环境：MCU型号：nxp sk148     调试手段：加日志、变量监控       复现步骤：我们的产品，两块相同的使用SK148作为主控MCU的单板A和B，烧录同一版本软件。AB板将同一路CAN连接到一起。A板先上电，间隔时间t（可能是0~1000ms的任意值）后，B板上电。继电器双通道自动步进1ms轮询0~1000ms范围间隔时间t,先后控制A、B板上下电，自动化测试环境，低概率会出现上电过程中，后上电的B板的felxcan模块初始化失败，导致can功能异常。我定位到异常时刻， FLEXCAN_EnterFreezeMode 走到了异常分支（DEBUG_POINT5、6、7），可以确实每次出问题都是走了你们新加的flexcan的softreset分支，在这之后flexcan模块的MCR寄存器的值被异常篡改成0x000000f，会导致can模块彻底死机无法使用。 我的定位结论：你们的“寄存器的描述，该位具有“同步”的机制，肯定是成功了之后该位才会置零。”并不如预期，事实上该位并不是真正同步的，设置softreset之后需要等待3~5个can时钟周期，硬件寄存器才能真正完成复位，在硬件寄存器没有真正复位之前，操作寄存器会导致异常。 “trace_log_done.txt”是我采用变量打点保存寄存器的方式，观察到问题时刻MCR寄存器的值的变化过程（其中EnterFMode_in代表DEBUG_POINT1，EnterFMode_out代表DEBUG_POINT10）,setps表示函数调用的先后顺序，counts表示程序第几次走到这里，每次走到这里的MCR寄存器值我都会采用绝对地址访问读取并保存下来。 trace_log_done.txt： EnterFMode_in counts[00]: MCR:0x5980000F, steps:1. EnterFMode_in EBUG_POINT2 counts[00]: MCR:0x5980000F, steps:2. DEBUG_POINT2 EBUG_POINT3 counts[00]: MCR:0x5980000F, steps:3. DEBUG_POINT3 EBUG_POINT4 counts[00]: MCR:0x5980000F, steps:4. DEBUG_POINT4 nterFMode_out counts[00]: MCR:0x5980000F, steps:5. EnterFMode_out nterFMode_in counts[01]: MCR:0x0080000F, steps:6. EnterFMode_in EBUG_POINT2 counts[01]: MCR:0x5080000F, steps:7. DEBUG_POINT2 EBUG_POINT3 counts[01]: MCR:0x5080000F, steps:8. DEBUG_POINT3 EBUG_POINT4 counts[01]: MCR:0x5980000F, steps:9. DEBUG_POINT4 EnterFMode_out counts[01]: MCR:0x5980000F, steps:10. EnterFMode_out EnterFMode_in counts[02]: MCR:0x2002101F, steps:11. EnterFMode_in DEBUG_POINT2 counts[02]: MCR:0x7002101F, steps:12. DEBUG_POINT2 DEBUG_POINT3 counts[02]: MCR:0x7002101F, steps:13. DEBUG_POINT3 DEBUG_POINT4 counts[02]: MCR:0x7902101F, steps:14. DEBUG_POINT4 EnterFMode_out counts[02]: MCR:0x7902101F, steps:15. EnterFMode_out EnterFMode_in counts[03]: MCR:0x2022101F, steps:16. EnterFMode_in DEBUG_POINT2 counts[03]: MCR:0x2022101F, steps:17. DEBUG_POINT2 DEBUG_POINT3 counts[03]: MCR:0x2022101F, steps:18. DEBUG_POINT3 DEBUG_POINT4 counts[03]: MCR:0x2022101F, steps:19. DEBUG_POINT4 EnterFMode_out counts[03]: MCR:0x2022101F, steps:20. EnterFMode_out EnterFMode_in counts[04]: MCR:0x2022101F, steps:21. EnterFMode_in DEBUG_POINT2 counts[04]: MCR:0x2022101F, steps:22. DEBUG_POINT2 DEBUG_POINT3 counts[04]: MCR:0x2022101F, steps:23. DEBUG_POINT3 DEBUG_POINT4 counts[04]: MCR:0x2022101F, steps:24. DEBUG_POINT4 EnterFMode_out counts[04]: MCR:0x2022101F, steps:25. EnterFMode_out EnterFMode_in counts[05]: MCR:0x2022101F, steps:26. EnterFMode_in DEBUG_POINT2 counts[05]: MCR:0x7022101F, steps:27. DEBUG_POINT2 DEBUG_POINT3 counts[05]: MCR:0x7022101F, steps:28. DEBUG_POINT3 DEBUG_POINT4 counts[05]: MCR:0x7922101F, steps:29. DEBUG_POINT4 EnterFMode_out counts[05]: MCR:0x7922101F, steps:30. EnterFMode_out EnterFMode_in counts[06]: MCR:0x2022101F, steps:31. EnterFMode_in DEBUG_POINT2 counts[06]: MCR:0x2022101F, steps:32. DEBUG_POINT2 DEBUG_POINT3 counts[06]: MCR:0x2022101F, steps:33. DEBUG_POINT3 DEBUG_POINT4 counts[06]: MCR:0x2022101F, steps:34. DEBUG_POINT4 EnterFMode_out counts[06]: MCR:0x2022101F, steps:35. EnterFMode_out EnterFMode_in counts[07]: MCR:0x2022101F, steps:36. EnterFMode_in DEBUG_POINT2 counts[07]: MCR:0x7022101F, steps:37. DEBUG_POINT2 DEBUG_POINT3 counts[07]: MCR:0x7022101F, steps:38. DEBUG_POINT3 DEBUG_POINT4 counts[07]: MCR:0x7922101F, steps:39. DEBUG_POINT4 EnterFMode_out counts[07]: MCR:0x7922101F, steps:40. EnterFMode_out EnterFMode_in counts[08]: MCR:0x2022101F, steps:41. EnterFMode_in DEBUG_POINT2 counts[08]: MCR:0x7022101F, steps:42. DEBUG_POINT2 DEBUG_POINT3 counts[08]: MCR:0x7022101F, steps:43. DEBUG_POINT3 DEBUG_POINT4 counts[08]: MCR:0x7922101F, steps:44. DEBUG_POINT4 EnterFMode_out counts[08]: MCR:0x7922101F, steps:45. EnterFMode_out EnterFMode_in counts[09]: MCR:0x2022101F, steps:46. EnterFMode_in DEBUG_POINT2 counts[09]: MCR:0x2022101F, steps:47. DEBUG_POINT2 DEBUG_POINT3 counts[09]: MCR:0x2022101F, steps:48. DEBUG_POINT3 DEBUG_POINT4 counts[09]: MCR:0x2022101F, steps:49. DEBUG_POINT4 EnterFMode_out counts[09]: MCR:0x2022101F, steps:50. EnterFMode_out EnterFMode_in counts[10]: MCR:0x2022101F, steps:51. EnterFMode_in DEBUG_POINT2 counts[10]: MCR:0x2022101F, steps:52. DEBUG_POINT2 DEBUG_POINT3 counts[10]: MCR:0x2022101F, steps:53. DEBUG_POINT3 DEBUG_POINT4 counts[10]: MCR:0x2022101F, steps:54. DEBUG_POINT4 EnterFMode_out counts[10]: MCR:0x2022101F, steps:55. EnterFMode_out EnterFMode_in counts[11]: MCR:0x2022101F, steps:56. EnterFMode_in DEBUG_POINT2 counts[11]: MCR:0x7022101F, steps:57. DEBUG_POINT2 DEBUG_POINT3 counts[11]: MCR:0x7022101F, steps:58. DEBUG_POINT3 DEBUG_POINT4 counts[11]: MCR:0x7922101F, steps:59. DEBUG_POINT4 EnterFMode_out counts[11]: MCR:0x7922101F, steps:60. EnterFMode_out EnterFMode_in counts[12]: MCR:0x2022101F, steps:61. EnterFMode_in DEBUG_POINT2 counts[12]: MCR:0x2022101F, steps:62. DEBUG_POINT2 DEBUG_POINT3 counts[12]: MCR:0x2022101F, steps:63. DEBUG_POINT3 DEBUG_POINT4 counts[12]: MCR:0x2022101F, steps:64. DEBUG_POINT4 EnterFMode_out counts[12]: MCR:0x2022101F, steps:65. EnterFMode_out EnterFMode_in counts[13]: MCR:0x2022101F, steps:66. EnterFMode_in DEBUG_POINT2 counts[13]: MCR:0x7022101F, steps:67. DEBUG_POINT2 DEBUG_POINT3 counts[13]: MCR:0x7022101F, steps:68. DEBUG_POINT3 DEBUG_POINT4 counts[13]: MCR:0x7022101F, steps:69. DEBUG_POINT4 DEBUG_POINT5 counts[00]: MCR:0x7022101F, steps:70. DEBUG_POINT5 DEBUG_POINT6 counts[00]: MCR:0x5280000F, steps:71. DEBUG_POINT6 DEBUG_POINT7 counts[00]: MCR:0x5980000F, steps:72. DEBUG_POINT7 EnterFMode_out counts[13]: MCR:0x5980000F, steps:73. EnterFMode_out EnterFMode_in counts[14]: MCR:0x0080000F, steps:74. EnterFMode_in DEBUG_POINT2 counts[14]: MCR:0x5080000F, steps:75. DEBUG_POINT2 DEBUG_POINT3 counts[14]: MCR:0x5080000F, steps:76. DEBUG_POINT3 DEBUG_POINT4 counts[14]: MCR:0x5980000F, steps:77. DEBUG_POINT4 EnterFMode_out counts[14]: MCR:0x5980000F, steps:78. EnterFMode_out EnterFMode_in counts[15]: MCR:0x0000000F, steps:79. EnterFMode_in DEBUG_POINT2 counts[15]: MCR:0x0000000F, steps:80. DEBUG_POINT2 DEBUG_POINT3 counts[15]: MCR:0x0000000F, steps:81. DEBUG_POINT3 DEBUG_POINT4 counts[15]: MCR:0x0000000F, steps:82. DEBUG_POINT4 EnterFMode_out counts[15]: MCR:0x0000000F, steps:83. EnterFMode_out DEBUG_POINT11 counts[00]: MCR:0x0000000F, steps:84. DEBUG_POINT11 DEBUG_POINT12 counts[00]: MCR:0x0000000F, steps:85. DEBUG_POINT12 EnterFMode_in counts[16]: MCR:0x0000000F, steps:86. EnterFMode_in DEBUG_POINT2 counts[16]: MCR:0x5000000F, steps:87. DEBUG_POINT2 DEBUG_POINT3 counts[16]: MCR:0x5000000F, steps:88. DEBUG_POINT3 DEBUG_POINT4 counts[16]: MCR:0x5900000F, steps:89. DEBUG_POINT4 EnterFMode_out counts[16]: MCR:0x5900000F, steps:90. EnterFMode_out EnterFMode_in counts[17]: MCR:0x0000000F, steps:91. EnterFMode_in DEBUG_POINT2 counts[17]: MCR:0x5000000F, steps:92. DEBUG_POINT2 DEBUG_POINT3 counts[17]: MCR:0x5000000F, steps:93. DEBUG_POINT3 DEBUG_POINT4 counts[17]: MCR:0x5900000F, steps:94. DEBUG_POINT4 EnterFMode_out counts[17]: MCR:0x5900000F, steps:95. EnterFMode_out EnterFMode_in counts[18]: MCR:0x0000000F, steps:96. EnterFMode_in DEBUG_POINT2 counts[18]: MCR:0x5000000F, steps:97. DEBUG_POINT2 DEBUG_POINT3 counts[18]: MCR:0x5000000F, steps:98. DEBUG_POINT3 DEBUG_POINT4 counts[18]: MCR:0x5900000F, steps:99. DEBUG_POINT4 EnterFMode_out counts[18]: MCR:0x5900000F, steps:100. EnterFMode_out /*FUNCTION********************************************************************** * * Function Name : FLEXCAN_EnterFreezeMode * Description : Enter the freeze mode. * *END**************************************************************************/ void FLEXCAN_EnterFreezeMode(CAN_Type * base) { bool enabled = false; DEBUG_TRACE_POINT(1); base->MCR = (base->MCR & ~CAN_MCR_FRZ_MASK) | CAN_MCR_FRZ(1U); base->MCR = (base->MCR & ~CAN_MCR_HALT_MASK) | CAN_MCR_HALT(1U); DEBUG_TRACE_POINT(2); if (((base->MCR & CAN_MCR_MDIS_MASK) >> CAN_MCR_MDIS_SHIFT) == 0U) { enabled = true; DEBUG_TRACE_POINT(3); } else { base->MCR &= ~CAN_MCR_MDIS_MASK; } #ifdef ERRATA_E9595 /* Check Low-Power Mode Acknowledge Cleared */ while (((base->MCR & CAN_MCR_LPMACK_MASK) >> CAN_MCR_LPMACK_SHIFT) == 1U) {} /* Check if is a Bus-Off Error corresponding to 1x */ if ((((base->ESR1 & CAN_ESR1_FLTCONF_MASK) >> CAN_ESR1_FLTCONF_SHIFT) & 2U) != 0U) { /* Save registers before Soft Reset */ !!!!!!!!!! uint32_t tempIMSK[2],tempMCR; tempIMSK[0] = base->IMASK1; tempIMSK[1] = base->IMASK2; tempMCR = base->MCR; /* Soft Reset FlexCan */ base->MCR |= CAN_MCR_SOFTRST(1U); while (((base->MCR & CAN_MCR_SOFTRST_MASK) >> CAN_MCR_SOFTRST_SHIFT) == 0U) {} /* Restore registers after Soft Reset */ base->IMASK1 = tempIMSK[0]; base->IMASK2 = tempIMSK[1]; base->MCR = tempMCR; } else { base->MCR = (base->MCR & ~CAN_MCR_HALT_MASK) | CAN_MCR_HALT(1U); } #endif base->TIMER = 0U; uint32_t aux = 0U; #if FEATURE_CAN_HAS_FD /* MCR[FDEN] was reset to 0, wait for timeout */ if (!FLEXCAN_IsFDEnabled(base)) { while (!FLEXCAN_GetFreezeMode(base) && (aux < 180U)) { /* Wait until finish counting 180 bit times and exit*/ aux = (uint32_t)base->TIMER; } } else { while (!FLEXCAN_GetFreezeMode(base) && (aux < 730U)) { /* Wait until finish counting 730 bit times and exit*/ aux = (uint32_t)base->TIMER; } } #else while (!FLEXCAN_GetFreezeMode(base) && (aux < 180U)) { #error /* Wait until finish counting 180 bit times and exit*/ aux = (uint32_t)base->TIMER; } #endif /* FEATURE_CAN_HAS_FD */ DEBUG_TRACE_POINT(4); if (((base->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT) == 0U) { DEBUG_TRACE_POINT(5); /* Save registers before Soft Reset */ volatile uint32_t tempIMSK1, tempMCR; /* Save IMASK1 value */ tempIMSK1 = base->IMASK1; /* Save MCR value */ tempMCR = base->MCR; //memcpy(&tempBase,base,sizeof(tempBase)); /* Soft Reset FlexCan */ base->MCR |= CAN_MCR_SOFTRST(1U); DEBUG_TRACE_POINT(6); while (((base->MCR & CAN_MCR_SOFTRST_MASK) >> CAN_MCR_SOFTRST_SHIFT) != 0U) {} /* Restore IMASK1 value */ base->IMASK1 = tempIMSK1; /* Restore MCR value */ base->MCR = tempMCR; DEBUG_TRACE_POINT(7); } if (false == enabled) { base->MCR |= CAN_MCR_MDIS_MASK; DEBUG_TRACE_POINT(8); /* Wait until disable mode acknowledged */ while (((base->MCR & CAN_MCR_LPMACK_MASK) >> CAN_MCR_LPMACK_SHIFT) == 0U) {} DEBUG_TRACE_POINT(9); } DEBUG_TRACE_POINT(10); } Re: FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 Hi@MrYin 你可以告知我你当前所使用的SDK版本是什么？因为我并不确定你遇到的问题是否和我所说的是一个相同的问题。 如果不是RTM 4.0.1及其之后的版本，你可以尝试更新至RTM 4.0.1及之后的版本进行尝试，是否改更新能够 解决你当前的问题。 “void FLEXCAN_EnterFreezeMode(CAN_Type * base)”这个api的实现步骤是 1.请求进入freeze mode 2.等待超时，进入失败之后才会去执行flexcan的复位。在旧版本中是没有超时判断的。 3.即使进入flexcan的复位，理论上也不会出现你说的这种状况，按该寄存器的描述，该位具有“同步”的机制，肯定是成功了之后该位才会置零。 不过如果不是我所猜测的这种状况，你可以提供你的工程给我，告知我如何复现你的问题，这样我才好是否有类似的bug，是否可以被认定为一个未知的bug。 Re: FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 感谢你的回复。根据你的信息描述来看，你说的这个问题和我的这个问题并不是一个问题，你说的是超时之后会执行can soft reset，我说的问题是执行完reset后必须等一段时间等硬件真正执行完reset后才能给MCR寄存器赋值，麻烦重新审视一下我的问题描述，谢谢！ Re: FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 感谢你的回复。根据你的信息描述来看，你说的这个问题和我的这个问题并不是一个问题，你说的是超时之后会执行can soft reset，我说的问题是执行完reset后必须等一段时间等硬件真正执行完reset后才能给MCR寄存器赋值，麻烦重新审视一下我的问题描述，谢谢！ Re: FLEXCAN_EnterFreezeMode等不到MCR_FRZACK之后，执行复位，执行完复位之后CAN模块MCR寄存器异常 Hi@MrYin 是的，这是一个已知且修复的问题。 你应该用的是RTM 4.0.0和其之前的版本，在RTM 4.0.1及之后的版本中已经进行了修改。 新版本中针对CAN 和CAN FD 添加了不同的延时判断。

ダイレクトメモリアクセスを備えたMCANが動作しない ide=s32 Design Studio for pa SDK=SDK_S32_PA_15 ボード=mpc5775b eDMAでMCAN1を使用してデータを受信しようとしましたが、機能しません。以下にコードを記載しましたので、必要な変更を提案してください。 MPC5775B-E MPC5777C Re: MCAN with direct memory access not working お返事ありがとうございます。 私は **MCAN1** のみを選択しましたが、私の設定でわかるように、EDMA コンポーネントでは MCAN1 を設定でき、チャネル番号の選択のみが可能です。チャネル0は使用していません。画像を追加しました。コードでも確認できます。 Re: MCAN with direct memory access not working DMA chnl 0 は使用できませんが、MCAN に割り当てられたチャネルは使用できます。

Flexcomm2 (FC2_P2) MCX-N5XX-EVK Hi currently i am working with MCX-N5XX-EVK schematic ver SCH -55277 REV B2 1. where I have configured LP_FLEXCOMM2 as UART on pin P4_16 and 17 and i am expecting o/p on j20 header pin no. 21 (P4_16/FXIO_D24) and 22 (P4_17/FXIO_D25) where the tx pin unable to send any data  and also the default levels on pin is  P4_16 (21 ) 3.3v and P4_17( 22) 0v  2. I have gen code form GUI i.e. peripheral tab in expresso ide (where the default uart i.e. LPUART4 is working fine which is gen by default using ide) 3. I have attached schematic for ref and also ref code , images for the Flexcomm2 configuration  Development Board Re: Flexcomm2 (FC2_P2) MCX-N5XX-EVK Hello @Avinpat123 , Thanks for your post. According the "66.2.3 External signals" of Reference manual,  although FC_P2/FC_P3 can also function as TXD/RXD in LPUART+LPI2C mode, they can only be used as RTS_b/CTS_b in LPUART mode alone. I suspect this is where the issue lies. Are you currently in LPUART mode?  Given this limitation, I recommend switching to PORT4_0 (FC2_P0) and PORT4_1 (FC2_P1) instead. Both pins support alternate functions and can be used as RXD and TXD in LPUART mode of FLEXCOMM2, which aligns with your application requirements. In addition, if you want try LPUART+LPI2C mode with FC2_P2/FC2_P3 as TXD/RXD, since the config tools do not support configuring a single flexcomm to the LPUART+LPI2C function, I recommend that you refer to our SDK demo "lpflexcomm_interrupt_transfer_cm33". If you want try LPUART mode only, you can start with "lpuart_polling_cm33_core0" and change the pins via the config tools.  Hope it can help you. BRs, Celeste -------------------------------------------------------------------------------------------------------------------- Note: If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! --------------------------------------------------------------------------------------------------------------------

GUI Guider 1.9.1 メモリが読み込まれない 使用中にメモリ読み取り障害の問題が発生しました。

MCZ33996 SPI Timing / Power Sequencing Issue Dear NXP Technical Support Team We are encountering an abnormal SPI behavior with the MCZ33996 in a dual power supply scenario and would like your technical guidance. Below is the detailed description of the issue and our questions. Please refer to the attached oscilloscope waveform and schematic diagram for details. Issue Description: In our application, the MCU and the MCZ33996 are powered from two independent sources. During a power cycling test of the MCU (while the MCZ33996 supply remains stable), we observed that the valve indicator light turns on unexpectedly. Measurement results indicate that the MCZ33996 is producing abnormal outputs. Waveform analysis shows that when CS is high, the MCZ33996 appears to be reading data and driving outputs. This occurs while the MCU is in the process of powering down or powering up, during which it cannot actively control or read data. When the MCU is operating normally, the MCZ33996 outputs behave correctly. Captured waveform channel mapping: CH1: MCU 3.3 V (Yellow) CH2: NXP CS input (Green) CH3: NXP CLK input (Blue) CH4: NXP SI input (Red) My  Questions: RST Pin Source Should the MCZ33996 RST pin share the same power source as the MCU, so that the device is automatically reset when the MCU powers down? Need for RST in Software Is it strictly necessary to issue a reset (RST) in software? The current customer’s view is that if the MCZ33996 side has a stable and continuous power supply, it should not require a reset. If implementing a reset in software is difficult, is it possible to avoid the issue purely through hardware measures? Vendor Suggestions Do you have any additional recommendations or best practices to ensure the MCZ33996 outputs remain disabled during MCU power cycling when the device itself remains powered? Specifically, how can we avoid false SPI transactions or unintended outputs when the MCU IO pins are floating or in an undefined state during power-up or power-down? We appreciate your feedback on whether this behavior is expected given the power sequencing, and your guidance on recommended hardware or firmware countermeasures Attached   Thanks vicky  MC33903 | 4 | 5 Re: MCZ33996 SPI Timing / Power Sequencing Issue Hi Jozef , thanks for your great support 🙂 we solved the issue last week . Re: MCZ33996 SPI Timing / Power Sequencing Issue Dear Vicky, RST Pin Source Should the MCZ33996 RST pin share the same power source as the MCU, so that the device is automatically reset when the MCU powers down? [A] Yes, this is correct. Please refer to the Figure 1. in the MC33996 datasheet. The RST pin should be driven by your MCU. If the MCU is powered down, the RST should be pulled low by your MCU.  2. Need for RST in Software Is it strictly necessary to issue a reset (RST) in software? The current customer’s view is that if the MCZ33996 side has a stable and continuous power supply, it should not require a reset. If implementing a reset in software is difficult, is it possible to avoid the issue purely through hardware measures? [A] If you don't want to reset the MCZ33996 during the MCU power down, while the MCZ33996 will be still powered, please use a weak pull-up resistor (e.g. 10k) from the RST pin to VPWR pin of the MCZ33996. Then the MCZ33996 will not be reset when MCU will be powered down, but can still be reset if requested by your MCU.  3. Vendor Suggestions Do you have any additional recommendations or best practices to ensure the MCZ33996 outputs remain disabled during MCU power cycling when the device itself remains powered? Specifically, how can we avoid false SPI transactions or unintended outputs when the MCU IO pins are floating or in an undefined state during power-up or power-down? [A] Please refer to the Figure 1. The MCU and the MCZ33996 logic circuit for SPI sending message must be powered from the same source, so the SO interface will be disabled when the MCU will not be powered.  With Best Regards, Jozef

VLPR S32K144のVLPRモードを使用していましたが、VLPRモードに移行した後、周辺回路をオフにしましたが、FTM、ADC、CANなどのモジュールの初期化は行っていません。この時の電流は約3.6mAです。電流をさらに1.5mAまで下げるには、どのような操作を行うべきでしょうか？ Re: VLPR こんにちは@LzdOo はい、この方法では周辺機器を無効化できますが、CANまたはFTMの出力ポートの設定も変更する必要があります。例えば、VLPRモードに移行する場合、これらの通信インターフェースをアナログ入力モードに設定する必要があります。VLPRモードではCANとFTMの消費電力はわずか数十マイクロアンペアと非常に少なく、精度の低いテスト機器ではこの変更を観察できない可能性があります。 Re: VLPR CAN、FTM、LPUARTのシャットダウンはdeinit経由で実装されていますか？この方法でFTMとLPUARTをシャットダウンしたところ、シャットダウンしていないときと電流値がほぼ同じであることがわかりました。これは何が原因でしょうか？（このプロジェクトでは、VLPR中にADCを動作させる必要があります。） Re: VLPR こんにちは@LzdOo 摂氏 25 度ですべての周辺モジュールをオフにすると、VLPR は理論上 1.48mA の電力を消費します。 次に、CAN、FTM、または ADC がオフになっていない場合、消費電力は 2mA を超える必要があります (VLPR での ADC 消費電力データなし)。 Re: VLPR このドキュメントを読みました。まず、私はVLPRを選択しましたが、ドキュメントではVLPSを選択しました。次に、ドキュメントに従ってレジスタを操作し、クロックを設定したところ、実際の電流にはほとんど影響がありませんでした。 他に選択肢はありますか？ Re: VLPR こんにちは@LzdOo こちらの文書を参照してください。 http://mp.weixin.qq.com/s?__biz=MzI0MDk0ODcxMw==&mid=2247485647&idx=1&sn=2738a55639240dc837d93201161f574a&chksm=e9124c49de65c55f779e12286f21ec782473cd98ab181f818becc65dccb31a3efd092e42c2ed&scene=21#wechat_redirect

S32K11 PWM 通道分配 我们可以使用 emios_0_CH {x} _X 和 EMIOS_0_CH {x} _Y/G/H 作为 PWM 输出，以适应不同的占空比和 PWM 频率？ 为引脚分配 PWM 功能（输入和输出）的一般策略是什么？ Re: S32K11 PWM channel assignment 感谢您关注我们的产品并为我们的社区做出贡献。 您可以参考下面的帖子： S32M27x/S32K3 - eMIOS 使用情况 - S32M27x/S32K3>https://community.nxp.com/t5/S32M-Knowledge-Base/S32M27x-S32K3-eMIOS-Usage/ta-p/2129760 具体为 6.6.PWM 设计注意事项 7.5.重症监护室设计考虑因素 希望这些信息对您有所帮助。如有任何疑问，请随时联系我们。

NXP MPC5775 EVBをBLDCモーターコントローラとして使用することに関するお問い合わせ NXPサポートチーム様 最近、NXP MPC5775 評価ボードを購入し、BLDC モーター コントローラとして使用したいと考えています。MPC5775 EVB がこのアプリケーションと互換性があるかどうか確認していただけますか? 互換性がある場合は、このボードを使用して BLDC モータ制御を実装するのに役立つガイドライン、ドキュメント、またはサンプル プロジェクトなど、サポートしていただければ幸いです。 ご協力に感謝し、ご指導を賜りますようお願い申し上げます。 よろしくお願いします、 ブーシャン・パティル Re: Inquiry Regarding Using NXP MPC5775 EVB as a BLDC Motor Controller このデバイスには、MPC5775E 3相PMSM開発キットのみがあります。 https://www.nxp.com/design/design-center/development-boards-and-designs/MCSPTR2A5775E MPC5774E では、BLDC 6 ステップ整流制御はサポートされていません。それは計画さえありません。 ただし、BLDC は FOC 制御構造を使用して PMSM として制御できる可能性があり、つまり MPC5774E によって制御できることになります。しかし、先ほど言ったように、例はありません。

Latest RTD release for S32R47 We - the Radar System Software team - are using RTD drivers and config from release SW32R47_RTD_R21-11_0.8.0_CD01_D2505 and they are working fine. We are now trying to switch to the latest RTD release for S32R47, which is  "SW32R47 Real-Time Drivers AUTOSAR R23-11 0.8.0" but this didn't work for us. The behaviour that we notice is a that an expected interrupt from the DMA is missing when using the new RTDs and trying to do an Spi_AsyncTransmit. The steps that I followed to generate the new rtd configs based on the new RTD driver are 1- uninstalled the old RTD driver 2- installed the new RTD driver SW32R47 Real-Time Drivers AUTOSAR R23-11 0.8.0 3- imported the working configs from the tresos project that we already have and are working fine with the old release 4- generated the configs and copied them in our working space Would be great if you can support us to get the latest release to also work for us. Thanks in advance RTD Re: Latest RTD release for S32R47 There was a bug in the ccache in my working space that resulted in this build error. After I cleaned it, the example could be built successfully. Thank you for your support Re: Latest RTD release for S32R47 Hello @MMosbah , Can you please confirm if the example I provided helped you? If so can you please accept this as solution? Thank you. Re: Latest RTD release for S32R47 Hello @MMosbah , Please see the attached example I have modified to use SPI async transfer with DMA. On this example the transfer is executed properly. Re: Latest RTD release for S32R47 Hello Marius, thanks for your answer. I checked this RTD "SW32R47 Real-Time Drivers AUTOSAR R23-11 0.8.0 Patch 01" and I haven't found a reference example which uses SPI with DMA. Are you aware if this exists? Re: Latest RTD release for S32R47 Hello Mohamed, Have you verified how the examples are done in "SW32R47 Real-Time Drivers AUTOSAR R23-11 0.8.0"? I have tested the MCL DMA transfer example and it works properly. There is no issue with DMA. Please compare your configuration with this one as well and if not I can also have a look over your project if you attach it. Also in "SW32R47 Real-Time Drivers AUTOSAR R23-11 0.8.0" there are examples that use both Design Studio and Tressos. --Marius

ADC averaging and sampling time Hi  I am using s32k311 series microcontroller and I am working on ADC peripheral. I want to know the use of  Conversion Timing For Precision Inputs (CTR0) register. Is it related to configuration of sampling time ? If yes  how to configure sapling time of 1 msec. Also want to know how averaging is done internally?    Please give some explanation on this.  Re: ADC averaging and sampling time Thank you for your interest in our products and for contributing to our community. Following training material describe in more detail ADC conversion time: S32K3_RTD_Training_ADC_BCTU_TRGMUX https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/S32K/46171/1/S32K3_RTD_Training_ADC_BCTU_TRGMUX.pdf I hope this information is helpful.

[MC33978] Request on 'MC33978 Current and Power Calculator' Hi, I've noticed an "MC33978 Current and Power Calculator" tool in doc AN5098. However, I couldn't find any link in NXP network. Could you provide it? Thanks. MC33978 

hello hello

Oueries in AN14003 Hello NXP team, I am using bare KW45 bare MCU and for enabling Radio core for flashing NBU image and Cm33 image I referred AN14003 Rev. 1.1 but I have some queries with respect to function mentioned in the document . 1.Function JiaTest_Set_LifeCycleAndKeys_Secure  use program the fuse but in the definition of the function there is no reference present for the specific variable which is &TestContextForWriteLC , how to succesfully build the project if reference is not present and why reference is not present for the specific variable. 2. I have noticed there is no #if defined in specific part but # endif is present. NOTE you can find reference of the function in page number 11 and 12 of the document. with regards Chetan Re: Oueries in AN14003 I think NXP missed the to update the particular variable &TestContextForWriteLC in the document I am sharing the snippet where you missed and I am referring AN14003 with Rev. 1.1 — 14 June 2024  you should initialize the variable where I have highlighted. You can compare your both application note AN14003 with Rev. 1.1 and AN14003 with Rev. 1.0 you will identify the issue and please address the extra #endif you mentioned and I mentioned above. with regards Chetan Re: Oueries in AN14003 Hello Chetan, The initialization for the context is shown in figure 9 chapter 5.2.1 before the SB3KDK and RoTKTH keys. You can enter context name: nboot_context_t TestContextForWriteLC; for example. This is something every customer would need to implement by their side with his own context name. Best Regards Luis

MCXN947 の eIQ NPU はトランスベースのモデルをサポートしていますか? こんにちは、 タイトルに述べたように、MCU の NPU はトランスベースのモデルをサポートできますか?公式サイトによれば、NPU はトランスフォーマー モデルをサポートできるとのことです。 圧縮、量子化、および flexspi 経由の外部 RAM を想定すると、小型のトランスフォーマー ベースのモデルをボードに搭載できます。CAN NPU は実際に推論を加速するために使用できますか? 例としては、GitHub - maxbbraun/llama4micro: マイクロコントローラ上で動作する「大規模」言語モデルが挙げられます。 CPU で実行する代わりに、モデルを NPU で実行できますか? このようなユースケースを MCXN にどのように適応させることができますか? MCX N Re: Does eIQ NPU on MCXN947 support transformer based model? こんにちは@TomC818 完全な「NPU 上の LLM」は、MCX ではまだサポートされているパスではありません。 LLM は動的シーケンス、KV キャッシュなどに依存しており、その多くは現在の eIQ Neutron TFLite オペレーション セットの範囲外です。 BR ハリー

S32DSPAのMPC5775Bにフラッシュできません – [ブロックメモリ範囲の停止] マルチリンクJTAG経由 問題の説明: マルチリンク デバッガー経由でカスタム VCU ボード (MPC5775B マイクロコントローラ搭載) をフラッシュできません。フラッシュプロセスは検証段階で停止し、アドレス範囲 0x00800000 ～ 0x008FFFFF 全体にわたってブロックされます (添付のスクリーンショットを参照)。 特定された根本原因: JTAG マルチリンク デバッガーによる MCU のフラッシュ中、具体的には消去プロセス中に電源中断が発生しました。フラッシュ メモリの全体が破損した状態になっているようです。 これまでの分析と試み: アプローチ1: アプリケーション層メモリが部分的に破損している場合、これまではメモリ セグメントの保持オプションを無効にして破損していない領域をフラッシュし、アプリケーション メモリ全体を消去することで回復していました。 このCASE、S32 Design Studio for Power Architecture (S32DSPA) で保存されたメモリ範囲オプションをすべて削除し、Multi-Link JTAG デバッガーを使用して再フラッシュを試みました。 それにもかかわらず、フラッシュ プロセスは依然として停止しており、現在 0x00800000 ～ 0x008FFFFF の範囲全体での検証がブロックされています。 アプローチ2: S32DSPA には、フラッシュ メモリを手動でクリアする直接的なオプションはありません。 PE Micro PROG-HL-PPCNEXUSツールをテストしました。デモ バージョンではメモリの読み取りは可能ですが、消去機能は無効になります。 観察: コア 0:完全に破損しています (未定義の状態 XX)。 コア1:空の状態 デモ版ではCore 0の消去操作はできません。 セットアップの詳細: MCU: MPC5775B 接続: マルチリンクユニバーサルデバッガを使用したJTAGのみ ボード: カスタム VCU ボード サポートのリクエスト: Core 0 フラッシュが完全に破損しているようで、すべての保存メモリ範囲を削除しても 0x00800000 ～ 0x008FFFFF の全範囲にわたるフラッシュ プロセスがブロックされていることを考えると、破損した Core 0 メモリを JTAG (ユニバーサル マルチリンク デバッガー) 経由で完全にクリア/消去する別の方法があるかどうか教えてください。 Re: Unable to Flash on MPC5775B in S32DSPA – [Stops ar block memory range] via Multilink JTAG ありがとう、デイビッド。 正確な手順に従うことでボードを回復することができました。 Re: Unable to Flash on MPC5775B in S32DSPA – [Stops ar block memory range] via Multilink JTAG これを試すことができます: https://community.nxp.com/t5/S32-Design-Studio-Knowledge-Base/HOWTO-MPC5777C-Low-Mid-Flash-block-erase-via-PE-Micro/ta-p/1123596 なお、MPC5775B は MPC5777C と互換性のあるデバイス、SOそのまま動作する可能性があります。

Unable to Flash on MPC5775B in S32DSPA – [Stops ar block memory range] via Multilink JTAG Description of Issue: We are unable to flash our custom VCU board (With MPC5775B micro controller) via the Multi-Link debugger. The flashing process halts during the verification stage, blocking across the full address range 0x00800000–0x008FFFFF (see attached screenshot). Root Cause Identified: A power interruption occurred during MCU flashing via JTAG Multi-Link debugger, specifically during the erase process. This appears to have entire portions of the flash memory in a corrupted state. Analysis & Attempts so far: Approach 1: In cases where the application layer memory is partially corrupted, we have previously recovered by disabling the Preserve Memory Segment option and flashing over the uncorrupted area—thus erasing the entire application memory. In this case, we removed all preserved memory range options in S32 Design Studio for Power Architecture (S32DSPA) and attempted to reflash via Multi-Link JTAG debugger. Despite this, the flashing process still stalls—currently blocking verification across the entire range 0x00800000–0x008FFFFF. Approach 2: S32DSPA does not provide a direct option to manually clear flash memory. We tested the PE Micro PROG-HL-PPCNEXUS tool. The demo version allows memory read but disables erase functionality. Observations: Core 0: Fully corrupted (undefined state XX). Core 1: Empty state Erase operation for Core 0 is not possible with the demo version. Setup Details: MCU: MPC5775B Connection: JTAG only with multilink universal debugger Board: Custom VCU board  Request for Support: Given that Core 0 flash appears fully corrupted and is blocking the flashing process across the full range 0x00800000–0x008FFFFF even with all preserve memory ranges removed, could you please advise if there is any alternative method to completely clear/erase the corrupted Core 0 memory via JTAG (Universal multilink debugger)? Re: Unable to Flash on MPC5775B in S32DSPA – [Stops ar block memory range] via Multilink JTAG Thanks David, I was able to recover the board by following exact steps. Re: Unable to Flash on MPC5775B in S32DSPA – [Stops ar block memory range] via Multilink JTAG You may try this: https://community.nxp.com/t5/S32-Design-Studio-Knowledge-Base/HOWTO-MPC5777C-Low-Mid-Flash-block-erase-via-PE-Micro/ta-p/1123596 Note that MPC5775B is compatible device with MPC5777C so it could work as it is.

FRDM-MCXA156 – mcuboot_opensource SDK Example Not Working in MCUXpresso Hi, I am currently working with the FRDM-MCXA156 board for evaluation of one of our projects and using the SDK examples in MCUXpresso IDE. I have tested basic examples such as: frdmmcxa156_blink_led frdmmcxa156_lpuart_interrupt_transfer  These examples worked as expected. However, while testing the frdmmcxa156_mcuboot_opensource example from the same SDK, I encountered the following log message on the terminal: I have followed the tutorial from the official documentation here: link Could you please suggest what might be causing this issue? Core and Memory FRDM-Training Re: FRDM-MCXA156 – mcuboot_opensource SDK Example Not Working in MCUXpresso Hi @CEPL_Dev , you can also use Secure Provisioning Tool, see step-by-step procedure described in the user guide: Generic workflows — MCUXpresso Secure Provisioning Tool 25.06 Re: FRDM-MCXA156 – mcuboot_opensource SDK Example Not Working in MCUXpresso Hello @CEPL_Dev  Thanks for your question. Please use the two projects together: "mcuboot_opensource" and "ota_mcubot_basic".   For detailed steps, please refer to readme.md. If still have issue, please show all your steps, I help you check. Thank you. BR Alice

MCU MKW38のメモリレイアウトを変更してEEPROMエミュレーションを有効にする NXP 様、メモリ構成レイアウトデザインに関して質問があります。私のメモリ構成レイアウトデザインは以下のとおりです。 私の質問は、以下のようにメモリレイアウトを変更することは可能かどうかです。 私が質問する理由は、エミュレーション用に4 KB の FlexRAM を使用し、バックアップ メモリとして64 KB の FlexNVM を使用して、 EEPROM エミュレーション機能を有効にしたいからです。 この構成が可能な場合、現在のメモリ レイアウト内でそれを実装する方法についてアドバイスをいただけますか? EEPROM エミュレーションのない既存のメモリ レイアウトはすでに完成しており、現在生産中です。ただし、アプリケーションのビルド結果によると、プログラム フラッシュには 64 KB の未使用領域があります。 このスペースは EEPROM エミュレーションのバックアップ メモリとして使用できますか? よろしくお願いします。 Re: Change Memory layout of MCU MKW38 to enable EEPROM Emulation こんにちは、 あなたの調子が良いといいのですが。 MKW39/38/37 リファレンス・マニュアルによると、FlexRAM ブロックと FlexNVM ブロックはパーティションに分割できます。仕様に応じて、EEERST、EEESIZE、DEPART の値を変更する必要があります。セクション30.4.11.16で説明されているプログラムパーティションコマンドを参照してください。 EEPROM パーティション (EEESIZE) の場合、EEPROM に最大 8 KB を設定CAN (「0010」= 4,096 バイト)。 データフラッシュパーティション（DEPART）とFlexNVM EEPROMパーティションについては、「0100」= 192 KBのデータフラッシュサイズと64 KBのEEPROMバックアップサイズです。 詳細については、30.3.4 データ フラッシュ 0 IFR マップと 30.4.3 FlexNVM の説明を参照してください。 よろしくお願いいたします。 アナ・ソフィア。 Re: Change Memory layout of MCU MKW38 to enable EEPROM Emulation 現在、私は256個のp-flashと256個のflexNVMメモリを備えたmkw38 mcuシリーズを使用しています。

S32K116EVB2Q048 stuck in an unusual state Hello all, I have removed the devkit-motorGD board from the pins of the eval board. When I plug in the OpenSDA USB to my laptop, the LED next to the OpenSDA MCU goes on and stays on. But, when I try to build and flash a simple hello world code from the standard simulink function libraries provided by NXP, the same LED blinks 7 times in approximately 2-3 seconds and stays off for another 2-3 second and repeat.  This is after the code geenration is complete. If I plug out and plug in again, we go back to the LED staying on. A simple UART terminal like Putty doesnt show anything on the communication line.  I tried the hello world code before and it worked. It just simply stopped working one fine day.  Probably an incomplete/corrupted image has been flashed which is why it is in this unusual state. Can someone help me with how to mass erase memory? Is there any documentation I can refer to?  Apologies if the question is too basic and is already answered. Do let me know if any more information is needed. Thanks! Re: S32K116EVB2Q048 stuck in an unusual state Hi @deshmaneaakash  There is no issue with D2 being ON. This LED indicates that OpenSDA is functioning correctly. However, based on the image you shared, I noticed that D3 is OFF. D3 corresponds to the PWR_LED, which should be ON to confirm that VDD is properly supplied. From what I can see in your board image, the jumper J107 appears to be set to position 1-2, which means the board expects to be powered by a 12V external power source. However, you have only connected the cable to OpenSDA. If you intend to power the board via the USB micro connector, then J107 should be set to position 2-3. Please verify and adjust this jumper setting accordingly. Additionally, I recommend referring to the Getting Started with the S32K116EVB2Q048 Evaluation Board. Re: S32K116EVB2Q048 stuck in an unusual state Hi @VaneB  THank you for your response. I want to elaborate the issue I am facing. I have connected my s32k116 simply through the USB to my laptop: The D2 LED is solid ON: I wrote a simple LED blinking code in baremetal C. I created a debug configuration as shown: When I click on Debug, this comes up: It doesnt make sense for me to try and change the port. When I cancel the dialog, this comes up: I also tried checking the Emergency Kinetis Device Recovery by Full Chip Erase. It gave me the same result. Please let me know if you have any insights. Your help would be much appreciated! Thank you! Re: S32K116EVB2Q048 stuck in an unusual state Hi @deshmaneaakash  Do you mean the D2 LED (SDA_LED)? If it is on, there is no issue. It indicates that OpenSDA is powered and functioning correctly. However, if you are referring to the D1 LED (SDA_RST_LED), that means the MCU is in a constant reset state. Let me suggest checking out the following NXP Community thread, which provides a detailed guide and troubleshooting steps.  The red light of the OPENSDA is always on, and the program cannot be debugged Re: S32K116EVB2Q048 stuck in an unusual state @VaneB Thank you so much for your response. I will definitely try that out. Before I proceed though, I had one question. As I mentioned, the LED next to the OpenSDA MCU is solid ON when I plug-in the USB. Does this indicate that the S32K116 is in bootloader mode? If yes, is it possible/okay to mass erase in bootloader mode? Thank you once again for your reponse! Re: S32K116EVB2Q048 stuck in an unusual state Hi @deshmaneaakash  To perform a mass erase, you can use an external debugger such as PEMicro, Segger, or a similar tool. For detailed guidance, I recommend reviewing Section 3.2 of the following application note: AN12130 – Production Flash Programming Best Practices for S32K1xx MCUs. It outlines key steps and important considerations for flash programming and mass erase procedures. Additionally, I have included a few helpful links below that provide further information and support: S32 Design Studio & Flash Mass erase Unlocking and Erasing FLASH with Segger J-Link S32Kxxx - SEGGER Knowledge Base BR, VaneB