SJA1110 create python configuration hex Hi All, I have a SJA1110 design and want to generate static .hex files for configuration. Unfortunately I could not find an example script in the following ressources: SJA1110-EVM Configuration Tools / SJA1110-EVM Host Tools Can somebody point me to an example, how the switch-config.hex files were generated using python? Thank you, Stefan Re: SJA1110 create python configuration hex Hello @pix-stefan , I agree, the Note might be confusing. FYI, SJA1105 has limited support in S32SDK SJA1110 RTM and the python scripts are the main way how to generate configuration. The example hex files were generated by the S32SDK SJA1110 RTM. Naturally, you are allowed to create switch configuration by any tool. After loading your configuration, you should check CFG_STAT register bit 31(CONFIGDONE) to ensure that a valid config was loaded. I'm not aware of any official python Configuration Generation Tool. Once you have fully supported GUI, it doesn't make sense to me. Best regards, Pavel Re: SJA1110 create python configuration hex Hi @PavelL, thanks for the fast answer! I was asking, because the README.txt of the EVM-hosttools states: "Note: In order to generate the hex file from the python file, the `Configuration Generation Tool` must be installed separately (DocStore)." Is this referring to the S32SDK SJA1110 RTM you referenced above? For me it sounds like it is also possible to generate it from python tools. This forum entry also references to a python script to generate hex files, but I ask myself where the "example file" is to have a reference? https://community.nxp.com/t5/Other-NXP-Products/SJA1110-no-communication-100Base-T1-to-100Base-TX/m-p/1824018 I would really appreciate doing this from python, because we might want to integrate this in our CI/CD and python would make things a lot easier... BR Stefan Re: SJA1110 create python configuration hex Hello @pix-stefan , SJA1110 is fully supported by S32SDK SJA1110 RTM, which generates hex files to the folder your_project_name/board/ Available python tools are able to load hex file to the switch, read/write registers, debug support, ... via USB FTDI driver. Best regards, Pavel

Internal or external oscillator for LIN communication Is the internal oscillator on the S32K144 sufficient for LIN 2.0 communication, or is it necessary to use an external oscillator for reliable performance? Re: Internal or external oscillator for LIN communication Hi@Bridgebranch you can take a look at this answer, https://electronics.stackexchange.com/questions/507001/bit-error-rate-calculation-for-lin-protocol

新しいバージョンの BMS Toolbox 1.1 の zip ファイルが見つかりません BMS MBDTの新しいバージョンをインストールするためのZIPファイルが見つかりません。 このリンクからダウンロードできるはずです。 https://nxp.flexnetoperations.com/control/frse/download?element=3983088 私が見るもの:ごめんなさい!存在しないページにアクセスしようとしました。入力したURLにタイプミスやスペルミスがないか確認してください。探しているページまたはファイルが移動されているか、廃止されているか、存在しない可能性があります。 どなたか私にくれませんか? Re:BMS Toolbox 1.1の新しいバージョンのZipファイルが見つかりません うまくいきました、ありがとうございます! Re:BMS Toolbox 1.1の新しいバージョンのZipファイルが見つかりません こんにちは@mariuslucianand、 アカウントにログインしましたが、あなたが言及したページがまだ表示されません。

How to lower the CPU frequency of the S32K314? Dear Sir, We have a requirement in our project to change the CPU operating frequency of the S32K314 from the original 160MHz to 100MHz. Where can we make this change? Additionally, what are the impacts of reducing the CPU frequency? Thanks! Re: How to lower the CPU frequency of the S32K314? You can use multiple clock configuration in the S32DS. It is needed to keep clocking options as defined in device's RM Table 145. System clocking configurations

Problems when changing OCRAM size in Property settings? Hi, I'm using MCUXpress IDE with the MIMXRT1010-EVK. I want to increase the size of the OCRAM. The ITCM and DTCM can be somewhat smaller. I did fill in new sizes in the Properties of the project at C/C++ Build -> MCU Settings. But the application crashes or values are not accepted. See the attached picture. The top-left MCU-settings in the picture are the original setting. I decreased the ITCM and DTCM sizes and increase the OCRAM as in the top-right settings in the picture. The compiler/linker seems to accept this but when running the application, it crashes. The function HardFault_Handler(void) is called even before the first breakpoint in main. Note that I decreased the RAM3 base address because it may not overlap RAM4. And increasing the RAM4 base address results in the error that the size is 0! See bottom-left in the picture. the strange thing is that the size of RAM4 originally was also 0! As a test I decreased the ITCM and DTCM sizes without increasing the OCRAM so that no overlap exists. See bottom-right in the picture. This is accepted by the compiler/linker and the code runs. But off course I want to increase the OCRAM size with 0x8000. How to do this??? i.MXRT 101x 回复： Problems when changing OCRAM size in Property settings? PS: Sorry for my oversight, since it has to be an integer power of 2, then 96KB is also not supported, so there is only one option, 128-0-0KB. 回复： Problems when changing OCRAM size in Property settings? Hi, Thanks for your interest in NXP MIMXRT series! NXP provides a detailed AN to guide this operation, please refer to it.  https://www.nxp.com/docs/en/application-note/AN12077.pdf There are a few notes in it, firstly, since the size of the TCM must be an integer power of 2 and the OCRAM must be greater than 64KB. then, if you want to increase the OCRAM, there must be at least one TCM that has a value of 0. Therefore, please choose the configuration that is right for you from the following three options. Also, if there is a TCM that needs to be 0, then it must be noted: If the requested ITCM/DTCM size is 0 Bytes, disable the corresponding TCM in IOMUXC_GPR_GPR16->INIT_xTCM_EN before configuring the size to 0 Bytes in IOMUXC_GPR_GPR14->CM7_CFGxTCMSZ. For a more specific guide, see also this post, which is a good place to start: Reallocating the FlexRAM - NXP Community Best regards, Gavin

Timer not working even in free running mode using PEmicro debugger Hi team, I am using imxrt1170 eval board and even our custom board with imxrt1176 controller. when we connect USB debugging using the usb to micro-b cable the timer code is executing and timer is also working, but when we connect the PE micro-USB debugger to the eval board and debug, even in free running mode (without any breakpoint) also the timer code is not working. Any pin or functionality affecting the timers of imxrt1170 eval board with the PE micro-USB debugger. Re: Timer not working even in free running mode using PEmicro debugger Is there any same setting for systick timer also and PIT (programmable interrupt timer) using in debug mode to get enabled. Re: Timer not working even in free running mode using PEmicro debugger Hello @Jeevan , In order for your timer to continue counting in Debug mode, the bit called "DBGEN" in the register called "GPT Control Register (CR)" should be in 1. The purpose of this bit is enabled or disable the timer when the code is in debug mode, as show in the next image that was obtained in the RM Also, if you experience any issue, do not hesitate to let me know. BR Habib.

Configure MR-T1ETH8 with the SJA1110 ECT GUI Hi! Is it possible to build a firmware for the MR-T1ETH8 so that it could be configured from the SJA1110 ECT GUI? Best regards Daniel Re: Configure MR-T1ETH8 with the SJA1110 ECT GUI Ok, I'll contact our sales representative. Thanks for the help! Best regards Daniel Re: Configure MR-T1ETH8 with the SJA1110 ECT GUI Hello @Daniel_W , yes, that should be possible - MR-T1ETH8 has flash and 10-pin debug connector. ECT server needs to be added to your SJA1110's firmware. Since ECT is quite new tool, I would recommend contacting your assigned sales representative or field application engineer. Best regards, Pavel

QN9080cdk Bluetooth example pin setting Hello, I try to do data transmission through QN9080cdk using SDK example: "qn908xcdk_wireless_examples_bluetooth_private_profile_server_bm". I works fine, and USB dongle get data well. Now I want to do this work in my own PCB board which MCU(QN9080) is mounted. To do it, I refer the pin setting of "qn908xcdk_wireless_examples_bluetooth_private_profile_server_bm", but I found that the RF pin is not used. How QN908xcdk board can send the data wirelessly to USB dongle without using RF pin which is connected to antenna? Which pin is a {{really}} needed one to send data wirelessly? Below is a default pin setting of above SDK example. Thanks, Product: QN9080|SIP Re: QN9080cdk Bluetooth example pin setting Oh, When I change the BOARD_XTAL0_CLK_HZ from 32M to 16M and change k32M_to_XTAL_CLK to k16M_to_XTAL_CLK, usb dongle find my PCB board BLE address! Of course, there are still other problems to be solved in my job (I will upload them to a new question subject), but I am deeply grateful to you for solving this problem. Thank you, Re: QN9080cdk Bluetooth example pin setting Hi, By default, the SDK examples are configured to work with 32MHz, as our board has a 32MHz XTAL. You should change this on code: BOARD_XTAL0_CLK_HZ Regards, Ricardo Re: QN9080cdk Bluetooth example pin setting Of course before I made my PCB board, I check the file you tell me and consider as much as possible. I checked the XTAL clks(16MHz, and 32.768kHz) and powers(VCC, VSS, etc) on my PCB through oscilloscope and those are fine (maybe this is not a reason of problem, because other SDKs such as I2C communication, ctimer works well in my PCB board). My PCB schematic and layout is as attatched on file (only parts). When I design antenna part, I refer to "BLE_Antenna_Design_AN11994.pdf" which I upload. I use "2450AT18A100". Did I miss something? Is there any possible mistakes I have made? Thanks,   Re: QN9080cdk Bluetooth example pin setting Hi, Something important to remark, is that our SDK examples ready to work on our board without modifications. If you are using an example for another board, you would need to double check that you have the needed HW, or modify the SW for your HW. Please check the clocks, GPIO's. Also, you would need to check the antenna design. Maybe this Application Note can help you with other considerations: QN908x Hardware Design Consideration. I strongly recommend comparing your design with the design files from our QN9080DK. Regards, Ricardo Re: QN9080cdk Bluetooth example pin setting Thank you your reply. The gray pins are the default, not disable.  Then here is another question. When I debug SDK "qn908xcdk_wireless_examples_bluetooth_private_profile_server_bm" in my own PCB board, loT toolbox or connectivity QTool cannot find my MCU BLE device (it works fine when I tested it using Design Kit). I didn't touch any code in SDK, except I add BleAPP_Start() function on main_task() to start task directly after debugging start without pressing a Button1 (because there is no Button1 in my own PCB board). In my PCB board, I connect RF pin to inductor and antenna as manual said. The below is a schematic.  What I have to do more to wirelessly connect my own QN9080 in my PCB to phone or PC? Do I have to connect RF pin to any other pins? or which position I have to modify in the code?   Thanks,    Re: QN9080cdk Bluetooth example pin setting Hello, Hope you are doing well. As seen on the image, some pins are "enabled" by default, like RF, RSTN, XTAL. Hope this helps! Regards, Ricardo

code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Thank you so much!! Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Did any error messages pop up during the compilation process? If no error messages appear, there should be no problem. But if errors still appear, you'd better confirm with Jorge again, license-related issues, he is an expert and can give you more professional advice. Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Thank you very much for your reply. I can now compile the code and build the target normally. Is there any hidden danger of compilation or license compliance in the compiled files? Re: code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 Hi Jimmy Xu, 很抱歉你的问题还没有被解决。License支持哪一个版本，standard 还是 professional， 这取决于你购买时的选择。 Professional的功能是最全的，Standard功能会少一些。 老实说，CodeWarrior license 不是我的专业领域。我看到你还有一个private ticket， 已经有license team的support在跟进了。 希望 license team 的同事能够顺利解决你的问题，如有任何新的情况，请及时告知我们。 BRs， Celeste Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Without starting the server, lincese shows two lines of error (network problem, I can't post the picture), combined with the previous results: the lower line is activated. Does the license only support the standard edition MCU 10.5 version, but not the professional edition MCU 10.5? Re: code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 Hello JimmyXu, 我找到了下面的链接：Floating License -Environment Variables. - NXP Community 里面提到环境变量的设置，我不确定它是否与你遇到的问题有关，你可以试一下。 除此之外，你还可以尝试一下移除license，然后重新导入并重启codeWarrior，看看是否有效果。 BRs, Celeste Re: code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 使用code warrior floating license，在官网生成license.dat后，在服务器上运行lmtools，服务正常启动。 client 使用和server相同的license.dat ，启动code warrior后报错 如何解决？ Re: code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 Hello Jimmy, 我认为局域网是可以的，你可以尝试下。 BRs, Celeste Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Pop-up window when opening code warrior Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? This is the picture

Minimum input voltage for edge capture Hi, In a KV4X, for a digital input, input voltage high is 0.7 x Vdd and input voltage low is 0.35 x Vdd. Which are the minimum and maximum values for edge capture? I have a sinusoidal signal of 200 mV peak in an input pin and I see that it is enough to detect falling/rising edges. Thanks in advance Re: Minimum input voltage for edge capture I have found why edges were being detected with such a low signal. Re: Minimum input voltage for edge capture Hi @zorrotz, Please maintain the edges of the captured signal between 0.7 x Vdd and 0.35 x Vdd in order to ensure a proper edge detection of the signal. Re: Minimum input voltage for edge capture I have forgotten to say that Vdd = 3.3 V

找到Pflash的Demo工程 你好，我想用S32K311开发Bootloader，涉及到PFlash的擦除、写入、以及bank切换。有了S32DS配置工具，有相关的Demo工程吗？你能和我分享吗？谢谢。

i.MX RT1180はIEEE802.1QCRをサポートしていますか? i.MX RT1180はIEEE802.1QCRをサポートしていますか? i.MX RT1180 で TSN の 802.1QCR は見つかりませんでした。 だから、私は再確認したいと思います。 ありがとうございます。

How to build S32K3xx AutoSAR example project? Hello, I am trying to build an example project from SW32K3_S32M27x_RTD_4.4_4.0.0_P20_D2403. From its readme.txt, the build method to run "make build" from the command line. But there is video a few years ago which shows the way to use S32DS IDE to build AutoSAR example project for MPC574x MCU. https://www.nxp.com/video/introduction-to-nxp-autosar-mcal-software:AUTOSAR-OnDemand-Training-Video Is the way to use S32DS available for S32K3XX MCU? Thanks! Crane Re: How to build S32K3xx AutoSAR example project? I  downloaded the RTD and I didn't know how to find RTD head files. Now I solve the problem. Thank you Re: How to build S32K3xx AutoSAR example project? I am not sure if you have downloaded any RTD files before. For example, if you click the blue "S32K3 Standard Software Package" in the section 2.3 at this link https://www.nxp.com/document/guide/getting-started-with-the-s32k3x4evb-t172-evaluation-board-for-automotive-general-purpose:GS-S32K3X4EVB-T172?section=get-software, it will guide you to a page where you can find links to different versions of "Real Time Driver". This is for the MCU I have used before. There should be the similar page for the MCU you are using that you can find. Then you can look for the version of RTD that fit for your project on those pages. If you are asking for the specific version of RTD I used before, I don't remember any more. Hope it helps! Crane Re: How to build S32K3xx AutoSAR example project? Hello cranes, How to get RTD files， in my project I don't have the files so that I can't complie my project. Re: How to build S32K3xx AutoSAR example project? Hi, The issues is addressed and the project is built successfully by using command line. Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, It is from an example project. An example project, including EB config, from NXP's RTD, not a project I created myself.  Do you know who might know this? Or should I raise another question about this? Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, I do not have knowledge on your EB config, nor generated code. The package is defined in Resource plugin. Best regards, Peter Re: How to build S32K3xx AutoSAR example project? Hello, I found that the MCU model "S32K344" is not defined. This causes some symbols are not recognized. But this is supposed to be defined in the code generated from EB Tresos, right? I couldn't find why it is not defined in the S32K344 example project. Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, I personally always used GHS for code generated from EB Tresos. I will test it following days with S32DS and let you know if there are any special constraints. Best regards, Peter Re: How to build S32K3xx AutoSAR example project? Hello, Yes, that's correct. But if we look at the errors occur from the beginning as first a few in the below screenshot, which come from the files generated by EB Tresos and RTD, they are not relevant to this file. And actually adding check_example.h indeed doesn't remove any of these errors. Attached is the new build log file. At the end of the log file, there is "error: 'VV_RESULT_ADDRESS' undeclared". This macro 'VV_RESULT_ADDRESS' is in the Makefile in the example project folder. Do we need to add this file to the project generated in S32DS? If so, where to add? I already tried and it didn't work to add it in the project root folder as in the example project. Obviously it doesn't work to just copy the folders of include and src from the example project to the newly generated project in S32DS. There are many things missing, not just check_example.h. So, what is the correct way to build an example AutoSAR project from S32K3xx RTD? Just feel so weird that there is example projects in RTD but there are no guidelines about how to build the example project. What is missing here? Thanks! Crane  Re: How to build S32K3xx AutoSAR example project? Hello, I still see the same issue. You do not have all header files in the project: Best regards, Peter Re: How to build S32K3xx AutoSAR example project? Hello, Yes, it removed the previous errors, but still miss things as in the attached log. This project file structure is as below now: The RTD folder is copied from the non-AutoSAR example project for the same module. It seems that there possibly should be something else inside for AutoSAR project.  Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, As in any other compiler, you simply add paths for your header locations in include options: Best regards, Peter Re: How to build S32K3xx AutoSAR example project? Hello, Yes, I see that. But the issue is, I searched through the folder of the example project and files generated by EB Tresos, there are no such files. They are the files from RTD. Obviously, the example project needs the header files from RTD. Here is the file structure of an empty project created in S32DS. No RTD there, which is understandable. It can be built and run.  Here is the file structure of the example project with the files generated by EB Tresos. (include and src under generate are generated from EB Tresos.) There are no Mcl_Types.h and other header files that are needed. Then my question is, how to include RTD in the project so that the missing header files can be found by the compiler? Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, Your log says you are missing header files. Do you have those header file in your project? Best regards, Peter Re: How to build S32K3xx AutoSAR example project? Hello, I tried the way you mentioned. I create an empty project in S32DS, then move the folder of include and src in the example project to the empty project. It doesn't work and I got the build log as attached. Do you know who might know how to import the example project from the RTD for S32K3xx? What I am trying is an example project from the MCU's RTD package. There should be a guideline about how to build and test the example project. There is readme.txt in the example project folder, but unfortunately, it doesn't work to follow what's in it as described in my previous post. Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, My question is, is there a way to use S32DS to import an example project for S32K3xx MCU and build it? It doesn't work using the same way shown in the video as the example projects have a different project structure. I do not know if there is automatic import script in S32DS for tresos generated files. But you can always do it by hand. Simply create black project in S32DS and move the C and H files to the project. This way you should be able to compile project. In the past when there was no S32DS I was doing it this way with Windriver or GHS compilers. Best regards, Peter Re: How to build S32K3xx AutoSAR example project? Hello Peter, After 30 minutes of the video, it shows how to import an example project for MPC574x and build the project under S32DS.  My question is, is there a way to use S32DS to import an example project for S32K3xx MCU and build it? It doesn't work using the same way shown in the video as the example projects have a different project structure. In the readme.txt in the example project folder (C:\NXP\SW32K3_RTD_R21-11_3.0.0_P07\eclipse\plugins\Pwm_TS_T40D34M30I0R0\examples\EBT\S32K3XX\Pwm_example_S32K344, the file is attached), it shows how to build the project in Windows command prompt. (I tried but I couldn't make it work as it seems something is still missing). How can I import and build this project under S32DS as what's done in the video for MPC574 project? Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, I am bit confused here. The video shows EB Tresos configuration tool and how to generate project files. Those are later put into S32DS and compiled there.This is a common use case. Is the way to use S32DS available for S32K3XX MCU? I apologize, but I do not understand this question. Could you please specify it closer? Best regards, Peter

S32K118 Watchdog Issue Hi, I have a demo project developed on s32k118evb board with watchdog disabled and it works well but after I download the project to my prototype PCB board the program triggers a watchdog timeout.  Is there anything I missed to disable the watchdog timer? ====== Below is the board initialization code ======    /* Board Initialization */ void Board_Init() { #if 1 DISABLE_INTERRUPTS(); // disable global interrupt WDOG->CNT=0xD928C520;     /* Unlock watchdog */ WDOG->TOVAL=0x0000FFFF;    /* Maximum timeout value */ WDOG->CS = 0x00002100;    /* Disable watchdog */ ENABLE_INTERRUPTS(); // enable global interrupt #endif /* Clock */ CLOCK_DRV_Init(&clockMan1_InitConfig0);   PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr);   /*** SPI ***/ LPSPI_DRV_MasterInit(MLX,&mlxState,&mlx_MasterConfig0);   /*** LPIT ***/ LPIT_DRV_Init(INST_LPIT1, &lpit1_InitConfig); LPIT_DRV_InitChannel(INST_LPIT1, CHAN_0, &lpit1_ChnConfig0); INT_SYS_InstallHandler(LPIT0_IRQn, &LPIT_ISR, (isr_t *)0); LPIT_DRV_StartTimerChannels(INST_LPIT1, CHAN_0_MASK);   /*** CAN ***/ /* Initialize can pal instance */ /* !!! PE clock source MUST be peripheral clock !!! */ CAN_Init(&hscan_instance, &hscan_Config0);   /* Set buffer configuration */ CAN_ConfigTxBuff(&hscan_instance, TX_MAILBOX, &TxbuffCfg);   msg.id = HSCAN_ID; msg.cs = 0U; msg.length = 8;   /*** SBC Control ***/ // Set SBC control pin to enter normal mode PINS_DRV_SetPins(STBN_PORT, STBN_PIN); }   Re: S32K118 Watchdog Issue Hi If you are using the S32K1 SDK examples, there is DISABLE_WDOG in system_S32K118.c and system_S32K118.h that can be used to disable the watchdog: /SDK/platform/devices/S32K118/startup/system_S32K118.c But I don't understand why it runs normally on S32K118EVB but errors occur on your prototype PCB board. Have you compared the differences between crystal circuits? Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------

RW612 - PM4 deep sleep intermittently draws high current We are encountering an issue where one of our products, based on an RW612 in a u-blox IRIS-W10 module, is ostensibly entering deep sleep but in reality is drawing ~60 mA and rapidly draining the battery. Here is our function that is entering deep sleep: void PowerManager::EnterPowerDown(uint32_t duration_secs) { auto &board = Board::GetInstance(); debug_.Info(kTopicGeneral, "sleeping for %lu secs (max)", duration_secs); os_self_sleep_ms(500u); auto sleep_ticks = SecsToRtcTicks(duration_secs); PM_SetConstraints(kLowPowerMode, APP_PM_CONSTRAINTS); auto base_priority = os_enter_critical_from_isr(); board.InitPins(); PM_EnablePowerManager(true); PM_EnterLowPower(sleep_ticks); /* Should never get here, PM4 Deep Sleep requires a cold boot. */ PM_EnablePowerManager(false); os_exit_critical_from_isr(base_priority); PM_ReleaseConstraints(kLowPowerMode, APP_PM_CONSTRAINTS); } kLowPowerMode is defined as PM_LP_STATE_PM4, and APP_PM_CONSTRAINTS is 0.  We select our power mode and constraints, enter a critical section, put our GPIO into a known state, enable the Power Management driver, and invoke low power mode.  Our board does wake up when a wake signal occurs on GPIO[24], or when one hour has elapsed, and it does immediately restart, as one would expect after entering PM4 Deep Sleep. Most of the time the system draws <1 mA in this state.  But intermittently, it enters this state and draws ~60 mA for the duration of the sleep cycle, which is a maximum of one hour in our application.  Needless to say, this destroys our battery life between charges.  (The power should be going to <10 uA per the datasheet, but that's a topic for another day.) To avoid complications with starting and stopping the Wi-Fi driver, I've engineered the system such that when we want to go to sleep, I set a flag in NVRAM, reboot the system by calling __NVIC_SystemReset(), and then enter low-power mode, while leaving the Wi-Fi subsystem untouched.  When we wake from sleep, we reboot (because we're coming out of PM4), start Wi-Fi, and upload telemetry to the cloud. Your "power_manager_test" SDK example was written for baremetal; are there additional precautions that one must take when running FreeRTOS to ensure that entering PM4 will genuinely yield a low-power state?  What other conditions could cause a false PM4 state? Dana M. Re: RW612 - PM4 deep sleep intermittently draws high current I believe I’ve found the issue.  Our system performs a reboot immediately prior to engaging low-power mode.  This removes the requirement to implement a graceful shutdown of the Wi-Fi + TCP/IP stack prior to power-down.  (My initial attempts at shutting down the Wi-Fi stack through the Wi-Fi API were unreliable, so I switched to the reboot approach.)  We use a flag in NVRAM to signal the system not to bring up Wi-Fi but instead immediately configure the wakeup pin for the correct polarity and go into power-down.  Our board pulls ~1 mA in deep sleep. I believe the cause of our excessive current draw is that sometimes when we would reset the main CPU (Cortex-M33), the Wi-Fi CPU/radio would be left in an active state, pulling ~56 mA.  Since our sleep/check-in interval is 1 hour, that’s 56 mAh of draw from the battery.  I asked NXP specifically about how the CPUs and radios are reset, and that seemed to confirm that __NVIC_SystemReset() only resets the Cortex-M33, leaving the other processors alone.  This morning, I put two lines of code into our board startup function: /* Ensure that the radios are powered off at startup. Thus, if we go * directly into power-down, this should eliminate the possibility that * the radios are still powered and thus pulling current. */ POWER_PowerOffWlan(); POWER_PowerOffBle(); I rebuilt the application and then ran it for ~40 minutes, using an LED flashlight to wake up the board every time it went to sleep.  I woke the unit up likely about 50 times during the test, and 50/50 it went into low power, i.e. it did not draw excessive current.  Previously, it would take me only a few attempts to get the system into a high-current sleep state.  At this point, I consider the issue solved. In summary… if the Wi-Fi and/or BLE stacks are initialized and running, and the system is reset or watchdogged, it is necessary to call POWER_PowerOffWlan() and/or POWER_PowerOffBle() at startup to ensure that the Wi-Fi and BLE CPUs/radios are powered off.  When starting Wi-Fi using the NXP stack, one of the first steps is powering down and then powering up the Wi-Fi processor, so explicitly powering down the radio at startup does not interfere with a later initialization of the Wi-Fi stack. Dana M. Re: RW612 - PM4 deep sleep intermittently draws high current What SDK version are you using? I generated our project using SDK v2.16.1.  I have SDK 24.12 (2025-01-15) pulled down but I have not yet attempted to apply it to this project, given how MCUXpresso likes to render projects unusable when adding or upgrading components. Are you seen this behavior with the SDK example without modifications? In the very limited testing we did with the SDK example, no, it did not occur. Can we reproduce this behavior with the SDK example? Likely not. What changes need to be done? Add FreeRTOS, Wi-Fi driver, lwIP networking, and an AWS client stack to the example. Are you able to see this behavior in our FRDM? It would take considerable effort to rig up a FRDM board to work the same as our custom board, but it could be done. Dana M. Re: RW612 - PM4 deep sleep intermittently draws high current Hello, Hope you are doing well. What SDK version are you using? Are you seen this behavior with the SDK example without modifications? Can we reproduce this behavior with the SDK example? What changes need to be done? Are you able to see this behavior in our FRDM? Best Regards, Ricardo

How to find the AWR model of the MW6S004NT1? Hello, I am doing a power amplifier design, I need to use the MW6S004N1 model, but I did not find the AWR model on the website. Re: How to find the AWR model of the MW6S004NT1? HI Kostiantyn Okay, you can find the AWR models on our official website. Unfortunately, we do not have the AWR model for the device you want. It is necessary to contact an external page to access the model. I hope this information has helped you, please let me know if you need help with anything else. Have a great day and best of luck.

How to use stdfix.h in my project(s12z series, CW 11.1) Hello all. I'm beginner with nxp s12z and CW 11.1. I want to use "stdfix.h". But there is some problem with include stdfix.h. 1. I cannot found "stdfix.h" file anywhere my directory(C:\Freescale\). 2. I downloaded "stdfix.h" and copied at "C:\Freescale\CW MCU v11.1\MCU\S12lisa_Support\s12lisac\include". And then, I can include "stdfix.h" but I cannot use library function(e. bitsr(), rbits(), ...). I can see the error messaege when I compiled my project "function has no prototype". I included the Search System Path of Access Path of S12Z Compiler,    "${MCUToolsBaseDir}/S12lisa_Support/s12lisac/include"   "${MCUToolsBaseDir}/S12lisa_Support/s12lisac/src"   "${MCUToolsBaseDir}/S12lisa_Support/s12lisac/lib_medium" Libraries of Input of S12Z Linker  "${MCUToolsBaseDir}/S12lisa_Support/s12lisac/lib_medium/ansii.lib"    Please help me to I can include/use "stdfix.h" correctly. Best Regards. Re: Hi, Re: How to use stdfix.h in my project(s12z series, CW 11.1) Thank you. I'll try it. 🙂 Hi, Re: How to use stdfix.h in my project(s12z series, CW 11.1) Hi,  unfortunately stdfix is not supported in CodeWarior. For fixed point arithmetic you can use AMMCLib which is default part of installation. AMMCLib is located in "${MCUToolsBaseDir}/S12lisa_Support/ folder. 

GD3162 gate driver ADC Hi NXP, In our project, We are using AMUXIN for reading DC bus voltage and TSENSE for power device phase temperature. But we are planning to use TSENSE for AMUXIN reading. Is it possible? Will the ADC counts varry from what was read through AMUXIN? Please clarify Re: GD3162 gate driver ADC Hello Akshat The internal configuration and description says that the AMUXIN could be used as GPI with a primary purpose for the ADC, this connection has additional control to the total error variation and other features. The TSENSE includes possible current driver for temp sense network If you use the TSENSE for the AMUXIN it might not cause an electrical error but these changes might affect the correct measurement. If you want more details about these connections please read our official page GD3160: GD3160 Advanced IGBT/SiC Gate Driver - Data Sheet, this document is a secure file, so I cannot share it for this way. I hope this information has helped you, please let me know if you need help with anything else. Have a great day and best of luck.

makefile error in PFE example I'm using the makefile in the PFE example to compile. However, I keep getting an error saying the path is not found. I wonder if this error is caused by my not entering the path correctly in the makefile or if it's a problem with the Tresos_cmd.bat file. This is the version of the file I'm using. Version compatibility seems to be fine. PFE-FW_S32G_1.7.1 PFE-DRV_S32G_M7_MCAL_1.2.0 SW32G_RTD_4.4_4.0.2 C:\EB\tresos\bin\workspace>make generate process_begin: CreateProcess(NULL, cygpath -m C:/EB/tresos/bin/workspace/MasterProject_RDB3, ...) failed. make: Makefile:647: pipe: No such file or directory C:/EB/tresos/bin/tresos_cmd.bat -data C:/EB/tresos/bin/workspace importProject 2>&1 C:/EB/tresos/bin/tresos_cmd.bat: line 1: @echo: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 2: REM: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 4: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 5: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 6: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 7: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 8: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 9: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 10: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 11: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 13: goto: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 15: :NOJAVA: command not found ERROR: java not found: %JAVA% C:/EB/tresos/bin/tresos_cmd.bat: line 17: EXIT: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 19: :NOWINDOWS: command not found ERROR: tresos only runs on Windows2000 and Windows/XP C:/EB/tresos/bin/tresos_cmd.bat: line 21: EXIT: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 23: :START: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 24: REM: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 25: SET: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 26: SET: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 48: unexpected EOF while looking for matching `"' C:/EB/tresos/bin/tresos_cmd.bat: line 54: syntax error: unexpected end of file Makefile:647: recipe for target 'generate' failed make: [generate] Error 2 (ignored) C:/EB/tresos/bin/tresos_cmd.bat -data C:/EB/tresos/bin/workspace autoconfigure MasterProject_RDB3 GenerateAllVariants 2>&1 C:/EB/tresos/bin/tresos_cmd.bat: line 1: @echo: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 2: REM: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 4: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 5: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 6: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 7: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 8: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 9: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 10: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 11: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 13: goto: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 15: :NOJAVA: command not found ERROR: java not found: %JAVA% C:/EB/tresos/bin/tresos_cmd.bat: line 17: EXIT: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 19: :NOWINDOWS: command not found ERROR: tresos only runs on Windows2000 and Windows/XP C:/EB/tresos/bin/tresos_cmd.bat: line 21: EXIT: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 23: :START: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 24: REM: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 25: SET: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 26: SET: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 48: unexpected EOF while looking for matching `"' C:/EB/tresos/bin/tresos_cmd.bat: line 54: syntax error: unexpected end of file Makefile:647: recipe for target 'generate' failed make: *** [generate] Error 2 C:\EB\tresos\bin\workspace> Upload the relevant files, just in case. Re: makefile error in PFE example Hello, @ Youngsoo_do Thanks for the valuable information. Best Regards Chenyin Re: makefile error in PFE example This answer is not a fundamental solution to the problem. The answer to this problem is C:\NXP\S32DS.3.5\S32DS\build_tools\gcc_v9.2\gcc-9.2-arm32-eabi\arm-none-eabi\newlib If you go there, you'll find a folder called newlib. you change this newlib to lib. I spent a few days struggling with this. Re: makefile error in PFE example For this issue, I went to that page, downloaded the Arm GNU Toolchain, and changed the path to GCC_DIR in the makefile, which solved the problem. https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads  (I want it to be helpful to someone who has a similar problem to mine) But I have another problem—it's never-ending. I'll have to create a new case to ask the question. Thank you for your help on this issue. Re: makefile error in PFE example Thank you very much for your response. I tried doing it the way you suggested. However, I got the following error in the "make build" command. The end of the build says that the file "nosys.specs" was not found. Does anyone know of a solution to this problem? $ make buil CC generate_RDB3/src/isa.c CC generate_RDB3/src/Eth_PFE_LLD.c CC generate_RDB3/src/fci.c CC generate_RDB3/src/fci_core_autosar.c CC generate_RDB3/src/Serdes_Ipw_PBCfg.c CC generate_RDB3/src/pfe_bus_err_csr.c CC generate_RDB3/src/Eth_43_PFE_VS_0_PBcfg.c CC generate_RDB3/src/fifo.c CC generate_RDB3/src/pfe_ecc_err_csr.c CC generate_RDB3/src/elf.c CC generate_RDB3/src/Rtc_Ip_VS_0_PBcfg.c CC generate_RDB3/src/pfe_rtable.c CC generate_RDB3/src/Platform_Ipw_Cfg.c CC generate_RDB3/src/fci_rt_db.c CC generate_RDB3/src/pfe_tmu.c CC generate_RDB3/src/pfe_emac_slave.c CC generate_RDB3/src/fci_fp.c CC generate_RDB3/src/fci_mirror.c CC generate_RDB3/src/Platform_Cfg.c CC generate_RDB3/src/pfe_emac_csr.c CC generate_RDB3/src/pfe_phy_if.c CC generate_RDB3/src/pfe_bus_err.c CC generate_RDB3/src/Dma_Ip_VS_0_PBcfg.c CC generate_RDB3/src/libfci_autosar.c CC generate_RDB3/src/fci_qos.c CC generate_RDB3/src/pfe_host_fail_stop_csr.c CC generate_RDB3/src/fci_l2br_domains.c CC generate_RDB3/src/pfe_wdt_csr.c CC generate_RDB3/src/pfe_fw_feature.c CC generate_RDB3/src/OsIf_Cfg.c CC generate_RDB3/src/pfe_hm.c CC generate_RDB3/src/Serdes_Ip_PBCfg.c CC generate_RDB3/src/oal_irq_autosar.c CC generate_RDB3/src/Clock_Ip_Cfg.c CC generate_RDB3/src/Power_Ip_VS_0_PBcfg.c CC generate_RDB3/src/pfe_hif_ring.c CC generate_RDB3/src/oal_time_autosar.c CC generate_RDB3/src/pfe_fw_fail_stop_csr.c CC generate_RDB3/src/pfe_log_if.c CC generate_RDB3/src/IntCtrl_Ip_Cfg.c CC generate_RDB3/src/pfe_emac.c CC generate_RDB3/src/pfe_gpi_csr.c CC generate_RDB3/src/fci_routes.c CC generate_RDB3/src/Gpt_VS_0_PBcfg.c CC generate_RDB3/src/pfe_class.c CC generate_RDB3/src/pfe_bmu.c CC generate_RDB3/src/pfe_minihif_drv.c CC generate_RDB3/src/pfe_hif_nocpy_csr.c CC generate_RDB3/src/pfe_log_if_slave.c CC generate_RDB3/src/Siul2_Port_Ip_VS_0_PBcfg.c CC generate_RDB3/src/pfe_platform_slave.c CC generate_RDB3/src/Port_Cfg.c CC generate_RDB3/src/pfe_l2br_table.c CC generate_RDB3/src/Mcu_VS_0_PBcfg.c CC generate_RDB3/src/pfe_phy_if_slave.c CC generate_RDB3/src/nxp_snprintf.c CC generate_RDB3/src/fci_l2br.c CC generate_RDB3/src/pfe_fw_fail_stop.c CC generate_RDB3/src/Ram_Ip_Cfg.c CC generate_RDB3/src/Mcu_Cfg.c CC generate_RDB3/src/pfe_gpi.c CC generate_RDB3/src/pfe_host_fail_stop.c CC generate_RDB3/src/oal_job_autosar.c CC generate_RDB3/src/pfe_util.c CC generate_RDB3/src/Ftm_Gpt_Ip_VS_0_PBcfg.c CC generate_RDB3/src/fci_connections.c CC generate_RDB3/src/pfe_if_db.c CC generate_RDB3/src/Eth_43_PFE_Cfg.c CC generate_RDB3/src/pfe_bmu_csr.c CC generate_RDB3/src/pfe_fail_stop_csr.c CC generate_RDB3/src/pfe_l2br.c CC generate_RDB3/src/CDD_Mcl_Cfg.c CC generate_RDB3/src/Stm_Ip_VS_0_PBcfg.c CC generate_RDB3/src/pfe_feature_mgr.c CC generate_RDB3/src/pfe_util_csr.c CC generate_RDB3/src/Gpt_Ipw_VS_0_PBcfg.c CC generate_RDB3/src/pfe_hw_feature.c CC generate_RDB3/src/pfe_idex.c CC generate_RDB3/src/pfe_hif_ptp.c CC generate_RDB3/src/fci_fp_db.c CC generate_RDB3/src/Dma_Ip_Cfg.c CC generate_RDB3/src/pfe_hif_csr.c CC generate_RDB3/src/pfe_fail_stop.c CC generate_RDB3/src/pfe_fp.c CC generate_RDB3/src/pfe_mirror.c CC generate_RDB3/src/pfe_platform_master.c CC generate_RDB3/src/oal_mm_autosar.c CC generate_RDB3/src/pfe_parity_csr.c CC generate_RDB3/src/pfe_wdt.c CC generate_RDB3/src/Power_Ip_Cfg.c CC generate_RDB3/src/oal_util_net_autosar.c CC generate_RDB3/src/pfe_hif_chnl.c CC generate_RDB3/src/Serdes_Cfg.c CC generate_RDB3/src/Clock_Ip_VS_0_PBcfg.c CC generate_RDB3/src/fci_interfaces.c CC generate_RDB3/src/pfe_hif.c CC generate_RDB3/src/fci_owner.c CC generate_RDB3/src/fci_fw_features.c CC generate_RDB3/src/Eth_43_PFE_Irq.c CC generate_RDB3/src/pfe_hif_drv.c CC generate_RDB3/src/pfe_class_csr.c CC generate_RDB3/src/Eth_43_PFE.c CC generate_RDB3/src/EthIf_Cbk.c CC generate_RDB3/src/pfe_parity.c CC generate_RDB3/src/CDD_Mcl_VS_0_PBcfg.c CC generate_RDB3/src/Pit_Ip_VS_0_PBcfg.c CC generate_RDB3/src/pfe_hif_nocpy.c CC generate_RDB3/src/fci_hm.c CC generate_RDB3/src/Port_VS_0_PBcfg.c CC generate_RDB3/src/pfe_ecc_err.c CC generate_RDB3/src/oal_util_autosar.c CC generate_RDB3/src/pfe_pe.c CC generate_RDB3/src/pfe_mac_db.c CC generate_RDB3/src/blalloc.c CC generate_RDB3/src/autolibc.c CC generate_RDB3/src/Gpt_Cfg.c CC generate_RDB3/src/fci_timer_owner.c CC generate_RDB3/src/Ram_Ip_VS_0_PBcfg.c CC generate_RDB3/src/pfe_tmu_csr.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/startup/src/nvic.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/startup/src/sys_init.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/startup/src/system.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/startup/src/m7/startup.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/startup/src/m7/exceptions.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/BaseNXP_TS_T40D11M40I2R0/src/OsIf_Interrupts.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/BaseNXP_TS_T40D11M40I2R0/src/OsIf_Timer_System.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/BaseNXP_TS_T40D11M40I2R0/src/OsIf_Timer_System_Internal_Systick.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/BaseNXP_TS_T40D11M40I2R0/src/OsIf_Timer.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/BaseNXP_TS_T40D11M40I2R0/src/OsIf_Timer_System_Internal_GenericTimer.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Det_TS_T40D11M40I2R0/src/Det_stub.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Det_TS_T40D11M40I2R0/src/Det.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Dem_TS_T40D11M40I2R0/src/Dem_stub.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Dem_TS_T40D11M40I2R0/src/Dem.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Gpt_TS_T40D11M40I2R0/src/Gpt.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Gpt_TS_T40D11M40I2R0/src/Pit_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Gpt_TS_T40D11M40I2R0/src/Ftm_Gpt_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Gpt_TS_T40D11M40I2R0/src/Stm_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Gpt_TS_T40D11M40I2R0/src/Rtc_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Gpt_TS_T40D11M40I2R0/src/Gpt_Ipw.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Selector.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Data.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Data2.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Frequency2.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Specific.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_ExtOsc.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Frequency1.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Specific2.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Irq.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Frequency.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_CortexM7.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Mcu_Dem_Wrapper.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Gate.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Ram_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Data1.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_FracDiv.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_DividerTrigger.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_IntOsc.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_CortexA.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Specific1.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_PMC.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_MSCM.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Monitor.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Mcu_Ipw.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Divider.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_Private.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_MC_ME.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_ProgFreqSwitch.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Pll.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_MC_RGM.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Mcu.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_MC_RGM_Irq.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Icu.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Fee.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Ocu.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Pmic.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Fr_43_LLCE.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Pwm.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Uart.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Fls.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Eth.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_I2c.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Port.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_EthTrcv_43_PHY.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Gpt.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Mcu.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Spi.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Can_43_LLCE.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Fr.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Ocotp.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Thermal.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Eth_43_PFE.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_EthSwt_43_SJA11XX.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Eep.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Mcl.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Adc.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Wdg.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Dio.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Qdec.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Serdes.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Rm.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Crypto.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Can.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Lin.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_CanTrcv_tja115x.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Ipcf.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Wdg_43_VR5510.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Crc.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Port_TS_T40D11M40I2R0/src/Siul2_Port_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Port_TS_T40D11M40I2R0/src/Port.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Port_TS_T40D11M40I2R0/src/Port_Ipw.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/src/System_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/src/IntCtrl_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/src/Platform_Ipw.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/src/Platform.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/EthSwt_TS_T40D11M40I2R0/src/EthSwt.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/EthTrcv_TS_T40D11M40I2R0/src/EthTrcv.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Serdes_TS_T40D11M40I2R0/src/Serdes_Ip_HwAccess.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Serdes_TS_T40D11M40I2R0/src/Serdes.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Serdes_TS_T40D11M40I2R0/src/Serdes_Ipw.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Serdes_TS_T40D11M40I2R0/src/Serdes_Ip.c LD output_RDB3/main_RDB3.elf C:/NXP/S32DS.3.5/S32DS/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/bin/arm-none-eabi-gcc.exe --entry=Reset_Handler -Tlinker/linker_maste r_app/autosar_intram.gld --sysroot="C:/NXP/S32DS.3.5/S32DS/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/arm-none-eabi/newlib" -specs=nano .specs -specs=nosys.specs -nostartfiles -mcpu=cortex-m7 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ggdb3 -Wl,-Map,output_RDB3/main_ RDB3.map -lc -lm -lgcc -mlittle-endian output_RDB3/isa.o output_RDB3/Eth_PFE_LLD.o output_RDB3/fci.o output_RDB3/fci_core_autosar.o output_RDB3/Serdes_Ipw_PBCfg.o output_RDB3/pfe_bus_err_csr.o output_RDB3/Eth_43_PFE_VS_0_PBcfg.o output_RDB3/fifo.o output_RDB3/pfe_ ecc_err_csr.o output_RDB3/elf.o output_RDB3/Rtc_Ip_VS_0_PBcfg.o output_RDB3/pfe_rtable.o output_RDB3/Platform_Ipw_Cfg.o output_RDB3/ fci_rt_db.o output_RDB3/pfe_tmu.o output_RDB3/pfe_emac_slave.o output_RDB3/fci_fp.o output_RDB3/fci_mirror.o output_RDB3/Platform_Cf g.o output_RDB3/pfe_emac_csr.o output_RDB3/pfe_phy_if.o output_RDB3/pfe_bus_err.o output_RDB3/Dma_Ip_VS_0_PBcfg.o output_RDB3/libfci _autosar.o output_RDB3/fci_qos.o output_RDB3/pfe_host_fail_stop_csr.o output_RDB3/fci_l2br_domains.o output_RDB3/pfe_wdt_csr.o outpu t_RDB3/pfe_fw_feature.o output_RDB3/OsIf_Cfg.o output_RDB3/pfe_hm.o output_RDB3/Serdes_Ip_PBCfg.o output_RDB3/oal_irq_autosar.o outp ut_RDB3/Clock_Ip_Cfg.o output_RDB3/Power_Ip_VS_0_PBcfg.o output_RDB3/pfe_hif_ring.o output_RDB3/oal_time_autosar.o output_RDB3/pfe_f w_fail_stop_csr.o output_RDB3/pfe_log_if.o output_RDB3/IntCtrl_Ip_Cfg.o output_RDB3/pfe_emac.o output_RDB3/pfe_gpi_csr.o output_RDB3 /fci_routes.o output_RDB3/Gpt_VS_0_PBcfg.o output_RDB3/pfe_class.o output_RDB3/pfe_bmu.o output_RDB3/pfe_minihif_drv.o output_RDB3/p fe_hif_nocpy_csr.o output_RDB3/pfe_log_if_slave.o output_RDB3/Siul2_Port_Ip_VS_0_PBcfg.o output_RDB3/pfe_platform_slave.o output_RDB 3/Port_Cfg.o output_RDB3/pfe_l2br_table.o output_RDB3/Mcu_VS_0_PBcfg.o output_RDB3/pfe_phy_if_slave.o output_RDB3/nxp_snprintf.o out put_RDB3/fci_l2br.o output_RDB3/pfe_fw_fail_stop.o output_RDB3/Ram_Ip_Cfg.o output_RDB3/Mcu_Cfg.o output_RDB3/pfe_gpi.o output_RDB3/ pfe_host_fail_stop.o output_RDB3/oal_job_autosar.o output_RDB3/pfe_util.o output_RDB3/Ftm_Gpt_Ip_VS_0_PBcfg.o output_RDB3/fci_connec tions.o output_RDB3/pfe_if_db.o output_RDB3/Eth_43_PFE_Cfg.o output_RDB3/pfe_bmu_csr.o output_RDB3/pfe_fail_stop_csr.o output_RDB3/p fe_l2br.o output_RDB3/CDD_Mcl_Cfg.o output_RDB3/Stm_Ip_VS_0_PBcfg.o output_RDB3/pfe_feature_mgr.o output_RDB3/pfe_util_csr.o output_ RDB3/Gpt_Ipw_VS_0_PBcfg.o output_RDB3/pfe_hw_feature.o output_RDB3/pfe_idex.o output_RDB3/pfe_hif_ptp.o output_RDB3/fci_fp_db.o outp ut_RDB3/Dma_Ip_Cfg.o output_RDB3/pfe_hif_csr.o output_RDB3/pfe_fail_stop.o output_RDB3/pfe_fp.o output_RDB3/pfe_mirror.o output_RDB3 /pfe_platform_master.o output_RDB3/oal_mm_autosar.o output_RDB3/pfe_parity_csr.o output_RDB3/pfe_wdt.o output_RDB3/Power_Ip_Cfg.o ou tput_RDB3/oal_util_net_autosar.o output_RDB3/pfe_hif_chnl.o output_RDB3/Serdes_Cfg.o output_RDB3/Clock_Ip_VS_0_PBcfg.o output_RDB3/f ci_interfaces.o output_RDB3/pfe_hif.o output_RDB3/fci_owner.o output_RDB3/fci_fw_features.o output_RDB3/Eth_43_PFE_Irq.o output_RDB3 /pfe_hif_drv.o output_RDB3/pfe_class_csr.o output_RDB3/Eth_43_PFE.o output_RDB3/EthIf_Cbk.o output_RDB3/pfe_parity.o output_RDB3/CDD _Mcl_VS_0_PBcfg.o output_RDB3/Pit_Ip_VS_0_PBcfg.o output_RDB3/pfe_hif_nocpy.o output_RDB3/fci_hm.o output_RDB3/Port_VS_0_PBcfg.o out put_RDB3/pfe_ecc_err.o output_RDB3/oal_util_autosar.o output_RDB3/pfe_pe.o output_RDB3/pfe_mac_db.o output_RDB3/blalloc.o output_RDB 3/autolibc.o output_RDB3/Gpt_Cfg.o output_RDB3/fci_timer_owner.o output_RDB3/Ram_Ip_VS_0_PBcfg.o output_RDB3/pfe_tmu_csr.o output_RD B3/nvic.o output_RDB3/sys_init.o output_RDB3/system.o output_RDB3/startup.o output_RDB3/exceptions.o output_RDB3/OsIf_Interrupts.o o utput_RDB3/OsIf_Timer_System.o output_RDB3/OsIf_Timer_System_Internal_Systick.o output_RDB3/OsIf_Timer.o output_RDB3/OsIf_Timer_Syst em_Internal_GenericTimer.o output_RDB3/Det_stub.o output_RDB3/Det.o output_RDB3/Dem_stub.o output_RDB3/Dem.o output_RDB3/Gpt.o outpu t_RDB3/Pit_Ip.o output_RDB3/Ftm_Gpt_Ip.o output_RDB3/Stm_Ip.o output_RDB3/Rtc_Ip.o output_RDB3/Gpt_Ipw.o output_RDB3/Clock_Ip_Select or.o output_RDB3/Clock_Ip_Data.o output_RDB3/Clock_Ip_Data2.o output_RDB3/Clock_Ip_Frequency2.o output_RDB3/Clock_Ip_Specific.o outp ut_RDB3/Power_Ip.o output_RDB3/Clock_Ip_ExtOsc.o output_RDB3/Clock_Ip.o output_RDB3/Clock_Ip_Frequency1.o output_RDB3/Clock_Ip_Speci fic2.o output_RDB3/Clock_Ip_Irq.o output_RDB3/Clock_Ip_Frequency.o output_RDB3/Power_Ip_CortexM7.o output_RDB3/Mcu_Dem_Wrapper.o out put_RDB3/Clock_Ip_Gate.o output_RDB3/Ram_Ip.o output_RDB3/Clock_Ip_Data1.o output_RDB3/Clock_Ip_FracDiv.o output_RDB3/Clock_Ip_Divid erTrigger.o output_RDB3/Clock_Ip_IntOsc.o output_RDB3/Power_Ip_CortexA.o output_RDB3/Clock_Ip_Specific1.o output_RDB3/Power_Ip_PMC.o output_RDB3/Power_Ip_MSCM.o output_RDB3/Clock_Ip_Monitor.o output_RDB3/Mcu_Ipw.o output_RDB3/Clock_Ip_Divider.o output_RDB3/Power_I p_Private.o output_RDB3/Power_Ip_MC_ME.o output_RDB3/Clock_Ip_ProgFreqSwitch.o output_RDB3/Clock_Ip_Pll.o output_RDB3/Power_Ip_MC_RG M.o output_RDB3/Mcu.o output_RDB3/Power_Ip_MC_RGM_Irq.o output_RDB3/SchM_Icu.o output_RDB3/SchM_Fee.o output_RDB3/SchM_Ocu.o output_ RDB3/SchM_Pmic.o output_RDB3/SchM_Fr_43_LLCE.o output_RDB3/SchM_Pwm.o output_RDB3/SchM_Uart.o output_RDB3/SchM_Fls.o output_RDB3/Sch M_Eth.o output_RDB3/SchM_I2c.o output_RDB3/SchM_Port.o output_RDB3/SchM_EthTrcv_43_PHY.o output_RDB3/SchM_Gpt.o output_RDB3/SchM_Mcu .o output_RDB3/SchM_Spi.o output_RDB3/SchM_Can_43_LLCE.o output_RDB3/SchM_Fr.o output_RDB3/SchM_Ocotp.o output_RDB3/SchM_Thermal.o o utput_RDB3/SchM_Eth_43_PFE.o output_RDB3/SchM_EthSwt_43_SJA11XX.o output_RDB3/SchM_Eep.o output_RDB3/SchM_Mcl.o output_RDB3/SchM_Adc .o output_RDB3/SchM_Wdg.o output_RDB3/SchM_Dio.o output_RDB3/SchM_Qdec.o output_RDB3/SchM_Serdes.o output_RDB3/SchM_Rm.o output_RDB3 /SchM_Crypto.o output_RDB3/SchM_Can.o output_RDB3/SchM_Lin.o output_RDB3/SchM_CanTrcv_tja115x.o output_RDB3/SchM_Ipcf.o output_RDB3/ SchM_Wdg_43_VR5510.o output_RDB3/SchM_Crc.o output_RDB3/Siul2_Port_Ip.o output_RDB3/Port.o output_RDB3/Port_Ipw.o output_RDB3/System _Ip.o output_RDB3/IntCtrl_Ip.o output_RDB3/Platform_Ipw.o output_RDB3/Platform.o output_RDB3/EthSwt.o output_RDB3/EthTrcv.o output_R DB3/Serdes_Ip_HwAccess.o output_RDB3/Serdes.o output_RDB3/Serdes_Ipw.o output_RDB3/Serdes_Ip.o output_RDB3/startup_cm7.o output_RDB3 /Vector_Table.o -o output_RDB3/main_RDB3.elf arm-none-eabi-gcc.exe: fatal error: cannot read spec file 'nosys.specs': No such file or directory compilation terminated. Makefile:627: recipe for target 'output_RDB3/main_RDB3.elf' failed make: *** [output_RDB3/main_RDB3.elf] Error 1 For this issue, I installed the Cygwin program from https://www.cygwin.com/install.html, then generated it using Cygdrive. Re: makefile error in PFE example Hello, @ Youngsoo_do Thanks for the question. Let me summarize the building steps for your reference: Install the following packages SW32G_RTD_4.4_4.0.2, PFE-DRV_S32G_M7_MCAL_1.2.0, PFE-FW_S32G_1.7.1 to your host. Create link file under $EB_PATH/links with the content: path=$SW32G_RTD_4.4_4.0.2_PATH Copy the plugin from PFE DIR: Eth_43…. to the $SW32G_RTD_4.4_4.0.2_PATH/eclipse/plugins Import the project: MasterProject_RDB3 to the EB Generate project code by EB, by default, the code path is shown below: After successfully generation, Copy generate_RDB3/* to $PFE-DRV_S32G_M7_MCAL_1.2.0\example_application Open the project_parameters.mk, At least modify the following part: change the path depending on your installation. GCC_DIR ?= c:/NXP/S32DS.3.5/S32DS/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi #depend on your path TRESOS_DIR ?= C:/EB/tresos    # EB installation path PLUGINS_DIR ?= $RTD_4.0.2_installation_path/eclipse/plugins TRESOS_WORKSPACE_DIR ?= $(TRESOS_DIR)/workspace FW_DIR ?= $pfe_FW_installation_path Build the project by typing “make HW=RDB3” Hope it helps Best Regards Chenyin

GD3162栅极驱动器SC故障 你好，恩智浦， 发生短路故障时，INTB 从 5V 变为 2.5V 的原因可能是什么？SW 中是否存在任何原因？有任何可能性吗？ 回复：GD3162门极驱动器SC故障 你好 你能告诉我结果吗？此外，您能测试直接连接到微控制器的 INTB 吗？ 回复：GD3162门极驱动器SC故障 此外，连接到微型之前的 INTB 通过 10K 电阻从外部上拉至 5V 回复：GD3162门极驱动器SC故障 你好，仅供参考， 在我们的项目中，所有 INTB 引脚都连接到微型的一个引脚，这样如果任何一个栅极驱动器（三相电机的 6 个栅极（RH、YH、BH 和 RL、YL、BL））遇到故障，则所有栅极驱动器的 PWM 都会被切断。 在附图中，您可以看到 RL 栅极驱动器的 ISENSE 引脚应该通过 SC 故障检测相位过流切断，而 YL 栅极驱动器的 ISEN 应该通过 SC 故障检测直流过流切断。 在我们的案例中，每当 YL 的 ISEN 检测到直流总线过流切断时，这种情况下 INTB 就会变为 2.5V，而当发生相过流切断时，INTB 会进一步从 2.5 转变为 0。 我注意到你的观点，将 INTB 与微型断开并再次检查信号。