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トレーニング:MCUXpresso for VS Codeのウォークスルー このビデオ・シリーズでは、利用を開始するための手順を示します。これは、「MCUXpresso for VS Codeのインストール手順」で詳述した手順を視覚的に理解するためのビデオ・ウォークスルーです。 パート1:MCUXpresso for Visual Studio Code NXPは、開発者がVisual Studio CodeでNXPのマイクロコントローラをより簡単に扱えるようにしました。NXPのサポートの概要については、www.nxp.com/vscodeを参照してください。 以下のソフトウェアが必要です。 MCUXpressoインストーラ(Windows、MacOS、Linux) Microsoft Visual Studio Code(ダウンロード) (マイビデオで視聴) パート2:MCUXpressoインストーラが準備する内容 なぜMCUXpressoインストーラを使用する必要があるのでしょうか。Visual Studio Code内で組み込み開発に対応するには、多数のツールが必要になります。このインストーラは必要なツールをインストールします。ユーザーは、さまざまな環境を構成するための複雑な依存関係について理解する必要がありません。 (マイビデオで視聴) パート3:MCUXpresso for VS Code Extensionの追加 NXPの拡張機能は、最終的にはVisual Studio Codeの拡張機能マーケットプレイスからインストールできるようになります。2023年7月の一般公開までは、[Extensions(拡張機能)] メニューの中で、拡張機能の検索バーの右側にある省略記号をクリックすることにより、拡張機能を手動で追加できます。 最新の拡張機能が必要です。ダウンロード:mcuxpresso-0.5.60.vsix (マイビデオで視聴) パート4:MCUXpressoのパースペクティブの確認 NXP拡張機能は、必要な情報やリソース、ツールをVisual Studio Codeの中で簡単に参照できるようにするパースペクティブを提供します。 (マイビデオで視聴) パート5:ソフトウェア・リポジトリ/SDKの追加 NXP 拡張機能は、人気のあるソースからソフトウェアリポジトリをインポートするツールを提供します。開発者は、リモートリポジトリ、NXPアーカイブファイル、または既存のローカルリポジトリからインポートできます。 (マイビデオで視聴) パート6:最初のプロジェクトのインポート NXP拡張機能はプロジェクトインポートツールを提供します。利用可能なプロジェクトをすばやく簡単に閲覧し、現在のワークスペースに追加することができます。ユーザーはリポジトリまたは既存のローカルプロジェクトからインポートできます。 (マイビデオで視聴) パート7:VS Codeでプロジェクトをビルドする NXPインストーラと拡張機能は、使用するプラットフォーム用のツールチェーンを準備します。インストーラと拡張機能の導入が完了していれば、NXPプロジェクトは正しくビルドされるはずです。 (マイビデオで視聴) パート8:デバッグ・セッションの開始 NXP拡張機能を導入したことにより、VS Codeの中でデフォルト・ツールを起動して、一般的なデバッグ・プローブを使用できるようになりました。Segger J-Link、NXP LinkServer、PE Microのデバッグ・プローブが識別され、構成されます。デバッグ・セッションが起動し、ユーザーはプロジェクトを分析できます。 (マイビデオで視聴) ドキュメント VS Code Re: トレーニング:MCUXpresso for VS Codeのウォークスルー @sourabhmoitra うまくいってよかったです。また、パスにスペースが含まれていると問題が生じることを確認しました。こうしたエラーが発生するディレクトリをユーザーがツールで選択したときに「警告」を出せるよう、チームは作業に取り組んでいます。 Re: トレーニング:MCUXpresso for VS Codeのウォークスルー @kyledandoさん、親切なご助言ありがとうございます。Gitフォルダを変更してみたら、実際にうまくいきました。ただどういうわけか、階層の深さが3レベルを超えるGitフォルダ(例:C:/folder1/folder2/folder3)は選択できませんでした。python/westのパス名の長さに関する制限が原因かもしれません(一部のWindowsマシンで発生しています)。あらためてお礼申し上げます。 Re: トレーニング:MCUXpresso for VS Codeのウォークスルー @sourabhmoitra 別のドライブの場所を試されましたか?私のところでも、古いgitフォルダを使用するwestで同様のエラーが発生したことがあります。フォルダを新しい場所に変えたら、エラーは出なくなりました。 古いgitフォルダでwestコマンドがエラーになる原因を解決するためにチケットを発行しましたが、別のフォルダを選択(フォルダ・パスの問題を排除するためにC:/mcux-sdkを選択)したところ、ウィザードでmcux-sdkをインポートできました。 Re: トレーニング:MCUXpresso for VS Codeのウォークスルー とてもよくできました! ビデオは明確で、短く、有益です。 この拡張は、私たちの開発にとって大きな資産となるでしょう。 Re: トレーニング:MCUXpresso for VS Codeのウォークスルー 素晴らしいコンテンツです!すぐに理解できました!
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S32G_MAC_Address_Storage 本文说明了S32G如何储存mac地址,包括dts保存,systemd指定和fuse保存的办法: 目录 1 需要的软件................................................................. 2 2 背景说明 .................................................................... 2 3 PFE eMAC MAC地址说明 ......................................... 2 3.1 DTS配置 ................................................................. 2 3.2 源代码说明 ............................................................. 3 3.3 测试 ........................................................................ 4 4 GMAC0 MAC地址说明 .............................................. 4 4.1 DTS配置 ................................................................. 4 4.2 源代码说明 ............................................................. 4 4.3 SystemD脚本 ......................................................... 5 4.4 固定GMAC MAC地址的修改办法 ........................... 6 5 用Uboot命令烧写FUSE MAC地址项 .......................... 7 6 修改为从fuse中获得GMAC0 MAC地址 ...................... 9 6.1 Uboot代码修改 ....................................................... 9 6.2 Uboot写MAC寄存器说明 ...................................... 10 6.3 测试 ...................................................................... 10 Automotive
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如何下载、安装、激活和使用 S32 Design Studio (在 “我的视频” 中查看) 这段短视频演示了如何从您的 NXP 用户账户获取 S32 Design Studio 3.6.0 版本,并将其安装到您的主机电脑上。 安装过程中,S32 Design Studio 3.6.0 需要一个激活码,该激活码可从下载安装文件的同一位置免费获取。 激活后,S32 Design Studio 3.6.0 即可用于以下微控制器和微处理器:S32K1xx、S32K3xx、S32M2xx、S32Z2xx、S32E2xx、S32G2xx、S32G3xx、S32R41 和 S32R45。 如何下载、安装、激活 S32 Design Studio 3.6.0 及其首次使用 激活 | 安装 | 许可 | 安装程序下载 Eclipse IDE 使用和设置 新建项目向导 - 项目管理和设置 SDK
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i.MX95 启动 ROM:配置 eMMC Boot0/Boot1 为主/从启动盘,FlexSPI NOR 为恢复盘 各位专家好, 我正在尝试了解 i.MX95 启动 ROM 是如何处理主启动、辅助启动和恢复启动阶段的。我已经查阅了参考手册和一些 U-Boot spl 源代码,但我仍然不清楚恢复启动机制的工作原理。 我的目标是实现以下启动架构: 主启动: eMMC Boot0 辅助启动: eMMC 启动1 Recovery 启动: FlexSPI 或非 闪存(黄金恢复镜像) 在查看arch/arm/mach-imx/image-container.c文件时,我注意到以下代码: printf("Boot stage: "); if (rom_data.boot_stage == 0x6) printf("Primary\n"); else if (rom_data.boot_stage == 0x9) printf("Secondary\n"); else if (rom_data.boot_stage == 0xa) printf("Recovery\n"); else printf("USB Serial Download\n"); 根据此,Boot ROM 似乎支持四个启动阶段:主启动、辅助启动、恢复启动和 USB 串口下载启动。但是,我找不到足够的信息来解释如何选择或配置恢复阶段。 我希望就以下问题获得一些指导: 是否可以将FlexSPI 或非 闪存配置为恢复引导设备,同时使用eMMC Boot0 和 Boot1作为主启动分区和辅助启动分区? 如果支持这种配置,推荐的配置方法是什么? 在选择主启动、辅助启动和恢复启动阶段时,启动 ROM 遵循的顺序是什么? 如果主启动和辅助启动都失败,什么情况下会触发恢复启动阶段? 在开发和验证过程中,可以有意重现哪些故障条件来模拟恢复模式? 是否有任何文档或应用说明详细描述了启动 ROM 启动选择算法和恢复启动流程? 引导设备熔丝配置(熔丝模式) 在选择恢复引导设备时 是否 起作用? 恢复设备是由引导设备熔丝决定的吗? 或者,即使启动设备熔丝到 eMMC 上,启动 ROM 能否自动切换到不同的启动设备(例如 FlexSPI NOR)? 最终,我的目标是让系统正常从 eMMC Boot0 启动, 必要时 回退到 eMMC Boot1 , 如果两个 eMMC 启动分区都不可用或无效, 则最终启动 存储在 FlexSPI 或非 中的 Golden Recovery Image 。 如果有人已经实现了类似的启动架构,或者可以向我提供相关的文档或应用笔记,我将非常感谢您的指导。 提前谢谢! BR, 阿伦·库马尔 Re: i.MX95 Boot ROM: Configuring eMMC Boot0/Boot1 as Primary/Secondary and FlexSPI NOR as Recovery 你好, 是否可以将FlexSPI 或非 闪存配置为恢复启动设备,同时使用eMMC Boot0 和 Boot1作为主启动分区和辅助启动分区? 不,这不可能。LP 启动的恢复引导设备只有 LPSPI1/2,你不能将任何其他启动源配置为恢复选项。 Oswalag_0-1783975544422.png
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8MPLUSLPD4-EVK - 自動電源オン こんにちは、チームのみなさん。 8MPLUSLPD4-EVKは電源供給時に起動(起動)します。 私たちの理解と仮定によれば、搭載をオンにするにはONOFFボタン(SW1)を押す必要があります。 しかし実際には、EVKはONOFFボタン*SW1を押さずにONがオンになります。 この自動電源オンの動作とONOFFボタンの使い方について説明してもらえますか? 私の理解が間違っていたら訂正してください。 🙂 Re: 8MPLUSLPD4-EVK - Autopower ON こんにちは、 @ramkrishさん お元気でお過ごしのことと思います。 実際、その行動は正しい。 SW3の電源を入れると、ボードの電源が入るはずです。 ソフトウェアで基板の電源を切ったら、SW1で再度オン(ONオフ)できます。 よろしくお願いいたします。 サラス。
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Designing a CAN-Based Communication Hub with the S32N55 using Model Based Design Toolbox 1 Table of Contents • Introduction • Overview • Context • References • Conclusion 2 Introduction This article presents an automotive system built around a central computer that processes high volumes of data to manage interactions and decisions across the vehicle. Implemented on an NXP S32N55 board, a main node orchestrates peripheral nodes — Lighting, Motor Control, Steering, Radar, and Parking Sensors — over CAN, demonstrated through real-time interactions and Driver-in-the-Loop (DiL) simulations. The same architecture also enables stimuli and scenarios to be injected directly from Simulink/MATLAB via the Model-Based Design Toolbox (MBDT), turning the setup into both a functional prototype and a flexible test bench that shortens the loop between design, validation, and refinement. 3 Overview The communication hub acts as a comprehensive aggregator and decision-maker, serving as the central intelligence of the entire automotive control network. This architectural choice follows industry's best practices by consolidating critical decision-making processes into a single, robust processing unit capable of efficiently managing multiple concurrent data streams and executing time-sensitive commands. Centralizing this logic also simplifies maintenance and traceability, since the rules governing vehicle behavior live in one well-defined place rather than being scattered across multiple ECUs. For a project of this nature, the NXP Model-Based Design Toolbox (MBDT) offers a practical development path: control logic and application behavior can be designed in Simulink/MATLAB and deployed directly onto the S32N55, without a separate hand-coding step. The graphical, model-based workflow makes the system's structure easier to follow and adjust, while built-in support for CAN communication and integration with tools like FreeMASTER for live telemetry simplify both stimulus injection and runtime observation. The result is a smoother path from initial concept to a working prototype that can be iterated on and validated in a controlled, repeatable way. In this specific implementation, the main node hosts an application that fulfills two complementary roles: data aggregator and decision-maker. As an aggregator, it collects, synchronizes, and interprets incoming signals from the sensing nodes; as a decision-maker, it translates that fused view of the environment into concrete commands for the actuators. Practically, our system receives data over CAN from the peripheral sensing nodes (Radar, Parking Sensors) and dispatches commands to the actuator nodes (Motor Control, Lights, Steering). The main node is also designed to make safety-critical decisions based on the incoming inputs — for example, triggering Automated Emergency Braking (AEB) when the Parking Node or the Radar Node detects a hazardous situation. Because these decisions are made centrally, the response logic can take the full context into account (vehicle speed, proximity of obstacles, current steering input) rather than reacting to a single sensor in isolation. robertv_1-1782736295643.png 4 Context At its core, the main node receives a continuous stream of data over the CAN bus from peripheral nodes distributed throughout the vehicle. These peripheral nodes include: Radar sensors — provide long-range object detection and relative velocity measurements, making them ideal for highway-speed scenarios and forward collision awareness. Parking sensors — monitor the immediate vicinity of the vehicle for obstacles and potential collision risks, typically at very short range and at low speeds. Fault sensors — for actuator nodes, like the motor control, steering and lighting systems. The CAN bus protocol guarantees the reliable, deterministic communication required to meet the stringent timing demands of automotive safety systems. Its built-in arbitration, error detection, and message prioritization make it a natural fit for a distributed architecture in which safety-relevant signals must always reach the main node within a bounded time window. To streamline communication across components, a CAN Database ( DBC ) file has been created that contains all the signals and messages used throughout the system. The DBC file acts as a single source of truth for the entire network: every node — whether sensing or actuating — references the same definitions for message IDs, signal layouts, scaling factors, and value ranges. This drastically reduces the risk of integration mismatches when multiple boards are developed in parallel. Beyond its data aggregation role, the main node also serves as the command center for the vehicle's actuator systems. After receiving data from the simulation, it is being processed and then it transmits precisely timed control signals to critical subsystems, including the motor control unit, lighting system, and steering mechanism. This bidirectional architecture enables closed-loop control strategies, in which sensor feedback continuously informs actuator commands to achieve the desired vehicle behavior. Each actuator node remains responsible for the low-level handling of its hardware, while the main node provides the high-level command to the actuators. Since the main node is responsible for receiving, analyzing, processing and sending data, it also becomes the one responsible for sharing the telemetry information upstream, either to the cloud, or to real time monitoring tools like FreeMASTER. A particularly valuable aspect of this system is its seamless integration with the Simulink/MATLAB environment, which unlocks extensive possibilities for system validation and scenario testing. Engineers can inject stimuli into the simulation and analyze a wide range of driving conditions and edge cases without requiring a full-scale prototype. This is especially useful for reproducing rare or dangerous situations — such as sudden obstacles or sensor faults — in a fully controlled and repeatable environment. To achieve two-way communication between the main node and the simulation, the CAN bus itself is used to communicate with the Simulink model. This way, the physical prototype can feed stimuli into the simulation — and vice versa — on the same CAN bus that devices are using to communicate, significantly expanding the boundaries of the testing environment. The same DBC file that defines the on-vehicle communication is reused on the simulation side, ensuring that the messages exchanged between the real and virtual worlds remain perfectly consistent. robertv_2-1782736331723.png Note: Perhaps one of the most noteworthy features of the main node's active functions is its ability to make safety-critical decisions in real time based on aggregated sensor inputs. The system continuously monitors data from both the parking sensors and the radar node, detecting potentially dangerous situations that require immediate intervention: At low speeds — hazard detection is typically driven by the parking sensors mounted on the front and/or rear of the vehicle, where short-range, high-resolution distance measurements are most relevant. At driving speeds — the radar module takes over, collecting and analyzing data that is then forwarded to the main node for higher-level interpretation. In both scenarios, the main node remains the ultimate decision-maker, fusing all available data to determine the appropriate response. This clear separation between sensing, decision-making, and actuation keeps each component focused on a single responsibility and makes the overall system easier to reason about, extend, and validate. 5 References NXP Model-Based Design Toolbox (MBDT) Community Interacting with Digital Inputs/Outputs on MR-CANHUBK344 Communicating over the CAN Bus S32N Vehicle Super-Integration Processors 6 Conclusion This article has provided an overview of the communication hub's core functionality, offering a high-level perspective on how key systems interact within the overall architecture. The main node was presented both as a data aggregator and as a decision-maker, with a particular emphasis on its role in safety-critical scenarios and its integration with the Simulink/MATLAB environment. Future installments in this series will take a deeper dive into the communication hub — covering the specific board in use, detailed hardware and software requirements, and other technical considerations and implementation nuances. Subsequent articles will also explore individual peripheral nodes in more detail, building up a complete picture of the system one subsystem at a time.
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S32K388 LPSPI SCKDIV 计算问题 - 为什么 1MHz 波特率下 SCKDIV=38? NXP社区的各位好, 我正在使用 S32K388,并配置 LPSPI 波特率。我有一个关于 SCKDIV 值计算的问题。 我的理解: 根据 S32K3xx 参考手册,LPSPI 波特率公式为: ``` SCK = LPSPI_CLK / (PRESCALE_DIV × (SCKDIV + 1)) ``` 我的配置: - LPSPI 时钟源:AIPS_SLOW_CLK = 40 MHz 目标波特率:1 MHz - PRESCALE = 0 (÷1) 我的计算结果: ``` SCDKIV = (LPSPI_CLK / 波特率) - 1 SCKDIV = (40 MHz / 1 MHz) - 1 = 39 ``` **S32DS 生成的代码:** 但是,当我使用 S32DS 生成配置时,却出现以下错误: ```c LPSPI_CCR_SCKDIV(38U) // SCKDIV = 38 ``` **问题:** 当 SCKDIV=38 时,实际除法系数为 39,这意味着: ``` 实际波特率 = 40 MHz / 39 = 1,025,641 Hz ≈ 1.026 MHz ``` 与目标 1 MHz 相比,误差约为 2.56%。 为什么 S32DS 使用 SCKDIV=38 而不是 SCKDIV=39?S32DS 配置中是否使用了不同的 LPSPI 时钟频率,或者选择这种频率还有其他原因? **补充背景信息:** 我使用的是 S32DS 3.5 - S32K388 参考手册 Rev. 6 - 该项目是使用默认时钟配置创建的 感谢您提前提供的任何解释! 顺祝商祺! Re: S32K388 LPSPI SCKDIV calculation question - why SCKDIV=38 for 1MHz baud rate? 嗨@xlele 首先,请注意,S32K3xx 参考手册的最新可用版本是 Rev. 12。您当前使用的版本包含有关 S32K310、S32K311 和 S32K3x8 设备的初步信息,这些设备在发布该文档时尚未发布。因此,我建议下载并参考RM的最新版本。 关于 LPSPI 波特率的计算,时钟配置寄存器 (CCR) 中 SCKDIV 字段的描述如下: 波特率 = 功能时钟 ÷ (2^预分频 × (SCKSET + SCKHLD + 2)) 其中 SCKSET 和 SCKHLD 由 SCKDIV ÷ 2 得出。 考虑到 SCKDIV = 38: SCKSET = SCKHLD = 38 ÷ 2 = 19 波特率 = 40 MHz ÷ (2^0 × (19 + 19 + 2)) = 1 MHz,与预期值相符。 BR,VaneB
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iMX8M Plus - SW1 電源オン/オフボタン こんにちは、 iMX8M Plus EVK の開発に取り組んでおり、SW1 を約 5 秒間押し続けると EVK の電源がオフになり、約 1 秒間押すと再び電源がオンになることを確認しました。この動作がハードウェアやPMICによって処理されるのか、それともソフトウェアによって処理されているのかを確認してください。 また、SW3をON位置に移動させると、SW1を押さずに自動的に電源が入ります。これがi.MX8M Plus EVKの想定されるデフォルト動作であるかどうかをご確認ください。 Re: iMX8M Plus - SW1 ON/OFF Button こんにちは、@Govind1807。 NXPサポートまでご連絡いただきありがとうございます。 この挙動はプロセッサ内に実装された内部FSMに関連しています。 より理解を深めていただくために、FSMの動作と状態遷移を示す対応するブロック図を添付しました。 Chavira_0-1782509945998.png よろしくお願いします、 チャビラ
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Codewarrior TAP 通过 JTAG 检测到了 MPC5200 你好, 我一直很苦恼,不知道如何将Codewarrior TAP调试器连接到配备MPC5200的定制应用板上。 探针是“ FREESCALE CodeWarrior USB TAP CWH-CTP-BASE-H E”。 探针尖端是我自己制作的。基本上,我在网站上找到了 2x15 连接器的引脚图/原理图,然后自己进行了板的接线。我在引脚 30 和地之间连接了一个 10 千欧姆的电阻。提示被识别为“电源架构/JTAG COP” 我一直只使用CCS控制台。我目前还没有使用过Codewarrior IDE。 当前状态: findcc 能正确检测到 TAP。 扫描板检测到 JTAG 链并报告: 设备 0:Altera FPGA(IDCODE 0x020B20DD) 设备 1:MPC5200B rev. 2.x(IDCODE 0x1001101D) 设备 2....7:IDCODE:FFFFFFFF,设备:未知设备。 OpenOCD 也检测到了完全相同的两个设备,因此 JTAG 链似乎是正确的。 目标设备已通电并正在运行其应用程序。 问题: 在CCS中配置处理器的任何尝试均失败: ccs::config_chain mgt5200 返回: mgt5200:未连接到目标或无法识别的处理器 ccs::get_config_chain总是报告“测试核心”而不是 mgt5200。 底层 JTAG 命令(如jtag::get_speed )总是返回:内部故障。 问题: MPC5200 是否支持任何硬件或软件机制,可以在禁用 JTAG 调试的同时仍然允许 IDCODE 扫描? CCS 识别 MPC5200 时,对 TRST、HRESET、引导程序或 BDM/JTAG 使能引脚是否有已知的要求? 是否有办法从 CCS 获取更详细的附件日志,以确定 IDCODE 扫描后哪个步骤失败? 非常感谢您抽出时间阅读本文。 米哈伊 Re: MPC5200 detected by Codewarrior TAP over JTAG 你好, 您观察到的行为(IDCODE 扫描工作但调试附加失败)与 MPC5200 架构一致。 根据 MPC5200 文档,该设备使用两级 JTAG 结构:一个主 TAP(用于标准 JTAG/IDCODE)和一个从 TAP(用于 CPU 调试,即 e300 COP 接口)。如果从设备 TAP 未启用或未正确选择,JTAG 检测可以工作,但调试器连接将失败。 建议查看: 正确处理 TRST 和复位信号(TAP 必须处于正确状态) 能够在连接过程中重置/固定设备 CPU调试(COP)接口可访问(未被硬件或配置阻止) 正确的 JTAG 链配置和 TAP 选择,尤其是在多设备链中 顺祝商祺! Peter
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i.MX8MP RAW 捕获最大几何尺寸 NXP社区的各位好, 我们正在尝试在 i.MX8MP 上使用特定的图像传感器。 我们正在尝试将 RAW12 捕获从 MIPI 推送到 RAM。看来唯一的方法是通过如下所述的 ISI 模块: hraducu_1-1782239762964.png 问题在于,关于几何限制的文档含糊不清,我们正在尝试确定 i.MX8MP 是否适合我们的应用。 图像的高度和宽度在 ISI 中使用 CHNL_IMG_CFG[WIDTH/HEIGHT] 寄存器定义。这些条目是 13 位的,理论上将我们限制在 8191 x 8191 的几何尺寸。 宽度似乎受到硬件的限制,因为行缓冲区实际上只能容纳 2K 像素,但文档概述了通过组合其他通道的行缓冲区来实现 4K 的方法。文档中没有说明是否可以达到 8191 像素的线宽寄存器限制。我们可以绕过 ISI 处理,我们的目标是直接将 RAW MIPI 捕获的数据推送到 RAM 中。 此外,与宽度限制不同,高度限制似乎并非由物理硬件引起。 是否有任何证据表明我们可以支持 CHNL_IMG_CFG[HEIGHT] 寄存器 13 位最大值所定义的 8191 行高度? 任何支持都将不胜感激。我已阅读过其他类似帖子,例如以下这些: https://community.nxp.com/t5/i-MX-Processors/Direct-MIPI-CSI2-to-memory-access-on-i-MX8MP/mp/2158946 https://community.nxp.com/t5/i-MX-Processors/I-MX8MP-ISI-maximum-supported-width/mp/1224069 但是,目前尚未确认是否支持 8191 宽度,我想知道这方面是否有任何更新。 此外,高度限制也没有明确规定。 谢谢 i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: i.MX8MP Maximum Geometry for RAW Capture i.MX8MP 的 ISI 驱动程序限制在 2K 分辨率,但如果使用链式缓冲区,ISI 可以支持高达 4K 的分辨率,但不支持 8191 像素宽。在 i.MX8MP 上,单个摄像头最高可支持 4K@30Hz 的分辨率。 Re: i.MX8MP Maximum Geometry for RAW Capture 感谢您的回复。 所以宽度限制与我最初的发现相符。 请问ISI模块的高度限制是多少?我们能否通过 ISI 实现 8191 车道高度? 谢谢 Re: i.MX8MP Maximum Geometry for RAW Capture 请参考驾驶员说明,最大高度为 8191。 #define MXC_ISI_MIN_WIDTH 1U #define MXC_ISI_MIN_HEIGHT 1U #define MXC_ISI_MAX_WIDTH_UNCHAINED 2048U #define MXC_ISI_MAX_WIDTH_CHAINED 4096U #define MXC_ISI_MAX_HEIGHT 8191U https://github.com/nxp-imx/linux-imx/blob/lf-6.12.y/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
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EdgeLock SE050/SE051 Capability Inquiry for Ed25519/X25519-Based IoT Device Hello NXP Team, We are evaluating the EdgeLock SE050/SE051 family for a Raspberry Pi based IoT device and would appreciate guidance on the most suitable part number. Our primary requirements are secure storage and hardware execution of cryptographic operations. The device is a Raspberry Pi 4 - running Raspberry Pi OS (Linux). We would like clarification on the following points: 1. Key Storage       - Can the SE050/SE051 securely store non-exportable private keys?    - Can certificates and public keys be stored in the secure element? 2. Key Generation       - Can the secure element generate key pairs internally?    - Specifically, does it support generation of Ed25519 and X25519 key pairs within the secure element? 3. Ed25519 Operations       - Can Ed25519 signing and signature verification be supported inside the secure element? 4. X25519 Operations       - Can X25519 key agreement (ECDH shared secret computation) be performed inside the secure element using a non-exportable private key? 5. AES Operations       - Does the secure element support AES encryption and decryption operations?    - If so, which AES modes are supported?   6. Storage read/write    - Storing/removing/accessing files like wifi passwords? 7. Linux / Raspberry Pi Integration       - Is there an SDK or middleware available for Raspberry Pi OS?    - Are there example applications demonstrating the above operations? 8. Product Selection       - Which EdgeLock SE050/SE051 variant would you recommend for the above requirements?    - What are the major differences between the recommended variants?    - Are there any newer EdgeLock products that would be a better fit for these requirements? Our intended use case is: - Ed25519 signing for device authentication / JWT generation - X25519 key agreement for mobile-device provisioning - AES encryption/decryption using derived session keys - Storage and handling of security files like Wifi passwords etc - Large-scale deployment of IoT devices If available, we would also appreciate links to any of these: - Relevant datasheets - Application notes - SDK documentation - Evaluation boards - Linux/Raspberry Pi examples Thank you for your assistance. Best regards, Sahil Pai Re: EdgeLock SE050/SE051 Capability Inquiry for Ed25519/X25519-Based IoT Device Hi @SahilPai , Please kindly have my comments as below: 1. Key Storage       - Can the SE050/SE051 securely store non-exportable private keys? //Yes, private keys are non-exportable on SE05x.    - Can certificates and public keys be stored in the secure element? // Yes, certs are stored as binary files within the SE , and public key can be stored standalone or together with the private key in SE05x. 2. Key Generation       - Can the secure element generate key pairs internally?// Yes, it supports.    - Specifically, does it support generation of Ed25519 and X25519 key pairs within the secure element?// Yes, Ed25519 and X25519 key pairs are supported. 3. Ed25519 Operations       - Can Ed25519 signing and signature verification be supported inside the secure element?// Yes, Ed25519 signing and signature verification are supported inside the SE05x. 4. X25519 Operations       - Can X25519 key agreement (ECDH shared secret computation) be performed inside the secure element using a non-exportable private key? //Yes, ECDH is performed with a private key within SE05x and an external  public key which can be stored in SE05x as well. 5. AES Operations       - Does the secure element support AES encryption and decryption operations? //Yes,    - If so, which AES modes are supported?// Support for AES Modes:CBC, ECB, CTR, GCM, CCM.   6. Storage read/write    - Storing/removing/accessing files like wifi passwords?//Yes, SE050/SE051 can store binary objects in its secure object store, including Wi-Fi credentials. 7. Linux / Raspberry Pi Integration       - Is there an SDK or middleware available for Raspberry Pi OS?// Yes, please refer to https://www.nxp.com/webapp/Download?colCode=SE05x-PLUG-TRUST-MW&appType=license for details.    - Are there example applications demonstrating the above operations?//Yes. 8. Product Selection       - Which EdgeLock SE050/SE051 variant would you recommend for the above requirements?// Either SE050E2 or SE051C2 can be used.    - What are the major differences between the recommended variants?// They both have the latest applet version, but SE051 supports applet upgrade while SE050 doesn't.    - Are there any newer EdgeLock products that would be a better fit for these requirements?//not yet so far.   Please kindly refer to https://www.nxp.com/products/SE050 and https://www.nxp.com/products/SE051 for more details.   Hope that helps,   Have a great day, Kan ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------
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LPC553x 参考手册:表 315 SCT0 信号错误 (SCTIMER) 你好, 我想报告 LPC553x 参考手册(修订版)中似乎存在的一个重大错误。4) 将表 315“SCT0 信号(输出)”与数据表表 3 进行比较,并询问哪个来源是权威的。 这是 LPC553x 参考手册,修订版 4,表 315“SCT0 信号(输出)”: danielholala_0-1781768255327.png 下表列出了 34 个外部引脚(如果我数得没错的话)。快速浏览 LPC553x 数据手册,发现它只有 31 个引脚。此外,表 315 列出了 PIO2_2、PIO2_9、PIO2_15、PIO2_30 和 PIO2_31 作为 SCT0 输出引脚。从数据手册来看,LPC553x 只实现了 PIO2_0 和 PIO2_1,所以该设备上不存在 Port-2 引脚。 现在,如果您仔细查阅数据手册中的表 3 并提取所有 SCT0_OUT 引脚,那么您最终会得到一个完全不同的表格: SCT0 信号(输出)连接至 SCT0_OUT0 PIO0_2、PIO0_17、PIO1_4、PIO1_23 SCT0_OUT1 PIO0_3、PIO0_18、PIO1_8、PIO1_24 SCT0_OUT2 PIO0_10、PIO0_15、PIO0_19、PIO1_9、PIO1_25 SCT0_OUT3 PIO0_22、PIO0_31、PIO1_10、PIO1_26 SCT0_OUT4 PIO0_23、PIO1_3、PIO1_17 SCT0_OUT5 PIO0_26、PIO1_18 SCT0_OUT6 PIO0_6、PIO0_27、PIO1_31 SCT0_OUT7 PIO0_21、PIO0_28、PIO1_19 SCT0_OUT8 PIO0_29,PIO1_13 SCT0_OUT9 PIO0_30 我的设计以数据手册表 3 为依据。 请, 确认数据手册(修订版 5.0)表 3 是 SCT0 输出引脚的权威来源, 确认参考手册中的表315有误。 请确认我上面的表格是否正确。 谢谢。 担 Re: LPC553x reference manual: Table 315 SCT0 Signals wrong (SCTIMER) 你好, 请使用参考手册中附带的“引脚功能表”来确定 SCT0_OUT 功能的可用引脚。 luis_maravilla_1-1782229991489.png 顺祝商祺!   Re: LPC553x reference manual: Table 315 SCT0 Signals wrong (SCTIMER) 你好, 目前,请参考引脚功能表。 我将信息传递给团队。 此致敬礼,路易斯 Re: LPC553x reference manual: Table 315 SCT0 Signals wrong (SCTIMER) 你好@luis_maravilla , 感谢您指出“引脚功能表”。我不知道参考手册里竟然隐藏着一个电子表格文件。 我快速浏览了一下“引脚功能表”,证实参考手册中表 315 “SCT0 信号(输出)”的信息不正确。 请将此信息转交给文档团队进行更正。 如果对引脚功能还有其他疑问,权威来源是数据手册还是引脚功能表? 谢谢。 此致, 丹尼尔
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Looking for guidance on building a production programming fixture for NTAG213 Hi all, We are integrating NTAG213 chips into our own product and are currently in the testing phase. As we move toward mass production, we plan to build a programming fixture (or test fixture) to handle the full inline production flow: chip installation → write → read/verify → ship. We're looking for advice or documentation on the following: Best practices for designing and operating a production NFC programming fixture for NTAG213 Key considerations or common pitfalls during write/verify cycles in a production environment Any recommended tools, reference designs, or NXP resources we should be aware of before building the fixture How to reliably detect and handle write failures or defective chips at the production stage Any guidance from those who have experience with NTAG213 in production settings would be greatly appreciated. We are still in early stages, so foundational pointers are very welcome. Thank you. Re: Looking for guidance on building a production programming fixture for NTAG213 Hello @Lee0130  NTAG213 documentation is publicly available, which can be downloaded from product page. we would recommend RFID Discover to you, which is a convenient software tool for NFC tag configuration, programming, and data verification, helping streamline development and production testing. You can also development yourself application using Taplinx TapLinx SDK for MIFARE, NTAG, ICODE and UCODE | NXP Semiconductors
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寻求关于制作 NTAG213 生产编程夹具的指导 大家好, 我们正在将 NTAG213 芯片集成到我们自己的产品中,目前处于测试阶段。随着我们迈向批量生产,我们计划建造一个编程夹具(或测试夹具)来处理完整的在线生产流程:芯片安装 → 写入 → 读取/验证 → 发货。 我们正在寻找关于以下内容的建议或相关文档: NTAG213生产级NFC编程夹具的设计与操作最佳实践 生产环境中写入/验证循环的关键注意事项或常见陷阱 在构建夹具之前,我们应该了解任何推荐的工具、参考设计或恩智浦资源 如何在生产阶段可靠地检测和处理写入失败或缺陷芯片 非常感谢那些在生产环境中使用过 NTAG213 的朋友提供任何指导。我们目前仍处于初期阶段,因此非常欢迎大家提供一些基础性的建议。 谢谢! Re: Looking for guidance on building a production programming fixture for NTAG213 你好@Lee0130 NTAG213 文档是公开的,可以从产品页面下载。 我们向您推荐 RFID Discover,它是一款方便的 NFC 标签配置、编程和数据验证软件工具,有助于简化开发和生产测试。 您还可以使用TapLinx SDK(支持 MIFARE、NTAG、ICODE 和 UCODE)开发自己的应用程序 | NXP 半导体
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一条 i3c 总线上允许有多少 P3T1084UK? 对于 P3T1084UK,每条 i3c 总线允许的最大设备数量是多少?  P3T1084UK 支持 I3C 动态地址分配,但根据表 5“I3C 临时 ID 构成”和表 6,PID 位似乎是一个固定值,且与地址引脚配置相关联。这是否意味着在一条 i3c 总线上最多允许 4 个 P3T1084UK?如果我需要 8 个 P3T1084UK,它们需要连接到 2 个 I2C 接口上吗? Re: how many P3T1084UK are allowed on a single i3c bus? 这取决于 A0 配置。 guoweisun_0-1781573924748.png
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I tried running Zephyr HTTP Server on FRDM-MCXN947 (Japanese blog) スクリーンショット 2026-06-11 15.39.32.png 0. What is this article about? When using network functionality with embedded microcontrollers, traditionally, you had to start by figuring out "how to make it work." You'd have to find the SDK and sample code provided by the vendor of the microcontroller you wanted to use, and then write code according to its API. Since the API changes with each different microcontroller, you often end up having to research everything from scratch every time you want to do something similar. With network functionality, there's a lot to learn, such as initializing the TCP stack and using the socket API, and I'm sure many people have experienced running out of steam before they could even write their own application. Zephyr OS can be one solution to these problems. Zephyr provides a standard API as an RTOS, and a major advantage is that once you learn how to use it, the same code will run on different boards. Among the abundant sample code available, there is also the HTTP server sample that we will be discussing, and it was surprisingly easy to get running. This article provides a step-by-step guide on how to run the HTTP server sample on the NXP FRDM-MCXN947 evaluation board. Once the sample is running, you will be able to access the FRDM-MCXN947 from your PC's web browser and turn the LEDs on the board ON/OFF using buttons on the page. goal: Access the HTTP server on the FRDM-MCXN947 from your browser and control the LEDs using the "LED on" and "LED off" buttons on the page. Before reading this article This assumes that the Zephyr build environment is already installed and that you are familiar with the basic operations of west build and west flash . If you're starting from setting up the environment, you can refer to the " Getting Started Guide " on the Zephyr official website, or the guide video that allows you to easily set it up using MCUXpresso for VSC. Let's get started! See "MCUXpresso with VS Code and Zephyr OS". table of contents 0. What is this article about? 1. What you will need 1.1 Hardware 1.2 Software (must be installed) 2. Preparation: Activate environment variables 3. Configuring prj.conf (specifying the IP address) 3.1 When using a static IP address 3.2 Using DHCP (Automatically obtaining an IP address) 3.3 When connecting the PC and the board directly on a one-to-one basis 4. Build 4.1 In the case of a static IP address 4.2 When using DHCP 5. Writing to the board 6. Operation check 6.1 Check the IP address using the serial terminal 6.2 Accessing from a browser Reference materials 1. What you will need 1.1 Hardware Product name remarks FRDM-MCXN947 Evaluation Board Zephyr Documentation USB cable (included with the FRDM board mentioned above) This connects the board's J17 connector to the PC. LAN cable This connects the board's Ethernet connector to the network. 1.2 Software (must be installed) Latest Zephyr development environment (west, Zephyr SDK)   2. Preparation: Activate environment variables This time, we'll proceed using commands from the macOS Terminal screen. Once you open the terminal, first execute the following two commands. First, activate the Python execution environment: source ~/zephyrproject/.venv/bin/activate If installed using MCUXpresso for VSC The location of bin/activate is different from the standard. On macOS, it's located in ~/.mcuxpressotools/.venv_3_14/ . On Windows, it was located in C:\Users\<ユーザ名>\.mcuxpressotools\.venv_3_12\Scripts . *When using Windows PowerShell, the commands and filenames used will differ from those on Linux and macOS, so please refer to the " Getting Started Guide " before proceeding. Next, we'll set the environment variables required to build Zephyr. This command will allow you to build Zephyr from any folder: source ~/zephyrproject/zephyr/zephyr-env.sh Next, navigate to the sample folder: cd ~/zephyrproject/zephyr/samples/net/sockets/http_server   3. Configuring prj.conf (specifying the IP address) The prj.conf file in this folder contains network settings. Please choose from the following three methods according to your connection type. section Connection type IP setting method Section 3.1 Connect to the LAN via a router Manually configure a static IP address. Section 3.2 Connect to the LAN via a router Automatic acquisition via DHCP (easy) Section 3.3 Connect the PC and the board directly with a single LAN cable. Set a static IP address for both the PC and the board. Reference: IP Address: Static and CHCP スクリーンショット 2026-06-11 16.22.14.png 3.1 Using a static IP address (via a router) This method involves connecting to the LAN via a router and assigning a fixed IP address to the board. Open prj.conf in a text editor and rewrite the following two lines to match your network environment. Before change (default): CONFIG_NET_CONFIG_MY_IPV4_ADDR="192.0.2.1" CONFIG_NET_CONFIG_MY_IPV4_GW="192.0.2.2" After the change (example): CONFIG_NET_CONFIG_MY_IPV4_ADDR="192.168.1.100" CONFIG_NET_CONFIG_MY_IPV4_GW="192.168.1.1" Setting items meaning CONFIG_NET_CONFIG_MY_IPV4_ADDR The IP address to assign to the board (specify an address within the router's subnet that does not overlap with other devices). CONFIG_NET_CONFIG_MY_IPV4_GW The IP address of the gateway (router). This is not strictly necessary if you are only accessing it from a PC within the same LAN. The subnet mask is not specified here, but in the environment I tested, it was set to 255.255.255.0 . This article uses "192.168.1.100" as an example. Please change it to match your network environment. 3.2 Using DHCP (Automatically obtaining an IP address) When connecting the FRDM-MCXN947 to a router (wireless router), it can automatically obtain an IP address from the router. To do this, make the following changes to prj.conf : CONFIG_NET_DHCPV4=y # 追加 CONFIG_NET_CONFIG_MY_IPV4_ADDR="" # 空文字列に変更 Alternatively, you can choose not to edit prj.conf and instead specify the configuration file using the build command described later (see Section 4.2 ). 3.3 When connecting the PC and the board directly on a one-to-one basis It can also be operated by directly connecting the PC and the FRDM-MCXN947 with a single LAN cable, without using a router. In this case, since there is no DHCP server, you will need to manually set a static IP address on both the PC and the board. The key points are the following two: Assign different IP addresses to the PC and the board within the same subnet . Since it will not connect to the internet, gateway settings are not required (or any value is acceptable). Here is an example of the settings: subject IP address Subnet mask PC (wired LAN adapter) 192.168.100.1 255.255.255.0 FRDM-MCXN947 192.168.100.2 255.255.255.0 (Automatic setting) On the board side, edit prj.conf in the same way as in Section 3.1. Example settings when using the values from the table above: CONFIG_NET_CONFIG_MY_IPV4_ADDR="192.168.100.2" CONFIG_NET_CONFIG_MY_IPV4_GW="192.168.100.1" The IP address of the wired LAN adapter on the PC side is set manually from the OS settings screen: macOS: Go to "System Preferences" → "Network" → Select your wired LAN adapter → Change "IP Settings" to "Manual" and enter the address 192.168.100.1 and subnet mask 255.255.255.0 Windows: Go to "Control Panel" → "Network and Sharing Center" → "Change adapter settings" → Right-click on the wired LAN adapter → "Properties" → "Internet Protocol Version 4 (TCP/IPv4)" → Select "Use the following IP address" and enter the same information. If DHCP is available , the standard configuration of connecting to a router (Section 3.2) is easier as it does not require changing the PC's IP settings. Direct connection is useful for testing in locations without a router or when you don't want to change the PC's network settings. 4. Build Once the setup is complete, proceed with the build (compilation and linking). The working directory is "~/zephyrproject/zephyr/samples/net/sockets/http_server". 4.1 If you have a static IP address, or if you have configured the system to use DHCP in prj.conf Build it with the following command. west build -p auto -b frdm_mcxn947/mcxn947/cpu0 4.2 When using DHCP prj.conf To enable DHCP without editing the file, run the following command: west build -p auto -b frdm_mcxn947/mcxn947/cpu0 -- -DEXTRA_CONF_FILE="overlay-dhcpv4.conf" -DEXTRA_CONF_FILE="overlay-dhcpv4.conf" This will result in the configuration file for enabling DHCP being added to prj.conf during the build process. In this configuration, if the DHCP server is not enabled, the static IP address written in prj.conf will be set by default.   5. Writing to the board Once the build is complete, write it to the board. Connect the board's J17 (USB) connector (to the left of the Ethernet connector) to your PC using a USB cable, and connect a LAN cable to the Ethernet connector . IMG_1415.JPG Run the following command: west flash Once the writing process is complete, the board will start operating.   6. Operation check 6.1 Check the IP address using the serial terminal Open a serial terminal (such as Tera Term, PuTTY, or VS Code's Serial Monitor), select the FRDM-MCXN947 port, and set the baud rate to 115200 . There are several types of serial terminals available, and you can use whichever you prefer. Please refer to separate articles for information on their installation and usage. uart:~$ When you see the prompt, enter the following command: net iface A list of network settings will be displayed. If you specified a static IP address, that value will be displayed; if you used DHCP, the IP address assigned by the router will be displayed, so please check that address. スクリーンショット 2026-06-11 14.18.15.png If you miss the startup log, you can restart the board by pressing the SW1 (RESET) button on the board. You can also check the IP address in the output immediately after restarting. スクリーンショット 2026-06-11 14.17.59.png 6.2 Accessing from a browser Enter the confirmed IP address into your browser's address bar and access it (in this example, http://192.168.1.100 ). If it is working correctly, a page containing " LED on " and " LED off " buttons will be displayed. Pressing these buttons will turn the green LED on/off on the FRDM-MCXN947. スクリーンショット 2026-06-11 15.33.47.png IMG_1419.JPG Reference materials [Zephyr ® Series] Part 1: What kind of OS is the recently popular Zephyr OS? (Japanese Blog) [Zephyr ® Series] Part 2: First Build and Testing (Japanese Blog) Zephyr Project Getting Started Guide Let's get started! Zephyr OS with MCUXpresso and VS Code (Guided Video) Trying out UI: GUI Guider sample code on Zephyr OS (Japanese blog) Change history: 2026-06-16: First Edition ========================= We are currently unable to respond to comments left in the "Comment" section of this post. We apologize for the inconvenience, but please refer to "Technical Questions to NXP - How to Contact Us (Japanese Blog)" when making an inquiry. (If you are already an NXP distributor or have a business relationship with NXP, you may ask your representative directly.) This guide provides a step-by-step explanation of how to run the Zephyr HTTP server sample on the FRDM-MCXN947 and turn the LEDs on the board ON/OFF from a PC browser. It supports both fixed IP/DHCP connections via a router and direct connections between the PC and the board using a single LAN cable. If the Zephyr build environment is already installed, you can verify operation from editing the configuration file to building and flashing with just a few commands. (Estimated time: 15 minutes *Assuming Zephyr development environment is installed and you are familiar with PC networking) スクリーンショット 2026-06-11 15.39.32.png Ethernet Introduction MCX Japanese Blog
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imx93におけるSD3.DATA0のUART2サポート こんにちは、 私たちのプロジェクトでは、i.MX93プロセッサを使用しています。以前のi.mx91搭載デバイスでは、SD3.DATA0用のUARTオプションがありましたが、i.mx93では以下の4つのオプションしか利用できないことがわかりました。 パッドに使用する 4 つの iomux モードのうち 1 つを選択してください: SD1_STROBE。 000 - マルチプレクサモードを選択: ALT0 マルチプレクサポート: USDHC1_STROBE インスタンス: usdhc1 001 - マルチプレクサモードの選択: ALT1 マルチプレクサポート: FLEXSPI1_A_DQS (インスタンス: flexspi1) 100 - マルチプレクサモードを選択: ALT4 マルチプレクサポート: FLEXIO1_FLEXIO18 インスタンス: flexio1 101 - マルチプレクサモードの選択: ALT5 マルチプレクサポート: インスタンスのGPIO3_IO18: gpio3 これに関して、UARTマルチプレクサオプションを有効にする方法はありますか? よろしくお願いいたします。 アヌシュリー Re: UART2 support for SD3.DATA0 in imx93 いいえ、i.MX93 の SD1_STROBE (または SDx_DATA ピン) で UART マルチプレクサを有効にすることは、IOMUX テーブルに記載されていない場合はできません。 i.MX93では、ピン多重化オプションはハードウェアによって固定されており、リファレンスマニュアルに記載されています。 SD1_STROBE(またはSDx_DATA)ピンにはUARTの代替機能が含まれていないため、ソフトウェア設定によってこれらのピンにUARTをマッピングすることはできません。 これはi.MX91とは異なり、i.MX91では一部のUART多重化オプションがSDHCピンで利用可能でした。 代替案として、以下をご利用ください。 ネイティブLPUARTピン、または FlexIO(UARTエミュレーションが許容される場合)
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Unable to measure 1PPS signal on J12 pin of LS1028A evaluation board? After booting the development board, I enabled PPS output using the command echo 1 > /sys/class/ptp/ptp0/pps_enable. Then, by running cat /sys/class/pps/pps0/assert, I can see the timestamp incrementing. However, I cannot capture the PPS signal on the 1588_PULSE_OUT2 pin. I searched for similar issues in the forum and then modified the device tree by referring to the devicetree/bindings/ptp/ptp-qoriq.txt document. The steps are as follows: First, I obtained the clock value for QORIQ_CLK_HWACCEL 3 on the board using the following command. The value is 400 MHz: root@ls1028ardb:# find /sys/kernel/debug/clk -name "clk_summary" -exec cat {} ; | grep -i hwaccel cg-hwaccel3 0 0 0 400000000 0 0 50000 Y deviceless no_connection_id cg-hwaccel0 0 0 0 400000000 0 0 50000 Y deviceless no_connection_id cg-hwaccel2 0 0 0 600000000 0 0 50000 Y f200000.display clk_core cg-hwaccel1 0 0 0 1200000000 0 0 50000 Y deviceless no_connection_id So I modified the device tree file fsl-ls1028a.dtsi as follows: ethernet@0,4 { compatible = "pci1957,ee02", "fsl,enetc-ptp"; reg = <0x000400 0 0 0 0>; clocks = <&clockgen QORIQ_CLK_HWACCEL 3>; little-endian; fsl,extts-fifo; // The following lines are newly added fsl,cksel = <1>; fsl,tclk-period = <10>; fsl,tmr-prsc = <100>; fsl,tmr-add = <0x40000000>; fsl,tmr-fiper1 = <0x3B9AC9F6>; fsl,max-adj = <2999999999>; }; After booting, the modified node entries are visible: root@ls1028ardb:~# ls /sys/class/ptp/ptp0/device/of_node/ clocks compatible fsl,cksel fsl,extts-fifo fsl,max-adj fsl,tclk-period fsl,tmr-add fsl,tmr-fiper1 fsl,tmr-prsc little-endian name reg Even after these modifications, I still cannot capture the signal correctly. Therefore, I checked the RCW values. The detailed log is as follows: Reset Configuration Word (RCW): 00000000: 3c004010 00000030 00000000 00000000 00000010: 00000000 018f0000 0030c000 00000000 00000020: 020031a0 00002580 00000000 00003296 00000030: 00000000 00000010 00000000 00000000 00000040: 00000000 00000000 00000000 00000000 00000050: 00000000 00000000 00000000 00000000 00000060: 00000000 00000000 200e705a 00000000 00000070: bb580000 00000000 In the LS1028ARDBRM.pdf document, I found that for 1PPS output, the EC1_SAI4_5_PMUX[835:833] field must be set to 101. The word address is the 32-bit word at offset 0x68 (word 26), with value 0x200e705a. Extracting this field: shift right by 1 and mask lower 3 bits: (0x200e705a >> 1) & 0x7 = 0x5, which is binary 101 – so that is also correct. However, I still cannot capture the signal. I would like to know whether my device tree configuration is incorrect, or if there might be other hardware limitations. I have attached the ptp-qoriq.txt, LS1028ARDBRM.pdf, and the oscilloscope capture for reference. Re: Unable to measure 1PPS signal on J12 pin of LS1028A evaluation board? I performed a loopback test with the following commands and got no signal. It is indeed possible that the CPLD is not routing the signal correctly. root@ls1028ardb:~# find /sys/kernel/debug/ -name fiper1-loopback /sys/kernel/debug/0000:00:00.4/fiper1-loopback root@ls1028ardb:~# echo 1 > /sys/kernel/debug/0000:00:00.4/fiper1-loopback root@ls1028ardb:~# cat /sys/class/ptp/ptp0/fifo root@ls1028ardb:~# cat /sys/class/ptp/ptp0/fifo root@ls1028ardb:~# cat /sys/class/ptp/ptp0/fifo The CPLD software version I am using is LS1028ARDB_HDL_2020_0330_1829_V8. Is additional programming required? Or is there an issue with this version? As for the routing problem, I will have our hardware team check it. Re: Unable to measure 1PPS signal on J12 pin of LS1028A evaluation board? Hello, The documentation supports that LS1028A can output PPS on LS1028ARDB J12, but your symptom most likely points to missing board RCW/CPLD mux routing or incomplete external FIPER pin programming rather than a lack of PPS support. Regards
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マルチタスクのプリエンプションによりMAC生成に異常が生じた SOCモデル:S32G399A、RTDバージョン4.0.2、HSEバージョン2.22.0、コンパイラ:GHS SecOC機能を実装する際、顧客はHSEを使用してMACアドレスを生成しました。このプロジェクトでは、同じコア上の複数のタスクで同じキースロットが使用され、MACアドレスはCrypto_ProcessJob()関数を呼び出すことで生成されました。CANパケットを監視したところ、MACアドレスが更新されない異常が時折発生することが判明しました(パケットデータは更新されましたが、MACアドレスは更新されず、関数はE_OKを返しました)。 1. 添付ファイル「MAC value not updated.png」は、問題が再現された際にCANメッセージのMAC値に対応する信号が更新されていないことを示す波形図です。 2. 添付文書「S32G_MAC Generation Anomaly Analysis.7z」は、この異常に関するプロジェクトコードの概要です。 テストの結果、MAC生成関連の処理を同一タスクにまとめることで、MACが更新されない問題が解消されることが明らかになった。現在の分析では、この異常は複数のタスクでグローバルデータが上書きされることが原因である可能性が示唆されている。 MACアドレスを生成するためにcryptoを呼び出すという現在のマルチタスク機能を維持するために、 cryptoドライバを更新するか、設定を再構成することでこの問題を解決することは可能でしょうか? Re: 多任务抢占导致MAC生成异常 こんにちは、 @RoseRice こんにちは。暗号化ドライバの観点から言うと、関連するAPIは後続バージョンでも変更されていません。トラブルシューティングの履歴を見ると、CSMレイヤーで競合状態を解決するのが良いと思います。これはCSMレイヤーの定義にも合致しています。 BR チェイン
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s32デザインスタジオライセンスの拡張 こんにちは、 S32 Design Studio開発ツールのライセンスのうち1つが、2026年6月3日に期限切れとなります。新しいライセンスまたはライセンスの延長を取得するにはどうすればいいですか? ありがとうございます テックチャクラ。 Re: Extetion of s32 Design studio License こんにちは。お客様のS32DSライセンスが延長されました。
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