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MCX W71 Knowledge Hub MCX W71 无线微控制器采用 96 MHz Arm® Cortex®-M33 内核,搭配支持 Matter™、Thread®、Zigbee® 和 Bluetooth® 低功耗的多协议无线电子系统。独立的无线电子系统拥有专用内核和内存,可减轻主 CPU 的负担,使其专注于主要应用,并支持固件更新以适配未来的无线标准。MCX W71x 还通过集成的 EdgeLock® 安全飞地核心配置文件提供高级安全性,并将由 NXP 的 EdgeLock 2GO 云服务支持凭证共享。 MCX W71x 系列可作为单芯片解决方案支持工业和物联网设备,也可在托管架构中用作协处理器。   MCX W71 Block DiagramMCX W71 框图 文件 MCX W71 参考手册 MCX W71 数据表 Errata Secure Reference 手册** 认证 评估板 FRDM-MCXW71页面 FRDM-MCXW71 原理图 FRDM-MCXW71设计文件 FRDM-MCXW71 用户手册 FRDM-MCXW71 入门指南 应用笔记 AN14398:如何在 FRDM-MCXW71 上使用 RTC 本应用笔记介绍了如何在 BLE 演示中配置和使用 RTC 外设。 AN14416:在 FRDM-MCXW71 蓝牙低功耗连接协议栈上启用看门狗定时器模块 本应用笔记介绍了在连接协议栈演示中实现 WDOG 定时器的过程。 AN14396:MCX W71 将 OTAP 客户端服务集成到蓝牙低功耗外设设备中 本应用笔记提供了将空中编程客户端服务集成到 BLE 外设设备中的步骤和流程。 AN14391:MCX W71 负载牵引报告 本应用笔记介绍了负载牵引特性的测量方法和相关结果。 AN14394:使用 OTAP 工具为 MCX W71 创建固件更新镜像 本应用笔记提供了通过 OTAP 在 MCX W71 板上创建和升级镜像的步骤。  AN14389:MCXW71 蓝牙低功耗功耗分析 本应用笔记提供了有关 MCXW71 无线微控制器的功耗、硬件设计以及低功耗运行优化的信息。  AN14387:MCXW71 电源管理硬件 本应用笔记介绍了 MCXW71 微控制器中专门用于电源管理的不同模块的使用方法。 AN14399:MCXW71 针对 802.15.4 应用的连接测试本应用笔记介绍了如何使用连接测试工具执行 MCXW71 802.15.4 射频性能测试。 AN14374:用于蓝牙低功耗和 IEEE 802.15.4 应用的 FRDM-MCXW71 射频系统评估报告 本应用笔记提供了 FRDM-MCXW71 板在 BLE(2FSK 调制)和 IEEE 802.15.4(OQPSK 调制)应用中的射频评估测试结果,还介绍了可用于执行测试的设置和工具。  AN14427:MCXW71 在线编程工具 本应用笔记提供了将 MCXW71 微控制器引导至 ISP 模式并建立各种串行连接以与微控制器通信的步骤。 AN14397:量产期间通过串行线调试为应用程序和无线电固件编程 MCXW71 闪存本应用笔记介绍了在量产中通过 SWD 编写、烧录和编程所有必要设置的步骤。 Zigbee 协议 Zigbee 3.0 入门:本应用笔记为开发你自己的 Zigbee 3.0 设备固件提供了最佳起点指导。 Zigbee 3.0 基础设备模板:本应用笔记提供了示例应用程序,以演示采用恩智浦 DK006 Zigbee 3.0 微控制器的 Zigbee 3.0 网络中基础设备的特性和操作。 Zigbee 3.0 设备开发:本应用笔记介绍了如何以基础设备模板终端设备应用程序为起点开发 Zigbee 3.0 开关传感器。本应用笔记中描述的开关传感器基于 Zigbee 照明和占用(ZLO)设备规范中的 Zigbee 设备类型。 Zigbee 3.0 灯泡:本应用笔记为采用 NXP DK006 无线微控制器的 Zigbee 3.0 网络中的灯泡提供了示例应用程序。 Zigbee 3.0 物联网控制桥:本指南提供了允许用户使用图形用户界面(GUI)连接到控制桥的信息,该界面模拟主机来操作 Zigbee 网络。它还描述了用于与控制桥接口的串行协议,以及所有相关命令和响应的有效负载。 Zigbee 3.0 绿色功率设备:本应用笔记为开发你自己的 Zigbee 3.0 设备固件提供了最佳起点指导。 Zigbee 3.0 传感器:本应用笔记为采用恩智浦 DK006 Zigbee 3.0 无线微控制器的 Zigbee 3.0 网络中的传感器提供了示例应用程序。 Zigbee 3.0 控制器和开关:本应用笔记为采用恩智浦 DK006 无线微控制器的 Zigbee 3.0 网络中的控制器和开关提供了示例应用程序。本应用笔记还包括 Zigbee 3.0 网络中典型的 Zigbee 绿色功率 (GP) 能量收集开关的示例。 Zigbee 3.0 集群开发:本应用笔记介绍了如何以基础设备模板路由器设备应用程序为起点开发 Zigbee 3.0 窗帘设备。本应用笔记有两种使用方式: 作为使用最终步骤中创建的功能示例创建窗帘设备的起点。 作为创建 NXP ZCL 实现中未包含的设备和集群(包括制造商特定设备和集群)的指南。 支持 如果你有关于 MCX W71 的问题,请在我们的无线微控制器社区中提出你的问题!此处 有用链接 使用 KW45/KW47/MCXW71/MCXW72 的信号频率分析仪 (SFA) 模块进行时钟测量 - NXP 社区:该社区提供了如何使用信号频率分析仪的步骤 首次正确构建 KW45(汽车)或 K32W1/MCXW71(物联网 / 工业)PCB 的最佳方法 - NXP 社区:在该社区中提供了使用 KW45 或 K32W148 和 MCXW71 构建 PCB 的重要链接,以及所有与无线电性能、低功耗和无线电认证 (CE/FCC/ICC) 相关的内容。 如何在 Kinetis 系列产品上使用 HCI_bb 并进入 DTM 模式:本文分为两部分: 如何将HCI_bb二进制文件烧录到Kinetis产品中。 使用 R&S CMW270 进行射频测量 BLE HCI 应用程序设置发射机/接收机测试命令:本文提供了相关步骤,展示用户如何向设备发送串行命令。 Bluetooth LE HCI 黑盒快速入门指南:本文介绍了一个简单流程,能让用户通过串行命令控制无线电。 培训 MCX W71培训,安全MCU用于Matter、Zigbee、BLE MCX W系列培训 - NXP社区 设备 无线设备:本文提供了有助于项目开发的设备链接。 开发工具 NXP MCUXpresso:MCUXpresso IDE 提供高级编辑、编译和调试功能,此外还有针对微控制器的特定调试功能。支持与所有通用 Arm Cortex-M 的连接。 VSCode: MCUXpresso for Visual Studio Code (VS Code) 为嵌入式开发人员优化了代码编辑和开发体验。 Zephyr RTOs  NXP Application Code Hub:应用代码中心 (ACH) 存储库使工程师能够轻松找到由我们内部专家开发的微控制器软件示例、代码片段、应用软件包和演示。该平台提供了一种快速、简便且一致的方式来查找微控制器应用。 NXP SPSDK:是一个统一、可靠且易于使用的Python SDK库,适用于 NXP MCU 产品组合,为客户快速制作原型到生产部署提供坚实的基础。 NXP SEC工具: MCUXpresso安全配置工具是一款基于 GUI 的应用程序,用于简化在 NCP MCU 设备上生成和配置可启动的可执行文件。 NXP OTAP Tool: 是一款帮助用户对 NXP 开发板执行空中固件更新的应用程序。 ** 获取安全文件需要申请额外访问权限。 FRDM 培训 动手实践培训 协议:802.15.4 协议:BLE -> 连接性 协议:蓝牙 协议:Matter 协议:Thread 协议:Zigbee
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S32K364:使用 EMIOS、BCTU 和 DMA 进行 ADC 转换 您好, 我正在尝试将 EMIOS0 ch 8 配置为触发扫描 ADC3 和 DMA 的 8 个通道的 BCTU,将转换结果移动到名为 ADC_3_RAW [] 的变量中。 转换似乎已经开始: 但该值不会通过 DMA 传输,也不会刷新 我正在使用这个 SDK: 每次使用 ConfigTool 生成代码时,我都需要修改以下代码: #define ADC_SAR_IP_PRESAMPLING_AVAILABLE ((1U)) 至 #define ADC_SAR_IP_PRESAMPLING_AVAILABLE ((0U)) 这正常吗? 项目附在这里。 敬请期待,弗朗切斯科。 Re: S32K364: ADC conversions using EMIOS, BCTU and DMA 你好@francescovico 我检查了你的代码,你的配置和用法都不正确。 1。DMA 的触发信号来源是什么?我没有看到您在配置中配置了"Rm" 模块。 2。既然你在使用 BCTU 来产生 ADC 的触发信号,为什么不使用它提供的 FIFO?这与 DMA 的功能完全一致。 https://community.nxp.com/t5/S32K-Knowledge-Base/RTD400-LLD-K344-Center-Aligned-PWM-Trigger-ADC-BCTU/ta-p/2034211 3.此外,BCTU 驱动程序已经支持 DMA。 https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-PIT-BTCU-parallel-ADC-FIFO-DMA-DS3-5-RTD300/ta-p/1732444 Re: S32K364: ADC conversions using EMIOS, BCTU and DMA 你好@Senlent、 我同意你的看法,我已经忘记了 Rm 模块,现在它出现了。 我很难理解 S32K364 的配置(只有 ADC3、ADC4、ADC5、ADC6 和 BCTU1),类似的配置使用 S32K324 在我的办公桌上也能正常工作 我想: - 触发信号 BCTU1 使用 EMIOS0 CH 8 扫描 ADC3 频道 - 触发信号 BCTU1 使用 EMIOS0 CH 9 扫描 ADC4 频道 而使用 DMA 会在变量 ADC_X_Raw[] 中产生结果。 我的配置工具设置是 EMIOS: RM: BCTU (红色字段不清楚): ADC: 附上项目。 敬请期待,弗朗切斯科。 Re: S32K364: ADC conversions using EMIOS, BCTU and DMA 你好@francescovico 我很难理解 S32K364 的配置(只有 ADC3、ADC4、ADC5、ADC6 和 BCTU1),类似的配置使用 S32K324 在我的办公桌上也能正常工作 也请分享您在 S32K324 上的项目,我会抽时间帮您检查。 我们的团队目前工作过度繁忙,我需要更多时间来处理您的问题。请耐心等待。 Re: S32K364: ADC conversions using EMIOS, BCTU and DMA 你好@Senlent、 非常感谢您的帮助! 您可以在附件中找到使用 S32K324 的项目(运行正常)。 使用 trgmux 的 PIT 计时器触发信号扫描 ADC0 和 ADC1 通道的 BCTU。 变量ADC_0_Raw[] 和 ADC_1_Raw[] 的DMA 传输转换结果。 敬请期待,弗朗切斯科。 Re: S32K364: ADC conversions using EMIOS, BCTU and DMA 你好@francescovico 我们没有 S32K36x 评估版,因此无法直接测试您的代码。 不过,我也发现了一些问题: 这里,关于 Adc 目标掩码: 对于 ADC0,应将其设置为 0b001。 对于 ADC1,应将其设置为 0b010。 如果你需要同时触发信号 ADC0 和 ADC1,那么你应该将其设置为 0b011,依此类推。 在您的项目中,您使用的是 ADC3 和 ADC4,因此相应值应设置为 0b0100 和 0b1000。 Re: S32K364: ADC conversions using EMIOS, BCTU and DMA 你好@francescovico 此外,"Adc index" 也是错误的。 Re: S32K364: ADC conversions using EMIOS, BCTU and DMA 你好@Senlent、 我已经解决了这个问题。 随函附上使用ADC3、ADC4和ADC5转换27个模拟通道的项目。   问题在于,要初始化 ADC3,必须在实例中使用 0 调用 init 函数:   /* 启动 ADC3*/ Adc_Sar_Ip_Init(0,&AdcHwUnit_0);   在 ConfigTool 中,要初始化 BCTU 以触发信号 ADC3,必须设置 Adc 目标掩码,如下所示: ADC4 和 ADC5 也是如此。 关于 ADC6,ConfigTool 没有生成初始化结构,手动输入该结构后,ADC6 仍然无法工作... 幸运的是,在我的应用中无法使用 ADC6... 敬请期待,弗朗切斯科。 Re: S32K364: ADC conversions using EMIOS, BCTU and DMA 你好@Senlent、 好 感谢您的帮助! 敬请期待,弗朗切斯科。 Re: S32K364: ADC conversions using EMIOS, BCTU and DMA 你好@francescovico 这是完全错误的! 在您之前提供的示例程序"ADC_S32K324.rar" 中、使用 ADC0 和 ADC1,BCTU 的"Adc Target Mask" 分别设置为"1" 和"2" 即0b0 和 0b10,分别对应 ADC0 和 ADC1。 您的初始化代码也对应于 ADC0 和 ADC1。 Adc_Sar_Ip_Init(ADCHWUNIT_0_BOARD_INITPERIPHERALS_INSTANCE,&AdcHwUnit_0_BOARD_InitPeripherals); Adc_Sar_Ip_Init(ADCHWUNIT_1_BOARD_INITPERIPHERALS_INSTANCE,&AdcHwUnit_1_BOARD_InitPeripherals);   adchwunit_0_board_initperipherals_instance = 0; adchwunit_1_board_initperipherals_instance = 1; ” 问题在于,要初始化 ADC3,必须在实例中使用 0 调用 init 函数:   /* 启动 ADC3*/ Adc_Sar_Ip_Init(0,&AdcHwUnit_0);   ” 这完全是错误的,我之前的回答是正确的。 应设置"Adc 目标掩码" = 0b100,即 adc3,然后调用"Adc_Sar_Ip_Init(3,&AdcHwUnit_0);" Re: S32K364: ADC conversions using EMIOS, BCTU and DMA 你好@Senlent、 我同意你的看法,我的解决方案虽然不明确,但很有效。 我提醒你,微控制器是 S32K364,只有下面的红色: 附上两份记录,一份是我的解决方案,一份是您的建议。 我的建议是它可以工作(矢量 ADC_3_Raw[]...ADC_5_Raw[] 的值是正确的)。 根据您的建议,执行将在HardFault_Handler中进行。 敬请期待,弗朗切斯科。 Re: S32K364: ADC conversions using EMIOS, BCTU and DMA 你好@francescovico 你的解决方案是正确的。 这是我的误解;我不知道 S32K36x 采用了不同的架构。
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MCXW716C 在高温下运行 你好 我使用的是 #mcxw71,根据数据表,其工作温度范围为 -40 °C 至 +125 °C。我对无线电和 CAN PHY 都进行了测试,但无法在大约 85 °C 以上实现稳定运行。微控制器似乎进入保护模式,或以其他方式限制其功能。 我还注意到,在 SDK 应用程序接口中有向 NBU 发送内部温度的函数。 我的问题是:NBU 是否需要温度信息来进行热调节或维持系统正常运行? 一般来说,是否需要任何特定的程序(配置、校准、所需的 API 调用等)来确保 MCXW716C 在最高额定温度下正常运行? 提前感谢您的帮助。 开发板 Re: MCXW716C operation at high temperature 你好,希望你一切都好。 您使用的是 FRDM 板还是自定义板?您进行了哪些测试,观察到的行为是什么? 能否请您分享一下您所指的是哪些 SDK API?您是否正在研究一个具体的示例或应用? 致以最诚挚的问候, Ana Sofia。 Re: MCXW716C operation at high temperature 你好,@sofiaurueta、 我正在使用参考编号为 #MCXW716CMFTAT 的自定义板。我将解释我的测试和配置 我使用 MCXW716CMFTAT 为无线应用设计了 PCB。我已创建了软件,并使用名为"connectivity_test" 的示例程序中的逻辑来使用无线电协议。 我使用的是 SDK SDK_2.X_MCXW716CxxxA 版本 25.09.00。 两个董事会正在一起工作。我已经实施了所有模块。测试时,我使用了热风枪,温度为 80 °C。15 秒后,微控制器停止工作;它似乎被阻塞了,GPIO 被锁定,通信总线停止发送数据,30 秒后,温度下降后,微控制器恢复正常运行。 因此,我研究了监测温度的功能,以了解问题所在。我使用了 SDK 中 fwk_platform_sensors 文件中的 PLATFORM_StartTemperatureMonitor() 函数。 我的目标是知道微控制器堵塞的确切温度,而令人惊讶的是,这解决了问题。现在,我可以在 +120 °C 的温度下进行测试,微控制器工作正常。我甚至尝试删除该功能,以确保问题是否与软件有关,结果问题又出现了。 您能给我更多的解释吗?使用该功能读取温度是否会将数据分发到不同的内核并调整某些参数? Re: MCXW716C operation at high temperature 你好 您能否确认使用 FRDM 板时是否也会出现这种行为?在未作任何修改的情况下运行 connectivity_test 示例时是否会出现问题,调用 PLATFORM_StartTemperatureMonitor 函数后问题是否会改变? Ana Sofia。
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MIMXRT1180-EVK の EtherCAT デモ こんにちは、 UG10322 UG10322: ICEツールを使用したEtherCATのOOBEガイド | NXP Semiconductorsに記載されているEtherCATデモを試すために、MIMXRT1180-EVK評価ボードを使用しています。 i.MX RT1180 評価キット | NXP Semiconductorsから Ethercat 評価バイナリをダウンロードしました。 私はすべての手順を注意深く実行しました。上記のドキュメントに記載されている構成でバイナリを正常にフラッシュし、ICE ツールを起動できました。 ただし、GUI でネットワーク インターフェースを選択し、Ethercat を有効にしようとすると、「有効にできませんでした」というメッセージが表示されます。インターフェースをスキャンすると、「デバイスが見つかりません」と表示されます 私は Windows ノートPCを使用しており、USB 3-ギガビット イーサネット アダプターを使用して ETH0 と ETH4 にコネクテッドしていますが、それ以外は問題なく動作しています (他の作業にも使用しています)。 この問題を解決するためにご協力いただければ幸いです。 また、この EtherCat Eval バイナリ :goal_nxp_evkmimxrt1180_rtos_flash_boot.bin のソースを教えていただけますか?SDK をチェックしたところ、EtherCat の例がいくつか見つかりましたが、これらの例のいずれかが上記のバイナリに対応しているかどうかはわかりません。 よろしくお願いします。 よろしくお願いします。 PNC Re: EtherCAT demo on MIMXRT1180-EVK こんにちは@pnc お問い合わせいただきありがとうございます UG10332 の最初のリリースですでにいくつかの問題が見つかりました (更新する予定です) 同僚が作成した内部レポートを以下に掲載します。お役に立てれば幸いです。 5 ページのステップ 12 では、RT1180-EVK コンソールは USB_OTG1 ではなく MCU-Link USB である必要があります。また、Note の場合、EEPROM と呼ばれるセクションはないようです。 私の場合、セクション 5.4 のステップ 11 以降では EtherCAT インターフェースのフォント カラーは赤にならず、ステップ 15 以降でのみ赤に変わります。 24 ページの表 1 と表 2 では、表にリストされているマップされたオブジェクトが ICE ツールの実際の表示と一致していません。 私の側では、セクション 5.4 の手順 9 の前に、ホスト PC の IP アドレスを構成する必要があります。そうしないと、内部エラーが報告されます。 さらに問題が発生した場合や、関連する質問がある場合はお知らせください。 ではごきげんよう、 ディエゴ Re: EtherCAT demo on MIMXRT1180-EVK ちなみに、EtherCAST デモには特別なジャンパー設定が必要ですか?上記のドキュメントではこの点については何も言及されていません。 Re: EtherCAT demo on MIMXRT1180-EVK こんにちは、ディエゴ。 ご返信ありがとうございます。しかし、これらの問題はすでに解決済みですので、役に立ちませんでした。 とにかく、私は方針を変えました。つまり、事前にビルドされたイメージを使用する代わりに、AN14155 ユーザーガイド (i.MX RT1180 EtherCAT を BECKOFF TwinCAT3 および SSC ツール Rev. と共に使用) を使用して、SDK から ecat/digital_io の例をビルドして実行しようとしています。1.0) ここでも同じ問題に直面しています。例をビルド、フラッシュ、実行できます (CM33 と CM7 の両方)。digitial_ip.cのメインループにprintfを入れました。実際に実行されていることを確認します。 しかし、AN14155 のセクション 5.1.8 で行き詰まっています。TwinCAT を使用して EtherCAT デバイスのスキャンを実行すると、「I/O デバイスが見つかりません」と表示されます。イーサネット ケーブルを J28 と J32 の両方に接続してみました。 私は次のジャンパー設定を行いました: J63、J73、J72、J65 を 1-2 短絡位置 (デフォルト位置ではない) に移動しました Ecat に他のジャンパー設定や他の HW 設定が必要かどうかはわかりません。これら以外のすべてのジャンパーはデフォルトのポジショニング(箱から出した時の状態)にあります。私が行った他の唯一のジャンパー変更は、Segger プローブ (JP5 を短絡) を使用するためでした。 ちなみに、ICE ツールの実行も試してみました。以前と同じ状況です。 何かご意見があれば教えていただけると幸いです よろしくお願いします。 よろしくお願いします。 PNC Re: EtherCAT demo on MIMXRT1180-EVK EVK ユーザー マニュアル UM12021 を注意深く読み直したところ、ジャンパーを間違えたようです。私が今持っているものは次のとおりです。 J63とJ65:デフォルトで2-3が短絡 J73とJ72: デフォルト以外の1-2ショート ただし、上記の変更を行った後でもまだ動作しません。 また、36 ページのこの行が関連しているかどうかはわかりません。「ECAT 信号と FLEXSPI2 信号間の多重化は、抵抗器の再構成によって実装されます。」デフォルトでは、FLEXSPI2 接続は有効になっています。 これについても何かする必要があるでしょうか?もしSOなら、何ですか? ちなみに、このEVKユーザーマニュアルは本当に読みにくいです。EVK で ECAT を動作させるためにユーザーが行う必要があることを、簡潔かつ明確に 1 か所にまとめておくべきだと思います。散らばった混乱を招く情報の代わりに、シンプルに「EVK で ECAT を有効にするには、これらのジャンパー設定を行ってください...」とだけ書かれています。 Re: EtherCAT demo on MIMXRT1180-EVK こんにちは、ディエゴ。 今朝すべてを再起動すると、デバイスのスキャンが機能し始めました。昨日の夕方にジャンパーに加えた変更が効果を発揮したようです。 しかし、デバイス1をスキャンすると、セクション5.1.9で説明した「ボックス1」が表示されません。SO、スレーブが検出されないようです。Wireshark でも EtherCAT に関連するトラフィックは表示されません。さらにデバッグ中ですが、何かヒントがあれば、ぜひ教えてください。
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No SCL/SDA Signals when using I2C Send as Master I have set up LPI2C1 as Master but get no outputs when attempting to send. I have pull-up resistors and the signals are connected to 1 slave device only. Please see below. What are some possible reasons for this problem? Initialization: /* set I2C1 interrupt */ IntCtrl_Ip_EnableIrq(LPI2C1_IRQn); IntCtrl_Ip_InstallHandler(LPI2C1_IRQn, LPI2C1_Master_Slave_IRQHandler, NULL_PTR); /* Init lpi2c in master mode */ Lpi2c_Ip_MasterInit(LPI2C_CHANNEL_0, &I2c_Lpi2cMasterChannel0); Send data: boolean I2C_read_fault_status(uint8 *rx_buffer) { TxBuff[0] = 0x78;   if (LPI2C_IP_SUCCESS_STATUS == Lpi2c_Ip_MasterSendData(LPI2C_CHANNEL_0, (uint8 *)&TxBuff[0], 1U, FALSE)) { LM5171_data_ptr = rx_buffer; LM5171_data_len = 1; return TRUE; } Re: No SCL/SDA Signals when using I2C Send as Master We are using the S32K324 part with the S32DS3.5 debugger and a Multilink FX Universal interface. Our RTD version is 4.00 HF02. There is not an option in the LPI2C peripheral to enable debugging (like there is in other peripherals). I did not think to set the option manually! When I set the DBGEN bit, the signals work as expected. Re: No SCL/SDA Signals when using I2C Send as Master What kind of debug mode you are using? specific debugger or on board debugger? Re: No SCL/SDA Signals when using I2C Send as Master Hi@phil_b Could you tell us the part number you're using? Also, the RTD version is ? If you're using S32K3, could you please try to set this bit and have a try again. Re: No SCL/SDA Signals when using I2C Send as Master The signals were missing while I was running in Debug mode. When I removed the debug connector, the signals were there! Is there a way to see the signals while in Debug mode?
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How to change i.MX8MP kernel boot logo and yocto project splashimage to my own custom logo and image Dear NXP Support team, I would like to change all the logo and images that are displayed from the beginning of the U-Boot. When a hdmi monitor is connected to the board, I can see 4 penguins and yocto project image with a progress bar. I would like to change those images to my own custom images. Please guide me how I can make those changes. Please elaborate about the explanation if you can since I'm new to yocto linux imx. Thank you. Re: How to change i.MX8MP kernel boot logo and yocto project splashimage to my own custom logo and i Hi,@Rita_Wan Based on the 8MP_LVDS_patch, I was able to get the display working in U-Boot successfully. But when I added the kernel part, I couldn’t get a seamless transition between U-Boot and the kernel display. The kernel side shows abnormal behavior — the screen flickers — while the display in U-Boot is totally fine. Could you give me some suggestions on this? What could be causing the issue? Re: How to change i.MX8MP kernel boot logo and yocto project splashimage to my own custom logo and i Hi @bych , I found the easy way for you to try: Linux Kernel Logo Use the netpbm tool to convert png images to ppm images. $ pngtopnm linux_logo.png > linux_logo.pnm $ pnmquant 224 linux_logo.pnm > linux_logo_clut224.pnm $ pnmtoplainpnm linux_logo_clut224.pnm > logo_linux_clut224.ppm   Put the converted ppm file into the drivers/video/logo/ directory of the kernel, and replace the logo_linux_clut224.ppm file. Re-compile the kernel, and the logo will be replaced with a new picture. You can try it . Wish you have a nice day Bset Regards Rita Re: How to change i.MX8MP kernel boot logo and yocto project splashimage to my own custom logo and i I have my own custom board that is based on i.MX8M Plus Processor, but the custom board is designed as same as i.MX8M Plus EVK board. I've successfully booted up my board and the display via HDMI looks fine. But I just want change the boot logo (4 penguins) and splash screen (yocto project logo with progress bar) to my own custom logo. You provided the patches but I do not know how to apply those patches to the u-boot or kernel. Please kindly advise how I use and apply those patches. Thank you. Re: How to change i.MX8MP kernel boot logo and yocto project splashimage to my own custom logo and i What is the board in your hand? nxp board, or the board you design yourself, have you make your board boot up and display already? Re: How to change i.MX8MP kernel boot logo and yocto project splashimage to my own custom logo and i Could you kindly advise how I can apply those patches? I've never done applying patches before... Re: How to change i.MX8MP kernel boot logo and yocto project splashimage to my own custom logo and i You can refer to the patches realized in the LVDS for the u-boot and kernel, the methods are the almost the same. i.MX 8MP LVDS seamless display (连续显示) between U-boot and Kernel - NXP Community
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文本区域错误问题 我创建了几个 Textarea 元器件。当我使用键盘在其中一个输入框中输入内容,然后点击"Finish" 时,键盘会自动切换到另一个文本区进行进一步操作。如何解决这个问题?视频地址为https://github.com/monkeyhorse/guiguider.git Re: Textarea bug issue 嗨,@monkeyhorse、 谢谢你的澄清。我发现这个问题似乎是在模拟过程中出现的。是否只有在模拟时才会出现这种情况?或者在板上运行 GUI 时也是如此? Re: Textarea bug issue @EdwinHz是的,我使用的是最新版本。 Re: Textarea bug issue 嗨,@monkeyhorse、 感谢您的更新。您使用的是哪个版本的 GUI Guider/LVGL?它们是最新的吗(GUI Guider 1.9.1 和 LVGL 9.2.1)? Re: Textarea bug issue 现在我发现,setup_scr_screen.c 中 Textarea 的创建顺序是造成这个问题的原因,但我仍然不知道如何解决这个问题。
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AN4581 的最新版本 您好, 从 2020 年起有 AN4581(在支持 HABv4 的设备上进行 i.MX 安全启动)修订版 4: https://de.scribd.com/document/811030804/AN4581 然而,如果我搜索贵公司的网站或互联网,我只能找到 2012 年或 2018 年的过时版本。 能否告诉我在哪里可以找到AN4581 的最新修订版? 谢谢! Re: Latest version of AN4581 感谢您的支持。 我可以在这里下载 2020 年版本: https://www.readkong.com/page/an4581-i-mx-secure-boot-on-habv4-supported-devices-2622907 旧版本可在此处获取,无需 NDA : https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/imx-processors/225997/1/AN4581.pdf(2012) https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/imx-processors/194321/1/AN4581_2018.pdf(2018) Re: Latest version of AN4581 这个用于安全启动的AN是机密的,您需要与恩智浦签署保密协议。 最好从https://support.nxp.com/s/?language=en_US创建内部票据
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添加模块后"TM_TS_T40D34M10I0R0" of S32K3xx_SBC_FS23_R21-11_1.0.0_D2402EB 报告错误 专家们好 我的客户正在开发基于 FS23+S32K3 的项目。 他们安装了S32K3xx_SBC_FS23_R21-11_1.0.0_D2402.exe和SW32K3_S32M27x_RTD_R21 -11 _4.0.0_D2311.exe。 但在 EBTresos 中添加模块" TM_TS_T40D34M10I0R0"(C:\NXP\S32K3xx_SBC_FS23_R21-11_1.0.0\eclipse\plugins\TM_TS_T40D34M10I0R0) 会导致错误: Module "TM_TS_T40D34M10I0R0" (defined in plugin "TM_TS_T40D34M10I0R0") defines the schema file "config/TM.xdm" which cannot be found (if the file is signed or crypted, it must be referenced in META-INF\CRYPTOMANIFEST.MF). The manager of a schema of configuration extension "TM_TS_T40D34M10I0R0" of plugin "TM_TS_T40D34M10I0R0" cannot be created 我不知道 TM 在 S32K3xx_SBC_FS23_R21-11_1.0.0_D2402.exe 中做了什么。请介绍一下,并告诉我如何使用。 提前感谢您的帮助! 最诚挚的问候, Robin 以下是客户信息: Contact Name 超 夏 Email (Contact) [email protected] 公司 CHERY AUTOMOBILE CO. AA SW - 外部设备 优先级:中等 Re: After add Module "TM_TS_T40D34M10I0R0" of S32K3xx_SBC_FS23_R21-11_1.0.0_D2402 EB repor 感谢您的解释。我想现在已经很清楚了。 让我来向客户解释一下。 Re: After add Module "TM_TS_T40D34M10I0R0" of S32K3xx_SBC_FS23_R21-11_1.0.0_D2402 EB repor 我同意。否则,关于 Tm 的其他一切现在都清楚了吗? Re: After add Module "TM_TS_T40D34M10I0R0" of S32K3xx_SBC_FS23_R21-11_1.0.0_D2402 EB repor @Ondřej_Vácha 我在想,如果我们没有 TM.xdm,那么就应该将其从 plugin.xml 中排除,以避免混淆,对吗? Re: After add Module "TM_TS_T40D34M10I0R0" of S32K3xx_SBC_FS23_R21-11_1.0.0_D2402 EB repor 您好,TM 驱动程序目前无法插入 EBT,因为它没有任何配置。因此,这不是一个错误。TM 与 CanTrcv 驱动程序共享,以符合 SWS_CanTrcv_00230。没有必要在 EBT 中加入 TM,在版本项目时,只需要将其中包含的文件包含在项目中。 Tm 包含用于时间延迟的 API。 根据共享的截图,您正试图编译 cantrcv_fs23 示例。我也试过,Tm 模块不一定要在那里。 Re: After add Module "TM_TS_T40D34M10I0R0" of S32K3xx_SBC_FS23_R21-11_1.0.0_D2402 EB repor 嗨,拉杜、 以下是客户信息: 联系人姓名 超夏 电子邮件(联系人) [email protected] 公司 CHERY AUTOMOBILE CO. 此致敬礼, Robin Re: After add Module "TM_TS_T40D34M10I0R0" of S32K3xx_SBC_FS23_R21-11_1.0.0_D2402 EB repor 你好,@Robin_Shen, 谁是客户? Re: After add Module "TM_TS_T40D34M10I0R0" of S32K3xx_SBC_FS23_R21-11_1.0.0_D2402 EB repor Hi Cuong、 谢谢您的答复。 由于 FS23 SBC AUTOSAR R21-11 版本 1.0.0 已经是 FS23 的最新版本,所以让我们等待 AA SW-Exter nal 设备的同事来处理吧。 此致敬礼, Robin Re: After add Module "TM_TS_T40D34M10I0R0" of S32K3xx_SBC_FS23_R21-11_1.0.0_D2402 EB repor 嗨 @Robin_Shen 当 " config/tm.xdm " 不包含在 CRYPTOMANIFEST.MF 文件中时,这看起来像 SBC 代码包,软件包中的错误。我检查了一下,在 CRYPTOMANIFEST.MF 中找不到这个文件。 您能否尝试使用另一个更新版本的 SBC,看看问题是否得到了解决。 我将移除标签 " RTD ",因为它与 SBC-AA SW-外部设备有关
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[RTD600 IP] S32K312-EVB Lpuart 中断回显 这个简单的示例演示了如何在S32K312EVB-Q172和S32K312MINI-EVB上使用LPUART模块配置和处理UART中断。它设置UART回调函数,并以单字节模式启动接收。每接收一个字节,缓冲区都会使用  Lpuart_Uart_Ip_SetRxBuffer() 进行更新;如果检测到换行符( '\n' ),则将设置接收标志以通知主循环。 当发生  LPUART_UART_IP_EVENT_END_TRANSFER  事件时,将通过  Lpuart_Uart_Ip_AsyncReceive() 重新启用接收。 注意:只执行基本的事件处理操作;仅确认其他UART事件,但不会进行处理。 此示例使用 LPUART实例6,通过USB端口(EVB上的J40和MINI EVB上的J9)实现串行通信。 ------------------------------------------------------------------------------ *测试硬件:S32K312EVB-Q172和S32K312MINI-EVB *MCU:S32K312 *IDE:S32DS3.6.2 *RTD版本:6.0.0 *调试器:PE Micro *目标:internal_FLASH  ------------------------------------------------------------------------------ 运行示例: 1. 在PC上为串行设备打开串行终端,并设置以下参数:   波特率为115200 无校验  停止位为1 无流量控制  如果您使用TeraTerm,请确保发送设置配置为 LF(换行) ,以便在按下回车键时正确发送换行符。 2. 构建并运行示例。 测试结果:   NXP 提供的任何支持、信息和技术(“材料”)均按“现状”提供,不附带任何明示或暗示的保证,且 NXP 在适用法律允许的最大范围内,否认与材料相关的所有直接或间接责任和损害。NXP 对任何与应用或产品设计相关的协助不承担任何责任。材料仅可用于与 NXP 产品相关联。NXP 可以不受限制地使用您对材料提供的任何反馈。
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iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP For iMX6DQ, there are two IPUs, so they can support up to 4 cameras at the same time. But the default BSP can only support up to two cameras at the same time. The attached patch can make the BSP support up to 4 cameras based on 3.10.53 GA 1.1.0 BSP.   The 4 cameras can be: - 1xCSI, 3xMIPI - 2xCSI, 2xMIPI - 4xMIPI   For 4xMIPI case, the four cameras should be combined on the single MIPI CSI2 interface, and each camera data should be transfered on a mipi virtual channel.   In this patch, we given the example driver for Maxim MAX9286, it was verified working on iMX6DQ SabreAuto board. The input to MAX9286 is four 720P30 cameras. The verified camera boards:     (1) Onsemi AR0140+AP0101+MAX9271 boards.     (2) OmniVision OV10635+MAX9271 boards.   The MIPI CSI2 CVBS camera surround view solution can be found at: iMX6DQ ISL79985/79987 MIPI CSI2 CVBS camera surround view solution for Linux BSP The MIPI CSI2 CVBS HD camera surround view solution can be found at: iMX6DQ TP2854 MIPI CSI2 720P CVBS camera surround view solution for Linux BSP   The kernel patches: 0001-IPU-update-IPU-capture-driver-to-support-up-to-four-.patch      Updated IPU common code to support up to four cameras.   0002-Add-Max9286-support-on-SabreAuto-board-which-can-sup.patch      MAX9286 driver, it includes MAX9271, AP0101 and AR0140 drivers.   0003-Remove-the-page-size-align-requirement-for-v4l2-capt.patch      With this patch, the mxc_v4l2_tvin test application can use overlay framebuffer as V4l2 capture buffer directly.   0004-Max9286-skip-AP0101-camera-re-initialization.patch      If the camera board's power had been kept after initialized, this patch will bypass the re-initialization to reduce the start up time.   0005-Max9286-set-I2C-speed-to-400Kbps.patch     Set I2C to 400Kbps to reduce the AP0101+AR0140 initialization time.   0006-Max9286-add-retry-for-MAX9271-I2C-access.patch     Added retry for MAX9271 I2C access.   0007-Max9286-Add-support-for-OV10635-camera.patch     Updated code for OV10635 camera.   0008-Max9286-support-auto-detect-camera-number.patch     Make the Max9286 driver can detect the camera number automatically.     How to builld the kernel with MAX9286 support:       make imx_v7_defconfig       make menuconfig (In this command, you should select the MAX9286 driver:             Device Drivers  --->                   <*> Multimedia support  --->                         [*]   V4L platform devices  --->                               <*>   MXC Video For Linux Video Capture                                       MXC Camera/V4L2 PRP Features support  --->                                           <*>Maxim max9286 GMSL Deserializer Input support                                               Select Camera Sensor (OmniVision OV10635 camera sensor)  // Or (Onsemi AP0101 and AR0140 camera sensor)                                           <*>mxc VADC support                                           <*>Select Overlay Rounting (Queue ipu device for overlay library)                                           <*>Pre-processor Encoder library                                           <*>IPU CSI Encoder library)       make zImage       make dtbs   The built out image file:       arch/arm/boot/dts/imx6q-sabreauto.dtb       arch/arm/boot/zImage   "mxc_v4l2_tvin_max9286.tar.gz" is the test application, test command to capture the four cameras and render on 1080P HDMI display: /mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 1 -x 0 -g2d & /mxc_v4l2_tvin.out -ol 960 -ot 0 -ow 960 -oh 540 -d 1 -x 1 -g2d & /mxc_v4l2_tvin.out -ol 0 -ot 540 -ow 960 -oh 540 -d 1 -x 2 -g2d & /mxc_v4l2_tvin.out -ol 960 -ot 540 -ow 960 -oh 540 -d 1 -x 3 -g2d &   Some hardware check point on AR0140+AP0101+MAX9271 camera board (Please get MAX9286 and OV10635 schematics from Maxim): 1. In this patch, MAX9286's I2C address is 0x4D, so ADD0 and ADD1 should be connected to high. AP0101's I2C address is 0xBA, so SADDR should be connected to high.   2. AP0101's DOUT0~DOUT7 should be connected to MAX9271's DIN7~DIN0, the order should be switched, MSB connected to LSB.   3. MAX9271's GPO pin should be connected to AP0101's FRAME_SYNC pin. The pull down resistance on FRAME_SYNC pin should not be 0 ohm.   Some known limitation: 1. AP0101's VSYNC invalid time, last video line's HSYNC to VSYNC porch's max value is 255 pixel clocks, it is not enough for MAX9286 to generate the Frame End MIPI packets for each camera. So in order to let iMX6DQ to capture 1280x720 video for each camera, we had let AP0101 output 1280*724 frame size, and iMX6 will only capture 720 lines, the remained video data and Frame End will be ignored. This solution will not impact the function, but there will be "Error matching Frame Start with Frame End for Virtual Channel x" error reported from iMX6 MIPI_CSI_ERR1 register. Maxim suggested to use MAX96705 to relace the MAX9271, it can delay the VSYNC invalid time, then the MIPI error will be fixed.     2015-11-17 update: Updated for OV10635 camera support. File: L3.10.53_GA1.1.0_MAX9286_Surroundview_Patch_2015-11-17.zip   2015-12-04 update: File: L3.10.53_GA1.1.0_MAX9286_Surroundview_Patch_2015-12-04.zip Added patch 0009-Max9286-updated-PCLK-edge-setting-for-OV10635.patch to correct the OV10635 PCLK edge setting     2016-03-07 update: File L3.14.38_GA_MAX9286_Surroundview_Patch_2016-03-07.zip Added kernel patch for L3.14.38 GA 1.1.0 BSP.   2016-07-26 update: Files: L3.10.53_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip; L3.14.38_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip; L3.14.52_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip. Added gstreamer support. Added MAX96705 support. Added patch for L3.14.52_GA1.1.0.   2017-12-11 update: Added CVBS surround view link: iMX6DQ TP2854 MIPI CSI2 720P CVBS camera surround view solution for Linux BSP 2021-04-26 update: Some customer reported, when system loading is heavy, sometimes, some camera will flicker left and right. It is caused by SFMC FIFO data lost. The original patch used IDMAC 0 and IDMAC 1 for two cameras on one IPU, this is not the best setting.  IDMAC 1 is fixed to use 1/4 SMFC FIFO and it will cause IDMAC 0 to use 1/4 SMFC FIFO too. And another 1/2 of SMFC FIFO can't be used in this case. Some code update to improve it: For each IPU, please use IDMAC 0 and IDMAC 2 to capture the two cameras. This needs change the hard coding in "drivers\media\platform\mxc\capture\ipu_csi_enc.c", "CSI_MEM1" and "IPU_IRQ_CSI1_OUT_EOF" should be changed to "CSI_MEM2" and "IPU_IRQ_CSI2_OUT_EOF". In this case, all SMFC FIFO can be used. And in "ipu_common.c", function ipu_probe(), the followed code should be changed to make IDMAC2 use high priority too. /* Set sync refresh channels and CSI->mem channel as high priority */ - ipu_idmac_write(ipu, 0x18800003L, IDMAC_CHA_PRI(0)); + ipu_idmac_write(ipu, 0x1880000FL, IDMAC_CHA_PRI(0)); Graphics & Display i.MX6Dual i.MX6Quad Linux Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li,   Sorry for the confusion. I assumed that below single pipe which causes saw-tooth issue does not render all cameras.   #gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video2 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false   I am studying about gstreamer to draw 4 cameras to one target buffer.   Thanks and best regards. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP As I explained, this is the render issue, for 60fps display, the PAN display can only be up to 60fps, but for 4x720P30 camera, if you render them alone, there are total 120fps, so it can't work correctly. You need combine the 4 cameras together then render them once. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The log shows there is no enough memory, I think you need reserve more memory for GPU. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, The following two pipelines work normally when run seperately. gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video0 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false  gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video1 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false  However, each pipelines given below (especially with video3) cause sawtooth issue given as attached gif, even if they run seperately. gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video2 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false  gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video3 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false  While twin app does not create any problem for each camera. While using gstreamer, what can cause this situation? Is it about gstreamer patch or IPU2? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP For gstreamer, when you render 4 cameras together, it needs combine the buffer 4 times and swap the buffer 4 times, this will impact the performance. For tvin test application, it just renders the cameras to target framebuffer directly, no buffer swap, this can cause sawtooth issue. The best way for rendering: draw the 4 cameras to one target buffer, then swap it to frambuffer in one time. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, I am using Imx6qp. With following commands, the system is working properly. WIDTH=640 HEIGHT=240 ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow ${WIDTH} -oh ${HEIGHT} -d 0 -x 0 -g2d & ./mxc_v4l2_tvin.out -ol ${WIDTH} -ot 0 -ow ${WIDTH} -oh ${HEIGHT} -d 0 -x 1 -g2d & ./mxc_v4l2_tvin.out -ol 0 -ot ${HEIGHT} -ow ${WIDTH} -oh ${HEIGHT} -d 0 -x 2 -g2d & ./mxc_v4l2_tvin.out -ol ${WIDTH} -ot ${HEIGHT} -ow ${WIDTH} -oh ${HEIGHT} -d 0 -x 3 -g2d & When I try to use gstreamer with the following pipelines, third and forth cameras are jittering and scrolling. WINDOW1="window-x-coord=0 window-y-coord=0 window-width=${WIDTH} window-height=${HEIGHT}" WINDOW2="window-x-coord=${WIDTH} window-y-coord=0 window-width=${WIDTH} window-height=${HEIGHT}" WINDOW3="window-x-coord=0 window-y-coord=${HEIGHT} window-width=${WIDTH} window-height=${HEIGHT}" WINDOW4="window-x-coord=${WIDTH} window-y-coord=${HEIGHT} window-width=${WIDTH} window-height=${HEIGHT}" gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video0 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false $WINDOW1 & gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video1 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false $WINDOW2 & gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video2 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false $WINDOW3 & gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video3 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false $WINDOW4 & v4l applications are working properly but gstreamer causes the problem seen above. Do you have any idea about this problem? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Excuse me, can I have another patch of Linux 3.14.38? That link failed Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thanks a lot! Qiang Li.  Understand now. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP 2 x MIPI CSI2 means two MIPI virtual channels(VC1 and VC2) on one physical MIPI CSI2 interface. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thanks Qiang! So can we have 2 x BT656 and 2 x MIPI CSI2 work together?  if yes , how many virtual channels(1~4) can each of the 2x MIPI CSI2 have?  Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Each IPU has two CSI modules, their input can be parallel CSI interface or MIPI CSI2 virtual channel. And for iMX6DQ, it can support up to two parallel CSI interfaces (BT656 interface). Both of them can work at the same time. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Dear Qiang Li,         Sorry, I am some confused, as you said, Imx6Q can support up to 4 cameras,  The 4 cameras can be: - 1xCSI, 3xMIPI - 2xCSI, 2xMIPI - 4xMIPI what is the meaning of  1x CSI and 3x MIPI, etc? usually we say MIPI CSI-2 together,  CSI is the same thing as MIPI CSI-2? BTW, how many BT656 interfaces can be directly supported by Imx6Q simultaneously?      Many thanks~~ Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi z dq, Did you solve the instability problem? I got sensor clk error when connecting more than 2 cameras although MAX96705's GPO pin are connected to AP0101's FRAME_SYNC pin.  I rarely got the error with 2 cameras . 28.463487] max9286_mipi 1-006a: ap0101_initialize: AP0101 hasn't been found, reg = 0x0, index = 4. [ 28.472625] max9286_mipi 1-006a: max9286_write_reg:write reg error:reg=34,val=b6 [ 28.673495] max9286_mipi 1-006a: max9271_write_reg:write reg error:reg= 4,val=83 [ 28.783553] max9286_mipi 1-006a: max9286_write_reg:write reg error:reg=15,val=9b [ 29.403469] mipi csi2 can not receive sensor clk! MIPI_CSI_PHY_STATE = 0x6f0. Regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Qiang_FSL‌ Hi, Liqiang Could you please tell me what's the fps value if we run the surroundview(4 camera 1280x720) application base your patch and  Imx6d processor? whether he DDR bandwidth is enough? thank you! 以下中文: ----------------- 如果使用这个patch并跑在imx6d的板子上,目前surroundview(基于4个720p的摄像头)能达到多少个fps, 内存带宽够用吗?谢谢! --------------- Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The color issue happens between MAX96705 and MAX9286 mapping, so PC USB has no use for reference. There are several kind of mapping order on data line, 8 bits/10bits, MSB/LSB. You need fine tuning it based on the OV10635 and MAX96705 connecting. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP This had been explained, g2d_blit target buffer should be the current displayed framebuffer: " The current mxc_v4l2_tvin demo application will render camera video to current frame buffer directly, so there will be tearing issue. For real use case, you need use multi-buffers, for example, the virtual framebuffer size is 3 times of real display buffer, and each time only one buffer is showing on display, so when buffer 1 is showing on display, you can draw combined camera videos into buffer 2, after finished drawing, call ioctl FBIOPAN_DISPLAY to show buffer 2 on screen. " Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi,liqiang I have solve the color fault problem, by swap data line using ov10635 register 0x4709, so thank you very much!! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi, liqiang In my local environment which using immunity mode, and do data line swap according to your suggestion, which causes image color change but problem NOT solved. (帖子里好像帖不了附件,单独像您提了一个问题。) By the way, I am using leopardimaging LI-USB30-OV10635-SER camera as following: https://www.leopardimaging.com/uploads/LI-OV10635-SER_datasheet.pdf It works well when connecting to PC by USB 3.0. please help check, thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li: I use the IMX6Q core board. Now when using both GC2000 and GC320, there are occasional image tears on the screen display. The specific implementation is like this:    Get the real-time video data of the 4-way camera, display it on the GPU and display it in real time on the lvds screen. At the same time, the 4 channels of video are called by g2d to call the g2g_blit function for resize. The image of each frame is 720P resize to 640*480, and then synthesized into one frame. Image so that 4 channels of video can be displayed in one frame.the spliced video is not display on the screen and saved directly into the video,but now it is found that the video displayed by the GPU rendering in real time will be torn. Playback of the saved video also found that the image has a tearing problem, affecting the viewing effect.    If you test the GPU rendering display separately, or the video of 4 channels of video is saved by G2D synthesis, there will be no image tearing problem. But as long as these two functions are combined into one project, the problem of image tearing will occur when displaying and the saving  video. 1. Can I use the GC2000 of IMX6 and GC320 at the same time? Is there a problem with GPU resource preemption? 2. Is there a problem with data conflicts in the GPU? I have already made the GC2000 and GC320 get data that cannot be bufed, but after the two functions are integrated, there will still be a problem of video tearing. I have been plagued by this problem for several weeks, and there has been no good solution. I am very anxious. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li: I use the IMX6Q core board. Now when using both GC2000 and GC320, there are occasional image tears on the screen display. The specific implementation is like this:    Get the real-time video data of the 4-way camera, display it on the GPU and display it in real time on the lvds screen. At the same time, the 4 channels of video are called by g2d to call the g2g_blit function for resize. The image of each frame is 720P resize to 640*480, and then synthesized into one frame. Image so that 4 channels of video can be displayed in one frame.the spliced video is not display on the screen and saved directly into the video,but now it is found that the video displayed by the GPU rendering in real time will be torn. Playback of the saved video also found that the image has a tearing problem, affecting the viewing effect.    If you test the GPU rendering display separately, or the video of 4 channels of video is saved by G2D synthesis, there will be no image tearing problem. But as long as these two functions are combined into one project, the problem of image tearing will occur when displaying and the saving  video. 1. Can I use the GC2000 of IMX6 and GC320 at the same time? Is there a problem with GPU resource preemption? 2. Is there a problem with data conflicts in the GPU? I have already made the GC2000 and GC320 get data that cannot be bufed, but after the two functions are integrated, there will still be a problem of video tearing. I have been plagued by this problem for several weeks, and there has been no good solution. I am very anxious. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, Sorry, maybe I didn't tell you my question clearly: 1.When I don't use -g2d,the display image is ok,no screen tearing. And the demo code really use FBIOPAN_DISPLAY to change display buffer ; 2.But when I use -g2d,screen tearing occurs. And the demo code use g2d_blit to display. So my question is how to resolve this problem? Thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP MAX96705 data line swap related code are in regiter 0x20~0x29; 0x30~0x39, you can find the discussion from old items here. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Qiang_FSL‌ 谢谢回复! >The ov10635 and max9286 driver captured frame format is YUYV, that means data in buffer is YUYV, if your application handles it other format, such as RGB565, you can >get such wrong color issue 上面图片是使用7yuv查看的结果,选择的格式是YUYV;图像颜色不对。所以不是显示格式不匹配的问题。 >Another thing should be paied attention to is that the MAX96705 can swap the data line order, if you set it to wrong, the color is wrong. 请问您知道驱动那里可以swap dataline order吗?谢谢! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The ov10635 and max9286 driver captured frame format is YUYV, that means data in buffer is YUYV, if your application handles it other format, such as RGB565, you can get such wrong color issue. Another thing should be paied attention to is that the MAX96705 can swap the data line order, if you set it to wrong, the color is wrong. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The current mxc_v4l2_tvin demo application will render camera video to current frame buffer directly, so there will be tearing issue. For real use case, you need use multi-buffers, for example, the virtual framebuffer size is 3 times of real display buffer, and each time only one buffer is showing on display, so when buffer 1 is showing on display, you can draw combined camera videos into buffer 2, after finished drawing, call ioctl FBIOPAN_DISPLAY to show buffer 2 on screen. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi,Liqiang Qiang_FSL‌ We are developing 4 camera surroundview application, based on imx6d/OV10635/MAX96705/MAX9286 boards, the patch we apply is L3.14.52_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip.  but the image color is NOT right as following: Can you please help ? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thans for your support! 1. You means that if input resolution and format is same as output,IPU will not deal with it. Right? 2. I still have another question,when I use command with -g2d argument,like this: root@imx6qsabresd:/# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 1280 -oh 720 -d 1 -x 0 -g2d,screen tearing occurs like the following picture: Could you  give me some advice?Thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The default IPU task doesn't support memory copy use case, input resolution and format is same as output. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, I meet following problem:when I use command without -g2d argument,it display following error, root@imx6qsabresd:/# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 1280 -oh 720 -d 1 -x 0 g_in_width = 1280, g_in_height = 720. fb_fix.id = DISP3 FG. fb: smem_start = 0x26700000, smem_len = 0xa8c000. fb: frame buffer size = 0x1c2000 bytes. fb: g_screen_info.xres = 1280, g_screen_info.yres = 720. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 1280. fb: g_display_height = 720. IPU_CHECK_TASK failed. But when I use the command ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 1280 -oh 719 -d 1 -x 0,the display image is OK. what's the impossible reason?Thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi, How to build the "Surround View Application" and its required packages in Yocto for i.MX6 QuadPLUS Hoping for a better guidance. Regards, Bala Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi,Qiang Li,谢谢回复,我们现在确实是镜头模组上挂了个flash,不过flash里面的固件是安森美的代理商提供的,他们确认已经工作在framesync模式,并且这个固件已经有别的客户在量产,我们读出AP0101的0xC88C,0xC88D,0xC88E寄存器,值分别是0x03,0x03,0x00,同时通过逻辑分析仪分析AP0101对AR0143的配置,感觉也应该是正确的;max9286这端已经确认生成的framesync信号有传输到AP0101,现在sensor出来的帧率是25fps; 请问针对25fps,max9286这边的配置应该如果修改,盼复,谢谢! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The FLASH ROM setting on camera module should follow the driver's setting. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi, VIDIOC_DQBUF  error dissappears when I changed the test hardware with a new set. I will work on the real reason but it seems to be a hardware issue. Although I sometimes  get VIDIOC_DQBUF and MIPI CLK errors; I can succesfully get the image with the below configuration. AR0140 sensor AP0101 ISP MAX96705 Serializer MAX9286 Deserializer Our designed daughter board between MAX9286 EVM and iMX6 board. We use kernel 4.1.15 and use below switch code: + max9271_write_reg(i, 0x20, 0x07); + max9271_write_reg(i, 0x21, 0x06); + max9271_write_reg(i, 0x22, 0x05); + max9271_write_reg(i, 0x23, 0x04); + max9271_write_reg(i, 0x24, 0x03); + max9271_write_reg(i, 0x25, 0x02); + max9271_write_reg(i, 0x26, 0x01); + max9271_write_reg(i, 0x27, 0x00); + + + max9271_write_reg(i, 0x30, 0x17); + max9271_write_reg(i, 0x31, 0x16); + max9271_write_reg(i, 0x32, 0x15); + max9271_write_reg(i, 0x33, 0x14); + max9271_write_reg(i, 0x34, 0x13); + max9271_write_reg(i, 0x35, 0x12); + max9271_write_reg(i, 0x36, 0x11); + max9271_write_reg(i, 0x37, 0x10); Thanks and best regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Ferhat, The camera I used doesn't need such switch, so no such code in patch, but I had show you the sample code, for detail setting on MAX96705 switch, you can check with Maxim. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, Could not find the switch code on patch files. Could you please update the links with your latest versions? Thanks and best regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi DONGON KIM, Some video combining chip can insert some bytes into each video line, then software can check these inserted data to identify the camera number. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The "0003-Add-Max9286-support-on-SabreAuto-board-which-can-sup.patch" files of the L3.14.38_GA andL3.14.52_GA patches have errors. +static int max9271_write_reg(int index, u8 reg, u8 val) +{ + s32 ret; + int retry, timeout = 10; + + max9286_data[0].i2c_client->addr = ADDR_MAX9271 + index; + for (retry = 0; retry < timeout; retry ++) { + ret = i2c_smbus_write_byte_data(max9286_data[0].i2c_client, reg, val); + if (val < 0) + msleep(5); + else + break; + } + + if (retry >= timeout) { + dev_info(&max9286_data[0].i2c_client->dev, + "%s:write reg error:reg=%2x,val=%2x\n", __func__, + reg, val); + return -1; + } + + return 0; +} Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thanks for your ans. Then, is there any example code for split the video from each virtual channel? If not, may I know how to read the raw packet data of mipi_csi? Thanks. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Ferhat, Yes, the switch code:  max9271_write_reg(0, 0x20, 0x09);  max9271_write_reg(0, 0x21, 0x08);  max9271_write_reg(0, 0x22, 0x07);  max9271_write_reg(0, 0x23, 0x06);  max9271_write_reg(0, 0x24, 0x05);  max9271_write_reg(0, 0x25, 0x04);  max9271_write_reg(0, 0x26, 0x03);  max9271_write_reg(0, 0x27, 0x02);  max9271_write_reg(0, 0x28, 0x01);  max9271_write_reg(0, 0x29, 0x00);  max9271_write_reg(0, 0x30, 0x19);  max9271_write_reg(0, 0x31, 0x18);  max9271_write_reg(0, 0x32, 0x17);  max9271_write_reg(0, 0x33, 0x16);  max9271_write_reg(0, 0x34, 0x15);  max9271_write_reg(0, 0x35, 0x14);  max9271_write_reg(0, 0x36, 0x13);  max9271_write_reg(0, 0x37, 0x12);  max9271_write_reg(0, 0x38, 0x11);  max9271_write_reg(0, 0x39, 0x10); Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang, Does the patch you provided include such swap settings on MAX96705? We use MAX96705 and do not do such swap by driver Thank you Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Ferhat, MAX9286's data mapping needs such MSB to LSB switch, if you are using MAX96705, it can do such swap by setting, but MAX9271 doesn't support it. And AP0101 doesn't dupport such swap too, so hardware should be modified. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Dongoh, The iMX8MQ can receive video with multiple virtual channels, but there is no hardware module to split the video from each virtual channel. That means you need use software to split, and the MIPI sender need insert some flag to identify the data for each virtual channel. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi, Qiang Li May I know the reason for i.MX8MQ can't support multiple virtual channel? According to the features and functional description of MIPI-CSI2 Controller on Reference Manual for i.MX8M Quad, i.MX8M seems to support multiple virtual channel.(13.6.1.1 and 13.6.3) Thanks. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Dear Qiang Li, I would like to know the reason of your hardware point stated as below. "2) AP0101's DOUT0~DOUT7 should be connected to MAX9271's DIN7~DIN0, the order should be switched, MSB connected to LSB" In our reference camera board supplied by Onsemi (MARS module) these pins are connected directly (DOUT0-DOUT7 to DIN0-DIN7). Is there any way to switch these connection by software? I could not find on datasheets of MAX96705 and AP0101. Thanks  Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP That means your patch porting has error, please check it. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Dear Qiang Li, we removed eeprom on the camera module and we switched it to host configuration mode by setting SPI-SDI pin to LOW. Thus it is initialized successfully by the driver of max9286 in the beginning, after kernel is loaded. Do you have any other suggestion for both "not a csi channel" and vidioc_dqbuf errors? Thank you, Best regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP “ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode” This log means your camera had already be initialized, so you need check if there is flash ROM on your camera module which will initialize it during power on, if so, you need update that flash ROM to use the driver's setting. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi again Qiang Li, As you can see in our logs, our camera is in shutter-sync mode, thus doesn't this means our camera setting is correct? What do you mean by camera setting, can you be more specific and explain it in detail?. Also MIPI_CSI_ERR1 register is 0, there is no error of transmission of bits, clock signal etc and mpi csi2 can receive the data correctly. Doesnot that mean that camera sends correct signals and is configured properly?  Secondly, we reviewed all patches and applied them directly by copy-paste, also we double checked whether there is an error; thus, we are (almost) sure that we ported correctly. What is the key points we need to look at? Can there be any other possible cause of this problem? Thank you, Best regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP For error "not a csi channel error", I think you haven't ported the patch successfully. For error "vidioc_dqbuf failed", that means no available video frames had been captured. Maybe you need check your AP0101 camera setting. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, In our project we have one camera connected to max9286 and we applied your patches to 4.1.15 kernel; however when we test it, we get the following picture: Logs are as follow: root@esomimx6q:~# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 400 -oh 240 -d 1 -x 0 [ 3144.243857] max9286_mipi: sensor number = 1. [ 3144.248939] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 148 Mbps [ 3144.257446] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x42. [ 3144.743416] max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. [ 3144.751541] max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. g_in_width = 1280, g_in_height = 720. fb_fix.id = DISP4 FG. fb: smem_start = 0x6a100000, smem_len = 0x8ca00. fb: frame buffer size = 0x2ee00 bytes. fb: g_screen_info.xres = 400, g_screen_info.yres = 240. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 400. fb: g_display_height = 240. start time = 1535715437 s, 436911 us [ 3154.993386] ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0 VIDIOC_DQBUF failed. We could not understand the reason of the problem (also we adjusted gpr1 pins 19 and 20 as 0).  Secondly, the following logs show us that there are problems with /dev/video 1 and dev/video3 about csi channel although dev/video0 and /dev/video2 is ok , however all of them have timeout error (note that since only one camera is connected, only "cat /dev/video0" command can initialize ap0101). root@esomimx6q:~# cat /dev/video0 [ 3313.913877] max9286_mipi: sensor number = 1. [ 3313.918963] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 148 Mbps [ 3313.926941] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x42. [ 3314.413402] max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. [ 3314.421469] max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. [ 3324.583392] ERROR: v4l2 capture: mxc_v4l_read timeout counter 0 cat: read error: Timer expired root@esomimx6q:~# cat /dev/video1 [ 3337.083393] ERROR: v4l2 capture: mxc_v4l_read timeout counter 0 [ 3337.089359] imx-ipuv3 2400000.ipu: Not a CSI channel cat: read error: Timer expired root@esomimx6q:~# cat /dev/video2 [ 3351.493394] ERROR: v4l2 capture: mxc_v4l_read timeout counter 0 cat: read error: Timer expired root@esomimx6q:~# cat /dev/video3 [ 3403.463393] ERROR: v4l2 capture: mxc_v4l_read timeout counter 0 [ 3403.469360] imx-ipuv3 2800000.ipu: Not a CSI channel cat: read error: Timer expired Can you help us with them? What is the reason of "not a csi channel error" on video1 and video3 while others don't give this error. Also the first error is more important, which is the error of "vidioc_dqbuf failed". Thank you Best regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP You can check with the AP0101 camera chip vendor. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li,   My problem is as bellow.Can you help me to deal with it. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thinks for your help! I have other problem with devicetree.Look at the picture,reg=6A,but max9286 datasheet is no this address. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The head file is in your rootfs which is built from Yocto. You can also use the binary "mxc_v4l2_tvin.out" directly. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li,   The test application file not contain "g2d.h",but  "mxc_v4l2_tvin.c" has the code #include "g2d.h".So,when I make it,it turn out error.   Can you help me solve the problem?   Think you! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP HI Qiang Li   When I use the "Patch",my kernel show error.My kernel vision is kernel-3.10.53.   So,I want to now what's the differance between the kernel-3.10.53 and L3.10.53_1.1.0-GA.   I think that the different vision make the error. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP From real test, the total delay is about 86ms. Camera number will not impact the delay, capture delay is fixed on camera fps, for example, 30fps camera input, the capture delay is 33ms. And render delay is fixed on display fps, for examlpe, 60Hz display, the delay is 17ms, then the post-process delay, it needs less than camera fps (33ms) to avoid frame lost. So for 8 camera case, you need make sure all the post process is less than 33ms to avoid frame drop. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Li Qiang       Thank you for your Patch.        Now,I have some trouble when I use "patch".        Can you write a manual to me so that I can understand how to use the "patch".        Thanks Sincerely.        Zhongmao Liu. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi. Qiang Li The four camera`s video can render on 1080P HDMI display.  How does the surround view algorithm get the four cameras`s capture buffers. do you have some good ideas? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li ! Is it possible for you to share "60-persistent-v4l.rules" file? It should be inside /lib/udev/rules.d Thank you very much Regards, Gokcen  Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi! Thank you for the reply. The resolution is 1280x720. So, I think that is not the problem. We are using kernel version 4.1.15.  May the following errors be related to that? [ 36.921793] v4l2_int_device wlcore_sdio mxc_dcic [ 36.926813] CPU: 3 PID: 399 Comm: v4l_id Not tainted 4.1.15 #1 [ 94.823493] udevd[215]: worker [230] /devices/soc0/v4l2_cap_1/video4linux/video1 is taking a long time [ 95.098316] udevd[230]: slow: 'v4l_id /dev/video1' [402] bootlogd: cannot allocate pseudo tty: No such file or directory Have a nice day! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP As I remembered, the blank from frame end to new frame is not enough for AP0101, so even the camera output resolution is 1280*800, we need capture just 1280*720, otherwise, the video capture will fail. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Lee, I have tried initializing MAX9286 in high immunity mode and now, ar140 is being found. However, I think there is something wrong with the v4l part. Here is the related log :  [ 34.085201] [ 34.086911] Internal error: Oops: 17 [#1] PREEMPT SMP ARM [ 34.092313] Modules linked in: wlcore mxc_v4l2_capture ipu_bg_overlay_sdc ipu_still ipu_prp_enc ipu_csi_enc max9286_gmsl ipu_fg_overlay_sdc v4l2_int_device wlcore_sdio mxc_dcic [ 34.108239] CPU: 3 PID: 402 Comm: v4l_id Not tainted 4.1.15 #1 [ 34.114078] Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree) [ 34.120628] task: d87b2ac0 ti: d8c78000 task.ti: d8c78000 [ 34.123891] max9286_mipi 1-006a: max9286_write_reg:write reg error:reg=3b,val=1e [ 34.133488] PC is at mxc_v4l_do_ioctl+0xc4c/0x2590 [mxc_v4l2_capture] [ 34.139979] LR is at mxc_v4l_do_ioctl+0xc3c/0x2590 [mxc_v4l2_capture] [ 34.146476] pc : [<7f08539c>] lr : [<7f08538c>] psr: 600e0013 [ 34.146476] sp : d8c79e40 ip : 00000074 fp : 00000000 [ 34.157991] r10: d88f9300 r9 : 7f034094 r8 : d8c79e90 [ 34.163245] r7 : 80685600 r6 : 00000000 r5 : d8d19008 r4 : d8d19000 [ 34.169792] r3 : 00000000 r2 : d8c79ea7 r1 : 7f087ae0 r0 : d8c79ec0 [ 34.176346] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user [ 34.183504] Control: 10c53c7d Table: 6939c04a DAC: 00000015 [ 34.189288] Process v4l_id (pid: 402, stack limit = 0xd8c78210) [ 34.195251] Stack: (0xd8c79e40 to 0xd8c7a000) [ 34.199652] 9e40: d88f9300 00000000 00000000 00000000 d8868550 d6023000 d80fe028 d8c41700 [ 34.207872] 9e60: 80b154c0 80685600 00000068 00000000 00000002 7ebeec88 d8c79e90 7f084750 [ 34.216090] 9e80: 00000000 804dbc10 d88f9300 800f6978 5f63786d 326c3476 00000000 00000000 [ 34.224327] 9ea0: 3978616d 00363832 00000000 00000000 00000000 00000000 00000000 00000000 [ 34.232540] 9ec0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 34.240757] 9ee0: 0004010f 85200005 05200005 00000000 00000000 00000000 9087e695 00000006 [ 34.248978] 9f00: d925f015 76f11000 00000000 d61505d8 d8ffa318 7ebeec88 d8ffa318 d88f9300 [ 34.253976] max9286_mipi: sensor number = 1. [ 34.254788] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 148 Mbps [ 34.254801] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x42. [ 34.276213] 9f20: 00000003 7ebeec88 d8c78000 00000000 00000000 800fa0e4 d8c79f40 800e3970 [ 34.284441] 9f40: 80b06720 00000003 d88f9300 d925f000 d8ffa318 d88f9308 00000020 00000000 [ 34.292668] 9f60: 00000000 800e91ac 00000000 00000000 d88f9300 00000003 d88f9300 80685600 [ 34.300888] 9f80: 7ebeec88 d8c78000 00000000 800fa338 00000000 7ebeee54 00000003 00000036 [ 34.309102] 9fa0: 8000f604 8000f480 00000000 7ebeee54 00000003 80685600 7ebeec88 00000001 [ 34.317312] 9fc0: 00000000 7ebeee54 00000003 00000036 00000000 00000000 76f11000 00000000 [ 34.325534] 9fe0: 76e6e2a0 7ebeec7c 00011cfc 76e6e2ac 600e0010 00000003 8112f040 0420f044 [ 34.333788] [<7f08539c>] (mxc_v4l_do_ioctl [mxc_v4l2_capture]) from [<804dbc10>] (video_usercopy+0x1b8/0x480) [ 34.343777] [<804dbc10>] (video_usercopy) from [<800fa0e4>] (do_vfs_ioctl+0x3e8/0x608) [ 34.351752] [<800fa0e4>] (do_vfs_ioctl) from [<800fa338>] (SyS_ioctl+0x34/0x5c) [ 34.359115] [<800fa338>] (SyS_ioctl) from [<8000f480>] (ret_fast_syscall+0x0/0x3c) [ 34.366711] Code: e5993008 e3071ae0 e2880030 e3471f08 (e5932018) [ 34.374557] ---[ end trace 756e286723ff907f ]--- [ 34.435645] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 34.531108] kjournald starting. Commit interval 5 seconds [ 34.549007] EXT4-fs (mmcblk1p2): recovery complete [ 34.553859] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) [ 34.591916] EXT3-fs (mmcblk0p2): using internal journal [ 34.597183] EXT3-fs (mmcblk0p2): recovery complete [ 34.601980] EXT3-fs (mmcblk0p2): mounted filesystem with ordered data mode [ 34.602407] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 34.644868] wlcore: loaded [ 34.733493] max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. [ 35.357742] ap0101_LastPatchStatus [ 35.812239] ap0101_LastPatchStatus [ 35.985973] ap0101_LastPatchStatus [ 36.194854] ap0101_LastPatchStatus [ 36.243936] ap0101_LastPatchStatus [ 36.392576] ap0101_LastPatchStatus [ 37.086270] max9286_mipi 1-006a: ap0101_InitSensor: AR0140 was found, index = 1. [ 94.823493] udevd[215]: worker [230] /devices/soc0/v4l2_cap_1/video4linux/video1 is taking a long time [ 95.098316] udevd[230]: slow: 'v4l_id /dev/video1' [402] bootlogd: cannot allocate pseudo tty: No such file or directory Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, We have tried with the following equipment :  ONSEMI MARS Reference Desşgn (MAX96705, AP0101, AR0140) 30 cm RG174 (and also 3 m coaxial cable) included in the reference design.  MAX9286S32V Daugter board is used to connect iMX6 board.  I have taken AP0101 to host configuration mode by removing flash. Despite I am writing 0x36 to MAX9286' s 34th register to disable local auto acknowledge, I observed that 9th bit coming immediately after 8th bit of SCL. I am attaching the oscilloscope view. The problematic bits are circled with red.  MAX9286 LFLT led is ON and LOCK led is  OFF.   Down below, we tried to read from AP0101 (address: 0x92).  If you have any suggestions it would be appreciated.  Regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi qiang, The 4 cameras can be: - 1xCSI, 3xMIPI - 2xCSI, 2xMIPI - 4xMIPI 可以解释一下上面的CSI和MIPI什么意思吗?不知道这个csi是指ipu内部的csi0-3 还是camera mipi总线。 Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, 1xCSI, 3xMIPI,  what does it meanning? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP I think you need check the signal quality on Coax between MAX9286 and MAX96705. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Lee! I am using ap0101 with max96705 and max9286 deserializer. I was able to establish connection with max9286 and max96705. However, while reading max96705 registers, I get the following error:  [ 21.113432] max9286_mipi 1-006a: max9271_read_reg:read reg error: reg=35 [ 21.120143] MAX9271 Reg 0x35 = 0xffffffff. [ 21.323460] max9286_mipi 1-006a: max9271_read_reg:read reg error: reg= a [ 21.330183] MAX9271 Reg 0x0a = 0xffffffff. [ 21.533474] max9286_mipi 1-006a: max9271_read_reg:read reg error: reg= b [ 21.540199] MAX9271 Reg 0x0b = 0xffffffff. [ 21.743480] max9286_mipi 1-006a: max9271_read_reg:read reg error: reg= c [ 21.750201] MAX9271 Reg 0x0c = 0xffffffff. Any help would be appreciated !  Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi qiang ,     I use the 'mx8_v4l2_cap_drm.out' test my board, but the test progress is stopped in the 'start_capturing' function. Finally , I found that it actually stopped in the 'ioctl(fd_v4l, VIDIOC_DQBUF, &buf)' function . And then , I test the four output singal of the max9286, Dout0~Dout3 are all have singal, and the clock I tested  is 295MHz,the input also have singal too. It seems that max9286 and sensors are all work well ,but there is nothing showed on my screen. It confused me for some days. Could you give some advieces to me ? Thanks.  The log is attached below. root@imx8mqevk:~# ./mx8_v4l2_cap_drm.out -cam 3 init_video_channel, /dev/video0 init 0 init_video_channel, /dev/video1 init 1 Open /dev/dri/card0 success num of fb:0 num of crtc:2 num of encoder:1 num of connector:1 num of modes = 1 num of encoders = 1 num of props = 2[ 21.059227] mxc-mipi-csi2 58227000.csi: width=1280, height=800, fmt.code=0x2011 modes[0] info:resolution=1024*600 pixels kms info: fb_base = 0[ 21.071187] input fmt YUV4 x789b3000 w/h=(1024,600) bits_per_pixel=4 bpp=32 screen_buf_s[ 21.079551] output fmt RGB4 ize =2457600 xres=1024, y_res=600 ch_id=0, w=512, h=300, x_offs[ 21.088947] mxc-isi 58100000.isi: input_size(800,1280), output_size(300,512) et=0, y_offset=0 ch_id=1, w=512, h=300, x_offset=512, y_offset=0[ 21.105981] mxc-mipi-csi2 58227000.csi: width=1280, height=800, fmt.code=0x2011 Try to open device /dev/video0 cap=0x84201000 index=0 pixelf[ 21.113602] input fmt YUV4 ormat (output by camera): RGBP index=1 pixelformat (output by c[ 21.121958] output fmt RGB4 amera): RGB3 index=2 pixelformat (output by camera): RGB4 inde[ 21.130400] mxc-isi 58110000.isi: input_size(800,1280), output_size(300,512) x=3 pixelformat (output by camera): BGR3 index=4 pixelformat (output by camera): BA24 index=5 pixelformat (output by camera)[ 21.150628] mxc-mipi-csi2 58227000.csi: width=1280, height=800, fmt.code=0x2011 : YUYV index=6 pixelformat (output by camera): YUV4 VIDIOC ENUM FMT failed, index=7 video_ch=0, width=512, height=300, pixelformat: RGB4 WxH@fps = 512x300@30 Image size = 614400 v4l_capture_setup, Open v4l_dev=0x4, channel=0 Try to open device /dev/video1 cap=0x84201000 index=0 pixelformat (output by camera): RGBP index=1 pixelformat (output by camera): RGB3 index=2 pixelformat (output by camera): RGB4 index=3 pixelformat (output by camera): BGR3 index=4 pixelformat (output by camera): BA24 index=5 pixelformat (output by camera): YUYV index=6 pixelformat (output by camera): YUV4 VIDIOC ENUM FMT failed, index=7 video_ch=1, width=512, height=300, pixelformat: RGB4 WxH@fps = 512x300@30 Image size = 614400 v4l_capture_setup, Open v4l_dev=0x5, channel=1 buffer[0] startAddr=0x7891d000, offset=0x0, buf_size=614400 buffer[1] startAddr=0x78887000, offset=0x96000, buf_size=614400 buffer[2] startAddr=0x787f1000, offset=0x12c000, buf_size=614400 buffer[0] startAddr=0x7875b000, offset=0x0, buf_size=614400 buffer[1] startAddr=0x786c5000, offset=0x96000, buf_size=614400 buffer[2] startAddr=0x7862f000, offset=0x12c000, buf_size=614400 start_capturing channel=0, v4l_dev=0x4 start_capturing channel=1, v4l_dev=0x5 Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP For iMX8M, it is not "mx8_v4l2_cap_xxx.c", it is mx6s_v4l2_cap_drm.c, you can find it from the L4.9.51 GA release for IMX8MQ. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang, It can't work. The error message is as below. Do you know which one is the correct executable for i.MX8M? Thanks. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP iMX8 has its own test application, you can find it from the yocto imx-test-xxx.tar.gz, test/mxc_v4l2_test/mx8_v4l2_cap_xxx.c Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi qiang,       I am porting the 360 surround view based on imx8qxp, and the kernel is 4.9.51,and the sensor is ap0101+AR0140,the other is max9286+max96705 . I port the driver from imx6q's driver to imx8 just like all right , because the mxa9286 and four ap0101 have been found successfully in the log. But when I use the imx6's test code 'mxc_v4l2_tvin.out ' ,there is a error just like 'no such files found '. I am not sure imx6's test code could be used in the imx8qxp, is there  any other test code just for imx8 ?? If yes ,could you  provide one demo for me ? Thanks a lot.    Best regards jun Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Jianfeng, Can you try the mxc_v4l2_tvin from "https://community.nxp.com/docs/DOC-335803", I haven't seen your issue. And you can also modify the mxc_v4l2_tvin.c source code, it can capture video data to file, then you can check the file on PC with some YUVPlayer to check if the captured data is correct or not. /*  char still_file[100] = "./still.yuv";  int fd_still = 0;  if ((fd_still = open(still_file, O_RDWR | O_CREAT | O_TRUNC, 0x0666)) < 0)  {   printf("Unable to create y frame recording file\n");  } */ ... ... //  if(i>100 && i<120) //   write(fd_still, capture_buffers[capture_buf.index].start, 720*240*2); ... ... // close(fd_still); Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi liqiang,    i use the imx6q instead of imx6d, but the problem still exits. now i have no idea to solve this problem. Is it an application problem or a kernel problem? please help,thank you ,anyway. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi liqiang,    Thank you for advice.  Maybe it is due to i use the imx6d ,not the imx6Q?? if i use the imx6D ,how can i make it right? tkank you very much for your help. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP You can reference to the mxc_v4l2_tvin in https://community.nxp.com/docs/DOC-335803 It had fixed some issues. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The hardware has pixel align requirement, you'd better let the width and height to align in 16 pixels. Another thing should be checked: the G2D will set frame buffer to RGB format, but without "-g2d", it will use IPU to render and it needs YUV format fb1. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi liqiang, two question about the test mxc_v4l2_tvin_max9286.tar,the screen resolution is 800x480 when i use the command "mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 800 -oh 480 -d 1 -x 0" ,the camera seem normal 1.when i use the command "mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 400 -oh 240 -d 1 -x 0"  the screen will scroll  2.when i use the command " mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 800 -oh 480 -d 1 -x 0 -g2d", the sreen show fliker  thank you very much .looking for you answer. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, We know that IMX8 BSP has support for MAX9286, but it seems only for i.MX8Q. MAX9286 driver must work with MIPI CSI2 driver. In i.MX8Q device tree (fsl-imx8qm-mek.dts), we see it is linked with 'fsl,mxc-mipi-csi2' driver (drivers/media/platform/imx8/mxc-mipi-csi2.c). But in i.MX8M device tree, MIPI CSI2 driver is 'fsl,mxc-mipi-csi2_yav' (drivers/media/platform/imx8/mxc-mipi-csi2-yav.c). After comparing these two drivers, we found the major differences are the hardware manipulation and V4L2 media control pad initialization. Our questions are:   1. Does 'fsl,mxc-mipi-csi2' driver work on i.MX8M?   2. Otherwise, does the 'fsl,mxc-mipi-csi2_yav' driver support virtual channel well?   3. Furthermore, how to support virtual channel feature in 'fsl,mxc-mipi-csi2_yav' driver? (the i.MX8M reference manual does not have enough information for MIPI CSI2 virtual channel)? Thanks. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The camera we verified on iMX8 is MAX9271+OV10635, but if you are using the MAX96705, you can reference to this iMX6 patch, there is only some small modifications for MAX96705. Your failure means when MAX9286 try to access OV10635 with Coax cable (I2C signals are transfered on it), there is I2C access error, the I2C between MAX9286 and iMX8 has no error. There is is between MAX9286 and camera module. It is more like Coax signal issue. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang, We use the LI-USB30-OV10635-SER  connect to PC by usb 3.0,  the capture show normal on tools, We think the ov10635 modules is OK. max9286 driver load,  max9286 can access by I2C, I2C driver I think is OK. We doubt the configure of max9286 and max96705,Is this combination be worked on imx8x 4.9.51 version? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The I2C access issue is more like hardware issue, I think you need check your hardware. The default iMX8 BSP supports MAX9286 directly, no patch is needed. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang, I use max9286 and max96705+ov10635 on imx8x kernel version is 4.9.51, Does this version have patch? Use the default max9286 driver which exist in kernel  4.9.51 source code,It show some error when driver load。 It seems ov10635 Communication failure by I2C, But the max9286 is success use the same I2C access error log as below: [    2.525043] mxc-mipi-csi2 58227000.csi: mipi_csi2_probe [    2.549343] mxc-mipi-csi2 58227000.csi: lanes: 4, name: mxc-mipi-csi2.0 [    2.556705] max9286_mipi 0-006a: In max9286_hardware_preinit() [    2.854197] max9286_mipi: reg = 0xf0. [    2.857870] max9286_mipi: sensor number = 4. [    2.862158] max9286_mipi 0-006a: In max9286_hardware_init() [    2.893273] max9286_mipi: initialized sensor  = 0x01. [    2.921271] max9286_mipi: initialized sensor  = 0x02. [    2.949272] max9286_mipi: initialized sensor  = 0x03. [    2.977271] max9286_mipi: initialized sensor  = 0x04. [    3.145279] max9286_mipi 0-006a: ov10635_read_reg:read reg error: reg=0x300a. [    3.152433] max9286_mipi 0-006a: ov10635_check_device: OV10635 hasn't been found, reg[0x300a] = 0x0., index=1 [    3.321275] max9286_mipi 0-006a: ov10635_read_reg:read reg error: reg=0x300a. [    3.328419] max9286_mipi 0-006a: ov10635_check_device: OV10635 hasn't been found, reg[0x300a] = 0x0., index=2 [    3.497275] max9286_mipi 0-006a: ov10635_read_reg:read reg error: reg=0x300a. [    3.504421] max9286_mipi 0-006a: ov10635_check_device: OV10635 hasn't been found, reg[0x300a] = 0x0., index=3 [    3.673275] max9286_mipi 0-006a: ov10635_read_reg:read reg error: reg=0x300a. [    3.680420] max9286_mipi 0-006a: ov10635_check_device: OV10635 hasn't been found, reg[0x300a] = 0x0., index=4 [    4.752679] max9286_mipi 0-006a: max9286_mipi is found, name max9286_mipi 0-006a Could you help me which part error will lead to ov10635 access failure. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Chris, if they are two MIPI CSI2 cameras, you can't connect them to CPU directly. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang, This is great information!  In the event that you want to use 2 CSI2 cameras, do you know if it's possible to hook both cameras directly to the processor (how do you handle the 2 clk pairs from the two cameras?) of if you need to use a signal aggregator to combine the cameras into one interface? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The MAX9286 needs all camera working at frame sync mode and same timing, so the cameras should send out vsync at almost same time. If some camera is working at free run mode, there will be scroll issue, because MAX9286 can't sync them. You can measue the VSYNC for all cameras to check this.  Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP i used the patch L3.10.53_GA1.1.0_MAX9286_Surroundview_Patch_2015-12-04.zip , when i connect 2 camera , i can capture image correctly. but when i connect three cameras i can not get image correctly, the image scroll. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP I think you need check with Maxim for both the MAX9286 Programming Guider and the MAX9286 hardware schematics. From my point, the power supply to camera board with Coax cable is easy to cause such stable issue. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP it like the signle is not stable , 70% it can work succefully ,the  hard ware is designed according to the official schematic design.I am not sure where to check Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP would you please send the MAX9286 Programming Guide to me Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The Max9286 setting is from "MAX9286 Programming Guide", I think you need check your hardware, if the MAX9286 can't lock the camera signals, it will not output valid MIPI CSI2 signal, then on iMX6 side, it will show "mipi csi2 can not receive sensor clk". Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi li i use max9286 and max96705 i found the connect is not very stable, sometime i get "mipi csi2 can not receive sensor clk..." ,when i  git this error i fount all the config are success i use the patch L3.10.53_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip, in the patch i found you config max9286 register 0x3f 0x3b ,but i did not found any introduction about these register ? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP "ap0101_initialize:AP0101 is not in Host Configuration Mode" This log means the camera is not in I2C config mode, so we can't initialize it. You need check your camera board, if it has flash on board, then you need update the flash ROM setting with the driver's. You can also remove the flash ROM on camera board, then the MAX9286 driver can initialize it with I2C commands. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Lion, You need include blank data too. So use the pixel clock to calculate the throughput is more simple and accuracy. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang I also use ov10635, and use  the same sensor register values as in your patch the sensor output 1280*800@30fps with yuv422(uyvy,0x1e) per my understanding, the camera data rate should be 30M*16bits=480Mbps how to get the value of 768Mbps? and in function mipi_csi2_reset, it just sets register MIPI_CSI_PHY_TST_CTL1, from the name, it is just a test related register, is it useful for the mipi csi2 init? thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Lion Wei, the MAX throughput for IMX6 MIPI CSI2 is 3.2Gbps in 4 lanes mode, so each camera can be up to 800Mbps (include blank data). And the followed code should be adjust for your real camera, the 768 should be your real camera bps:  /* 48MHz pixel clock (1280*800@30fps) * 16 bits per pixel (YUV422) = 768Mbps mipi data rate for each camera */  mipi_csi2_reset(mipi_csi2_info, (768 * g_sensor_num) / (lanes + 1)); Anoter limitation, at least 3 blank lines are needed for two frames from camera. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang thanks for your help! after tune the ti settings, I can receive four camera data now. currently for 1/2/3 sensors, I can receive the data with correct pixels however for 4 sensors, the pixel data has some line corruptions(see the below picture) from TI side, we can set the data lane numbers and data lane rate however, the data lane rate has only three options(400M, 800M, 1.6G) with different rate+lane number setting, the 1/2/3 sensors can work perfectly for 4 sensors, only 800M+4 data lanes works, but the data has some corruptions my question is 1) for imx6 mipi csi2 receiver, is there any special requirement on the rate and data lanes setting? 2) for imx6 mipi csi, what is the suitable ratio between the real data rate and the total data capability? 2) any suggestions? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Mustafa, These packages are implemented by the MIPI CSI2 hardware, from software side, we just tell it the virtual channel number and Data Identifier (It can be found at include\linux\mipi_csi2.h). Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thank you for respond Qiang_FSL‌ I am now looking at the MIPI CSI2 Reference Documentation , I am checking all. Also I made search on the my imx6q(Wandboard Quad) custom board source and header files. After my research I could not find  relative source code in the my kernel files, which defines packet types and communication sub-structures for CSI-2 Interface Low Level Protocol message protocol , SoT and EoT package sample codes. I will take the video by using  "mxc" relative files and it's ipu source codes. So If you can share any source code or any relative codes which informs me about  SoT,EoT and LLP Massage Package Structures sample codes, It would be very nice and useful for me because I don't have any reference code in my kernel files.  Best Regards. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Lion, The MIPI CSI2 error registers can be used to check the MIPI CSI2 package is correct with CRC or follows the protocol. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Mustafa, the information can be found from MIPI CSI2 specification: Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi lionwei Qiang_FSL ; According to iMX6 CSI2IPU documentation we need to create  short or long type packages  and also we need Start Of Transmission and End Of Transmission packages too,  How can I send this packages for example in the camera device driver source this packages should be created and sent these data types or we are defining these values to another files . What is the format of SoT and EoT packages? Can someone give me any example about that, I have been working to solve the csi2 format mipi clock and data lane problem, I couldnt define to the iMX6Q processor custom board since 3 week. It would be very very appreciated. Best Regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang is there any way on imx6 to confirm the mipi data correct or not from mipi csi-2? for example some register show the status of the mipi csi-2, specially the virtual channel/frame size related Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Lion, no special modification is needed on iMX6 side, you should tune the Ti chip setting. As I know, some customer had already make the Ti 964 work on iMX6 platform, the main work is in Ti side, you should check with them. For iMX6, you just need make sure the four cameras is transfered on 4 MIPI virtual channel. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang I am using following hardwares for similiar surroundview implementation under linux 3.14.52 ov10635 <--> ds90ub913 <--> ov10635 <--> ds90ub913 <--> DS90ub964-q <-----> imx6q ov10635 <--> ds90ub913 <--> ov10635 <--> ds90ub913 <--> the driver patches are most the same as the one you provided and currently the mipi-csi2 can detect the pixclock successfully also the waves on the data lines of mipi-csi2 seems correctly however, I can not receive the camera_callback for camera 0-2, only can receive camera_callback of camera 3 I have read all the comments above, and can not find the similiar causes I have checked the following things 1) the MIPI_IPU1_MUX and MIPI_IPU2_MUX are set to 0 for mipi_csi 2) the register dumps: IPU1_CSI0_SENSE_CONF(0x2630000): 0x04008a00 IPU1_CSI1_SENSE_CONF(0x2638000): 0x04008a00 IPU2_CSI0_SENSE_CONF(0x2a30000): 0x04008a00 IPU2_CSI1_SENSE_CONF(0x2a38000): 0x04008a00 IPU1_IDMAC_CH_EN_1(0x2608004): 0x00000003 IPU1_IDMAC_CH_EN_2(0x2608008): 0x00000000 IPU2_IDMAC_CH_EN_1(0x2a08004): 0x00800003 IPU2_IDMAC_CH_EN_2(0x2a08008): 0x00000000 IPU1_IDMAC_CH_BUSY_1(0x2608100): 0x00000003 IPU2_IDMAC_CH_BUSY_1(0x2a08100): 0x00800002 IPU1_SMFC_MAP(0x2650000): 0x00000020 IPU2_SMFC_MAP(0x2a50000): 0x00000020 my questions are 1) are the smfc and idmac setting correct for these four cameras? 2) from the spec, it says ipu mipi should use non-gated mode, but mxc_v4l2_capture.c uses gated mode in mxc_v4l2_s_param which mode should I use(I have tried both modes, and neither of them works for me) 3) which case need me to set the hsync_pol, vsync_pol? 4) any suggestion to identify this issue? thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP That means your kernel is not aligned with the GPU libs in your rootfs. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang,       Have a nice holiday. I have some trouble with  my borad. We refer to the sabresd and max9286+max96705+ap 0101, and we used the 3.14.52 BSP.  Now our four camera are all working properly, but when I used '-g2d'  in the test command  there is a error just like 'Segmentation fault'. I think It may be  something wrong with  my GPU,but I don't kown how to deal with the problem. Could you give  some advices to me ?Thanks . Here is the log below.                    root@imx6qdlsolo:~# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 0 -x 0 ------------------------------here is AP0101-------------------------------- max9286_mipi: sensor number = 4. mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 594 Mbps mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x2e. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 2. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 3. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 4. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. g_in_width = 1280, g_in_height = 720. fb_fix.id = DISP4 BG. It is background screen, only full screen default format was supported. fb: smem_start = 0x25600000, smem_len = 0x546000. fb: frame buffer size = 0x1c2000 bytes. fb: g_screen_info.xres = 1280, g_screen_info.yres = 720. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 1280. fb: g_display_height = 720. start time = 1449238585 s, 124037 us ^CERROR: v4l2 capture: mxc_v4l_dqueue() interrupt received root@imx6qdlsolo:~# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 0 -x 0 -g2d ------------------------------here is AP0101-------------------------------- max9286_mipi: sensor number = 4. mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 594 Mbps mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x2e. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 2. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 3. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 4. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. g_in_width = 1280, g_in_height = 720. fb_fix.id = DISP4 BG. fb: smem_start = 0x25600000, smem_len = 0x546000. fb: frame buffer size = 0x1c2000 bytes. fb: g_screen_info.xres = 1280, g_screen_info.yres = 720. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 960. fb: g_display_height = 540. Segmentation fault      With my best regards  Jun Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Yu fe, This error means MAX9286 can't detect the cameras, you need check your hardware signal and power between MAX9286 and MAX96705. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi, Qiang Li my custom board is ref to saresd, max9286+max96705+ap010. my yocto version is 3.14.52, i  got message below after patched the kernel pr_info("max9286_mipi: sensor number = %d.\n", g_sensor_num); if (g_sensor_num == 0) { pr_err("%s: no camera connected.\n", __func__); return -1; } can you please give me some suggestion to find the program? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP When you used IPU for CSC on 1280*720 frames, the IPU loading is heavy, there is chance that IPU can't service the capture on time. To improve it, you need use IDMAC 0 and IDMAC 2, then all FIFO can be used: In ipu_common.c, function ipu_probe(), please make sure all CSI->MEM channels are set to high priority:  /* Set sync refresh channels and CSI->mem channel as high priority */ - ipu_idmac_write(ipu, 0x18800003L, IDMAC_CHA_PRI(0)); + ipu_idmac_write(ipu, 0x1880000FL, IDMAC_CHA_PRI(0)); Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP This file can be found from your rootfs. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hello Qiang, The attached tvin source code includes a local file #include "g2d.h".  However this file is not included in the archive.  Where do we get this file? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP 4 in 1 HD recorder resolved? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Brave, That error means there is no valid MIPI CSI2 signal to IMX6, from your log, it seems there is flash in your camera module, if so, the flash setting for the camera should be algined with the AP0101 setting in max9286.c, the camera should work in frame sync mode. On Max9286, there is a lock pin, only when the four cameras are working in frame sync mode and are locked by MAX9286, it will output valid MIPI CSI2 signal to iMX6. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Dear Qiang Li, could you please kindly take a look at following post and give me an insight ? Adding X11 Interlace Video Mode Support to Yocto  Thanks in Advance Anuradha Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The iMX6 SabreAuto board can only supply 5V power to MAX9286 board, so if you are using long Coax cable, there will be issue. You can rework your MAX9286 board, and supply 7~12V power to it. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP "MAX9296 + 4 96705 +4camera" the reference patch had already covered this, the sync setting is in camera and Maxim chip side. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang, How to sync the camera of the MAX9296 + 4 96705 +4camera?  We have 2 customer want to use the IMX.6 + MAX9268+ 4 MAX96705---camera. Could you suggest how to sync the camera? Thank you very much. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Li, Why do I need to set video format to 4 (UYVY) when using grecorder tool? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Qiang_FSL‌ now i try use h.264, ./mxc_vpu_test.out -E "-x 0 -f 0 -c 1800 -a 30 -w 1280 -h 792 -o ss.mp4 -l 0 -b 5204" when i try to play ss.mp4 on PC i can't play it normally, like the mp4 file has no header, how to create a mp4 file when use H.264 recoder video data? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi, Li now i try to use VPU to encode the camera data, i use MJPEG, i do not want to use other standed (H263 H264), the the file is a too large, 100 frames will make a file about 11M. how to reduce MJPEG file? thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Dear Qiang! I am using MAX9286+OV10635+MAX9271. I have tested 3.10.53patch and 3.14.52patch, but both of them are not work. When I ran "/mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 1 -x 0 -g2d &". I got the same errors, like this [ 2027.062578] max9286_mipi 0-0048: max9286_write_reg reg = 0x15, val = 0x13. [ 2027.070238] max9286_mipi 0-0048: max9286_write_reg reg = 0xe, val = 0x5f. root@wandboard-quad:/usr/src# [ 2027.093488] max9286_mipi 0-0048: max9286_write_reg reg = 0x3f, val = 0x4f. [ 2027.113488] max9286_mipi 0-0048: max9286_write_reg reg = 0x3b, val = 0x1e. [ 2027.332778] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 4,val=43 [ 2027.552770] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 8,val= 1 [ 2027.573473] max9286_mipi 0-0048: max9286_write_reg reg = 0x3b, val = 0x19. [ 2027.593452] max9286_mipi 0-0048: max9286_write_reg reg = 0x12, val = 0xf3. [ 2027.601029] max9286_mipi 0-0048: max9286_write_reg reg = 0x1, val = 0x2. [ 2027.713713] max9286_mipi: sensor number = 1. [ 2027.718679] max9286_mipi 0-0048: max9286_write_reg reg = 0xe, val = 0x50. [ 2027.728809] max9286_mipi 0-0048: max9286_write_reg reg = 0xb, val = 0xe1. [ 2027.735691] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 192 Mbps [ 2027.744033] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x44. [ 2027.751624] max9286_mipi 0-0048: max9286_write_reg reg = 0x0, val = 0xe2. [ 2027.760490] max9286_mipi 0-0048: max9286_write_reg reg = 0xa, val = 0x22. [ 2027.962765] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 0,val= 4 [ 2028.182767] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 7,val=84 [ 2028.402761] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 1,val=90 [ 2028.602752] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 9,val=c4 [ 2028.802767] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= a,val=c0 [ 2029.002791] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= b,val= a [ 2029.202766] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= c,val= 4 [ 2029.223462] max9286_mipi 0-0048: max9286_write_reg reg = 0xa, val = 0x22. [ 2029.230955] max9286_mipi 0-0048: max9286_write_reg reg = 0xa, val = 0xff. [ 2029.432766] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 4,val=43 [ 2029.441134] max9286 reg 0x0A = 0xff. [ 2029.447266] max9286_mipi 0-0048: max9286_write_reg reg = 0x34, val = 0x36. [ 2029.652766] max9286_mipi 0-0048: max9271_read_reg:read reg error: reg= 4 [ 2029.659488] max9271 reg 0x04 = 0xffffffff. [ 2029.862766] max9286_mipi 0-0048: max9271_read_reg:read reg error: reg= 4 [ 2029.869489] max9271 reg 0x04 = 0xffffffff. [ 2030.072766] max9286_mipi 0-0048: max9271_read_reg:read reg error: reg= 4 [ 2030.079487] max9271 reg 0x04 = 0xffffffff. [ 2030.282776] max9286_mipi 0-0048: max9271_read_reg:read reg error: reg= 4 [ 2030.289497] max9271 reg 0x04 = 0xffffffff. [ 2030.492792] max9286_mipi 0-0048: ov10635_read_reg:read reg error: reg=0x300a. [ 2030.499957] max9286_mipi 0-0048: ov10635_check_device: OV10635 hasn't been found, reg[0x300a] = 0x0. [ 2030.510196] max9286_mipi 0-0048: max9286_write_reg reg = 0x34, val = 0xb6. [ 2030.712770] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 4,val=83 [ 2030.823490] max9286_mipi 0-0048: max9286_write_reg reg = 0x15, val = 0x9b. [ 2031.442763] mipi csi2 can not receive sensor clk! MIPI_CSI_PHY_STATE = 0x200. g_in_width = 1280, g_in_height = 800. fb_fix.id = DISP3 FG. fb: smem_start = 0x40800000, smem_len = 0xa8c000. fb: frame buffer size = 0x384000 bytes. fb: g_screen_info.xres = 1280, g_screen_info.yres = 720. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 960. fb: g_display_height = 540. start time = 1499055466 s, 40751 us [ 2041.482836] ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0 VIDIOC_DQBUF failed. It shows that can't find OV10635 and MAX9271. If there are something wrong with I2C drivers? I can confirm my hardware board is OK, because I am using the "MAX9286 COAX EVKIT" board. Could you help me? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP 3.14.52 BSP release has this tool. For other release, it is same as normal camera recode. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP where can i get grecorder-1.0 Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP VPU performance is not enough for 4x720P30 recoder. For one camera: grecorder-1.0 --camera_id 0 --video_format 4 --width1280 --height 720 --fps 30 Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi li How to use gstreamer record the four channel camera data? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thanks for your reply. where should i change the ipu driver code?like csi_enc_setup in ipu_csi_enc.c ,and  camera_callback in mxc_v4l2_capture.c Could you please describe in more detail? thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP You can alloc a big buffer array for V4l2 capture driver with 2560*1440 pixel buffers: For camera 1, let its DMA buffer base address to pixel (0, 0), width 1280, height 720, but set the stride to 1280*2*2; then after filled 1280 pixels (1280*2 bytes for UYVY input), it will jump 1280*2*2 bytes; so camera 1 will fill the left-up 1280*720 pixels of the buffer; For camera 2, let its DMA buffer base address to pixel (1280, 0), width 1280, height 720, but set the stride to 1280*2*2; then after filled 1280 pixels (1280*2 bytes for UYVY input), it will jump 1280*2*2 bytes; so camera 2 will fill the right-up 1280*720 pixels of the buffer;  For camera 3, let its DMA buffer base address to pixel (0, 720), width 1280, height 720, but set the stride to 1280*2*2; then after filled 1280 pixels (1280*2 bytes for UYVY input), it will jump 1280*2*2 bytes; so camera 3 will fill the left-down 1280*720 pixels of the buffer;  For camera 4, let its DMA buffer base address to pixel (1280, 720), width 1280, height 720, but set the stride to 1280*2*2; then after filled 1280 pixels (1280*2 bytes for UYVY input), it will jump 1280*2*2 bytes; so camera 4 will fill the right-down 1280*720 pixels of the buffer. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Qiang_FSL‌  @zhang hongliang  i want to put the four Independent camera data together in the ipu driver like one of below image , so then user can just use once DQBUF call to get all the four camera data. Any suggestions? or Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Please check with your S32V contact window for that, here is just for IMX6. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP I think you still need check and tuning your ISX016 camera setting, the reference code is for AP0101+AR0140 camera board. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thank you for your reply, the camera is working in sync mode. sometime i can connect two camrea successfully: max9286_mipi: sensor number = 2. mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 336 Mbps mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x2a. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 2. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. but when i try to get image,the image is not  normal, the clock configure is not right? g_sensor_num = 2  lanes = 3 mipi_csi2_reset(mipi_csi2_info, (672* g_sensor_num) / (lanes + 1)); Qiang_FSL‌ Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP I think your cameras are not working in sync mode. They should work in such mode: MAX9286 send a pulse to each camera, then each camera send out one frame. The VSYNC for each camera should appear in almost same time. If MAX9286 can't sync the multi-cameras, it will not output MIPI signals. But for single camera, no sync was needed. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP now i use BSP 3.10.53, max9286+max96707+ISX016 when connest one camera i can get image successfully,but when i connect tow cameras i always get mipi csi2 can not receive sensor clk! MIPI_CSI_PHY_STATE = 0x6f0. i have patched L3.10.53_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip my code :  max9271_write_reg(0, 0x40, 0x2F);  msleep(2);  max9271_write_reg(0, 0x97, 0x5F); ....  max9286_write_reg(0x01, 0x00);  max9286_write_reg(0x63, 0x00);  max9286_write_reg(0x64, 0x00);  max9286_write_reg(0x06, 0x00);  max9286_write_reg(0x07, 0x00);  max9286_write_reg(0x08, 0x26); ... mipi_csi2_reset(mipi_csi2_info, (576 * g_sensor_num) / (lanes + 1)); i have refer Debug steps for customer MIPI sensor.docx. my doubt is how to  confirm hsp_clk  and  ccm_pixel_clkm and where to configure hsp_clk  and  ccm_pixel_clkm? another question is about MAX9286 (FSYN CLOCKED in register 0x31 ) when i read it it is 0x0, if the two camera can not get FSYNC LOCKED, this will lead to can not receive sensor clk??? how to fix this? thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thanks. The problem has been resoved. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Reference to MIPI specification, the YUV422 data transferred on MIPI CSI2 is UYVY, no YUYV, so in max9286_mipi.c, we have the followed code: max9286_data[0].pix.pixelformat = V4L2_PIX_FMT_UYVY; if (sensor->pix.pixelformat == V4L2_PIX_FMT_UYVY) { for (i=0; i mipi_csi2_set_datatype(mipi_csi2_info, i, MIPI_DT_YUV422); If your camera can only be YUYV format, you should change the max9286_mipi.c as followed: max9286_data[0].pix.pixelformat = V4L2_PIX_FMT_YUYV; if (sensor->pix.pixelformat == V4L2_PIX_FMT_YUYV) { for (i=0; i mipi_csi2_set_datatype(mipi_csi2_info, i, MIPI_DT_YUV422); Note: MIPI_DT_YUV422 can't be changed, it is defined by MIPI CSI2 specification for UYVY, there is no MIPI data type for YUYV. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The patch had already show you the reference code to set the GPR register in file arch/arm/mach-imx/mach-imx6q.c. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP You need check your kernel boot up log to confirm there is no other V4l2 capture driver used video0. You can also use command "ls /dev/video*" to list all video device in your system. And register IOMUXC_GPR1 (0x020E0004) should also be checked, bit 20 and bit 19 must be 0. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP (1) Onsemi AR0140+AP0101+MAX9271 boards. We got this board from Onsemi. (2) OmniVision OV10635+MAX9271 boards. This board is made by Maxim, you can check with them. And as I know AVNET China team had also built some camera boards for both AR0140 and OV10635. "http://entroninc.com/" had also built camera boards for this solution. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP I want to get your Test camera board      (1) Onsemi AR0140+AP0101+MAX9271 boards.     (2) OmniVision OV10635+MAX9271 boards. where can I get them? Could you please recommend  Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Li, when i build BSP L3.14.52.1.1,i got some error, please give some help,thanks bitback fsl-image-gui Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thanks for your reply. There is no flash ROM on OV10635 board. Follow are the wave of FSIN,HRFE and VSYNC. I think the issure in the OV10635 register setting, My OV10635 is producted in 2014, did you test the patch on the 2014 version chip and have the correct register setting?  Coment:yellow is FSIN, blue is VSYNC. Coment:yellow is HREF, blue is VSYNC. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang,      The patch of HD 720p sound view we have tested on I.MX6qp-sabreauto .But  now our board designed based on I.mx6qsabresd and BSP version is L3.14.52 for imx6qsabresd. So ,my question is  can you send us the patch for L3.14.52 of  imx6qsabresd ? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Winter, did you measure the correct pin? The HREF is the HSYNC signal, it is for line, so it will not be 30fps. I think you need check your OV10635 setting, if it is initialized by on board flash ROM, not from the MAX9286 driver, you should update your flash ROM setting. The VSYNC should align with the FSIN signal, this signal is from MAX9271's GPO. One FSIN, one VSYNC. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi~Li Qiang!       Thank you for your Patch~       I use your patch for my camera OV10635 board,  it is not work. I found  the VSYNC of the OV10635  is discontinuous,the HREF is ok and looks about 30fps.  Can you paste your VSYNC wave here? Thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The camera sensor AR0140 should connect to ISP AP0101, then AP0101 should connected to MAX9271 to output the serial signal. And I think, without AP0101, the AR0140 can't work in the solution. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi  Li Qiang:                     have change the config,But i find i your code only  have AP0101,not have AR0140,i run the board,like this: Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Please read the readme file again, it had already told you where to select the camera sensor. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi  Li qiang:                       i find my sensor is AR0140,not OV10635,Where I need to change?thank you Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Haifeng, yes the MAX9286 board was powered from iMX6 board with 5V power, and the OV10635 camera boards can also be powered from iMX6 boards's 5V, but there is another power connector on MAX9286 board which can be used to power the 4xOV10635 camera board, you can connect 12V power to it and select the jump on MAX9286 boards. So the final power: 5V from iMX6 board to MAX9286 board; 12V from MAX9286 board's power connector to OV10635 camera boards. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi  qiang li:                  i use the MAX9286 board,i find the max9286 board supply by 5V, my max9286board supply by maxim,they designed for I.mx6. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP These setting are used in mxc_mipi_csi2.c and mxc_v4l2_capture.c, you can modify the code directly. By the way, I think you should not compare the patched 3.10.53 files with 3.0.35 files, you can manually modify the 3.0.35 files directly, based on the code modification in patches. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP inux_3.10.35/arch/arm/boot/dts/imx6q-sabreauto.dts  中     &mipi_csi { status = "okay"; lanes = <4>; mipi-csi2-channel@0 { ipu_id = <0>; csi_id = <0>; v_channel = <0>; status = "okay"; }; mipi-csi2-channel@1 { ipu_id = <0>; csi_id = <1>; v_channel = <1>; status = "okay"; }; mipi-csi2-channel@2 { ipu_id = <1>; csi_id = <0>; v_channel = <2>; status = "okay"; }; mipi-csi2-channel@3 { ipu_id = <1>; csi_id = <1>; v_channel = <3>; status = "okay"; }; }; 这一段在3.0.35中怎么处理? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Jin, if you supply the camera board with 5V power and using long Coax cable, there is chance to get such issue. The OV10635 camera board is designed for 7~12V power supply, so you can supply the camera board with 12V power. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP dear Qiang Li:                              have you try on the imx6q-sabreauto board? i can not use the max9286 on sabreauto board,it is some error: 1 -x 0 -g2d &lo:/unit_tests# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d [1] 845 root@imx6qdlsolo:/unit_tests# max9286_mipi: sensor number = 1. mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 192 Mbps mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x44. max9286_mipi 1-006a: ov10635_read_reg:read reg error: reg=0x300a. max9286_mipi 1-006a: ov10635_check_device: OV10635 hasn't been found, reg[0x300a] = 0x0. mipi csi2 can not receive sensor clk! MIPI_CSI_PHY_STATE = 0x6f0. g_in_width = 1280, g_in_height = 800. fb_fix.id = DISP4 FG. fb: smem_start = 0x73600000, smem_len = 0x480000. fb: frame buffer size = 0x180000 bytes. fb: g_screen_info.xres = 1024, g_screen_info.yres = 768. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 960. fb: g_display_height = 540. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP You can link the libg2d.so to libg2d.so.0.8. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP dear Qiang Li:                       i have use the L3.14.52,it is some error use the binary in mxc_v4l2_tvin_max9286.tar.gz which yours,the log : ./mxc_v4l2_tvin.out: error while loading shared libraries: libg2d.so.0.8: cannot open shared object file: No such file or directory Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP There is binary file in mxc_v4l2_tvin_max9286.tar.gz, you can use it directly. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li                  i use de 3.14.52,all patch used,but i have not use,mxc_v4l2_tvin_max9286.tar.gz,in the rootfs,i use unit_tests/mxc_v4l2_tvin.out ,it is nothing to display,can you help me?in the 3.14.52 yocto ,i can not complie the mxc_v4l2_tvin_max9286.tar.gz ,it is something wrong Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP After commented out adv7180, it became OK. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li I see. the adv7180 should be commented out in imx6qdl-sabreauto.dtsi file. Thank you! ZongbiaoLiao Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP From your log "g_in_width = 720, g_in_height = 624", I think the IPU0 CSI0 port hasn't been used by the MAX9286, it is still combined with adv7180. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li The log is as bellow: --------------------------------------- root@imx6qsabreauto:/unit_tests# ./max9286.sh root@imx6qsabreauto:/unit_tests# g_in_width = 1280, g_in_height = 800. fb_fix.id = DISP3 FG. g_in_width = 1280, g_in_height = 800. g_in_width = 1280, g_in_height = 800. fb: smem_start = 0x72c00000, smem_len = 0xbdd800. fb_fix.id = DISP3 FG. fb: frame buffer size = 0x3f4800 bytes. fb: g_screen_info.xres = 1920, g_screen_info.yres = 1080. fb: g_display_left = 960. fb: g_display_top = 0. fb: g_display_width = 960. fb: g_display_height = 540. fb: smem_start = 0x72c00000, smem_len = 0xbdd800. start time = 1457509993 s, 697691 us fb: frame buffer size = 0x3f4800 bytes. fb: g_screen_info.xres = 1920, g_screen_info.yres = 1080. fb: g_display_left = 0. fb: g_display_top = 540. fb_fix.id = DISP3 FG. fb: g_display_width = 960. fb: g_display_height = 540. fb: smem_start = 0x72c00000, smem_len = 0xbdd800. fb: frame buffer size = 0x3f4800 bytes. fb: g_screen_info.xres = 1920, g_screen_info.yres = 1080. fb: g_display_left = 960. fb: g_display_top = 540. fb: g_display_width = 960. fb: g_display_height = 540. start time = 1457509993 s, 717597 us start time = 1457509993 s, 717698 us g_in_width = 720, g_in_height = 624. fb_fix.id = DISP3 FG. fb: smem_start = 0x72c00000, smem_len = 0xbdd800. fb: frame buffer size = 0x3f4800 bytes. fb: g_screen_info.xres = 1920, g_screen_info.yres = 1080. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 960. fb: g_display_height = 540. start time = 1457509994 s, 45827 us ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0 VIDIOC_DQBUF failed. ------------------------------------------------------ and what the HDMI display showed is as bellow: The first camera shows nothing and after several seconds the 'ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0' is output, all other three cameras also stop and show nothing. Thank you! ZongbiaoLiao Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP What's the error log? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi, Qiang Li I selected MAX9271. My problem is three cameras work except the first one. Thank you! ZongbiaoLiao Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP You need select MAX96705 or MAX9271 in the kernel config, if it is different with your hardware, it will not work. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li Thank you for releasing patch for L3.14.52_GA1.1.0. I have tested the patch,but  I met  a problem. The first camera(mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 1 -x 0 -g2d &) does not show anything, and after several seconds, error 'VIDIOC_DQBUF failed' happened,all other three cameras also stopped. Then I tested patch for 3.10.53,all cameras have no problem. Could you help me? Thank you! ZongbiaoLiao Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP We have no plan to back porting the driver to 3.0.35 BSP, please do it by yourself. Thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi~Li Qiang!       Thank you for your Patch~        But our cpu is IMX6Q-Sabresd, Camera is Ov10635. LTIB is L3.0.35_4.1.0        Can you help me support this Patch ?        Thanks Sincerely~~ Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> FRSYNC/GPI does not need to be connected to iMX6, and CSI0_MCLK is not used. All working mode settings are between MAX9286 and camera, so you need to confirm with Maxim about the specific connection settings between MAX9286 and Camera (AP0101). For iMX6, you only need to connect the data and clock of MIPI CSI2. If the working mode of MAX9286 and Camera is not correct, the data coming from MIPI will be abnormal. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Thank you very much. The problem of video0 not displaying has been solved. Now there is another problem, that is, the YUV data obtained through the mxc_v4l2_tvin_max9286 process is always reversed. For example, I set g_in_fmt = V4L2_PIX_FMT_UYVY in my application, and the data viewed in capture_buffers is actually YUYV. If g_in_fmt = V4L2_PIX_FMT_YUYV, the data viewed in capture_buffers is actually UYVY. I configured the CSI data format YUYV and UYUV by changing CSI0_SENS_DATA_FORMAT, but it didn't work. Is this modification correct? What causes this problem? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Boss, didn't you adjust it on version 3.0.35 before? Please share with us. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Supplement: The sensor I use is ov490 (isp) + ov10640 (sensor), and the data format output by the sensor is YUV422---YUYV. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> @Qiang Li - Mpu Se Hello! Thanks for your reply! First of all, the high and low data lines from the camera to the MAX96705 are indeed reversed, but we only connected 8 data lines instead of 10. The picture shown above is the image after the data lines are reversed. The specific settings are as follows: max9271_write_reg(i, 0x20, 0x07); max9271_write_reg(i, 0x21, 0x06); max9271_write_reg(i, 0x22, 0x05); max9271_write_reg(i, 0x23, 0x04); max9271_write_reg(i, 0x24, 0x03); max9271_write_reg(i, 0x25, 0x02); max9271_write_reg(i, 0x26, 0x01); max9271_write_reg(i, 0x27, 0x00); max9271_write_reg(i, 0x30, 0x17); max9271_write_reg(i, 0x31, 0x16); max9271_write_reg(i, 0x32, 0x15); max9271_write_reg(i, 0x33, 0x14); max9271_write_reg(i, 0x34, 0x13); max9271_write_reg(i, 0x35, 0x12); max9271_write_reg(i, 0x36, 0x11); max9271_write_reg(i, 0x37, 0x10); Then we changed it according to your settings, and after that the image lost more outline details. Could there be some other factor causing this? Thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi, our current board is IMX6QP+MAX9286+MAX96705+AP0101AT+AR0143AT , and the kernel version is L4.1.15. AP0101 is equipped with a flash and uses the firmware provided by the supplier. The video format is: YUV422 8bit/LSB. It has been confirmed that the video data output by the ISP is normal. Currently only one camera module is connected for debugging. After applying the patch you provided, the following prompt appears: root@imx6qp-avm718:/unit_tests# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 0 -x 0 In MVC: mxc_v4l_open device name is Mxc Camera End of mxc_v4l_open: v2f pix widthxheight 288 x 352 End of mxc_v4l_open: crop_bounds widthxheight 1280 x 720 End of mxc_v4l_open: crop_defrect widthxheight 1280 x 720 End of mxc_v4l_open: crop_current widthxheight 1280 x 720 On Open: Input to ipu size is 1280 x 720 max9286_mipi: sensor number = 1. mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 148 Mbps mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x42. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl 80685600 case VIDIOC_QUERYCAP In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c0045627 case VIDIOC_S_INPUT In MVC:mxc_streamoff In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c02c563a case VIDIOC_CROPCAP In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c0cc5616 case VIDIOC_S_PARM In mxc_v4l2_s_param Current capabilities are 0 Current capturemode is 0 change to 0 Current framerate is 30 change to 0 clock_curr=mclk=27000000 g_fmt_cap returns widthxheight of input as 1280 x 720 In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c0cc5605 case VIDIOC_S_FMT In MVC: mxc_v4l2_s_fmt type=V4L2_BUF_TYPE_VIDEO_CAPTURE End of mxc_v4l2_s_fmt: v2f pix widthxheight 1280 x 720 End of mxc_v4l2_s_fmt: crop_bounds widthxheight 1280 x 720 End of mxc_v4l2_s_fmt: crop_defrect widthxheight 1280 x 720 End of mxc_v4l2_s_fmt: crop_current widthxheight 1280 x 720 In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c0cc5604 case VIDIOC_G_FMT In MVC: mxc_v4l2_g_fmt type=1 type is V4L2_BUF_TYPE_VIDEO_CAPTURE End of mxc_v4l2_g_fmt: v2f pix widthxheight 1280 x 720 End of mxc_v4l2_g_fmt: crop_bounds widthxheight 1280 x 720 End of mxc_v4l2_g_fmt: crop_defrect widthxheight 1280 x 720 End of mxc_v4l2_g_fmt: crop_current widthxheight 1280 x 720 g_in_width = 1280, g_in_height = In MVC:mxc_v4l_ioctl 720. In MVC: mxc_v4l_do_ioctl c0145608 case VIDIOC_REQBUFS In MVC:mxc_streamoff MVC: In mxc_free_frame_buf In MVC:mxc_allocate_frame_buf - size=1843200 fb_fix.id = DISP3 BG - DI1. It is background screen, only full screen default format was supported. fb: smem_start = 0x73500000, smemIn MVC:mxc_v4l_ioctl _len = 0xbdd800. fb: frame buffIn MVC: mxc_v4l_do_ioctl c0445609 er size = 0x3f4800 bytes. fb: g case VIDIOC_QUERYBUF _screen_info.xres = 1920, g_screeIn MVC:mxc_v4l2_buffer_status n_info.yres = 1080. fb: g_displIn MVC:mxc_mmap ay_left = 0. fb: g_display_top pgoff=0x72d00, start=0x75e00000, end=0x75fc2000 = 0. fb: g_display_width = 1920In MVC:mxc_v4l_ioctl . In MVC: mxc_v4l_do_ioctl c0445609 case VIDIOC_QUERYBUF In MVC:mxc_v4l2_buffer_status In MVC:mxc_mmap pgoff=0x72f00, start=0x75c3e000, end=0x75e00000 In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c0445609 case VIDIOC_QUERYBUF In MVC:mxc_v4l2_buffer_status In MVC:mxc_mmap pgoff=0x73100, start=0x75a7c000, end=0x75c3e000 In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c0445609 case VIDIOC_QUERYBUF In MVC:mxc_v4l2_buffer_status In MVC:mxc_mmap pgoff=0x73300, start=0x758ba000, end=0x75a7c000 In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c044560f case VIDIOC_QBUF In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c044560f case VIDIOC_QBUF In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c044560f case VIDIOC_QBUF In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c044560f case VIDIOC_QBUF In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl 40045612 case VIDIOC_STREAMON In MVC:mxc_streamon IPU:In csi_enc_enabling_tasks In csi_enc_setup start time = 1540834851 s, 23859 In MVC:mxc_v4l_ioctl us In MVC: mxc_v4l_do_ioctl c0445611 case VIDIOC_DQBUF In MVC:mxc_v4l_dqueue ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0 VIDIOC_DQBUF failed. In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl 40045613 case VIDIOC_STREAMOFF In MVC:mxc_streamoff CSI_MEM0:fffffc0,CIS_MEM1:10ffffc1,CSI_MEM2:11ffffc2,CSI_MEM3:12ffffc3,CSI_PRP_ENC_MEM:13ffffd4,CSI_PRP_VF_MEM:14ffffd5 channel:fffffc0 In MVC:mxc_free_frames In MVC:mxc_v4l_close In MVC:mxc_streamoff mxc_v4l_close: release resource MVC: In mxc_free_frame_buf In MVC:mxc_free_frames It seems that the video data is not obtained. I measured the output of MAX9286 mipi, where the mipi clk is 72MHz, and the waveform on the data pin is as follows; I considered the problem of the data pins of AP0101 and MAX96705 being misaligned or reversed, but from other people's previous experience, if the data pins are misaligned, the video can be seen, but the video picture is abnormal, and VIDIOC_DQBUF failed will not appear; Could you please provide some debugging tips? Thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> I want to compress four cameras into one 720p video in up, down, left, and right format for storage. How can I integrate the four videos? Do you have any suggestions? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> ferhatolgun ‌Hello, have you solved your problem? I am facing the same problem as yours. If you have solved it, could you let me know? Thank you! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Our image was called out in version 3.0.35. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi, I reversed the polarity of VS, and then added the code you provided, and now the picture appears, thank you! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Thank you very much for your reply. Bit 19 is 1 and it is ok now. The CSI0_SENS_DATA_FORMAT configuration of CSI data format YUYV and UYUV did not work. Is this modification correct? What causes this problem? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi Pengtao, AP0101 needs to be set to Frame Sync mode instead of the default Free Run mode. In Free Run mode, you will see your phenomenon: a single camera is OK, but multiple cameras are not. If your camera settings are in the flash ROM, then these settings need to be modified according to the driver. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> This should be the high and low data lines from the camera to the MAX96705 are reversed. They can be reversed when setting 96705 (italic part): #ifdef MAX96705 //Invert VSYNC max9271_write_reg(0, 0x40, 0x2F); msleep(2); max9271_write_reg(0, 0x08, 0x81); msleep(2);  max9271_write_reg(0, 0x97, 0x5F);  max9271_write_reg(0, 0x20, 0x09);  max9271_write_reg(0, 0x21, 0x08);  max9271_write_reg(0, 0x22, 0x07);  max9271_write_reg(0, 0x23, 0x06);  max9271_write_reg(0, 0x24, 0x05);  max9271_write_reg(0, 0x25, 0x04);  max9271_write_reg(0, 0x26, 0x03);  max9271_write_reg(0, 0x27, 0x02);  max9271_write_reg(0, 0x28, 0x01);  max9271_write_reg(0, 0x29, 0x00);  max9271_write_reg(0, 0x30, 0x19);  max9271_write_reg(0, 0x31, 0x18);  max9271_write_reg(0, 0x32, 0x17);  max9271_write_reg(0, 0x33, 0x16);  max9271_write_reg(0, 0x34, 0x15);  max9271_write_reg(0, 0x35, 0x14);  max9271_write_reg(0, 0x36, 0x13);  max9271_write_reg(0, 0x37, 0x12);  max9271_write_reg(0, 0x38, 0x11);  max9271_write_reg(0, 0x39, 0x10); #else Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hello, the picture is out now, but the picture is abnormal. The whole picture is green, and the light part is pink. I guess it is because the sensor output is YUYV. In the application mxc_v4l2_tvin.c, I converted the captured data into UYVY and displayed it. The picture color is normal. It is verified that this problem is caused by the sensor output format being YUYV. Since converting data to UYVY in the application will occupy system resources, make the following changes in the driver and in max9286_mipi.c: - max9286_data[0].pix.pixelformat = V4L2_PIX_FMT_UYVY;  + max9286_data[0].pix.pixelformat = V4L2_PIX_FMT_YUYV;  - if(sensor->pix.pixelformat == V4L2_PIX_FMT_UYVY){ + if(sensor->pix.pixelformat == V4L2_PIX_FMT_YUYV){       for(i = 0; i < MAX_SENSOR_NUM;i++)             mipi_csi2_set_datatype(mipi_csi2_info,i,MIPI_DT_YUV422); } Then, execute the following command: ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 1 -x 0 -if YUYV Track and check that the CSI_SENS_CONF register value is 0x900, which means that SENS_DATA_FORMAT has been successfully configured to YUYV; However, the picture output through HDMI is still abnormal, and it is exactly the same as the picture before the modification, which makes it feel like the modification has not taken effect; Is there any problem with the above modification method? Is there any other place that needs to be modified synchronously? Thank you! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hello! We are currently adjusting a camera with IMX225+FH8536+MAX96705, platform: IMX6+MAX9286, Kernel version 3.14.52. The basic outline of the video is normal, but the color is not normal, as shown in the figure In order to verify whether there is a problem with the front-end ISP output, we did an experiment. We disconnected the ISP from the MAX96705, connected the ISP output to a decoder (TW8836), and then debugged 8836. We found that the image can be output normally, that is, there is no problem with the data output by the ISP, and the output format is YVYU. So I would like to ask, can max96705 convert YVYU data into UYVY format and then pass it to MAX9286? Or how should the display part be processed on the imx6 end? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi Qiang Li: I debugged the situation on the L3.14.52_GA1.1.0 version: 1. Onsemi AR0143+AP0101+MAX9 6705+Max9286+Imx6D single channel display is normal. 2. Onsemi AR0143+AP0101+MAX9 6705+Max9286+Imx6D two-way display effect is as shown in the figure: The camera on the right shows why this is the case, and there are four identical images, all with a green tint. What is the problem? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hello Qiang Li , Thanks for your help. The problem has been solved with the solution you provided! The system instability mentioned above is caused by other reasons and has nothing to do with this solution! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Dear Qiang, I am using the s32v-evb development board to debug MAX9286 + Onsemi AR0140 + AP0101 + MAX9271. Do you have any relevant debugging documents or reference code that you can provide me with? Thanks a lot. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Currently, the MAX96705 is set up to sample the camera image using 10 data lines. If only 8 lines are connected, the high 2 bits of the image will be lost after inversion, which is basically unacceptable. You can ask Maxim how to handle the 8-line method. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Let's see if your input is: Raw data input or YUV input, if it is raw CMOS sensor input, it should be 12bit. Bit loss will cause problems. If it is 8-bit YUV input (BT656), it depends on whether you have the right bits, 0~7 or 2~9... Serdis usually does a transmission, what is input is what is output~ [email protected] Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hello, can I ask you a question: 1. I see that FH8536 seems to have only analog output, how did you connect it to 96705; 2. If IMX225+FH8536 is used, how do you synchronize the images of the four lens modules? Looking forward to your reply, thank you! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> You can measure the lock pin of MAX9286. It should be high all the time to ensure the stable output of MIPI data. If the camera and MAX9286 are not set up properly, the high level cannot be maintained all the time, and the data will be incomplete. From the test results of AP0101, the MAX9286 needs to be set to manual mode, and the register 0x08 needs to be adjusted according to the camera's frame rate setting: #ifdef SENSOR_AP0101  //Manual Mode  max9286_write_reg(0x01, 0x00);  max9286_write_reg(0x63, 0x00);  max9286_write_reg(0x64, 0x00);  max9286_write_reg(0x06, 0x00);  max9286_write_reg(0x07, 0x00);  max9286_write_reg(0x08, 0x26); #endif Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> hi  Qiang li: Because the products we developed with BYD include tw6865 + max9286. I have already adjusted tw6865 on 3.0.35, but it is more difficult to adjust 9286 on 3.0.35, so I hope to get your help. I think the first step should be to enable the 4 virtual channels of imx6 to collect data at the same time. The second step is to adjust the device. At present, max9286 can sometimes detect the device AP0101, but sometimes it cannot detect it. I don’t know why. I suspect that there is a problem with enabling the 4 virtual channels. I transplanted it according to the patch 3.10.53 you released. I hope to get your help. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi Qiang Li ! How many 720P 60fps camera inputs can imx8 support? (All IMX8 included) Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> On the MAX9286 side, you can try to modify register 0x08 max9286_write_reg(0x08, 0x26); Change to max9286_write_reg(0x08, 0x2C); It is best to refer to the settings in the Driver for the Flash settings in your Camera module. The frame rate under FrameSync mode should be determined by the MAX9286. So in theory, it should not happen that the MAX9286 sends FrameSync to the camera at 30fps while the camera sends images at 25fps. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi, our lens uses MAX96705+AP0101+AR0143AT, AP0101 is connected with a flash, ISP output is YUV422/8bit/LSB, and VIDIOC_DQBUF failed is displayed. After reading other people's questions, it seems that VIDIOC_DQBUF failed will not appear if it is a data misalignment problem. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> hello yu  :  能否将l3.0.35的补丁给我一份,[email protected]。感激不尽 Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> According to the MIPI specification, the YUV422 transmitted by MIPI CSI2 should be in UYVY format, but you are transmitting YUYV, so you cannot use a unified setting to process it. In mxc_v4l2_tvin, the settings of g_in_fmt (g_g2d_fmt) will be set in the Driver by default, and will also be used when rendering. According to your situation, the Driver should use all UYVY settings, and then when rendering, just change g_in_fmt (g_g2d_fmt) to YUYV. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> The lock pin of MAX9286 cannot maintain a high level, which means it cannot completely lock the camera signal. Then the data on MIPI CSI2 must be problematic. This has nothing to do with the iMX6. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Qiang_FSL‌ In addition, my environment is as follows: OV10635 sensor MAX96705 Serializer MAX9286 Deserializer kernel 4.1.15 patch L3.14.52_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip The image can be displayed, but the color is wrong. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi, my previous statement was wrong. The real reason is that the CSI2IPU gasket output format is configured as YUYV. The problem is solved after setting the YUV422_8BIT_FM of the CSI2IPU_SW_RST register to UYVY. Thank you! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hello Qiang_FSL , there is also a color problem! I saw your email and compared it with the original code. I found that the ov10635_setting in the email is exactly the same as the setting in the original code. There is also the file MAX9286_OV10635_1280x800_Quad_FSIN_MOD.C. I don’t know if it is useful to me. How can I modify the original code? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi. Qiang Li When we connect 4 720p@60pfs cameras, what is the delay from camera connection to display on the screen? Do you have this performance indicator?      When we access 8-way For a 720p@60pfs camera, what is the latency from camera access to screen display? Do you have this performance indicator? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Thanks for your reply. We are now running normally with 0143+0101+96705. The synchronization of 0143 is indeed controlled by the trigger in of the sensor, but IMX225 does not seem to have a trigger pin. The datasheet describes that slave mode requires VS and HS. In addition, I see that the FH8536 ISP only has analog output, and 96705 does not seem to be able to connect to analog input. I don't know how the IMX225+FH8536+MAX96705 solution solves these two problems. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> The photosensitive sensor I use here is AP0143; the sensor has been frame synced, because in the previous mode, multiple sensors cannot produce images; Now when I capture 320 lines and connect three sensors, there will be no scrolling, but there will be horizontal bars and jitter. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> HiJiajie Wu It depends on what camera sensor you use. If you buy a ready-made module, it usually comes with flash, and its working mode is set in the flash ROM. Even if the Frame Sync mode is set on the MAX9286, the camera mode cannot be changed. In addition, for some camera sensors (such as AP0101+AR0130), the time from HSYNC to VSYNC of the last line is less than 255 pixel clocks, which may also cause problems. In this case, the IPU CSI needs to capture fewer lines of data. For example, for an input of 720 lines, the IPU CSI only captures 712 lines. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> I also need the patch for version L3.0.35_4.1.0, thank you Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Qiang li: The patches applied in bsp 3.10.53 are as follows:      static int mipi_csi2_probe(struct platform_device *pdev) { . . . . . . . . . . ret = of_property_read_u32(np, "lanes", &(gmipi_csi2->lanes)); if (ret) { dev_err(&pdev->dev, "lanes missing or invalid\n"); goto err; } if (gmipi_csi2->lanes > 4) { dev_err(&pdev->dev, "invalid lanes for mipi csi2!\n"); ret = -EINVAL; goto err; } for_each_child_of_node(np, child) { struct mipi_csi2_chan *chan; if (!of_device_is_available(child)) continue; ret = of_property_read_u32(child, "v_channel", &v_channel); if (ret) { dev_err(&pdev->dev, "v_channel missing\n"); goto err; } if (v_channel > 3) { dev_err(&pdev->dev, "v_channel invalid\n"); ret = -EINVAL; goto err; } chan = &(gmipi_csi2->mipi_chan[v_channel]); ret = of_property_read_u32(child, "ipu_id", &(gmipi_csi2->mipi_chan[v_channel].ipu_id)); if (ret) { dev_err(&pdev->dev, "ipu_id missing or invalid\n"); goto err; } ret = of_property_read_u32(child, "csi_id", &(gmipi_csi2->mipi_chan[v_channel].csi_id)); if (ret) { dev_err(&pdev->dev, "csi_id missing or invalid\n"); goto err; } if ((gmipi_csi2->mipi_chan[v_channel].ipu_id < 0) || (gmipi_csi2->mipi_chan[v_channel].ipu_id > 1) || (gmipi_csi2->mipi_chan[v_channel].csi_id > 1)) { dev_err(&pdev->dev, "invalid param for mipi csi2!\n"); ret = -EINVAL; goto err; 。。。。。。。。。。。。 This is how I handled this part in 3.0.35. Please help me check if there is any problem.    static int mipi_csi2_probe(struct platform_device *pdev) { struct mipi_csi2_platform_data *plat_data = pdev->dev.platform_data; struct resource *res; u32 mipi_csi2_dphy_ver; struct mipi_csi2_chan *chan; int ret , v_channel; printk("mipi_csi2 probe start !!!!!!!!!!!!!!!!!!!!!\n"); gmipi_csi2 = kmalloc(sizeof(struct mipi_csi2_info), GFP_KERNEL); if (!gmipi_csi2) { ret = -ENOMEM; goto alloc_failed; } printk("v_channel is %d !!!!!!!!!!!!!!!!1111\n",v_channel); /* initialize mutex */ mutex_init(&gmipi_csi2->mutex_lock); chan = &(gmipi_csi2->mipi_chan[v_channel]); /* get mipi csi2 informaiton */ gmipi_csi2->pdev = pdev; gmipi_csi2->mipi_en = false; //gmipi_csi2->ipu_id = plat_data->ipu_id; //gmipi_csi2->csi_id = plat_data->csi_id; //gmipi_csi2->v_channel = plat_data->v_channel; gmipi_csi2->lanes = plat_data->lanes; printk("plat_data lanes is %d !!!!!!!!!!!!!!!\n", plat_data->lanes); v_channel = plat_data->v_channel; gmipi_csi2->mipi_chan[v_channel].ipu_id= plat_data->ipu_id; gmipi_csi2->mipi_chan[v_channel].csi_id= plat_data->csi_id; if ((gmipi_csi2->mipi_chan[v_channel].ipu_id < 0) || (gmipi_csi2->mipi_chan[v_channel].ipu_id > 1) || (gmipi_csi2->mipi_chan[v_channel].csi_id > 1)) { dev_err(&pdev->dev, "invalid param for mipi csi2!\n"); ret = -EINVAL; } . . . . . . . The platform data is as follows:   static struct mipi_csi2_platform_data mipi_csi2_pdata = { .ipu_id = 0, //0 // modify by lee .csi_id = 0, .v_channel = 0, .lanes = 4, .dphy_clk = "mipi_pllref_clk", .pixel_clk = "emi_clk", }; Is this operation OK? Thank you. I have been dealing with max9286 on 3.0.35 for a long time. There has been no progress. I hope to get your support. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Thanks for your reply, Our application scenario is like this: the 4-way spliced display screen is encoded and stored, so it is equivalent to only encoding one 720P. Since it is not a direct encoding of the original image, it is impossible to output the UYVY image into NV12 for encoding through the camera driver. Our splicing is achieved through the GPU, and the image sent to the encoder is RGBA32, so the color space conversion is required before encoding, and then the image is abnormal. In fact, we also tested the color conversion of a single-channel 720×480 image, that is, first reduce the 720P image to 720×480 through the GPU and then transcode and record with this resolution image, which will also cause input image abnormality. If we transcode 720×480 (RGBA32 -> NV12 or UYVY -> NV12), only one channel will be abnormal. If the transcoding is 1280×720, except for the first channel, the other three channels are all abnormal. I checked the underlying driver and found that the data flow is CSI--> SMFC--> IDMAC--> MEM. I tracked the IDMAC channel usage and the default is CSI_MEM0 = _MAKE_CHAN(15, NO_DMA, NO_DMA, NO_DMA, 0). CSI_MEM1 = _MAKE_CHAN(16, NO_DMA, NO_DMA, NO_DMA, 1), CSI_MEM2 = _MAKE_CHAN(17, NO_DMA, NO_DMA, NO_DMA, 2), CSI_MEM3 = _MAKE_CHAN(18, NO_DMA, NO_DMA, NO_DMA, 3), The problem at 720×480 is CSI_MEM1 = _MAKE_CHAN(16, NO_DMA, NO_DMA, NO_DMA, 1). If the above channel control is modified as follows CSI_MEM0 = _MAKE_CHAN(15, NO_DMA, NO_DMA, NO_DMA, 1), CSI_MEM1 = _MAKE_CHAN(16, NO_DMA, NO_DMA, NO_DMA, 0), CSI_MEM2 = _MAKE_CHAN(17, NO_DMA, NO_DMA, NO_DMA, 2), CSI_MEM3 = _MAKE_CHAN(18, NO_DMA, NO_DMA, NO_DMA, 3), Then the problematic channel becomes CSI_MEM0 = _MAKE_CHAN(15, NO_DMA, NO_DMA, NO_DMA, 1). From this perspective, it seems that the driver has a conflict in managing the underlying resources. Or the hardware itself does not support this usage. Can you help confirm the root cause of the problem and do you have any suggestions? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> zhang hongliang : Hello. My sensor is the same as yours, ov10640+ ov490 ISP + max96705. Could you please send me a copy of your debugged code? Or what parameters or registers should I change in the official code? Thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> The standard 720P60 pixel clock is 74.25MHz. If it is UYVY For a 16bpp camera, the bandwidth of a single camera is 74.25M*16. = 1.188Gbps The maximum bandwidth of MIPI CSI2 of iMX8 and iMX8X is 6Gbps, and each can support 4 virtual channels, so each MIPI CSI2 port can support 4 720P60 cameras. iMX8 has 2 MIPI CSI2 ports, so it can support 8. iMX8X has only one MIPI CSI2, so it can support 4 channels, but it has an 8-bit parallel CSI, which can also support one 720P camera, which adds up to 5 channels. Although iMX8M has 2 MIPI CSI2, it does not support multi virtual channel, so it can only support 2 cameras. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> HI Liqiang: Hello! I use imx6d + max9286 + max96705 to preview three cameras at the same time. When two or three cameras are connected, the preview screen will shake and roll; It's normal for me to only connect one camera. Confirmed with Maxim FAE that all cameras are in frame sync mode. I have been looking for this question for a long time. Please help me
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NFC Reader Library Migration to FRDM-MCXN947 Introduction. This document provides a guide on how to use the NFC frontend PN5190 with the FRDM-MCXN947 and using the latest existing version of the NFC Reader Library. The hardware required to follow this guide is: FRDM-MCXN947 development board as host MCU. PNEV5190BP (based on PN5190) as the NFC transceiver Software Setup. MCXN947 SDK version: 26.06.00 NFCReaderLibrary version: 07.16.00 PN5190 FW version: 0x20D MCUxpresso IDE version: 25.6 Hardware connections. The PNEV5190 comes with a Kinetis K82F as a host MCU to drive the PN5190 Since the goal is to drive PN5190 from the MCXN947 via SPI, we need to prepare the PNEV5190 for it: Power up board correctly Enable external SPI pins Disable K82F interface with PN5190 Power up and jumper configuration To power up the board correctly: – Powering it up over USB does not provide enough current. It will be powered with an external power supply of 7.5V over connector J17. Put jumper on following pins: – J9 2-3: External power supply – J8: VBATPWR supplied with VBAT=3.3 V – J12: VBAT supplied with 3.3 V Remove jumpers on following pins: – J22, J23: open SDA signals for K82F – J19: RTS push-button bypass for K82F – J3, J4, J5, J6: pull down jumpers for NFC module signals Set GPIO and SPI voltage to 3.3 V: supplying 3.3 V to VDDIO and the μC supply: – Remove short circuit on R19 – Place short circuit on R20 For any additional configuration, please see PNEV5190B evaluation board quick start guide. Location of the changes mentioned above can be seen in the following image: Routing NFC module communication pins to JP1 To enable the pins on JP1 for communication, we must enable bus switch U10 and disable bus switch U12 in the NFC Host Interface. These switches enable or disable the connections from K82 to PN5190 SPI pins, and expose the SPI interface to an external host. Remove short on R5 to disable communication routing to K82F. Place short on R7 to enable communication routing to JP1 pins. For FRDM-MCXN947 side, no modifications are necessary.  The pins used are available in Header J1 and J2. Which are shown in the following table.   Name MCXN947 PN5190 SCK J2.12 JP1.1 MOSI J2.8 JP1.2 MISO J2.10 JP1.3 SSEL J2.6 JP1.4 IRQ J1.16 JP1.5 RESET J2.2 JP6.1 GND J2.14 JP1.10 SUCCESS J2.17* FAIL J2.15* DWL J2.13* * Pins that need to be configured for library compatibility but are not used and do not need to be connected. Software Changes This section describes the software changes required to run the “NfcrdlibEx1_DiscoveryLoop” example from the NFC Reader Library which consists in a detection loop that displays in a terminal information (like UID, SAK, and Product Type for MIFARE product-based cards) about any tag detected by the PN5190. Please download the NFC Reader Library for PN5190 from NFC Reader Library | NXP Semiconductors. To begin with the migration, we first need to create a project with the FRDM-MCXN947 SDK (v26.06.00), for this purpose download and install the FRDM-MCXN947 SDK from the SDK Builder. Importing NFC Reader Library Click on “File” from upper tab menu and “Import…”. In the Import wizard, select “Existing Projects into Workspace”. In the “Select root directory” search the directory where the downloaded library is located and click on Finish (do not check the “Copy projects into workspace” option). Note: If the K82 SDK is not installed an error message will appear, please click on cancel. Creating base project 1. In the Quick Start panel click on “import SDK example(s)…” in the MCUXpresso IDE. 2. Select “frdmmcxn947” and click on next. 3. Select the SDK example “hello_world_cm33_core0” and click on finish. 4.Now we will add the required drivers for migration, which are SPI and CTIMER drivers. . Click on properties-> SDK Management-> Manage SDK Components. 5. Search in the filter bar “ctimer” and “lpspi” and check their boxes to add them and click on OK. Add the source code Discovery Loop Example From the imported example NfcrdlibEx1_DiscoveryLoop_mcux of the NFC Reader Library, find and copy the following files (included in src folder): NfcrdlibEx1_EmvcoProfile.c, phApp_Helper.c, phApp_Init.c, phApp_PN5190_Init.c; and paste them into the source folder inside the created base project. Additionally, delete the file hello_world .c created by the project.              Additionally, we need to add the file “NfcrdlibEx1_DiscoveryLoop.c” which is the main source file of the project, to do this right-click on the “source” folder of our project and then put the cursor on “New” and select “File”. In the tab that will open, write the name of the file (NfcrdlibEx1_DiscoveryLoop.c) and then, click on “Finish”. Finally, in the created file copy and paste all the code inside the original source file located in the library example. Link the NFC Reader Library elements To make the required software changes, we need to link the DAL, NxpNfcRdLib, phOsal and intfs folders into the base project, to do this: 1. In the Project Explorer, right click on the project and place your cursor on New and click on Folder. 2. In the New Folder tab, click on “Advanced >>” and select “Link to alternate location (Linked Folder)” and on “Browse…”. 3. Browse into the path where the library was extracted, choose the NxpNfcRdLib folder and click on Finish. 4. Do the same procedure for “Platform/DAL”, “Examples/NfcrdlibEx1_DiscoveryLoop/intfs” and “RTOS/phOsal” folders. If you have the folder in the same project explorer, the included folder will not appear, but you can see it when you open the window to add another folder, as shown in the following figure. But if the included folders are not in the Project Explorer, the Project should look like this: Once this is done, we will need to delete the “KinetisSDK” folder located in “DAL > src” to avoid multiple definition issues. Define FRDM-MCXN947 SDK preprocessor symbol We need to do some changes to the compiler preprocessor configuration. 1. Right click on the project in the Project Explorer and click on “Properties… 2. In the properties tab, go to “C/C++ Build > Settings > MCU C Compiler > Preprocessor”. The symbols are related with the FRDM board, but we need to add the following symbols related with the NFC Reader Library: PH_OSAL_NULLOS PHDRIVER_FRDMMCXN947_PN5190_BOARD NXPBUILD_CUSTOMER_HEADER_INCLUDED PHDRIVER_MCXN947_SPI_POLLING Click on the “Add...” button at the top right corner of the “Defined symbols (-D)” menu and enter each symbol mentioned before. These symbols are added so the preprocessor knows which header files to include at build time. PHDRIVER_FRDMMCXN947_PN5190_BOARD will help include the BoardSelection.h header, the file that is going to define addresses for registers and peripherals of MCXN947. PH_OSAL_NULLOS will include headers related to non-OS operation, meaning that the project will work without any operative system (at the end of this guide you will find the steps to add FreeRTOS support). NXPBUILD_CUSTOMER_HEADER_INCLUDED will add headers to add and select the NFC reader and host that will be used in the project. PHDRIVER_MCXN947_SPI_POLLING if is defined the example will perform SPI communication by polling method, and if not, will be perform through non-blocking transfers. 3. Once added, click on “Apply and Close”, "Rebuild Index" and then to “Yes” to save the changes. Modifying the Driver Abstraction Layer (DAL) The added linked folder DAL will contain the important changes to be able to use the MCXN947 as host device since it will contain all the changes regarding SPI, timer and GPIO configurations required by the library to work properly. Board_FRDM_MCXN947_PN5190.h We need to create a header file that will contain important macros used by the library that are related to the host specific SPI, timer and GPIO peripherals, as well as interrupt vectors and priorities, clock sources and addresses. This file is required to be inside the “boards” folder which is inside DAL. Please add the header file as the file created NfcrdlibEx1_DiscoveryLoop.c but replacing .c to .h: The file should be named as shown in the picture above. Inside this file, some important macros related to the SPI peripheral and the important pins to be handled (IRQ, Chip Select, Reset) are defined. Spoiler (Highlight to read) #ifndef DAL_BOARDS_BOARD_FRDM_MCXN947_PN5190_H_ #define DAL_BOARDS_BOARD_FRDM_MCXN947_PN5190_H_ #define GPIO_PORT 0 #define GPIO_PORT1 1 /****************************************************************** * LPSPI clock configuration ******************************************************************/ /*Clock Frequency for SPI Flexcomm 1*/ #define SPI_CLOCK_FREQ (CLOCK_GetLPFlexCommClkFreq(1u)) #define SPI_MASTER_CLOCK_FREQ SPI_CLOCK_FREQ /****************************************************************** * Board Pin/Gpio configurations ******************************************************************/ #define PHDRIVER_PIN_RESET ((GPIO_PORT << 8) | 28) /**< Reset pin, Pin28, PIO0_28 */ #define PHDRIVER_PIN_IRQ ((GPIO_PORT << 8) | 31) /**< IRQ pin, Pin10, PIO0_10 */ /* For 5190 busy is same as IRQ */ #define PHDRIVER_PIN_BUSY ((GPIO_PORT << 8) | 31) /**< IRQ pin, Pin31, PIO0_31 */ #define PHDRIVER_PIN_DWL ((GPIO_PORT << 8) | 19) /**< Download pin, Pin19, PIO0_19*/ /* These pins are used for EMVCo Interoperability test status indication, * not for the generic Reader Library implementation. */ #define PHDRIVER_PIN_SUCCESS ((GPIO_PORT1 << 8) | 0) /**< GPIO, Port 1, Pin0 */ #define PHDRIVER_PIN_FAIL ((GPIO_PORT1 << 8) | 1) /**< GPIO, Port 1, Pin1 */ /****************************************************************** * PIN Pull-Up/Pull-Down configurations. ******************************************************************/ #define PHDRIVER_PIN_RESET_PULL_CFG PH_DRIVER_PULL_UP #define PHDRIVER_PIN_IRQ_PULL_CFG PH_DRIVER_PULL_DOWN #define PHDRIVER_PIN_WKUP_PULL_CFG PH_DRIVER_PULL_UP #define PHDRIVER_PIN_CLK_PULL_CFG PH_DRIVER_PULL_UP #define PHDRIVER_PIN_DWL_PULL_CFG PH_DRIVER_PULL_UP #define PHDRIVER_PIN_NSS_PULL_CFG PH_DRIVER_PULL_UP #define PHDRIVER_PIN_BUSY_PULL_CFG PH_DRIVER_PULL_UP #ifndef DAL_BOARDS_BOARD_FRDM_MCXN947_PN5190_H_ #define DAL_BOARDS_BOARD_FRDM_MCXN947_PN5190_H_ #define GPIO_PORT 0 #define GPIO_PORT1 1 /****************************************************************** * LPSPI clock configuration ******************************************************************/ /*Clock Frequency for SPI Flexcomm 1*/ #define SPI_CLOCK_FREQ (CLOCK_GetLPFlexCommClkFreq(1u)) #define SPI_MASTER_CLOCK_FREQ SPI_CLOCK_FREQ /****************************************************************** * Board Pin/Gpio configurations ******************************************************************/ #define PHDRIVER_PIN_RESET ((GPIO_PORT << 😎 | 28) /**< Reset pin, Pin28, PIO0_28 */ #define PHDRIVER_PIN_IRQ ((GPIO_PORT << 😎 | 31) /**< IRQ pin, Pin10, PIO0_10 */ /* For 5190 busy is same as IRQ */ #define PHDRIVER_PIN_BUSY ((GPIO_PORT << 😎 | 31) /**< IRQ pin, Pin31, PIO0_31 */ #define PHDRIVER_PIN_DWL ((GPIO_PORT << 😎 | 19) /**< Download pin, Pin19, PIO0_19*/ /* These pins are used for EMVCo Interoperability test status indication, * not for the generic Reader Library implementation. */ #define PHDRIVER_PIN_SUCCESS ((GPIO_PORT1 << 😎 | 0) /**< GPIO, Port 1, Pin0 */ #define PHDRIVER_PIN_FAIL ((GPIO_PORT1 << 😎 | 1) /**< GPIO, Port 1, Pin1 */ /****************************************************************** * PIN Pull-Up/Pull-Down configurations. ******************************************************************/ #define PHDRIVER_PIN_RESET_PULL_CFG PH_DRIVER_PULL_UP #define PHDRIVER_PIN_IRQ_PULL_CFG PH_DRIVER_PULL_DOWN #define PHDRIVER_PIN_WKUP_PULL_CFG PH_DRIVER_PULL_UP #define PHDRIVER_PIN_CLK_PULL_CFG PH_DRIVER_PULL_UP #define PHDRIVER_PIN_DWL_PULL_CFG PH_DRIVER_PULL_UP #define PHDRIVER_PIN_NSS_PULL_CFG PH_DRIVER_PULL_UP #define PHDRIVER_PIN_BUSY_PULL_CFG PH_DRIVER_PULL_UP We define the macros as well for the interrupt vector of MCXN947, its priority, handler and trigger type. Spoiler (Highlight to read) /****************************************************************** * IRQ PIN NVIC settings ******************************************************************/ #define EINT_IRQn GPIO00_IRQn /*Adding interrupt vector A of GPIO*/ #define EINT_PRIORITY 7 /*Default interrupt priority for GPIO*/ #define CLIF_IRQHandler GPIO00_IRQHandler /*Interrupt handler for vector A*/ #define PIN_IRQ_TRIGGER_TYPE PH_DRIVER_INTERRUPT_RISINGEDGE /*Rising edge Trigger*/ /****************************************************************** * IRQ PIN NVIC settings ******************************************************************/ #define EINT_IRQn GPIO00_IRQn /*Adding interrupt vector A of GPIO*/ #define EINT_PRIORITY 7 /*Default interrupt priority for GPIO*/ #define CLIF_IRQHandler GPIO00_IRQHandler /*Interrupt handler for vector A*/ #define PIN_IRQ_TRIGGER_TYPE PH_DRIVER_INTERRUPT_RISINGEDGE /*Rising edge Trigger*/ As well as some macros for pin logic levels. Spoiler (Highlight to read) /***************************************************************** * Front End Reset logic level settings ****************************************************************/ #define PH_DRIVER_SET_HIGH 1 /**< Logic High. */ #define PH_DRIVER_SET_LOW 0 /**< Logic Low. */ #define RESET_POWERDOWN_LEVEL PH_DRIVER_SET_LOW #define RESET_POWERUP_LEVEL PH_DRIVER_SET_HIGH /***************************************************************** * Front End Reset logic level settings ****************************************************************/ #define PH_DRIVER_SET_HIGH 1 /**< Logic High. */ #define PH_DRIVER_SET_LOW 0 /**< Logic Low. */ #define RESET_POWERDOWN_LEVEL PH_DRIVER_SET_LOW #define RESET_POWERUP_LEVEL PH_DRIVER_SET_HIGH Finally, we define macros for the base address of CTIMER and SPI peripherals, clock frequencies, interrupt vectors and related pins. Spoiler (Highlight to read) /***************************************************************** * SPI Configuration ****************************************************************/ #define PHDRIVER_MCXN947_SPI_MASTER LPSPI1 #define PHDRIVER_MCXN947_SPI_DATA_RATE 5000000U #define PHDRIVER_MCXN947_SPI_CLK_SRC SPI_MASTER_CLOCK_FREQ #define PHDRIVER_MCXN947_SPI_IRQ LP_FLEXCOMM1_IRQn #define SPI_IRQ_PRIORITY 6 /*SPI interrupt priority*/ #define PHDRIVER_PIN_SSEL 27U/* Chip Select, Pin6, SPI */ #define PHDRIVER_PIN_SCK 25U/* SPI clock, Pin7, SPI */ #define PHDRIVER_PIN_MISO 26U/* MISO, Pin8, SPI */ #define PHDRIVER_PIN_MOSI 24U/* MOSI, Pin9, SPI */ #define PHDRIVER_FC1_SPI_DIV kCLOCK_DivFlexcom1Clk #define PHDRIVER_FC1_SPI_CLK kFRO12M_to_FLEXCOMM1 /*Clock to attach to Flexcomm1*/ /***************************************************************** * Timer Configuration ****************************************************************/ #define PH_DRIVER_SDK_CTIMER CTIMER0 /*CTIMER0 base*/ #define PH_DRIVER_SDK_CTIMER_CLK kCLOCK_DivCtimer0Clk/*CTIMER0 clock*/ #define PH_DRIVER_SDK_CTIMER_NVIC CTIMER0_IRQn /*Interrupt vector*/ #define PH_DRIVER_SDK_CTIMER_PRIORITY 4 #define PH_DRIVER_SDK_CTIMER_CLK_FREQ CLOCK_GetCTimerClkFreq(0U) /*CTIMER0 Clock frequency*/ #endif /* DAL_BOARDS_BOARD_FRDM_MCXN947_PN5190_H_ */ /***************************************************************** * SPI Configuration ****************************************************************/ #define PHDRIVER_MCXN947_SPI_MASTER LPSPI1 #define PHDRIVER_MCXN947_SPI_DATA_RATE 5000000U #define PHDRIVER_MCXN947_SPI_CLK_SRC SPI_MASTER_CLOCK_FREQ #define PHDRIVER_MCXN947_SPI_IRQ LP_FLEXCOMM1_IRQn #define SPI_IRQ_PRIORITY 6 /*SPI interrupt priority*/ #define PHDRIVER_PIN_SSEL 27U/* Chip Select, Pin6, SPI */ #define PHDRIVER_PIN_SCK 25U/* SPI clock, Pin7, SPI */ #define PHDRIVER_PIN_MISO 26U/* MISO, Pin8, SPI */ #define PHDRIVER_PIN_MOSI 24U/* MOSI, Pin9, SPI */ #define PHDRIVER_FC1_SPI_DIV kCLOCK_DivFlexcom1Clk #define PHDRIVER_FC1_SPI_CLK kFRO12M_to_FLEXCOMM1 /*Clock to attach to Flexcomm1*/ /***************************************************************** * Timer Configuration ****************************************************************/ #define PH_DRIVER_SDK_CTIMER CTIMER0 /*CTIMER0 base*/ #define PH_DRIVER_SDK_CTIMER_CLK kCLOCK_DivCtimer0Clk/*CTIMER0 clock*/ #define PH_DRIVER_SDK_CTIMER_NVIC CTIMER0_IRQn /*Interrupt vector*/ #define PH_DRIVER_SDK_CTIMER_PRIORITY 4 #define PH_DRIVER_SDK_CTIMER_CLK_FREQ CLOCK_GetCTimerClkFreq(0U) /*CTIMER0 Clock frequency*/ #endif /* DAL_BOARDS_BOARD_FRDM_MCXN947_PN5190_H_ */ MCXN947 SPI and SDK files Now, inside DAL > src folder we will create a folder named “MCXN947” that will contain 2 source files: phbalReg_Mcxn947Spi.c phDriver_Mcxn947SDK.c Inside these source files we will modify the functions from the source files of other board hosts with the specific configurations of MCXN947 peripheral drivers, such as SPI, timers, GPIOs and interrupt handlers. This is done based on SDK examples such as “ctimer_match_interrupt_example_cm33_core0” and “lpspi_polling_b2b_transfer_master_cm33_core0”. phbalReg_Mcxn947Spi.c: In this file we first need to include the necessary files and include the headers and callbacks to ensure the correct functionality: Spoiler (Highlight to read) #include "phDriver.h" #include #include "BoardSelection.h" #include #include #include #define PHBAL_REG_MCXN947_SPI_ID 0x0FU /**< ID for MCXN947 SPI BAL component */ #define RX_BUFFER_SIZE_MAX 272U /* Receive Buffer size while exchange */ #ifndef PHDRIVER_MCXN947_SPI_POLLING lpspi_master_handle_t g_masterHandle; /* LPSPI user callback */ void LPSPI_MasterUserCallback(LPSPI_Type *base, lpspi_master_handle_t *handle, status_t status, void *userData); #endif static void phbalReg_Mcxn947SpiConfig(void); #ifndef PHDRIVER_MCXN947_SPI_POLLING volatile bool isTransferCompleted = false; void LPSPI_MasterUserCallback(LPSPI_Type *base, lpspi_master_handle_t *handle, status_t status, void *userData) { if (status == kStatus_Success) { __NOP(); } isTransferCompleted = true; } #endif #include "phDriver.h" #include #include "BoardSelection.h" #include #include #include #define PHBAL_REG_MCXN947_SPI_ID 0x0FU /**< ID for MCXN947 SPI BAL component */ #define RX_BUFFER_SIZE_MAX 272U /* Receive Buffer size while exchange */ #ifndef PHDRIVER_MCXN947_SPI_POLLING lpspi_master_handle_t g_masterHandle; /* LPSPI user callback */ void LPSPI_MasterUserCallback(LPSPI_Type *base, lpspi_master_handle_t *handle, status_t status, void *userData); #endif static void phbalReg_Mcxn947SpiConfig(void); #ifndef PHDRIVER_MCXN947_SPI_POLLING volatile bool isTransferCompleted = false; void LPSPI_MasterUserCallback(LPSPI_Type *base, lpspi_master_handle_t *handle, status_t status, void *userData) { if (status == kStatus_Success) { __NOP(); } isTransferCompleted = true; } #endif After, we will define the phbalReg_Init function, which will be used by the library to initialize the SPI peripheral in this case, and it is defined as follows: Spoiler (Highlight to read) phStatus_t phbalReg_Init( void * pDataParams, uint16_t wSizeOfDataParams) { lpspi_master_config_t userConfig; uint32_t srcFreq = 0; if((pDataParams == NULL) || (sizeof(phbalReg_Type_t) != wSizeOfDataParams)) { return (PH_DRIVER_ERROR | PH_COMP_DRIVER); } ((phbalReg_Type_t *)pDataParams)->wId = PH_COMP_DRIVER | PHBAL_REG_MCXN947_SPI_ID; ((phbalReg_Type_t *)pDataParams)->bBalType = PHBAL_REG_TYPE_SPI; /*Initialize Flexcomm1 clock*/ /* attach FRO 12M to FLEXCOMM1 */ CLOCK_SetClkDiv(PHDRIVER_FC1_SPI_DIV, 1u); CLOCK_AttachClk(PHDRIVER_FC1_SPI_CLK); /*Configure SPI pins*/ phbalReg_Mcxn947SpiConfig(); /*SPI configuration*/ LPSPI_MasterGetDefaultConfig(&userConfig); userConfig.baudRate = PHDRIVER_MCXN947_SPI_DATA_RATE; srcFreq = SPI_MASTER_CLOCK_FREQ; userConfig.whichPcs = (lpspi_which_pcs_t)kLPSPI_Pcs0; userConfig.pcsActiveHighOrLow = (lpspi_pcs_polarity_config_t)kLPSPI_PcsActiveLow; userConfig.pcsToSckDelayInNanoSec = 1000000000U / (userConfig.baudRate * 1U); userConfig.lastSckToPcsDelayInNanoSec = 1000000000U / (userConfig.baudRate * 1U); userConfig.betweenTransferDelayInNanoSec = 1000000000U / (userConfig.baudRate * 1U); /*Initialize SPI*/ #ifdef PHDRIVER_MCXN947_SPI_POLLING LPSPI_MasterInit(PHDRIVER_MCXN947_SPI_MASTER, &userConfig, srcFreq); #else LPSPI_MasterInit(PHDRIVER_MCXN947_SPI_MASTER, &userConfig, srcFreq); LPSPI_MasterTransferCreateHandle(PHDRIVER_MCXN947_SPI_MASTER, &g_masterHandle, LPSPI_MasterUserCallback, NULL); #endif return PH_DRIVER_SUCCESS; } phStatus_t phbalReg_Init( void * pDataParams, uint16_t wSizeOfDataParams) { lpspi_master_config_t userConfig; uint32_t srcFreq = 0; if((pDataParams == NULL) || (sizeof(phbalReg_Type_t) != wSizeOfDataParams)) { return (PH_DRIVER_ERROR | PH_COMP_DRIVER); } ((phbalReg_Type_t *)pDataParams)->wId = PH_COMP_DRIVER | PHBAL_REG_MCXN947_SPI_ID; ((phbalReg_Type_t *)pDataParams)->bBalType = PHBAL_REG_TYPE_SPI; /*Initialize Flexcomm1 clock*/ /* attach FRO 12M to FLEXCOMM1 */ CLOCK_SetClkDiv(PHDRIVER_FC1_SPI_DIV, 1u); CLOCK_AttachClk(PHDRIVER_FC1_SPI_CLK); /*Configure SPI pins*/ phbalReg_Mcxn947SpiConfig(); /*SPI configuration*/ LPSPI_MasterGetDefaultConfig(&userConfig); userConfig.baudRate = PHDRIVER_MCXN947_SPI_DATA_RATE; srcFreq = SPI_MASTER_CLOCK_FREQ; userConfig.whichPcs = (lpspi_which_pcs_t)kLPSPI_Pcs0; userConfig.pcsActiveHighOrLow = (lpspi_pcs_polarity_config_t)kLPSPI_PcsActiveLow; userConfig.pcsToSckDelayInNanoSec = 1000000000U / (userConfig.baudRate * 1U); userConfig.lastSckToPcsDelayInNanoSec = 1000000000U / (userConfig.baudRate * 1U); userConfig.betweenTransferDelayInNanoSec = 1000000000U / (userConfig.baudRate * 1U); /*Initialize SPI*/ #ifdef PHDRIVER_MCXN947_SPI_POLLING LPSPI_MasterInit(PHDRIVER_MCXN947_SPI_MASTER, &userConfig, srcFreq); #else LPSPI_MasterInit(PHDRIVER_MCXN947_SPI_MASTER, &userConfig, srcFreq); LPSPI_MasterTransferCreateHandle(PHDRIVER_MCXN947_SPI_MASTER, &g_masterHandle, LPSPI_MasterUserCallback, NULL); #endif return PH_DRIVER_SUCCESS; } We have to define the phbalReg_Exchange function as well, which is used for communicating via SPI with the PN5190. Spoiler (Highlight to read) phStatus_t phbalReg_Exchange( void * pDataParams, uint16_t wOption, uint8_t * pTxBuffer, uint16_t wTxLength, uint16_t wRxBufSize, uint8_t * pRxBuffer, uint16_t * pRxLength ) { phStatus_t status = PH_DRIVER_SUCCESS; uint8_t * pRxBuf; status_t lpspiStatus; lpspi_transfer_t g_masterXfer; uint8_t g_dummyBuffer[RX_BUFFER_SIZE_MAX]; if(pRxBuffer == NULL) { pRxBuf = g_dummyBuffer; } else { pRxBuf = pRxBuffer; } if(pTxBuffer == NULL) { wTxLength = wRxBufSize; g_dummyBuffer[0] = 0xFF; pTxBuffer = g_dummyBuffer; } memset(&g_masterXfer, 0, sizeof(lpspi_transfer_t)); /* Set up the transfer */ g_masterXfer.txData = pTxBuffer; g_masterXfer.rxData = pRxBuf; g_masterXfer.dataSize = wTxLength; g_masterXfer.configFlags = kLPSPI_MasterPcs0 | kLPSPI_MasterPcsContinuous | kLPSPI_MasterByteSwap; /* Start transfer */ #ifdef PHDRIVER_MCXN947_SPI_POLLING lpspiStatus = LPSPI_MasterTransferBlocking(PHDRIVER_MCXN947_SPI_MASTER, &g_masterXfer); #else lpspiStatus = LPSPI_MasterTransferNonBlocking(PHDRIVER_MCXN947_SPI_MASTER, &g_masterHandle, &g_masterXfer); /* Wait transfer complete */ while (!isTransferCompleted) { } #endif if (lpspiStatus != kStatus_Success) { return (PH_DRIVER_FAILURE | PH_COMP_DRIVER); } if (pRxLength != NULL) { *pRxLength = wTxLength; } #ifndef PHDRIVER_MCXN947_SPI_POLLING SDK_DelayAtLeastUs(300U, BOARD_BOOTCLOCKPLL150M_CORE_CLOCK); #endif return status; } phStatus_t phbalReg_Exchange( void * pDataParams, uint16_t wOption, uint8_t * pTxBuffer, uint16_t wTxLength, uint16_t wRxBufSize, uint8_t * pRxBuffer, uint16_t * pRxLength ) { phStatus_t status = PH_DRIVER_SUCCESS; uint8_t * pRxBuf; status_t lpspiStatus; lpspi_transfer_t g_masterXfer; uint8_t g_dummyBuffer[RX_BUFFER_SIZE_MAX]; if(pRxBuffer == NULL) { pRxBuf = g_dummyBuffer; } else { pRxBuf = pRxBuffer; } if(pTxBuffer == NULL) { wTxLength = wRxBufSize; g_dummyBuffer[0] = 0xFF; pTxBuffer = g_dummyBuffer; } memset(&g_masterXfer, 0, sizeof(lpspi_transfer_t)); /* Set up the transfer */ g_masterXfer.txData = pTxBuffer; g_masterXfer.rxData = pRxBuf; g_masterXfer.dataSize = wTxLength; g_masterXfer.configFlags = kLPSPI_MasterPcs0 | kLPSPI_MasterPcsContinuous | kLPSPI_MasterByteSwap; /* Start transfer */ #ifdef PHDRIVER_MCXN947_SPI_POLLING lpspiStatus = LPSPI_MasterTransferBlocking(PHDRIVER_MCXN947_SPI_MASTER, &g_masterXfer); #else lpspiStatus = LPSPI_MasterTransferNonBlocking(PHDRIVER_MCXN947_SPI_MASTER, &g_masterHandle, &g_masterXfer); /* Wait transfer complete */ while (!isTransferCompleted) { } #endif if (lpspiStatus != kStatus_Success) { return (PH_DRIVER_FAILURE | PH_COMP_DRIVER); } if (pRxLength != NULL) { *pRxLength = wTxLength; } #ifndef PHDRIVER_MCXN947_SPI_POLLING SDK_DelayAtLeastUs(300U, BOARD_BOOTCLOCKPLL150M_CORE_CLOCK); #endif return status; } Finally, we will define the phbalReg_Mcxn947SpiConfig function, which is called by phbalReg_Init to configure the SPI pins on the MCXN947: Spoiler (Highlight to read) static void phbalReg_Mcxn947SpiConfig(void) { const port_pin_config_t port0_24_pinB6_config = { kPORT_PullUp, kPORT_LowPullResistor, kPORT_SlowSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as FC1_P0 */ kPORT_MuxAlt2, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_24 (pin B6) is configured as SPI_MOSI */ PORT_SetPinConfig(PORT0, 24U, &port0_24_pinB6_config); const port_pin_config_t port0_25_pinA6_config = {kPORT_PullUp, kPORT_LowPullResistor, kPORT_SlowSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as FC1_P1 */ kPORT_MuxAlt2, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_25 (pin A6) is configured as SPI_SCK */ PORT_SetPinConfig(PORT0, 25U, &port0_25_pinA6_config); const port_pin_config_t port0_26_pinF10_config = {kPORT_PullUp, kPORT_LowPullResistor, kPORT_SlowSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as FC1_P2 */ kPORT_MuxAlt2, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_26 (pin F10) is configured as SPI_MISO */ PORT_SetPinConfig(PORT0, 26U, &port0_26_pinF10_config); const port_pin_config_t port0_27_pinE10_config = {kPORT_PullUp, kPORT_LowPullResistor, kPORT_SlowSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as FC1_P3 */ kPORT_MuxAlt2, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_27 (pin E10) is configured as SPI_CS */ PORT_SetPinConfig(PORT0, 27U, &port0_27_pinE10_config); } static void phbalReg_Mcxn947SpiConfig(void) { const port_pin_config_t port0_24_pinB6_config = { kPORT_PullUp, kPORT_LowPullResistor, kPORT_SlowSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as FC1_P0 */ kPORT_MuxAlt2, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_24 (pin B6) is configured as SPI_MOSI */ PORT_SetPinConfig(PORT0, 24U, &port0_24_pinB6_config); const port_pin_config_t port0_25_pinA6_config = {kPORT_PullUp, kPORT_LowPullResistor, kPORT_SlowSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as FC1_P1 */ kPORT_MuxAlt2, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_25 (pin A6) is configured as SPI_SCK */ PORT_SetPinConfig(PORT0, 25U, &port0_25_pinA6_config); const port_pin_config_t port0_26_pinF10_config = {kPORT_PullUp, kPORT_LowPullResistor, kPORT_SlowSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as FC1_P2 */ kPORT_MuxAlt2, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_26 (pin F10) is configured as SPI_MISO */ PORT_SetPinConfig(PORT0, 26U, &port0_26_pinF10_config); const port_pin_config_t port0_27_pinE10_config = {kPORT_PullUp, kPORT_LowPullResistor, kPORT_SlowSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as FC1_P3 */ kPORT_MuxAlt2, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_27 (pin E10) is configured as SPI_CS */ PORT_SetPinConfig(PORT0, 27U, &port0_27_pinE10_config); } phDriver_Mcxn947SDK.c: In this file we will have the following definitions and includes that describe relevant characteristics of the ctimer (configuration structures, interrupt handlers and maximum count value), and of the GPIO port: Spoiler (Highlight to read) #include "phDriver.h" #include "BoardSelection.h" #include "fsl_device_registers.h" #include #include /* *********************************************************************************************************** * Internal Definitions * ********************************************************************************************************** */ #define MCXN947_TIMER_MAX_32BIT 0xFFFFFFFFU #define CTIMER_HANDLER CTIMER0_IRQHandler /* *********************************************************************************************************** * * Type Definitions *********************************************************************************************************** */ volatile bool ctimerIsrFlag = false; /* *********************************************************************************************************** * Global and Static Variables * * Match Configuration for CTIMER Channel 0*/ static ctimer_match_config_t matchConfig0; /* Total Size: NNNbytes * ********************************************************************************************************** */ /* Array initializer of GPIO peripheral base pointers */ static const GPIO_Type *pGpiosBaseAddr[] = GPIO_BASE_PTRS; static pphDriver_TimerCallBck_t pCTimerCallBack; static volatile uint8_t dwTimerExp; static const gpio_interrupt_config_t aInterruptTypes[] = {kGPIO_InterruptLogicZero, /* Unused. */ kGPIO_InterruptLogicZero, kGPIO_InterruptLogicOne, kGPIO_InterruptRisingEdge, kGPIO_InterruptFallingEdge, kGPIO_InterruptEitherEdge, }; /* *********************************************************************************************************** * Private Functions Prototypes * ********************************************************************************************************** */ static void phDriver_CTimerIsrCallBack(void); #include "phDriver.h" #include "BoardSelection.h" #include "fsl_device_registers.h" #include #include /* *********************************************************************************************************** * Internal Definitions * ********************************************************************************************************** */ #define MCXN947_TIMER_MAX_32BIT 0xFFFFFFFFU #define CTIMER_HANDLER CTIMER0_IRQHandler /* *********************************************************************************************************** * * Type Definitions *********************************************************************************************************** */ volatile bool ctimerIsrFlag = false; /* *********************************************************************************************************** * Global and Static Variables * * Match Configuration for CTIMER Channel 0*/ static ctimer_match_config_t matchConfig0; /* Total Size: NNNbytes * ********************************************************************************************************** */ /* Array initializer of GPIO peripheral base pointers */ static const GPIO_Type *pGpiosBaseAddr[] = GPIO_BASE_PTRS; static pphDriver_TimerCallBck_t pCTimerCallBack; static volatile uint8_t dwTimerExp; static const gpio_interrupt_config_t aInterruptTypes[] = {kGPIO_InterruptLogicZero, /* Unused. */ kGPIO_InterruptLogicZero, kGPIO_InterruptLogicOne, kGPIO_InterruptRisingEdge, kGPIO_InterruptFallingEdge, kGPIO_InterruptEitherEdge, }; /* *********************************************************************************************************** * Private Functions Prototypes * ********************************************************************************************************** */ static void phDriver_CTimerIsrCallBack(void); We will define the following functions to initialize and stop the timer, and to enable timer interruptions and its callback: Spoiler (Highlight to read) phStatus_t phDriver_TimerStart(phDriver_Timer_Unit_t eTimerUnit, uint32_t dwTimePeriod, pphDriver_TimerCallBck_t pTimerCallBack) { uint64_t qwTimerCnt; uint32_t dwTimerFreq; dwTimerFreq = PH_DRIVER_SDK_CTIMER_CLK_FREQ; qwTimerCnt = dwTimerFreq; qwTimerCnt = (qwTimerCnt / eTimerUnit); qwTimerCnt = (dwTimePeriod * qwTimerCnt); /* 32-bit timers. */ if(qwTimerCnt > (uint64_t)MCXN947_TIMER_MAX_32BIT) { return PH_DRIVER_ERROR | PH_COMP_DRIVER; } if(pTimerCallBack == NULL) /* Timer Start is blocking call. */ { dwTimerExp = 0; pCTimerCallBack = phDriver_CTimerIsrCallBack; } else /* Call the Timer callback. */ { pCTimerCallBack = pTimerCallBack; } /*Configure & start CTIMER*/ /*Ctimer config structure*/ ctimer_config_t config; /*Timer mode, init*/ CTIMER_GetDefaultConfig(&config); CTIMER_Init(PH_DRIVER_SDK_CTIMER, &config); CTIMER_EnableInterrupts(PH_DRIVER_SDK_CTIMER, kCTIMER_Match0InterruptEnable|kCTIMER_Capture0InterruptEnable); /* Configuration match 0 */ matchConfig0.enableCounterReset = true; matchConfig0.enableCounterStop = false; matchConfig0.matchValue = (uint32_t)qwTimerCnt; matchConfig0.outControl = kCTIMER_Output_NoAction; matchConfig0.outPinInitState = false; matchConfig0.enableInterrupt = true; EnableIRQ(PH_DRIVER_SDK_CTIMER_NVIC); NVIC_SetPriority(PH_DRIVER_SDK_CTIMER_NVIC, PH_DRIVER_SDK_CTIMER_PRIORITY); /*Setup Match*/ CTIMER_SetupMatch(PH_DRIVER_SDK_CTIMER, kCTIMER_Match_0, &matchConfig0); /*Start*/ CTIMER_StartTimer(PH_DRIVER_SDK_CTIMER); while (true) { /* Check whether an interrupt occurred */ if (true == ctimerIsrFlag && dwTimerExp) { /* Clear interrupt flag*/ ctimerIsrFlag = false; break; } } return PH_DRIVER_SUCCESS; } phStatus_t phDriver_TimerStart(phDriver_Timer_Unit_t eTimerUnit, uint32_t dwTimePeriod, pphDriver_TimerCallBck_t pTimerCallBack) { uint64_t qwTimerCnt; uint32_t dwTimerFreq; dwTimerFreq = PH_DRIVER_SDK_CTIMER_CLK_FREQ; qwTimerCnt = dwTimerFreq; qwTimerCnt = (qwTimerCnt / eTimerUnit); qwTimerCnt = (dwTimePeriod * qwTimerCnt); /* 32-bit timers. */ if(qwTimerCnt > (uint64_t)MCXN947_TIMER_MAX_32BIT) { return PH_DRIVER_ERROR | PH_COMP_DRIVER; } if(pTimerCallBack == NULL) /* Timer Start is blocking call. */ { dwTimerExp = 0; pCTimerCallBack = phDriver_CTimerIsrCallBack; } else /* Call the Timer callback. */ { pCTimerCallBack = pTimerCallBack; } /*Configure & start CTIMER*/ /*Ctimer config structure*/ ctimer_config_t config; /*Timer mode, init*/ CTIMER_GetDefaultConfig(&config); CTIMER_Init(PH_DRIVER_SDK_CTIMER, &config); CTIMER_EnableInterrupts(PH_DRIVER_SDK_CTIMER, kCTIMER_Match0InterruptEnable|kCTIMER_Capture0InterruptEnable); /* Configuration match 0 */ matchConfig0.enableCounterReset = true; matchConfig0.enableCounterStop = false; matchConfig0.matchValue = (uint32_t)qwTimerCnt; matchConfig0.outControl = kCTIMER_Output_NoAction; matchConfig0.outPinInitState = false; matchConfig0.enableInterrupt = true; EnableIRQ(PH_DRIVER_SDK_CTIMER_NVIC); NVIC_SetPriority(PH_DRIVER_SDK_CTIMER_NVIC, PH_DRIVER_SDK_CTIMER_PRIORITY); /*Setup Match*/ CTIMER_SetupMatch(PH_DRIVER_SDK_CTIMER, kCTIMER_Match_0, &matchConfig0); /*Start*/ CTIMER_StartTimer(PH_DRIVER_SDK_CTIMER); while (true) { /* Check whether an interrupt occurred */ if (true == ctimerIsrFlag && dwTimerExp) { /* Clear interrupt flag*/ ctimerIsrFlag = false; break; } } return PH_DRIVER_SUCCESS; } Spoiler (Highlight to read) phStatus_t phDriver_TimerStop(void) { /*Stop timer & disable interrupts*/ CTIMER_StopTimer(PH_DRIVER_SDK_CTIMER); CTIMER_DisableInterrupts(PH_DRIVER_SDK_CTIMER, kCTIMER_Match0InterruptEnable|kCTIMER_Capture0InterruptEnable); /* Disable at the NVIC */ DisableIRQ(PH_DRIVER_SDK_CTIMER_NVIC); return PH_DRIVER_SUCCESS; } phStatus_t phDriver_TimerStop(void) { /*Stop timer & disable interrupts*/ CTIMER_StopTimer(PH_DRIVER_SDK_CTIMER); CTIMER_DisableInterrupts(PH_DRIVER_SDK_CTIMER, kCTIMER_Match0InterruptEnable|kCTIMER_Capture0InterruptEnable); /* Disable at the NVIC */ DisableIRQ(PH_DRIVER_SDK_CTIMER_NVIC); return PH_DRIVER_SUCCESS; } We will also have definitions for the functions that configure and handle GPIOs of the MCXN947 and enable interruptions. Spoiler (Highlight to read) phStatus_t phDriver_PinConfig(uint32_t dwPinNumber, phDriver_Pin_Func_t ePinFunc, phDriver_Pin_Config_t *pPinConfig) { gpio_pin_config_t sGpioConfig; uint8_t bPinNum; uint8_t bPortGpio; if((ePinFunc == PH_DRIVER_PINFUNC_BIDIR) || (pPinConfig == NULL)) { return PH_DRIVER_ERROR | PH_COMP_DRIVER; } /* Extract the Pin, Gpio, Port details from dwPinNumber */ bPinNum = (uint8_t)(dwPinNumber & 0xFF); bPortGpio = (uint8_t)((dwPinNumber & 0xFF00)>>8); sGpioConfig.pinDirection = (ePinFunc == PH_DRIVER_PINFUNC_OUTPUT) ? kGPIO_DigitalOutput:kGPIO_DigitalInput; sGpioConfig.outputLogic = pPinConfig->bOutputLogic; if(ePinFunc == PH_DRIVER_PINFUNC_INTERRUPT) { gpio_interrupt_config_t intConfig = aInterruptTypes[(uint8_t)pPinConfig->eInterruptConfig]; GPIO_GpioClearInterruptFlags((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT], bPinNum); GPIO_SetPinInterruptConfig((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT], bPinNum, intConfig); EnableIRQ(EINT_IRQn); GPIO_PinInit((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT],bPinNum,&sGpioConfig); } else { GPIO_PinInit((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT],bPinNum,&sGpioConfig); } return PH_DRIVER_SUCCESS; } phStatus_t phDriver_PinConfig(uint32_t dwPinNumber, phDriver_Pin_Func_t ePinFunc, phDriver_Pin_Config_t *pPinConfig) { gpio_pin_config_t sGpioConfig; uint8_t bPinNum; uint8_t bPortGpio; if((ePinFunc == PH_DRIVER_PINFUNC_BIDIR) || (pPinConfig == NULL)) { return PH_DRIVER_ERROR | PH_COMP_DRIVER; } /* Extract the Pin, Gpio, Port details from dwPinNumber */ bPinNum = (uint8_t)(dwPinNumber & 0xFF); bPortGpio = (uint8_t)((dwPinNumber & 0xFF00)>>8); sGpioConfig.pinDirection = (ePinFunc == PH_DRIVER_PINFUNC_OUTPUT) ? kGPIO_DigitalOutput:kGPIO_DigitalInput; sGpioConfig.outputLogic = pPinConfig->bOutputLogic; if(ePinFunc == PH_DRIVER_PINFUNC_INTERRUPT) { gpio_interrupt_config_t intConfig = aInterruptTypes[(uint8_t)pPinConfig->eInterruptConfig]; GPIO_GpioClearInterruptFlags((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT], bPinNum); GPIO_SetPinInterruptConfig((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT], bPinNum, intConfig); EnableIRQ(EINT_IRQn); GPIO_PinInit((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT],bPinNum,&sGpioConfig); } else { GPIO_PinInit((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT],bPinNum,&sGpioConfig); } return PH_DRIVER_SUCCESS; } Spoiler (Highlight to read) uint8_t phDriver_PinRead(uint32_t dwPinNumber, phDriver_Pin_Func_t ePinFunc) { uint8_t bValue; uint32_t intStatus; uint8_t bGpioNum; uint8_t bPinNum; /* Extract the Pin, Gpio details from dwPinNumber */ bPinNum = (uint8_t)(dwPinNumber & 0xFF); bGpioNum = (uint8_t)((dwPinNumber & 0xFF00)>>8); if(ePinFunc == PH_DRIVER_PINFUNC_INTERRUPT) { /*Get value of pin interrupt status*/ intStatus = GPIO_PinGetInterruptFlag((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT], bPinNum); bValue = intStatus ? 1:0; } else { /*Read pin value*/ bValue = (uint8_t)GPIO_PinRead((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT], bPinNum); } return bValue; } uint8_t phDriver_PinRead(uint32_t dwPinNumber, phDriver_Pin_Func_t ePinFunc) { uint8_t bValue; uint32_t intStatus; uint8_t bGpioNum; uint8_t bPinNum; /* Extract the Pin, Gpio details from dwPinNumber */ bPinNum = (uint8_t)(dwPinNumber & 0xFF); bGpioNum = (uint8_t)((dwPinNumber & 0xFF00)>>8); if(ePinFunc == PH_DRIVER_PINFUNC_INTERRUPT) { /*Get value of pin interrupt status*/ intStatus = GPIO_PinGetInterruptFlag((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT], bPinNum); bValue = intStatus ? 1:0; } else { /*Read pin value*/ bValue = (uint8_t)GPIO_PinRead((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT], bPinNum); } return bValue; } Spoiler (Highlight to read) void phDriver_PinWrite(uint32_t dwPinNumber, uint8_t bValue) { uint8_t bGpioNum; uint8_t bPinNum; /* Extract the Pin, Gpio details from dwPinNumber */ bPinNum = (uint8_t)(dwPinNumber & 0xFF); bGpioNum = (uint8_t)((dwPinNumber & 0xFF00)>>8); GPIO_PinWrite((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT], bPinNum, bValue); } void phDriver_PinClearIntStatus(uint32_t dwPinNumber) { uint8_t bGpioNum; uint8_t bPinNum; /* Extract the Pin, Gpio details from dwPinNumber */ bPinNum = (uint8_t)(dwPinNumber & 0xFF); bGpioNum = (uint8_t)((dwPinNumber & 0xFF00)>>8); /*Clear interrupt flag*/ GPIO_GpioClearInterruptFlags((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT], (1U << bPinNum)); } void phDriver_PinWrite(uint32_t dwPinNumber, uint8_t bValue) { uint8_t bGpioNum; uint8_t bPinNum; /* Extract the Pin, Gpio details from dwPinNumber */ bPinNum = (uint8_t)(dwPinNumber & 0xFF); bGpioNum = (uint8_t)((dwPinNumber & 0xFF00)>>8); GPIO_PinWrite((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT], bPinNum, bValue); } void phDriver_PinClearIntStatus(uint32_t dwPinNumber) { uint8_t bGpioNum; uint8_t bPinNum; /* Extract the Pin, Gpio details from dwPinNumber */ bPinNum = (uint8_t)(dwPinNumber & 0xFF); bGpioNum = (uint8_t)((dwPinNumber & 0xFF00)>>8); /*Clear interrupt flag*/ GPIO_GpioClearInterruptFlags((GPIO_Type *)pGpiosBaseAddr[GPIO_PORT], (1U << bPinNum)); } It is also necessary to add functions required for the library to function correctly. Spoiler (Highlight to read) void phDriver_EnterCriticalSection(void) { NVIC_DisableIRQ(EINT_IRQn); } void phDriver_ExitCriticalSection(void) { NVIC_EnableIRQ(EINT_IRQn); } phStatus_t phDriver_IRQPinRead(uint32_t dwPinNumber) { phStatus_t bGpioVal = false; bGpioVal = phDriver_PinRead(dwPinNumber, PH_DRIVER_PINFUNC_INPUT); return bGpioVal; } phStatus_t phDriver_IRQPinPoll(uint32_t dwPinNumber, phDriver_Pin_Func_t ePinFunc, phDriver_Interrupt_Config_t eInterruptType) { uint8_t bGpioState = 0; if ((eInterruptType != PH_DRIVER_INTERRUPT_RISINGEDGE) && (eInterruptType != PH_DRIVER_INTERRUPT_FALLINGEDGE)) { return PH_DRIVER_ERROR | PH_COMP_DRIVER; } if (eInterruptType == PH_DRIVER_INTERRUPT_FALLINGEDGE) { bGpioState = 1; } while(phDriver_PinRead(dwPinNumber, ePinFunc) == bGpioState); return PH_DRIVER_SUCCESS; } void phDriver_EnterCriticalSection(void) { NVIC_DisableIRQ(EINT_IRQn); } void phDriver_ExitCriticalSection(void) { NVIC_EnableIRQ(EINT_IRQn); } phStatus_t phDriver_IRQPinRead(uint32_t dwPinNumber) { phStatus_t bGpioVal = false; bGpioVal = phDriver_PinRead(dwPinNumber, PH_DRIVER_PINFUNC_INPUT); return bGpioVal; } phStatus_t phDriver_IRQPinPoll(uint32_t dwPinNumber, phDriver_Pin_Func_t ePinFunc, phDriver_Interrupt_Config_t eInterruptType) { uint8_t bGpioState = 0; if ((eInterruptType != PH_DRIVER_INTERRUPT_RISINGEDGE) && (eInterruptType != PH_DRIVER_INTERRUPT_FALLINGEDGE)) { return PH_DRIVER_ERROR | PH_COMP_DRIVER; } if (eInterruptType == PH_DRIVER_INTERRUPT_FALLINGEDGE) { bGpioState = 1; } while(phDriver_PinRead(dwPinNumber, ePinFunc) == bGpioState); return PH_DRIVER_SUCCESS; } Finally, here, we will have the definition of the timer interrupt handler and ISR callback. Spoiler (Highlight to read) void CTIMER0_IRQHandler(void) { /* Clear interrupt flag.*/ CTIMER_ClearStatusFlags(PH_DRIVER_SDK_CTIMER, kCTIMER_Match0Flag|kCTIMER_Capture0Flag); /* Single shot timer. Stop it. */ CTIMER_StopTimer(PH_DRIVER_SDK_CTIMER); CTIMER_DisableInterrupts(PH_DRIVER_SDK_CTIMER, kCTIMER_Match0InterruptEnable|kCTIMER_Capture0InterruptEnable); pCTimerCallBack(); ctimerIsrFlag = true; } static void phDriver_CTimerIsrCallBack(void) { dwTimerExp = 1; } void CTIMER0_IRQHandler(void) { /* Clear interrupt flag.*/ CTIMER_ClearStatusFlags(PH_DRIVER_SDK_CTIMER, kCTIMER_Match0Flag|kCTIMER_Capture0Flag); /* Single shot timer. Stop it. */ CTIMER_StopTimer(PH_DRIVER_SDK_CTIMER); CTIMER_DisableInterrupts(PH_DRIVER_SDK_CTIMER, kCTIMER_Match0InterruptEnable|kCTIMER_Capture0InterruptEnable); pCTimerCallBack(); ctimerIsrFlag = true; } static void phDriver_CTimerIsrCallBack(void) { dwTimerExp = 1; } With these additions, we have all the functions needed (based on the FRDM-MCXN947 SDK) by the library to communicate with the PN5190. BoardSelection.h In this header file, which is found at “DAL > cfg” we will add the definition set in the preprocessor settings to use the FRDM-MCXN947 board as host by adding the following lines to the file: Spoiler (Highlight to read) #ifdef PHDRIVER_FRDMMCXN947_PN5190_BOARD # include #endif #ifdef PHDRIVER_FRDMMCXN947_PN5190_BOARD # include #endif ph_NxpBuild_App.h In this header found at “intfs” folder, we will add our board support to use it with the PN5190 by adding the following change: Spoiler (Highlight to read) #if defined(PHDRIVER_LPC1769PN5190_BOARD) \ || defined(PHDRIVER_K82F_PNEV5190B_BOARD)\ || defined(PHDRIVER_FRDMMCXN947_PN5190_BOARD) # define NXPBUILD__PHHAL_HW_PN5190 #endif #if defined(PHDRIVER_LPC1769PN5190_BOARD) \ || defined(PHDRIVER_K82F_PNEV5190B_BOARD)\ || defined(PHDRIVER_FRDMMCXN947_PN5190_BOARD) # define NXPBUILD__PHHAL_HW_PN5190 #endif phApp_Init.h In this header located at “intfs” folder we will add the required include files for the initialization of our board and enable the correct debug interface. Spoiler (Highlight to read) /*Check for MCXN controller based boards*/ #if defined (PHDRIVER_FRDMMCXN947_PN5190_BOARD) #define PHDRIVER_FRDM_MCXN947 #endif #ifdef PHDRIVER_FRDM_MCXN947 #include #include #include #include #include #include #endif Please replace this line. /*Check for MCXN controller based boards*/ #if defined (PHDRIVER_FRDMMCXN947_PN5190_BOARD) #define PHDRIVER_FRDM_MCXN947 #endif #ifdef PHDRIVER_FRDM_MCXN947 #include #include #include #include #include #include #endif Please replace this line. Spoiler (Highlight to read) #if defined(PHDRIVER_KINETIS_K82)|| defined(PHDRIVER_FRDM_MCXN947)   #if defined(PHDRIVER_KINETIS_K82)|| defined(PHDRIVER_FRDM_MCXN947) phApp_Init.c Finally, in this source file we will add the initialization code for the MCXN947 to complement the initialization macros defined in the previous phApp_Init.h file modification. Here we will call functions to initialize clocks and UART pins. Spoiler (Highlight to read) #ifdef PHDRIVER_FRDM_MCXN947 #include "fsl_common.h" #include "pin_mux.h" #include "clock_config.h" #include "board.h" static void phApp_MCXN947_Init(void){ BOARD_InitBootPins(); BOARD_InitBootClocks(); BOARD_InitDebugConsole(); } #endif #ifdef PHDRIVER_FRDM_MCXN947 #include "fsl_common.h" #include "pin_mux.h" #include "clock_config.h" #include "board.h" static void phApp_MCXN947_Init(void){ BOARD_InitBootPins(); BOARD_InitBootClocks(); BOARD_InitDebugConsole(); } #endif Spoiler (Highlight to read) #elif defined(PHDRIVER_FRDM_MCXN947) phApp_MCXN947_Init(); #elif defined(PHDRIVER_FRDM_MCXN947) phApp_MCXN947_Init(); These functions are used to initialize the correspondent clocks of each peripheral such as CTIMER, the input pins multiplexor for selecting GPIO functionality and FLEXCOMM for SPI. In here we also set the GPIO functionality for pins P0_31 and P0_28 (IRQ and RESET), as well as UART3 for printing the tag information on the serial port connected to the computer. Additionally, we need to set the NVIC priority to ensure that interrupts can occur. Add the NVIC_SetPriority() function to phApp_Configure_IRQ(). Spoiler (Highlight to read) #ifdef PH_PLATFORM_HAS_ICFRONTEND #if !(defined(PH_OSAL_LINUX) && defined(NXPBUILD__PHHAL_HW_PN5190)) phDriver_Pin_Config_t pinCfg; NVIC_SetPriority(EINT_IRQn, EINT_PRIORITY); pinCfg.bOutputLogic = PH_DRIVER_SET_LOW; pinCfg.bPullSelect = PHDRIVER_PIN_IRQ_PULL_CFG; pinCfg.eInterruptConfig = PIN_IRQ_TRIGGER_TYPE; phDriver_PinConfig(PHDRIVER_PIN_IRQ, PH_DRIVER_PINFUNC_INTERRUPT, &pinCfg); #endif #ifdef PH_PLATFORM_HAS_ICFRONTEND #if !(defined(PH_OSAL_LINUX) && defined(NXPBUILD__PHHAL_HW_PN5190)) phDriver_Pin_Config_t pinCfg; NVIC_SetPriority(EINT_IRQn, EINT_PRIORITY); pinCfg.bOutputLogic = PH_DRIVER_SET_LOW; pinCfg.bPullSelect = PHDRIVER_PIN_IRQ_PULL_CFG; pinCfg.eInterruptConfig = PIN_IRQ_TRIGGER_TYPE; phDriver_PinConfig(PHDRIVER_PIN_IRQ, PH_DRIVER_PINFUNC_INTERRUPT, &pinCfg); #endif pin_mux.c Inside the function “BOARD_InitBootPins()” which is defined in board -> pin_mux.c file, the following initializations need to be added: Spoiler (Highlight to read) void BOARD_InitBootPins(void) { /* Use FRO HF clock for some of the Ctimers */ CLOCK_SetClkDiv(kCLOCK_DivCtimer0Clk, 1u); CLOCK_AttachClk(kFRO_HF_to_CTIMER0); CLOCK_EnableClock(kCLOCK_Gpio0); CLOCK_EnableClock(kCLOCK_Gpio1); BOARD_InitPins(); } void BOARD_InitBootPins(void) { /* Use FRO HF clock for some of the Ctimers */ CLOCK_SetClkDiv(kCLOCK_DivCtimer0Clk, 1u); CLOCK_AttachClk(kFRO_HF_to_CTIMER0); CLOCK_EnableClock(kCLOCK_Gpio0); CLOCK_EnableClock(kCLOCK_Gpio1); BOARD_InitPins(); } Additionally, within the “BOARD_InitPins()” function available in the same file, we will replace the initializations of the GPIO and UART pins. Spoiler (Highlight to read) void BOARD_InitPins(void) { /* Enables the clock for PORT0 controller: Enables clock */ CLOCK_EnableClock(kCLOCK_Port0); /* Enables the clock for PORT1: Enables clock */ CLOCK_EnableClock(kCLOCK_Port1); const port_pin_config_t port0_19_config = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Low internal pull resistor value is selected. */ kPORT_LowPullResistor, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Passive input filter is disabled */ kPORT_PassiveFilterDisable, /* Open drain output is disabled */ kPORT_OpenDrainDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as PIO0_10 */ kPORT_MuxAlt0, /* Digital input enabled */ kPORT_InputBufferEnable, /* Digital input is not inverted */ kPORT_InputNormal, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORT0_10 (pin B12) is configured as PIO0_10 */ PORT_SetPinConfig(PORT0, 19U, &port0_19_config); const port_pin_config_t port1_0_config = { kPORT_PullDisable, kPORT_LowPullResistor, kPORT_FastSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as PIO0_10 */ kPORT_MuxAlt0, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_10 (pin B12) is configured as PIO0_10 */ PORT_SetPinConfig(PORT1, 0U, &port1_0_config); const port_pin_config_t port1_1_config = { kPORT_PullDisable, kPORT_LowPullResistor, kPORT_FastSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as PIO0_10 */ kPORT_MuxAlt0, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_10 (pin B12) is configured as PIO0_10 */ PORT_SetPinConfig(PORT1, 1U, &port1_1_config); const port_pin_config_t port0_31_pinB12_config = { kPORT_PullDown, kPORT_LowPullResistor, kPORT_FastSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as PIO0_10 */ kPORT_MuxAlt0, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_10 (pin B12) is configured as PIO0_10 */ PORT_SetPinConfig(PORT0, 31U, &port0_31_pinB12_config); const port_pin_config_t port0_28_config = { kPORT_PullDisable, kPORT_LowPullResistor, kPORT_FastSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as PIO0_6 */ kPORT_MuxAlt0, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_6 (pin C14) is configured as PIO0_6 */ PORT_SetPinConfig(PORT0, 28U, &port0_28_config); const port_pin_config_t port0_2_pinB16_config = { .pullSelect = kPORT_PullDisable, .pullValueSelect = kPORT_LowPullResistor, .slewRate = kPORT_FastSlewRate, .passiveFilterEnable = kPORT_PassiveFilterDisable, .openDrainEnable = kPORT_OpenDrainDisable, .driveStrength = kPORT_HighDriveStrength, /* Pin is configured as SWO */ .mux = kPORT_MuxAlt1, .inputBuffer = kPORT_InputBufferEnable, .invertInput = kPORT_InputNormal, .lockRegister = kPORT_UnlockRegister}; /* PORT0_2 (pin B16) is configured as SWO */ PORT_SetPinConfig(PORT0, 2U, &port0_2_pinB16_config); const port_pin_config_t port1_8_pinA1_config = { .pullSelect = kPORT_PullUp, .pullValueSelect = kPORT_LowPullResistor, .slewRate = kPORT_FastSlewRate, .passiveFilterEnable = kPORT_PassiveFilterDisable, .openDrainEnable = kPORT_OpenDrainDisable, .driveStrength = kPORT_LowDriveStrength, /* Pin is configured as FC4_P0 */ .mux = kPORT_MuxAlt2, .inputBuffer = kPORT_InputBufferEnable, .invertInput = kPORT_InputNormal, .lockRegister = kPORT_UnlockRegister}; /* PORT1_8 (pin A1) is configured as FC4_P0 */ PORT_SetPinConfig(PORT1, 8U, &port1_8_pinA1_config); const port_pin_config_t port1_9_pinB1_config = { .pullSelect = kPORT_PullDisable, .pullValueSelect = kPORT_LowPullResistor, .slewRate = kPORT_FastSlewRate, .passiveFilterEnable = kPORT_PassiveFilterDisable, .openDrainEnable = kPORT_OpenDrainDisable, .driveStrength = kPORT_LowDriveStrength, /* Pin is configured as FC4_P1 */ .mux = kPORT_MuxAlt2, .inputBuffer = kPORT_InputBufferEnable, .invertInput = kPORT_InputNormal, .lockRegister = kPORT_UnlockRegister}; /* PORT1_9 (pin B1) is configured as FC4_P1 */ PORT_SetPinConfig(PORT1, 9U, &port1_9_pinB1_config); } void BOARD_InitPins(void) { /* Enables the clock for PORT0 controller: Enables clock */ CLOCK_EnableClock(kCLOCK_Port0); /* Enables the clock for PORT1: Enables clock */ CLOCK_EnableClock(kCLOCK_Port1); const port_pin_config_t port0_19_config = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Low internal pull resistor value is selected. */ kPORT_LowPullResistor, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Passive input filter is disabled */ kPORT_PassiveFilterDisable, /* Open drain output is disabled */ kPORT_OpenDrainDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as PIO0_10 */ kPORT_MuxAlt0, /* Digital input enabled */ kPORT_InputBufferEnable, /* Digital input is not inverted */ kPORT_InputNormal, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORT0_10 (pin B12) is configured as PIO0_10 */ PORT_SetPinConfig(PORT0, 19U, &port0_19_config); const port_pin_config_t port1_0_config = { kPORT_PullDisable, kPORT_LowPullResistor, kPORT_FastSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as PIO0_10 */ kPORT_MuxAlt0, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_10 (pin B12) is configured as PIO0_10 */ PORT_SetPinConfig(PORT1, 0U, &port1_0_config); const port_pin_config_t port1_1_config = { kPORT_PullDisable, kPORT_LowPullResistor, kPORT_FastSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as PIO0_10 */ kPORT_MuxAlt0, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_10 (pin B12) is configured as PIO0_10 */ PORT_SetPinConfig(PORT1, 1U, &port1_1_config); const port_pin_config_t port0_31_pinB12_config = { kPORT_PullDown, kPORT_LowPullResistor, kPORT_FastSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as PIO0_10 */ kPORT_MuxAlt0, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_10 (pin B12) is configured as PIO0_10 */ PORT_SetPinConfig(PORT0, 31U, &port0_31_pinB12_config); const port_pin_config_t port0_28_config = { kPORT_PullDisable, kPORT_LowPullResistor, kPORT_FastSlewRate, kPORT_PassiveFilterDisable, kPORT_OpenDrainDisable, kPORT_LowDriveStrength, /* Pin is configured as PIO0_6 */ kPORT_MuxAlt0, kPORT_InputBufferEnable, kPORT_InputNormal, kPORT_UnlockRegister}; /* PORT0_6 (pin C14) is configured as PIO0_6 */ PORT_SetPinConfig(PORT0, 28U, &port0_28_config); const port_pin_config_t port0_2_pinB16_config = { .pullSelect = kPORT_PullDisable, .pullValueSelect = kPORT_LowPullResistor, .slewRate = kPORT_FastSlewRate, .passiveFilterEnable = kPORT_PassiveFilterDisable, .openDrainEnable = kPORT_OpenDrainDisable, .driveStrength = kPORT_HighDriveStrength, /* Pin is configured as SWO */ .mux = kPORT_MuxAlt1, .inputBuffer = kPORT_InputBufferEnable, .invertInput = kPORT_InputNormal, .lockRegister = kPORT_UnlockRegister}; /* PORT0_2 (pin B16) is configured as SWO */ PORT_SetPinConfig(PORT0, 2U, &port0_2_pinB16_config); const port_pin_config_t port1_8_pinA1_config = { .pullSelect = kPORT_PullUp, .pullValueSelect = kPORT_LowPullResistor, .slewRate = kPORT_FastSlewRate, .passiveFilterEnable = kPORT_PassiveFilterDisable, .openDrainEnable = kPORT_OpenDrainDisable, .driveStrength = kPORT_LowDriveStrength, /* Pin is configured as FC4_P0 */ .mux = kPORT_MuxAlt2, .inputBuffer = kPORT_InputBufferEnable, .invertInput = kPORT_InputNormal, .lockRegister = kPORT_UnlockRegister}; /* PORT1_8 (pin A1) is configured as FC4_P0 */ PORT_SetPinConfig(PORT1, 8U, &port1_8_pinA1_config); const port_pin_config_t port1_9_pinB1_config = { .pullSelect = kPORT_PullDisable, .pullValueSelect = kPORT_LowPullResistor, .slewRate = kPORT_FastSlewRate, .passiveFilterEnable = kPORT_PassiveFilterDisable, .openDrainEnable = kPORT_OpenDrainDisable, .driveStrength = kPORT_LowDriveStrength, /* Pin is configured as FC4_P1 */ .mux = kPORT_MuxAlt2, .inputBuffer = kPORT_InputBufferEnable, .invertInput = kPORT_InputNormal, .lockRegister = kPORT_UnlockRegister}; /* PORT1_9 (pin B1) is configured as FC4_P1 */ PORT_SetPinConfig(PORT1, 9U, &port1_9_pinB1_config); } At the same time, add the following includes to the file: Spoiler (Highlight to read) #include "fsl_common.h" #include "fsl_port.h" #include "board.h" #include "clock_config.h" #include "pin_mux.h" #include "fsl_common.h" #include "fsl_port.h" #include "board.h" #include "clock_config.h" #include "pin_mux.h" Adding include paths Since we are including header files into the project, we must specify which directories to search in order to find the required files. To do this: 1. Open project properties (right-click on project > Properties). 2.Click on the drop menu “C/C++ Build”, then “Settings”. 3.Click on “Includes” option. 4.Click on the “Add..” button at the top right corner of the “Include paths (-l)” menu. 5. Click on “Workspace…” 6. Add the following highlighted directories from FRDM-MCXN project: 7. Accept the changes and click on “Apply and Close”. Add “root folder” to source location 1.Open project properties. 2. Click on the drop menu “C/C++ General”, then “Paths and Symbols”. 3. Click on the “Source Location” tab. 4.Click on “Add Folder…” and add the “ ”. Delete phOsal files We must delete from the path “phOsal > src > NullOs > portable” the files: “phOsal_Port_CM3.c”,“phOsal_Port_PN76xx.c” and “phOsal_Port_PN74xxxx.c”. This has the purpose of avoiding any multiple definition errors when compiling the final project. Add _DSB and _ISB support As final modification step, please include in NxpNfcRdLib->comps->phhalHw->src->PN5190-> phhalHw_Pn5190_Int.c the  “cmsis_gcc.h” to support of _DSB and _ISB functions. Testing Final Project Without OS After making all the previous changes and modifications, the migration is now complete, and we can proceed to compile and flash the example to MCXN947. Please “clean” the project before building by right clicking on the project as follows: To run the project, we will need a serial terminal like Tera Term with the following settings: - 115200 baud rate. - 8 data bits. - No parity. - One stop bit, - No flow control. Once the program is flashed and the serial terminal configured, we can reset the board and power the PNEV5190BP. You should see an output similar to the following: Now if any NFC tag is close to the PNEV5190BP’s antenna, you should see the information displayed as shown in the image below: Adding FreeRTOS support This section presents the steps to follow to add FreeRTOS support to the current project with the possibility of easily choosing either to have OS support or not. 1. Open the “Manage SDK Components” in properties->SDK Management. 2. Search the FreeRTOS kernel component (NXP integration layer), heap 4 and add it to your project. Note: If this option does not appear, you will have to download the SDK with the FreeRTOS stack included. Adding porting-specific files to FreeRTOS folder We need to set the core-specific files which define core register addresses and the assembly instructions that integrate the FreeRTOS kernel functions. The core integrating the MCXN947 IC is the Cortex M33 with Trust Zone, therefore, the folder that we will use to add the port files will be from the folder “ARM_CM33_NTZ” as explained below: 1. Import the SDK example called “freertos_hello_cm33_core0”: 2. Inside this example, you will see the folder “GCC” from the path freertos>freertoskernel>portable>GCC, please copy and paste this folder into the same path of the project. Adding port-specific created folder to include path. Now we need to tell the compiler where to find the port-specific files we just added to the project, to accomplish this: 1. Open the project properties (right-click on project > Properties) and click on “C/C++ General” and on “Paths and symbols”. 2. Here we will click on “Add…” and then “Workspace”. In the new tab we will search the last folder of the path we created (freertos/freertoskernel/portable/GCC/ARM_CM33_NTZ/non-secure), select it and click on “OK” 3. Repeat this step in project > Properties > “C/C++ Build” >Settings >“Includes”. Changing OS preprocessor macro Finally, we just need to tell the compiler that we want to run the example with FreeRTOS, to do this: 1. Open the project properties (right-click on project > Properties) and click on “C/C++ Build”, then on “Settings” and on “Preprocessor”. 2. Now find the previous macro named “PH_OSAL_NULLOS”, double click on it and change it to “PH_OSAL_FREERTOS” 3. Click on “Apply and Close” and click on “Rebuild Index”. 4. To avoid multiple definition issues when we change between NULLOS and FREERTOS, we will discard the SysTickHandler for FREERTOS side located in port.c when the NULLOS macro is defined, as shown the following image: Spoiler (Highlight to read) #ifndef PH_OSAL_NULLOS void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ { uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } else { traceISR_EXIT(); } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } #endif #ifndef PH_OSAL_NULLOS void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ { uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } else { traceISR_EXIT(); } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } #endif 5. Finally, copy and paste the FreeRTOSConfig_Gen.h, FreeRTOSConfig.h and freertos_tasks_c_additions.h files from the freertos_hello example as shown the following image: Now you are able to build and debug following the chapter Testing Final Project Without OS but now with FreeRTOS. NFC Reader Library
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Kinara ARA-SDK 许可 恩智浦团队(以及所有熟悉 Ara-2 / Kinara 工具的人员)你们好、 我想了解为 Ara-2 (Kinara) 计算模块编译模型的正确许可/访问路径,尤其是现在 Kinara 已被恩智浦收购,而且恩智浦的公开资料描述了 SDK 与恩智浦软件生态系统的集成。 我的设置/目标 硬件Geniatech Ara-2 计算模块 SDK:Geniatech 提供的 Kinara Ara-2 SDK r1.3 使用情况:个人、非商业(研究/学习/测试) 模型目标:Qwen/Qwen2.5-7B-Instruct (GPTQ Int4) 目前有效的方法 我可以完成模式 1 流程,将模型转换为 ONNX。 我的结局是 model.onnx(小图形文件) 同一目录下的 model.onnx.data(大型外部张量数据/权重)。 什么失败了 模式 2(生成可部署 .dvm 的编译阶段)因 SDK 版本工具中的许可证签出/验证错误而失败。 据我所知,这将阻止生成 .dvm即使 ONNX 导出成功。 我的困惑 我没有 Kinara 许可证密钥。 Geniatech 的文档指出,必须通过 Kinara 获取 SDK 许可证密钥。 Kinara客户支持门户网站似乎拒绝使用常见的个人电子邮件功能域(例如gmail.com)进行注册,所以我无法在那里提交申请。 我为什么要在这里提问(恩智浦/Kinara 集成混淆) ,恩智浦的公开资料显示,Kinara 的 SDK 和模型工具正在集成到恩智浦的生态系统(包括 eIQ)中,Ara-2 现在作为恩智浦的产品提供,并提供相关的 "Ara 软件开发包 "下载。 然而,在实践中,这一点并不明确: 开发人员应在其中获取用于编译的许可证密钥,以及 现在是否支持 "Ara SDK / eIQ 集成 "路径。 问题 编译 ONNX → .dvm 是否需要许可证密钥使用 Ara-2 SDK 工具链(r1.3 / ARA-SDK),甚至用于个人/非商业用途? 如果是,个人/业余爱好者用户获得评估/开发者访问权限(尤其是在没有公司电子邮件域的情况下)的官方流程是什么? 有了现有的恩智浦账户,Ara-2 用户应该从哪里获取: “官方” Ara SDK 二进制文件/工具链(编译器),和/或 编译所需的许可机制? 如果编译需要许可证密钥,而许可证密钥又不容易获得,那么是否有任何预编译的 .dvm模型软件包(例如,用于 Qwen 7B/Qwen2.5恩智浦/Kinara/合作伙伴提供给 Ara-2 用户运行的 7B)? 如果恩智浦/Kinara 的相关人员能说明计划的路径(恩智浦门户网站与传统 Kinara 门户网站的对比,以及现在如何处理许可问题),那将大有帮助。 Re: Kinara ARA-SDK Licensing 我也有同样的问题!我拿到了设备,驱动程序。但没有 SDK,我猜也没有许可证(如果需要的话)。该设备只是静默地坐在我的联想 ThinkCentre Ultra neo 电脑里什么也没做。联想从未将其整合到 Windows 11 作为 NPU。我想至少用它来运行一些模型或进行学习。现在,它已经成为我电脑中一块完全闲置的硅片。我想,如果有更多的人开始使用这项技术,将有助于技术的普及。 Re: Kinara ARA-SDK Licensing @kratafila在我通过 Geniatech 获得 Linux SDK 软件包之前,我的硅片基本上也是闲置的。老实说,它仍然是未使用的硅,因为我无法让模型编译和运行。 值得一提的是,Geniatech(我的 Kinara Ara-2 M.2 模块的供应商)与我分享了这些 SDK/runtime 下载。它们以 Linux 为重点,我不确定它们是否适用于你的 ThinkCentre 中的 Ara-2 硬件(或者在 Windows 11 上提供帮助,里面有 Windows 二进制文件,但我在 Linux 软件方面取得了更大的成功),但是如果你能在 Linux 下测试/确认你的设备能正常运行,它们可能仍然有用: 1) 驱动程序/运行时间 + .dvm 示例型号(Geniatech"客户就绪" 捆绑): hxxps://mega[.]nz/file/nJcF0K5a#W-Ote-fp59hXoq4T0GGsaQmwGTRphWz0JATowyWjQpg 2) " 模型编译 " 文件夹 Geniatech 最初寄给我(注意:仅此一项就不包括编译器二进制文件): hxxps://mega[.]nz/file/KoclFQrJ#ifNOX7w2Y1qgLM6rnm7xPnUprwZZqhuRvelFG5p0MJQ 3) Geniatech 随后提供的完整 Ara-2 SDK 压缩包(此压缩包应包含实际的工具链/编译器,例如dvrun): hxxps: //文件 [.] geniatech [.] com/down-eng/bsp/kinara_sdk_20251120 [.] tar [.] bz2 如果你尝试了上述任何一种方法并取得了进展(即使只是安装了SDK并看到设备被识别),请在这里发回去,这不仅是为了我们,也是因为多个社区似乎对于 " 官方 " 的工作路径、SDK/许可的实际来源以及如何编译和运行其他模型存在更广泛的困惑。
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S32DS FOR ARM cannot be downloaded. S32DS software download is rejected, want to know the specific reasons and ways to deal with, I am a personal user without a company, the development board is the network to buy learning to use. The web page prompts the following: Our records indicate that you have previously requested an Evaluation version for this product. If you would like to purchase the full product please visit us at NXP or contact your sales representative . Note If you would like to extend your evaluation period please open a If you would like to extend your evaluation period please open a Service Request . Disabled creation of service requests Since we are unable to associate your email address with a company, you are not eligible to create a new service request on the Service Request Portal page. Please use your company email address to log in to the NXP website and submit a service request or submit your question via the NXP Technical Forum.   Re: S32DS FOR ARM 无法下载 Hi,  which version of S32DS do you like to download? 
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McuPGOOD_POLARITYControl Configuration Error Reported When EB Updates RTD 7.0.0_QLP03 This McuPGOOD_POLARITYControl configuration item is not found under this path Re: EB更新RTD 7.0.0_QLP03时报告McuPGOOD_POLARITYControl配置错误 Hi@WeiCh I'm not sure if you can download it, you can try it, if not, contact your agent or FAE for evaluation access. https://www.nxp.com/design/design-center/software/automotive-software-and-tools/real-time-drivers-rtd:AUTOMOTIVE-RTD Re: EB更新RTD 7.0.0_QLP03时报告McuPGOOD_POLARITYControl配置错误 Where can I download 30.0.0?Will 30.0.0 open a 29.0.0 project? Re: EB更新RTD 7.0.0_QLP03时报告McuPGOOD_POLARITYControl配置错误 Hi@WeiCh I see that the version of EB Tresos that this version adapts to should be 30.0.0, not the version you are using. Re: EB更新RTD 7.0.0_QLP03时报告McuPGOOD_POLARITYControl配置错误 Hi@WeiCh In the download screen there is this hint that you have to change the suffix Re: EB更新RTD 7.0.0_QLP03时报告McuPGOOD_POLARITYControl配置错误 It's already working, thanks! Re: EB更新RTD 7.0.0_QLP03时报告McuPGOOD_POLARITYControl配置错误 This is the 30.0.0 interface, which still doesn't seem to have this configuration item. Re: EB更新RTD 7.0.0_QLP03时报告McuPGOOD_POLARITYControl配置错误 Hi@WeiCh The style of your interface is not right, the style of the new version is totally different from the old one. Re: EB更新RTD 7.0.0_QLP03时报告McuPGOOD_POLARITYControl配置错误 There seems to be a bit of a problem, running setup prompts that there is no installer, you can unzip EBtresosStudio_EBtresosStudio.zip and open the app directly, but the app interface is still old: Re: EB更新RTD 7.0.0_QLP03时报告McuPGOOD_POLARITYControl配置错误 Hi@WeiCh Okay, you're welcome.
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RT1170 MIPI-CSI 摄像机 - 支持 YUV422(8 位 你好 您是否有任何参考设计、应用笔记或示例项目来演示使用带有 i.MX RT1170 MIPI-CSI 接口输出 YUV422(8 位)的摄像头模块? 我查看了 RT1170 勘误表(https://www.nxp.com/docs/en/errata/IMXRT1170ACE.pdf),了解到不支持 YUV422 10 位格式,但我无法找到任何已发布的示例或证实,特别是显示 YUV422 8 位操作的示例或证实。 如果能提供任何指导、已知工作配置或相机模块示例,我们将不胜感激。 Re: RT1170 MIPI-CSI Camera - YUV422 (8 bit) support 你好@mtreloar、 感谢您关注恩智浦 MIMXRT 系列! RT1170 MIPI-CSI 支持 YUV422(YUYV 8 位)格式。您可以参考 SDK 中的示例项目: 致以最诚挚的问候, Gavin
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[Haudi Crypto, Inc.][SE050]Proposal for BIP32 Support in SE050 Hi Experts, The customer is Haudi Crypto, Inc. (Subsidiary of Haudi, Inc.), who is developing a hardware cryptocurrency wallet using the SE050. During development, they identified enhancements that would benefit this use case—specifically, native BIP32 key derivation support. Is it possible to release a custom type for their application? Please kindly refer to the attachment for more details. More backgrounds as shown below: So far their Openloop Wallet is still under development and has not yet been released, and they will be the distributor. For the corporate version, they are in negotiations with several Japanese financial institutions and stablecoin operators. It has been well-received. For the general public version, they plan to first launch it through Japanese crowdfunding, and they are currently preparing for this. They also plan to sell it on Amazon afterwards.  Customer contactor info: Company Name: Haudi Crypto, Inc. (Subsidiary of Haudi, Inc.) Contact Information: Kazunori Asada, CEO Email: [email protected] Thanks in advance for any help! Best Regards, Kan  Re: [Haudi Crypto, Inc.][SE050]Proposal for BIP32 Support in SE050 Thank you for sharing your detailed proposal We have reviewed your Level‑2 request. Based on our current analysis: Some parts of the BIP32 flow can already be executed inside the secure element. For example, EC point multiplication can be performed entirely within SE050, and the resulting point can be stored in an SE object. This allows certain chained operations to be kept inside the secure element boundary. However, other required steps—such as securely chaining HMAC‑SHA512 inside the secure element etc. are not feasible with the current IoT applet command set. We have taken your feedback and submitted it as an official Change Request (CR) for evaluation by our R&D team. However, any change if it happens for the generic product, it could not be in near future.  We will keep you updated as soon as we receive feedback on the CR.  Moreover, for your level 1 limitation you can consider using transient objects . Thank you
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spi example code Hello, I am studying the spi example code provided by NXP in a project called 'Spi_Transfer_S32K312'. I want to know what each function means in the code, can I know the location of the header file? Re: spi example code Hi @mingimin  The header files are located under RTD → include within the project directory. Additionally, I recommend reviewing the S32K3/S32M27x SPI Driver Integration Manual and the User Manual included with the RTDs. These documents provide detailed information about the driver, including its limitations, hardware and software requirements, usage guidelines, and configuration instructions. They are helpful for a deeper understanding of the driver's behavior and capabilities. You can find these resources, for example, at the following path: C:\NXP\S32DS.3.5\S32DS\software\PlatformSDK_S32K3\RTD\Spi_TS_T40D34M50I0R0\doc Please note that the exact path may vary depending on the S32DS version and your installation directory. BR, VaneB
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