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How to use a GPIO(libgpiod) with gpioget/gpioset, on i.MX8Q as an example difference between gpioget and "cat /sys/class/gpio" in GPIO control: gpioget : This is a command-line utility provided by the  libgpiod  library. It is designed to interact with GPIO lines through the modern Linux GPIO character device interface ( /dev/gpiochipN ). /sys/class/gpio : This refers to the legacy sysfs interface for GPIO control in Linux. While widely used in the past, this interface has been officially deprecated in favor of the  libgpiod  character device interface since Linux kernel version 6.0 and later. Below is an example of libgpiod tested on i.MX8Q-MEK, L6.12.3 BSP. Device tree settings: We use GPIO1-05 and GPIO1-06 in this example. can put GPIO pinctrls in a specific group like “gpio_test”, or under certain driver like “gpio-keys” gpio_test: gpio-test { pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_gpio_test_default>; pinctrl-1 = <&pinctrl_gpio_test_sleep>; status = "okay"; }; gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_gpio_example_default>; pinctrl-1 = <&pinctrl_gpio_example_sleep>; key_wakeup2{ label = "wakeup_key"; gpios = <&lsio_gpio2 1 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; pinctrl_gpio_test_default: gpiotestgrp_default { fsl,pins = < IMX8QM_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07 0x06000061 IMX8QM_QSPI1A_DATA0_LSIO_GPIO4_IO26 0x06000041 IMX8QM_MIPI_CSI1_I2C0_SCL_LSIO_GPIO2_IO00 0x06000021 IMX8QM_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06 0x06000021 >; }; pinctrl_gpio_test_sleep: gpiotestgrp_sleep { fsl,pins = < IMX8QM_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07 0x07800061 IMX8QM_QSPI1A_DATA0_LSIO_GPIO4_IO26 0x07800041 IMX8QM_MIPI_CSI1_I2C0_SCL_LSIO_GPIO2_IO00 0x07800021 IMX8QM_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06 0x07800021 >; }; pinctrl_gpio_example_default: gpioexamplegrp_default { fsl,pins = < IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05 0x06000021 IMX8QM_MIPI_CSI1_I2C0_SDA_LSIO_GPIO2_IO01 0x06000021 >; }; pinctrl_gpio_example_sleep: gpioexamplegrp_sleep { fsl,pins = < IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05 0x07800021 IMX8QM_MIPI_CSI1_I2C0_SDA_LSIO_GPIO2_IO01 0x07800021 >; }; Kernel commands to test GPIO function: gpiodetect and gpioinfo command: root@imx8qmmek:~# gpiodetect gpiochip0 [5d080000.gpio] (32 lines) gpiochip1 [5d090000.gpio] (32 lines) gpiochip2 [5d0a0000.gpio] (32 lines) gpiochip3 [5d0b0000.gpio] (32 lines) gpiochip4 [5d0c0000.gpio] (32 lines) gpiochip5 [5d0d0000.gpio] (32 lines) gpiochip6 [5d0e0000.gpio] (32 lines) gpiochip7 [5d0f0000.gpio] (32 lines) root@imx8qmmek:~# gpioinfo -c 1 gpiochip1 - 32 lines: line 0: unnamed input line 1: unnamed input line 2: unnamed input line 3: unnamed input line 4: unnamed input line 5: unnamed input line 6: unnamed output line 7: unnamed output line 8: unnamed input line 9: unnamed input line 10: unnamed input line 11: unnamed input line 12: unnamed input line 13: unnamed output consumer=regulator-pcie line 14: unnamed input line 15: unnamed input line 16: unnamed input line 17: unnamed input line 18: unnamed input line 19: unnamed input line 20: unnamed input line 21: unnamed input line 22: unnamed input line 23: unnamed input line 24: unnamed input line 25: unnamed input line 26: unnamed input line 27: unnamed input line 28: unnamed input line 29: unnamed input line 30: unnamed input line 31: unnamed input use cat /sys/kernel/debug/gpio to show current GPIO settings before GPIO1-05 and GPIO1-06 are set: root@imx8qmmek:~# cat /sys/kernel/debug/gpio gpiochip0: GPIOs 512-543, parent: platform/5d080000.gpio, 5d080000.gpio: gpio-526 ( |scl ) out lo gpio-527 ( |sda ) in lo gpiochip1: GPIOs 544-575, parent: platform/5d090000.gpio, 5d090000.gpio: gpio-557 ( |regulator-pcie ) out hi gpiochip2: GPIOs 576-607, parent: platform/5d0a0000.gpio, 5d0a0000.gpio: gpio-577 ( |wakeup_key ) in hi ACTIVE LOW gpiochip3: GPIOs 608-639, parent: platform/5d0b0000.gpio, 5d0b0000.gpio: gpio-618 ( |spi1 CS0 ) out hi ACTIVE LOW gpiochip4: GPIOs 640-671, parent: platform/5d0c0000.gpio, 5d0c0000.gpio: gpio-641 ( |enable ) out hi ACTIVE LOW gpio-643 ( |regulator-usbotg1-vb) out lo gpio-647 ( |usdhc2-vmmc ) out hi gpio-667 ( |enable ) out lo ACTIVE LOW gpio-668 ( |host-wake ) in hi ACTIVE LOW gpio-669 ( |PCIe reset ) out hi ACTIVE LOW gpiochip5: GPIOs 672-703, parent: platform/5d0d0000.gpio, 5d0d0000.gpio: gpio-673 ( |mux ) out hi gpio-693 ( |wp ) in lo gpio-694 ( |cd ) in lo ACTIVE LOW gpiochip6: GPIOs 704-735, parent: platform/5d0e0000.gpio, 5d0e0000.gpio: gpiochip7: GPIOs 736-767, parent: platform/5d0f0000.gpio, 5d0f0000.gpio: use gpioset command to set GPIO output, can also change GPIO direction(input → output) #set gpiochip1-5 and 1-6 root@imx8qmmek:~# gpioset -c gpiochip1 6=1 & [1] 700 root@imx8qmmek:~# gpioset -c gpiochip1 5=1 & [2] 702 check the changes from the commands above with cat /sys/kernel/debug/gpio and gpioinfo -c 1 : root@imx8qmmek:~# cat /sys/kernel/debug/gpio gpiochip0: GPIOs 512-543, parent: platform/5d080000.gpio, 5d080000.gpio: gpio-526 ( |scl ) out lo gpio-527 ( |sda ) in lo gpiochip1: GPIOs 544-575, parent: platform/5d090000.gpio, 5d090000.gpio: gpio-549 ( |gpioset ) out hi gpio-550 ( |gpioset ) out hi gpio-557 ( |regulator-pcie ) out hi gpiochip2: GPIOs 576-607, parent: platform/5d0a0000.gpio, 5d0a0000.gpio: gpio-577 ( |wakeup_key ) in hi ACTIVE LOW gpiochip3: GPIOs 608-639, parent: platform/5d0b0000.gpio, 5d0b0000.gpio: gpio-618 ( |spi1 CS0 ) out hi ACTIVE LOW gpiochip4: GPIOs 640-671, parent: platform/5d0c0000.gpio, 5d0c0000.gpio: gpio-641 ( |enable ) out hi ACTIVE LOW gpio-643 ( |regulator-usbotg1-vb) out lo gpio-647 ( |usdhc2-vmmc ) out hi gpio-667 ( |enable ) out lo ACTIVE LOW gpio-668 ( |host-wake ) in hi ACTIVE LOW gpio-669 ( |PCIe reset ) out hi ACTIVE LOW gpiochip5: GPIOs 672-703, parent: platform/5d0d0000.gpio, 5d0d0000.gpio: gpio-673 ( |mux ) out hi gpio-693 ( |wp ) in lo gpio-694 ( |cd ) in lo ACTIVE LOW gpiochip6: GPIOs 704-735, parent: platform/5d0e0000.gpio, 5d0e0000.gpio: gpiochip7: GPIOs 736-767, parent: platform/5d0f0000.gpio, 5d0f0000.gpio: root@imx8qmmek:~# gpioinfo -c 1 gpiochip1 - 32 lines: line 0: unnamed input line 1: unnamed input line 2: unnamed input line 3: unnamed input line 4: unnamed input line 5: unnamed output consumer=gpioset line 6: unnamed output consumer=gpioset line 7: unnamed output line 8: unnamed input line 9: unnamed input line 10: unnamed input line 11: unnamed input line 12: unnamed input line 13: unnamed output consumer=regulator-pcie   How to enable legacy GPIO SYSFS(default disabled on L6 kernel and above) refer to the comment of this commit: https://github.com/nxp-imx/linux-imx/commit/3b4feb21158f873269ff3fbe2fe8d23a88d64b24 commit 3b4feb21158f873269ff3fbe2fe8d23a88d64b24 Author: Linus Walleij Date: Tue Nov 10 15:27:24 2020 +0100 gpio: sysfs: Enforce character device If users select sysfs support they get the character device as well so that end-users cannot complain that they "only have sysfs on my system". They should have the character device at all times. If someone is in so dire need of stripping out the character device while still enabling the sysfs ABI they can very well patch the kernel. Also only show this obsolete option to expert users. Signed-off-by: Linus Walleij Link: <> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 5d4de5cd6759..4dd566f7ea39 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -59,8 +59,9 @@ config DEBUG_GPIO that are most common when setting up new platforms or boards. config GPIO_SYSFS - bool "/sys/class/gpio/... (sysfs interface)" + bool "/sys/class/gpio/... (sysfs interface)" if EXPERT depends on SYSFS + select GPIO_CDEV # We need to encourage the new ABI help Say Y here to add the legacy sysfs interface for GPIOs. To enable GPIO_SYSFS, from the patch. The best way is CONFIG_EXPERT = y, then enable CONFIG_GPIO_SYSFS=Y. not need to revert the patch. SYSFS, as legacy interface for GPIO control in Linux. While widely used in the past, this interface has been officially deprecated in favor of the libgpiod character device interface since Linux kernel version 6.0 and later. i.MX Processors
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i.MX6 DDR Stress Test Tool V1.0.3 Note, the tools described in this page are deprecated and are no longer maintained.  For the latest maintained i.MX 6/7 series DDR tools, the user can find these here: i.MX 6/7 Series DDR Tool Release Hi All, DDR_Stress_Tester is a software application for fine tuning DDR parameters and verifying DDR performance on i.MX6 boards. It performs write leveling, DQS gating, read/write delay calibration on the target board to match the layout of the board and archive the best DDR performance. In addition, the stress test can help the user to verify the DDR performance on their boards. The following are the features supported: • Support i.MX6Q, i.MX6D, i.MX6DL, iMX6S, i.MX6SL, and i.MX6SX DDR calibration. • Support DDR3 write leveling, DQS gating, Read/Write Delay auto-calibration. • Support LPDDR2 Read/Write Delay auto-calibration. • Support 16 bits, 32 bits, and 64 bits data bus. • Support fixed-mapping 2-channel LPDDR2. • Support DDR stress test between the frequency 135MHz and 672 MHz If  USB OTG port is not available on customer board, please use the images in DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG.zip. The bin files in the packages can be loaded by uboot and elf files are used by JTAG load.  Please note when the image is loaded by u-boot, the DDR is initialized by u-boot (reference flash_header.S). To run ddr stress test from u-boot, CONFIG_SPLASH_SCREEN must be disabled in u-boot. Because when enter self refresh mode in ddr stress test, DRAM access will be blocked. If splash screen in u-boot is enabled, IPU will continuously access DRAM, so the system will hang up. If you have other DMA access in u-boot, it must be disabled. If customer uses different RX/TX pin for UART, please contact FAE. UART1 6DQ 6DL 6SL 6SX TX CSI0_DAT10/ALT3 CSI0_DAT10/ALT3 UART1_TXD/ALT0 GPIO1_IO04/ALT0 RX CSI0_DAT11/ALT3 CSI0_DAT11/ALT3 UART1_RXD/ALT0 GPIO1_IO05/ALT0 The commands to run ddr test in i.MX6Q uboot: U-Boot > fatload mmc 2:1 0x907000 ddr-stress-test-mx6dq.bin U-Boot > go 0x907000 For i.MX6Q/6D 4K interleaved LPDDR2, please use version v1.0.3.1. i.MX6 DDR Stress Test Tool V1.0.3.1 for LPDDR2 4K interleaved mode For i.MX6/i.MX7 DDR Stress Test Tool with GUI interface, please use version V2.x: i.MX6/7 DDR Stress Test Tool V2.10 History V1.0.3:  i.MX6SoloX is supported. Re: i.MX6 DDR Stress Test Tool V1.0.3 V0.042 is not suggested for i.MX6. There are a lot of differences between v0.042 and v1.0.x. The memory property is different. Re: i.MX6 DDR Stress Test Tool V1.0.3 I took a look at it in more detail and the actual difference is not USB OTG vs SDBoot, it was the DDRStressTester version. We were originally testing OSB OTG DDRStressTester v0.042, we were getting 3min for 2GB DDR there. When we started with the SDBoot, we tested with v1.0.2. which gave 8min for 2GB. When I retested v1.0.2 USB OTG, I get 8min for 2GB. Retesting for 512MB does give me the 2min you were getting. The main items the were significantly longer in v1.0.2 was t0.1 data is addr test, t1 memcpy8 SSN x64 test, t3 memcypy11 random pattern test. What caused the drastic change in performance between v0.042 and v1.0.2? Thanks Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Mark, I have not see the difference you described. i.MX6Q: L3.0.35_4.1.0 u-boot  ( modification: comment out drv_lcd_init () in common/stdio.c ) DDR density selected (MB): 512 There is no difference on the time to run one loop through USB OTG and through u-boot loading, both are around 2 mins. You can try to modify the u-boot as my changes. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Mark, I have not see the difference you described. i.MX6Q: L3.0.35_4.1.0 u-boot  ( modification: comment out drv_lcd_init () in common/stdio.c ) DDR density selected (MB): 512 There is no difference on the time to run one loop through USB OTG and through u-boot loading, both are around 2 mins. You can try to modify the u-boot as my changes. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Grace Si, We are using the imx6 DDR Stress Tester both through USB OTG and loading through uboot with the SDBoot version. We noticed in usbotg, we finish one loop in about 3minutes while the SDboot version finished in about 8minutes. Is this expected and what is causing this time difference? Thanks Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Grace Si, We are using the imx6 DDR Stress Tester both through USB OTG and loading through uboot with the SDBoot version. We noticed in usbotg, we finish one loop in about 3minutes while the SDboot version finished in about 8minutes. Is this expected and what is causing this time difference? Thanks Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Casper, Please contact your FAE or Marketing. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Casper, Please contact your FAE or Marketing. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 hello Grace           is anyway to support us to create that pattern in? we can pay for a whole sulotion! or who should i  contact? thanks ^^ Re: i.MX6 DDR Stress Test Tool V1.0.3 We don't have plan for it. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 We don't have plan for it. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello is it possible to add in precharge power down test in Stress test?? tks ^^ Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello is it possible to add in precharge power down test in Stress test?? tks ^^ Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello is it possible to add in precharge power down test in Stress test?? tks ^^ Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello is it possible to add in precharge power down test in Stress test?? tks ^^ Re: i.MX6 DDR Stress Test Tool V1.0.3 I don't know how I missed this, but knowing that I could launch the DDR Stress Test tool from U-Boot would have saved us a lot of time. GraceSi wrote: In my log below, you can see the load size of ddr-stress-test-mx6dq.bin is  87520, but yours is 96660. None of the binaries in the v1.0.2 or v1.0.3 ZIP files has a size of 87520 bytes.  My copy of ddr-stress-test-mx6dq.bin (v1.0.3) is 96660 bytes. Another point is what I mentioned before, is the RX/TX pin of  UART1 of your board same as i.MX6DQ EVK? If not, please contact your FAE. i.MX6DQ UART1 :     /* UART1 TXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT10);     /* UART1 RXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT11);     // daisy chain setup    writel(0x1, IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT); If you're successfully talking to U-Boot over UART1, then it's probably already set up correctly :-). Currently watching the tool rotating through DDR3 clock frequencies... Re: i.MX6 DDR Stress Test Tool V1.0.3 I don't know how I missed this, but knowing that I could launch the DDR Stress Test tool from U-Boot would have saved us a lot of time. GraceSi wrote: In my log below, you can see the load size of ddr-stress-test-mx6dq.bin is  87520, but yours is 96660. None of the binaries in the v1.0.2 or v1.0.3 ZIP files has a size of 87520 bytes.  My copy of ddr-stress-test-mx6dq.bin (v1.0.3) is 96660 bytes. Another point is what I mentioned before, is the RX/TX pin of  UART1 of your board same as i.MX6DQ EVK? If not, please contact your FAE. i.MX6DQ UART1 :     /* UART1 TXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT10);     /* UART1 RXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT11);     // daisy chain setup    writel(0x1, IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT); If you're successfully talking to U-Boot over UART1, then it's probably already set up correctly :-). Currently watching the tool rotating through DDR3 clock frequencies... Re: i.MX6 DDR Stress Test Tool V1.0.3 I tried to test 4GB DDR3 on CS0 only and got calibration data with option "9" (maximum supported density). However, I got error on t0.1 Address of failure: 0x10000000 Data was: 0x90000000 when I set MMDC0_MDASP to 0x7F. I got error on t0.1 Address of failure: 0xc0000000 Data was: 0xffffffc0 when I set MMDC0_MDASP to 0x5F. Is this hardware or software limitation? Re: i.MX6 DDR Stress Test Tool V1.0.3 I tried to test 4GB DDR3 on CS0 only and got calibration data with option "9" (maximum supported density). However, I got error on t0.1 Address of failure: 0x10000000 Data was: 0x90000000 when I set MMDC0_MDASP to 0x7F. I got error on t0.1 Address of failure: 0xc0000000 Data was: 0xffffffc0 when I set MMDC0_MDASP to 0x5F. Is this hardware or software limitation? Re: i.MX6 DDR Stress Test Tool V1.0.3 hi Azlum      performance checking we suggest at least 500loops. Casper Re: i.MX6 DDR Stress Test Tool V1.0.3 hi Azlum      performance checking we suggest at least 500loops. Casper Re: i.MX6 DDR Stress Test Tool V1.0.3 Dear Casper, How many RAM test loop need to be completed ? When I run the RAM stress test, it crossed around 470 loops. So whether can I consider this as Pass ? Regards, Azlum Re: i.MX6 DDR Stress Test Tool V1.0.3 Dear Casper, How many RAM test loop need to be completed ? When I run the RAM stress test, it crossed around 470 loops. So whether can I consider this as Pass ? Regards, Azlum Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello Grace i try to modify as below setmem /32 0x021b000c = 0x3F433F13  // MMDC0_MDCFG0          for txpdll is set a unreasonable value for DDR3 but it still test pass. does it mean no tXPDLL related in DDR3 stress test?? Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello Grace i try to modify as below setmem /32 0x021b000c = 0x3F433F13  // MMDC0_MDCFG0          for txpdll is set a unreasonable value for DDR3 but it still test pass. does it mean no tXPDLL related in DDR3 stress test?? Re: i.MX6 DDR Stress Test Tool V1.0.3 please go to Freescale i.MX6 DRAM Port Application Guide-DDR3 Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 please go to Freescale i.MX6 DRAM Port Application Guide-DDR3 Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 hello Grace           suppose it is not modified in stress test aid. suppose txpdll is setle when DDR3 init! so how can i modify it before init?? Re: i.MX6 DDR Stress Test Tool V1.0.3 hi Grace      but if i want to tuning tXPDLL of DDR3 how can i do in iMX6 solo? Re: i.MX6 DDR Stress Test Tool V1.0.3 hi Grace      but if i want to tuning tXPDLL of DDR3 how can i do in iMX6 solo? Re: i.MX6 DDR Stress Test Tool V1.0.3 txpdll should follow the value in datasheet of your DDR3. It is not supposed to be tested. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 txpdll should follow the value in datasheet of your DDR3. It is not supposed to be tested. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 hello    we test DDR3 in IMx6 solo. we want to know if it can inclulde txpdll test by DDR3 stress test? it appricated if any solution or suggestion thank you for your kinldy help ^^ Re: i.MX6 DDR Stress Test Tool V1.0.3 hello    we test DDR3 in IMx6 solo. we want to know if it can inclulde txpdll test by DDR3 stress test? it appricated if any solution or suggestion thank you for your kinldy help ^^ Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Patrick, Are you using the binary in DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG.zip or DDR_Stress_Tester_V1.0.2_UART1_for_SDboot&JTAG.zip. Even the name is same, but the binary files in package DDR_Stress_Tester_UART1_for_SDboot&JTAG.zip and DDR_Stress_Tester.zip are different. In my log below, you can see the load size of ddr-stress-test-mx6dq.bin is  87520, but yours is 96660. Another point is what I mentioned before, is the RX/TX pin of  UART1 of your board same as i.MX6DQ EVK? If not, please contact your FAE. i.MX6DQ UART1 :     /* UART1 TXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT10);     /* UART1 RXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT11);     // daisy chain setup    writel(0x1, IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT); Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Patrick, Are you using the binary in DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG.zip or DDR_Stress_Tester_V1.0.2_UART1_for_SDboot&JTAG.zip. Even the name is same, but the binary files in package DDR_Stress_Tester_UART1_for_SDboot&JTAG.zip and DDR_Stress_Tester.zip are different. In my log below, you can see the load size of ddr-stress-test-mx6dq.bin is  87520, but yours is 96660. Another point is what I mentioned before, is the RX/TX pin of  UART1 of your board same as i.MX6DQ EVK? If not, please contact your FAE. i.MX6DQ UART1 :     /* UART1 TXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT10);     /* UART1 RXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT11);     // daisy chain setup    writel(0x1, IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT); Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi there, I'm using an i.MX6Q part on my board and I don't have OTG so I am following your instructions on loading from u-boot or JTAG. JTAG I've had no luck so I thought I'd switch over to u-boot. U-Boot > ext2load mmc 0:1 0x907000 ddr-stress-test-mx6dq.bin 96660 bytes read in 43 ms (2.1 MiB/s) U-Boot > go 0x907000 ## Starting application at 0x00907000 ... then it just sits there and doesn't load anything further... any ideas? Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi there, I'm using an i.MX6Q part on my board and I don't have OTG so I am following your instructions on loading from u-boot or JTAG. JTAG I've had no luck so I thought I'd switch over to u-boot. U-Boot > ext2load mmc 0:1 0x907000 ddr-stress-test-mx6dq.bin 96660 bytes read in 43 ms (2.1 MiB/s) U-Boot > go 0x907000 ## Starting application at 0x00907000 ... then it just sits there and doesn't load anything further... any ideas? Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Leo, Please check whether the RX/TX pin of  UART1 is same as i.MX6DL EVK,  if not, the DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG.zip or DDR_Stress_Tester_V1.0.2_UART1_for_SDboot&JTAG.zip. will not work. please contact your FAE to build the software to configure the correct UART. i.MX6DL UART1 :     /* UART1 TXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT10);     /* UART1 RXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT11);     // daisy chain setup     writel(0x1, IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT); Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Leo, Please check whether the RX/TX pin of  UART1 is same as i.MX6DL EVK,  if not, the DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG.zip or DDR_Stress_Tester_V1.0.2_UART1_for_SDboot&JTAG.zip. will not work. please contact your FAE to build the software to configure the correct UART. i.MX6DL UART1 :     /* UART1 TXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT10);     /* UART1 RXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT11);     // daisy chain setup     writel(0x1, IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT); Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Bump. We are about to crank our new board to 1 GHz timings, and I'd like to be able to get this nailed down.  The DDR3 Script Aid is very useful, but ultimately I want to use the Stress Test Tool to dial them in. So far I've had no (apparent) success being able to run the Stress Test Tool using nothing but JTAG.  This may well be because I'm not using JTAG correctly.  Is there an FAQ or HOWTO somewhere that might point me in the right direction? Also: Does setting up the DDR3 timings also set up the core clock?  We'd like the ARM cores to run at 1 GHz as well; do we get that for "free" when using the output from the Script Aid? Re: i.MX6 DDR Stress Test Tool V1.0.3 Bump. We are about to crank our new board to 1 GHz timings, and I'd like to be able to get this nailed down.  The DDR3 Script Aid is very useful, but ultimately I want to use the Stress Test Tool to dial them in. So far I've had no (apparent) success being able to run the Stress Test Tool using nothing but JTAG.  This may well be because I'm not using JTAG correctly.  Is there an FAQ or HOWTO somewhere that might point me in the right direction? Also: Does setting up the DDR3 timings also set up the core clock?  We'd like the ARM cores to run at 1 GHz as well; do we get that for "free" when using the output from the Script Aid? Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Steve, Please contact your FAE. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Steve, Please contact your FAE. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 GraceSi, The console port on our board is UART4. Could you release a binary file booting from SD to support UART4 console?  Or could you release the source code to us to modify by ourselves? Thanks. Steve Re: i.MX6 DDR Stress Test Tool V1.0.3 GraceSi, The console port on our board is UART4. Could you release a binary file booting from SD to support UART4 console?  Or could you release the source code to us to modify by ourselves? Thanks. Steve Re: i.MX6 DDR Stress Test Tool V1.0.3 Please always use WALAT=1, you can refer to below aid. i.Mx6DQSDL DDR3 Script Aid https://community.freescale.com/docs/DOC-94917 Sure, flash_header.s should keep same with your test script. Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Grace,      The write leveling calibration result of our board is as following: MMDC_MPWLDECTRL0 ch0 after write level cal: 0x00270021 MMDC_MPWLDECTRL1 ch0 after write level cal: 0x0030002C MMDC_MPWLDECTRL0 ch1 after write level cal: 0x001F0030 MMDC_MPWLDECTRL1 ch1 after write level cal: 0x000F0026      I am not sure how to judge if the value is larger than 0x2f as User_Guide says:                             NOTE If write-leveling delay is larger than 0x2f, it is suggested to set the WALAT value on MMDCx_MDMISC register to 1 in the initialization script and re-run the DDR_Stress_Tester. And if I should set WALAT to 1 in the script, should I set it to 1 in flash_header.S? In other words, if I calibrated a group of satisfied parameters and the stress test is also OK, should I keep flash_header.S's every register value the same as the test script.inc?    Thank you very much! Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Grace,      The write leveling calibration result of our board is as following: MMDC_MPWLDECTRL0 ch0 after write level cal: 0x00270021 MMDC_MPWLDECTRL1 ch0 after write level cal: 0x0030002C MMDC_MPWLDECTRL0 ch1 after write level cal: 0x001F0030 MMDC_MPWLDECTRL1 ch1 after write level cal: 0x000F0026      I am not sure how to judge if the value is larger than 0x2f as User_Guide says:                             NOTE If write-leveling delay is larger than 0x2f, it is suggested to set the WALAT value on MMDCx_MDMISC register to 1 in the initialization script and re-run the DDR_Stress_Tester. And if I should set WALAT to 1 in the script, should I set it to 1 in flash_header.S? In other words, if I calibrated a group of satisfied parameters and the stress test is also OK, should I keep flash_header.S's every register value the same as the test script.inc?    Thank you very much! Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Petr, regarding Vybrid there's not this tool but DDRV (aka DDR Validation) available within Processor Expert and Eclipse based product Driver Suite (DS) v10.4.1. You have to have installed DS v10.4 and after that you need to apply an update 1 which includes DDRV tool supported for Vybrid processors. You may find more information about Driver Suite here - http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=PE_DRIVER_SUITE. Just one note here, DDRV tool is a licensed tool, so you will need to obtain proper license to run this piece of SW. Not sure who is the right person to contact regarding DDRV licensing for Vybrid, but you may try to contact your local FSL representative for an evaluation key. Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Petr, regarding Vybrid there's not this tool but DDRV (aka DDR Validation) available within Processor Expert and Eclipse based product Driver Suite (DS) v10.4.1. You have to have installed DS v10.4 and after that you need to apply an update 1 which includes DDRV tool supported for Vybrid processors. You may find more information about Driver Suite here - http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=PE_DRIVER_SUITE. Just one note here, DDRV tool is a licensed tool, so you will need to obtain proper license to run this piece of SW. Not sure who is the right person to contact regarding DDRV licensing for Vybrid, but you may try to contact your local FSL representative for an evaluation key. Re: i.MX6 DDR Stress Test Tool V1.0.3 From the name, I would presume that "DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG.zip" contained images that were intended to be loaded via JTAG and would interact over UART1.  However, I've been unable to get this to work.  I'm a newcomer to JTAG in general and OpenOCD in particular, so pilot error is a definite possibility. Our board is based around the i.MX6DL.  I'm using OpenOCD 0.8.0 with an Olimex USB-TINY-H.  TRST on the JTAG pod is connected to JTAG_TRST; SRST is connected to POR. As such, I have reset_config set as follows: reset_config trst_and_srst srst_pulls_trst This appears to (mostly) work: > reset halt adapter speed: 1000 kHz JTAG scan chain interrogation failed: all zeroes Check JTAG interface, timings, target power, etc. Trying to use configured scan chain anyway... imx6.dap: IR capture error; saw 0x00 not 0x01 Bypassing JTAG setup events due to errors Locking debug access failed on first, but succeeded on second try. BUG: can't assert only SRST Locking debug access failed on first, but succeeded on second try. imx6.cpu.0: ran after reset and before halt ... number of cache level 1 imx6.cpu.0 cluster 0 core 0 multi core target state: halted target halted in Thumb state due to debug-request, current mode: Supervisor cpsr: 0x400001f3 pc: 0x00001080 MMU: disabled, D-Cache: disabled, I-Cache: enabled I also appear to be able to load the image: > load_image /home/ewhac/devel/iMX6/DDR_Stress_Tester_V1.0.3_UART1/ddr-stress-test-mx6dl.elf 82226 bytes written at address 0x00907000 downloaded 82226 bytes in 4.802489s (16.720 KiB/s) However, after this point, I can't get anything to work.  'resume 0x907000' appears to do nothing, and subsequent 'halt' commands don't work; I have to reset.  When I disassemble the loaded image from 0x907000, I see this: > arm disassemble 0x907000 32 0x00907000     0xe59ff018     LDR r15, [r15, #0x18] 0x00907004     0xe59ff018     LDR r15, [r15, #0x18] 0x00907008     0xe59ff018     LDR r15, [r15, #0x18] 0x0090700c     0xe59ff018     LDR r15, [r15, #0x18] 0x00907010     0xe59ff018     LDR r15, [r15, #0x18] 0x00907014     0xe1a00000     NOP 0x00907018     0xe59ff014     LDR r15, [r15, #0x14] 0x0090701c     0xe59ff014     LDR r15, [r15, #0x14] 0x00907020     0x00907054     ADDEQS r7, r0, r4, ASR r0 0x00907024     0x0090703c     ADDEQS r7, r0, r12, LSR r0 0x00907028     0x00907040     ADDEQS r7, r0, r0, ASR #0x20 0x0090702c     0x00907044     ADDEQS r7, r0, r4, ASR #0x20 0x00907030     0x00907048     ADDEQS r7, r0, r8, ASR #0x20 0x00907034     0x0090704c     ADDEQS r7, r0, r12, ASR #0x20 0x00907038     0x00907050     ADDEQS r7, r0, r0, ASR r0 0x0090703c     0xeafffffe     B 0x0090703c 0x00907040     0xeafffffe     B 0x00907040 0x00907044     0xeafffffe     B 0x00907044 0x00907048     0xeafffffe     B 0x00907048 0x0090704c     0xeafffffe     B 0x0090704c 0x00907050     0xeafffffe     B 0x00907050 0x00907054     0xeb000054     BL 0x009071ac 0x00907058     0xeb00007d     BL 0x00907254 0x0090705c     0xeb00001b     BL 0x009070d0 0x00907060     0xeb00004a     BL 0x00907190 0x00907064     0xeb00005d     BL 0x009071e0 0x00907068     0xe59f02e4     LDR r0, [r15, #0x2e4] 0x0090706c     0xe321f0d1     MSR CPSR_c, 0x000000d1 0x00907070     0xe240d000     SUB r13, r0, #0x0 0x00907074     0xe321f0d2     MSR CPSR_c, 0x000000d2 0x00907078     0xe240d000     SUB r13, r0, #0x0 0x0090707c     0xe321f0d7     MSR CPSR_c, 0x000000d7 So it's pretty obvious 0x907000 is not the entry point.  The ELF file says the entry point is 0x907054, and the disassembly tends to support this.  However, 'resume 0x907054' has the same result (no output, unresponsive 'halt'). Just for fun, I tried 'resume 0x90703c', expecting the CPU to enter an infinite loop.  But no, not even that works.  It's almost as if it's ignoring my attempts to change the program counter. What am I missing?  I'm sure it's something terribly obvious... Re: i.MX6 DDR Stress Test Tool V1.0.3 From the name, I would presume that "DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG.zip" contained images that were intended to be loaded via JTAG and would interact over UART1.  However, I've been unable to get this to work.  I'm a newcomer to JTAG in general and OpenOCD in particular, so pilot error is a definite possibility. Our board is based around the i.MX6DL.  I'm using OpenOCD 0.8.0 with an Olimex USB-TINY-H.  TRST on the JTAG pod is connected to JTAG_TRST; SRST is connected to POR. As such, I have reset_config set as follows: reset_config trst_and_srst srst_pulls_trst This appears to (mostly) work: > reset halt adapter speed: 1000 kHz JTAG scan chain interrogation failed: all zeroes Check JTAG interface, timings, target power, etc. Trying to use configured scan chain anyway... imx6.dap: IR capture error; saw 0x00 not 0x01 Bypassing JTAG setup events due to errors Locking debug access failed on first, but succeeded on second try. BUG: can't assert only SRST Locking debug access failed on first, but succeeded on second try. imx6.cpu.0: ran after reset and before halt ... number of cache level 1 imx6.cpu.0 cluster 0 core 0 multi core target state: halted target halted in Thumb state due to debug-request, current mode: Supervisor cpsr: 0x400001f3 pc: 0x00001080 MMU: disabled, D-Cache: disabled, I-Cache: enabled I also appear to be able to load the image: > load_image /home/ewhac/devel/iMX6/DDR_Stress_Tester_V1.0.3_UART1/ddr-stress-test-mx6dl.elf 82226 bytes written at address 0x00907000 downloaded 82226 bytes in 4.802489s (16.720 KiB/s) However, after this point, I can't get anything to work.  'resume 0x907000' appears to do nothing, and subsequent 'halt' commands don't work; I have to reset.  When I disassemble the loaded image from 0x907000, I see this: > arm disassemble 0x907000 32 0x00907000     0xe59ff018     LDR r15, [r15, #0x18] 0x00907004     0xe59ff018     LDR r15, [r15, #0x18] 0x00907008     0xe59ff018     LDR r15, [r15, #0x18] 0x0090700c     0xe59ff018     LDR r15, [r15, #0x18] 0x00907010     0xe59ff018     LDR r15, [r15, #0x18] 0x00907014     0xe1a00000     NOP 0x00907018     0xe59ff014     LDR r15, [r15, #0x14] 0x0090701c     0xe59ff014     LDR r15, [r15, #0x14] 0x00907020     0x00907054     ADDEQS r7, r0, r4, ASR r0 0x00907024     0x0090703c     ADDEQS r7, r0, r12, LSR r0 0x00907028     0x00907040     ADDEQS r7, r0, r0, ASR #0x20 0x0090702c     0x00907044     ADDEQS r7, r0, r4, ASR #0x20 0x00907030     0x00907048     ADDEQS r7, r0, r8, ASR #0x20 0x00907034     0x0090704c     ADDEQS r7, r0, r12, ASR #0x20 0x00907038     0x00907050     ADDEQS r7, r0, r0, ASR r0 0x0090703c     0xeafffffe     B 0x0090703c 0x00907040     0xeafffffe     B 0x00907040 0x00907044     0xeafffffe     B 0x00907044 0x00907048     0xeafffffe     B 0x00907048 0x0090704c     0xeafffffe     B 0x0090704c 0x00907050     0xeafffffe     B 0x00907050 0x00907054     0xeb000054     BL 0x009071ac 0x00907058     0xeb00007d     BL 0x00907254 0x0090705c     0xeb00001b     BL 0x009070d0 0x00907060     0xeb00004a     BL 0x00907190 0x00907064     0xeb00005d     BL 0x009071e0 0x00907068     0xe59f02e4     LDR r0, [r15, #0x2e4] 0x0090706c     0xe321f0d1     MSR CPSR_c, 0x000000d1 0x00907070     0xe240d000     SUB r13, r0, #0x0 0x00907074     0xe321f0d2     MSR CPSR_c, 0x000000d2 0x00907078     0xe240d000     SUB r13, r0, #0x0 0x0090707c     0xe321f0d7     MSR CPSR_c, 0x000000d7 So it's pretty obvious 0x907000 is not the entry point.  The ELF file says the entry point is 0x907054, and the disassembly tends to support this.  However, 'resume 0x907054' has the same result (no output, unresponsive 'halt'). Just for fun, I tried 'resume 0x90703c', expecting the CPU to enter an infinite loop.  But no, not even that works.  It's almost as if it's ignoring my attempts to change the program counter. What am I missing?  I'm sure it's something terribly obvious... Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Immanuel, Please contact your FAE or Marketing. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Immanuel, Please contact your FAE or Marketing. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello GraceSi, We are working on developing test software for the i.MX6 board where we would like to include some of the test cases from the this DDR3 stress tool. Can we get the source of DDR_Stress_Tester_V1.0.3 tool? Immanuel Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello GraceSi, We are working on developing test software for the i.MX6 board where we would like to include some of the test cases from the this DDR3 stress tool. Can we get the source of DDR_Stress_Tester_V1.0.3 tool? Immanuel Re: i.MX6 DDR Stress Test Tool V1.0.3 Ok we have no Fly-by layout but what have I have to fill in at the write leveling data at the Excel sheet in the red cells? Regards Marcel Re: i.MX6 DDR Stress Test Tool V1.0.3 Ok we have no Fly-by layout but what have I have to fill in at the write leveling data at the Excel sheet in the red cells? Regards Marcel Re: i.MX6 DDR Stress Test Tool V1.0.3 No we have no Fly-by layout we have T-routing... Regards Marcel Re: i.MX6 DDR Stress Test Tool V1.0.3 No we have no Fly-by layout we have T-routing... Regards Marcel Re: i.MX6 DDR Stress Test Tool V1.0.3 For Fly-by layout, write leveling calibration is needed. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 For Fly-by layout, write leveling calibration is needed. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Did I have to do write leveling calibration if I have no Fly-by layout config? Because I always get: Would you like to run the DQS gating, read/write delay calibration? (y/n) Starting DQS gating calibration... . . . . . . . . . . . . . . ERROR FOUND, we can't get suitable value !!!! dram test fails for all values. Re: i.MX6 DDR Stress Test Tool V1.0.3 Did I have to do write leveling calibration if I have no Fly-by layout config? Because I always get: Would you like to run the DQS gating, read/write delay calibration? (y/n) Starting DQS gating calibration... . . . . . . . . . . . . . . ERROR FOUND, we can't get suitable value !!!! dram test fails for all values. Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi, I am attempting to run the stress test tool on an EDM-IMX6 board manufactured by TechNexion (and a Wandboard) to try to resolve some intermittent memory corruption issues we have been seeing when using these boards. When I run the write leveling calibration, the value for MMDC_MPWLDECTRL1 always comes back with an incorrect value (see output below). My question is: Is this a problem with the stress test calibration tool, or is this indicative of a design problem on the board? FYI, I have been unable to get this board to pass the stress test at 475Mhz (it fails almost immediately every time), though it passes at other frequencies, both higher and lower. Thanks, Tony Would you like to run the write leveling calibration? (y/n)   Please enter the MR1 value on the initilization script   This will be re-programmed into MR1 after write leveling calibration   Enter as a 4-digit HEX value, example 0004, then hit enter 0004 You have entered: 0x0004 Start write leveling calibration Write leveling calibration completed MMDC_MPWLDECTRL0 ch0 after write level cal: 0x00130017 MMDC_MPWLDECTRL1 ch0 after write level cal: 0x0017000E MMDC_MPWLDECTRL0 ch1 after write level cal: 0x000F001D MMDC_MPWLDECTRL1 ch1 after write level cal: 0x017A0013 Re: i.MX6 DDR Stress Test Tool V1.0.3 Is the tool or its alternative available for Vybrid processors? Re: i.MX6 DDR Stress Test Tool V1.0.3 Is the tool or its alternative available for Vybrid processors? Re: i.MX6 DDR Stress Test Tool V1.0.3 2 Turns out the code is fine and only the ARM DSTREAM debugger creates the problem for itself.  Strange. Re: i.MX6 DDR Stress Test Tool V1.0.3 2 Turns out the code is fine and only the ARM DSTREAM debugger creates the problem for itself.  Strange. Re: i.MX6 DDR Stress Test Tool V1.0.3 2 Hi Grace, I'm assuming this stress test runs out of OCRAM, is that correct?  If so, can you tell me what the keys are to accessing DDR RAM from OCRAM code?  I'm getting a crash every time I try - the debugger completely chokes and won't give me any data.  Do I still need to leave some hooks for the DDR in the linker script, for example?  I'm building a stripped down version of the Platform SDK, so I'm thinking the DCD and all should be set up correctly.  Runs fine other than this external DDR access issue. Just looking for some hints on a perplexing problem. Thanks. Re: i.MX6 DDR Stress Test Tool V1.0.3 2 Hi Grace, I'm assuming this stress test runs out of OCRAM, is that correct?  If so, can you tell me what the keys are to accessing DDR RAM from OCRAM code?  I'm getting a crash every time I try - the debugger completely chokes and won't give me any data.  Do I still need to leave some hooks for the DDR in the linker script, for example?  I'm building a stripped down version of the Platform SDK, so I'm thinking the DCD and all should be set up correctly.  Runs fine other than this external DDR access issue. Just looking for some hints on a perplexing problem. Thanks. Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Patrick, If you just want to do the stress test, you can skip the calibration.  It is normal that write leveling calibration got consistent values. To understand write leveling, you can reference 45.11.6 Write leveling Calibration of reference manual. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Patrick, If you just want to do the stress test, you can skip the calibration.  It is normal that write leveling calibration got consistent values. To understand write leveling, you can reference 45.11.6 Write leveling Calibration of reference manual. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Thank you Grace for your quick answer. Well, i understand that the results of the stress program have to be used to update the DDR3 initialisation process. In fact my question was not exactly this one as i don't use the the initialization script but only U-BOOT (i don't have JTAG access so i upload your binary file through TFTP). Here is how i proceed : - I have my own U-BOOT relevant to my board - The board boots on SD card - I get the U-BOOT prompt - I tftp the DDR_Stress_Tester_V1.0.1_UART1_for_SDboot&JTAG.zip binary program (DL in my case) on RAM (0x907000 as you mentioned above in the post) - Go on this address - Get the values that i mentionned previously What i noticed is whatever is the value of MDMISC that i write in U-BOOT file (flash_header.s, ie 0x00001740 or 0x00011740), the values for the write leveling process are always above 0x2F so i was wondering if the binary DDR stress program was altering the MDMISC value i write in flash_header.s before launching the test by itself, which could explain why i get always the same value. Best regards, Patrick. Re: i.MX6 DDR Stress Test Tool V1.0.3 Thank you Grace for your quick answer. Well, i understand that the results of the stress program have to be used to update the DDR3 initialisation process. In fact my question was not exactly this one as i don't use the the initialization script but only U-BOOT (i don't have JTAG access so i upload your binary file through TFTP). Here is how i proceed : - I have my own U-BOOT relevant to my board - The board boots on SD card - I get the U-BOOT prompt - I tftp the DDR_Stress_Tester_V1.0.1_UART1_for_SDboot&JTAG.zip binary program (DL in my case) on RAM (0x907000 as you mentioned above in the post) - Go on this address - Get the values that i mentionned previously What i noticed is whatever is the value of MDMISC that i write in U-BOOT file (flash_header.s, ie 0x00001740 or 0x00011740), the values for the write leveling process are always above 0x2F so i was wondering if the binary DDR stress program was altering the MDMISC value i write in flash_header.s before launching the test by itself, which could explain why i get always the same value. Best regards, Patrick. Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello, Can anyone explain me how to load the binary file of DDR_Stress_Tester_V1.0.1_UART1_for_SDboot&JTAG.zip by u-boot? Is there any user guide for loading this from SD card? I want to run the DDR stress test to obtain the optimal DDR configuration. Any help will be appreciated. Yijun Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello, Can anyone explain me how to load the binary file of DDR_Stress_Tester_V1.0.1_UART1_for_SDboot&JTAG.zip by u-boot? Is there any user guide for loading this from SD card? I want to run the DDR stress test to obtain the optimal DDR configuration. Any help will be appreciated. Yijun Re: i.MX6 DDR Stress Test Tool V1.0.3 In  Chapter 5 FAQ of  i.MX6 DDR Stress Tester User’s Guide Do I need to update the DDR initialization script after running the calibration? Yes. The calibration results are stored in the MMDC registers during the test only. It is suggested to update the initialization script and re-run the test on different boards to confirm the DDR performance and make sure the MMDC register settings are correctly ported to the firmware. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 In  Chapter 5 FAQ of  i.MX6 DDR Stress Tester User’s Guide Do I need to update the DDR initialization script after running the calibration? Yes. The calibration results are stored in the MMDC registers during the test only. It is suggested to update the initialization script and re-run the test on different boards to confirm the DDR performance and make sure the MMDC register settings are correctly ported to the firmware. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Grace, On my own design, i ran your DDR_Stress_Tester_V1.0.1_UART1_for_SDboot&JTAG.zip that worked for me (just to confirm the initial values from U-BOOT as i replicated the layout from Sabre SD board), just have observed that the SW levelling values are all above 0x2F : MMDC_MPWLDECTRL0 ch0 after write level cal: 0x0046004B MMDC_MPWLDECTRL1 ch0 after write level cal: 0x003C0043 MMDC_MPWLDECTRL0 ch1 after write level cal: 0x002B002B MMDC_MPWLDECTRL1 ch1 after write level cal: 0x0029003F As notified in the document, i modified the MDMISC value in my U-BOOT file (0x00001740 => 0x00011740) but nothing changed, does your programm erase my value with your own one and if so what is your value ? and can we keep the write leveling results as it ? Patrick. Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Grace, On my own design, i ran your DDR_Stress_Tester_V1.0.1_UART1_for_SDboot&JTAG.zip that worked for me (just to confirm the initial values from U-BOOT as i replicated the layout from Sabre SD board), just have observed that the SW levelling values are all above 0x2F : MMDC_MPWLDECTRL0 ch0 after write level cal: 0x0046004B MMDC_MPWLDECTRL1 ch0 after write level cal: 0x003C0043 MMDC_MPWLDECTRL0 ch1 after write level cal: 0x002B002B MMDC_MPWLDECTRL1 ch1 after write level cal: 0x0029003F As notified in the document, i modified the MDMISC value in my U-BOOT file (0x00001740 => 0x00011740) but nothing changed, does your programm erase my value with your own one and if so what is your value ? and can we keep the write leveling results as it ? Patrick. Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Ariel, To run ddr stress test from u-boot, CONFIG_SPLASH_SCREEN must be disabled in u-boot. Because when enter self refresh mode in ddr stress test, DRAM access will be blocked. If splash screen in u-boot is enabled, IPU will continuously access DRAM, so the system will hang up. Please make sure there is no DMA running to access DRAM in u-boot. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Ariel, To run ddr stress test from u-boot, CONFIG_SPLASH_SCREEN must be disabled in u-boot. Because when enter self refresh mode in ddr stress test, DRAM access will be blocked. If splash screen in u-boot is enabled, IPU will continuously access DRAM, so the system will hang up. Please make sure there is no DMA running to access DRAM in u-boot. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Grace! How are you? I use the bin files from "DDR_Stress_Tester_V1.0.1_UART1_for_SDboot&JTAG.zip", but the program hangs when it calibrates the memory. I'm using Freescale Sabre SD board. -----> MX6Q SABRESD U-Boot > go 0x907000 ## Starting application at 0x00907000 ... ******************************     DDR Stress Test (1.0.2) for MX6DQ     Build: Dec 10 2013, 14:26:05     Freescale Semiconductor, Inc. ****************************** =======DDR configuration========== BOOT_CFG3[5-4]: 0x00, Single DDR channel. DDR type is DDR3 Data width: 64, bank num: 8 Row size: 14, col size: 10 Chip select CSD0 is used Density per chip select: 1024MB ================================== What ARM core speed would you like to run? Type 0 for 650MHz, 1 for 800MHz, 2 for 1GHz, 3 for 1.2GHz    ARM set to 800MHz Please select the DDR density per chip select (in bytes) on the board Type 0 for 2GB; 1 for 1GB; 2 for 512MB; 3 for 256MB; 4 for 128MB; 5 for 64MB; 6 for 32MB  For maximum supported density (4GB), we can only access up to 3.75GB.  Type 9 to select this   DDR density selected (MB): 1024 Calibration will run at DDR frequency 528MHz. Type 'y' to continue. If you want to run at other DDR frequency. Type 'n' <----- Any suggestions? Thanks!! Ariel. Re: i.MX6 DDR Stress Test Tool V1.0.3 I managed to get the stress to run from u-boot. I had to make sure that IPU wasn't initialized. But now I getting stuck on the calibration test, getting error: ERROR FOUND, we can't get suitable value!!!! Any suggestions? Re: i.MX6 DDR Stress Test Tool V1.0.3 I managed to get the stress to run from u-boot. I had to make sure that IPU wasn't initialized. But now I getting stuck on the calibration test, getting error: ERROR FOUND, we can't get suitable value!!!! Any suggestions? Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Grace. For me it hangs after; Calibration will run at DDR frequency 528MHz. Type 'y' to continue. If you want to run at other DDR frequency. Type 'n' Could this be because of the CONFIG_SPLASH_SCREEN, which I should have disabled? Or do we also need to initialize the registers according to the .inc file (parameters from the excel document) when starting up u-boot? If I need to initialize the register, do I initialize all registers from the excel document, before I run the stress test? (I noticed that some are initialized 2, for instance 0x21b0004) Thanks Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Grace. For me it hangs after; Calibration will run at DDR frequency 528MHz. Type 'y' to continue. If you want to run at other DDR frequency. Type 'n' Could this be because of the CONFIG_SPLASH_SCREEN, which I should have disabled? Or do we also need to initialize the registers according to the .inc file (parameters from the excel document) when starting up u-boot? If I need to initialize the register, do I initialize all registers from the excel document, before I run the stress test? (I noticed that some are initialized 2, for instance 0x21b0004) Thanks Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Michael, The excel sheet generates the inc file for JTAG mode. For USB download mode, you need comment out setmem /16 0x020bc000 = 0x30. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Michael, The excel sheet generates the inc file for JTAG mode. For USB download mode, you need comment out setmem /16 0x020bc000 = 0x30. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 I have this same issue with mine.  When I had the excel sheet auto generate the .inc file for my board setup it has a line; //============================================================================= // Disable WDOG //============================================================================= setmem /16 0x020bc000 = 0x30 I noticed in one of the example files that that line is commented out.  When I comment it it seems to work great.  I am just wondering what that line is suposed to do and why the stress tester errors.  If i under stand it should just disable the watch dog timer but not sure.  Should I be commenting this line out? Thank Michael Re: i.MX6 DDR Stress Test Tool V1.0.3 I have this same issue with mine.  When I had the excel sheet auto generate the .inc file for my board setup it has a line; //============================================================================= // Disable WDOG //============================================================================= setmem /16 0x020bc000 = 0x30 I noticed in one of the example files that that line is commented out.  When I comment it it seems to work great.  I am just wondering what that line is suposed to do and why the stress tester errors.  If i under stand it should just disable the watch dog timer but not sure.  Should I be commenting this line out? Thank Michael Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello Grace, Thank youmfor your answer. In my board with iMX6 solo (not solo-lite) the debug console is placed on CSI0_DAT10 and CSI0_DAT11; then it is not compatible with the .bin test... I tried to use the test in USB version, but on my PC I have the same problem highligted by Gevorg Sargsyan (22-gen-2014 21.47)... Nothing to do... Best regards Andrea Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello Grace, Thank youmfor your answer. In my board with iMX6 solo (not solo-lite) the debug console is placed on CSI0_DAT10 and CSI0_DAT11; then it is not compatible with the .bin test... I tried to use the test in USB version, but on my PC I have the same problem highligted by Gevorg Sargsyan (22-gen-2014 21.47)... Nothing to do... Best regards Andrea Re: i.MX6 DDR Stress Test Tool V1.0.3 You can check whether the UART of customer board is same as 6SL EVK board.     /* UART1 TXD */     writel(ALT0, IOMUXC_SW_MUX_CTL_PAD_UART1_TXD);     /* UART1 RXD */     writel(ALT0, IOMUXC_SW_MUX_CTL_PAD_UART1_RXD);     // daisy chain setup     writel(0x0, IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT); Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 You can check whether the UART of customer board is same as 6SL EVK board.     /* UART1 TXD */     writel(ALT0, IOMUXC_SW_MUX_CTL_PAD_UART1_TXD);     /* UART1 RXD */     writel(ALT0, IOMUXC_SW_MUX_CTL_PAD_UART1_RXD);     // daisy chain setup     writel(0x0, IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT); Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello Grace, I used the bin files included in "DDR_Stress_Tester_V1.0.1_UART1_for_SDboot&JTAG.zip" for calibrate and test the DDR3 memories on my custom mx6 board. For my board with quad-core, I fixed 0x907000 as entry-point and the program was executed correctly. For my board with single-core, I fixed the same entry-point but the program don't run... Please, can you help me? Thank you very much. Regards Andrea Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello Grace, I used the bin files included in "DDR_Stress_Tester_V1.0.1_UART1_for_SDboot&JTAG.zip" for calibrate and test the DDR3 memories on my custom mx6 board. For my board with quad-core, I fixed 0x907000 as entry-point and the program was executed correctly. For my board with single-core, I fixed the same entry-point but the program don't run... Please, can you help me? Thank you very much. Regards Andrea Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Tim In Reference Manual of i.MX 6Dual/6Quad, chapter 2 memory map, you can see the valid MMDC range is from 0x021B0000 to 0x021B7FFF. So your address 0x020bc000 is out of range. 021B_0000 021B_3FFF MMDC (port 0) 16 KB 021B_4000 021B_7FFF MMDC (port 1) 16 KB You can contact your FAE or marketing to get the source code. Regards, Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Tim In Reference Manual of i.MX 6Dual/6Quad, chapter 2 memory map, you can see the valid MMDC range is from 0x021B0000 to 0x021B7FFF. So your address 0x020bc000 is out of range. 021B_0000 021B_3FFF MMDC (port 0) 16 KB 021B_4000 021B_7FFF MMDC (port 1) 16 KB You can contact your FAE or marketing to get the source code. Regards, Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 That may be caused by the hardware layout. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 That may be caused by the hardware layout. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Grace, Thank you for your reply. Unfortunately, I have set WALAT on MMDCx_MDMISC register to "1" as following. setmem /32     0x021b0018 =     0x00011740     // MMDC0_MDMISC Is there any other point I have to check? Or is this issue hardware layout? Best Regards, Mar 17, 2014, Satoshi Shimoda Re: i.MX6 DDR Stress Test Tool V1.0.3 Please set the WALAT value on MMDCx_MDMISC register to 1 in the initialization script and re-run the DDR_Stress_Tester. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Please set the WALAT value on MMDCx_MDMISC register to 1 in the initialization script and re-run the DDR_Stress_Tester. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Grace, I am not having much luck using v1.02 of this tool.  The test script generated by the spreadsheet here i.Mx6DQSDL DDR3 Script Aid starts off with a 'setmem /16 0x020bc000 = 0x30' to disable the watchdog, which the stress tool complains about: .\DDR_Stress_Tester_V1.0.2\Binary>DDR_Stress_Tester.exe -t mx6x -df mt41k128m16-125_1066mhz_4x128x16.inc MX6DQ opened. dcd address 0x020bc000 out of valid range. the addr out of valid range. I see that this specific write is commented out in some of the provided sample scripts so I comment it out in my script and the tool does indeed continue on but it seems like the tool locks up within 30 seconds which to me feels an awful lot like the board perhaps resetting from a watchdog timeout?  The tool doesn't hang at a specific spot... it just seems to hang within 30 seconds.  I can't type fast enough to get past entering in MR1 for the write-leveling test. Any ideas? Is there source for this tool available somewhere?  This seems like a great tool but its horrible that it isn't distributed with sourcecode so people could work around some of the above issues. Thanks, Tim KevinWong arpan_chakravarty partner i.mx6 gateworks Re: i.MX6 DDR Stress Test Tool V1.0.3 Grace, I am not having much luck using v1.02 of this tool.  The test script generated by the spreadsheet here i.Mx6DQSDL DDR3 Script Aid starts off with a 'setmem /16 0x020bc000 = 0x30' to disable the watchdog, which the stress tool complains about: .\DDR_Stress_Tester_V1.0.2\Binary>DDR_Stress_Tester.exe -t mx6x -df mt41k128m16-125_1066mhz_4x128x16.inc MX6DQ opened. dcd address 0x020bc000 out of valid range. the addr out of valid range. I see that this specific write is commented out in some of the provided sample scripts so I comment it out in my script and the tool does indeed continue on but it seems like the tool locks up within 30 seconds which to me feels an awful lot like the board perhaps resetting from a watchdog timeout?  The tool doesn't hang at a specific spot... it just seems to hang within 30 seconds.  I can't type fast enough to get past entering in MR1 for the write-leveling test. Any ideas? Is there source for this tool available somewhere?  This seems like a great tool but its horrible that it isn't distributed with sourcecode so people could work around some of the above issues. Thanks, Tim KevinWong arpan_chakravarty partner i.mx6 gateworks Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi I used this stress test with our custom board. However, the following error log was output. ===== Would you like to run the DQS gating, read/write delay calibration? (y/n) Starting DQS gating calibration... . . . . . . . . . . . . . . ERROR FOUND, we can't get suitable value !!!! dram test fails for all values. ===== Could you let me know what is wrong in this case? (e.g. Circuit pattern is too bad, setting value in .inc file is incorrect, etc...) Best Regards, Mar 14, 2014 Satoshi Shimoda Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi I used this stress test with our custom board. However, the following error log was output. ===== Would you like to run the DQS gating, read/write delay calibration? (y/n) Starting DQS gating calibration... . . . . . . . . . . . . . . ERROR FOUND, we can't get suitable value !!!! dram test fails for all values. ===== Could you let me know what is wrong in this case? (e.g. Circuit pattern is too bad, setting value in .inc file is incorrect, etc...) Best Regards, Mar 14, 2014 Satoshi Shimoda Re: i.MX6 DDR Stress Test Tool V1.0.3 Grace - can you let me know where the source code for version 1.0.2 is located internally? The link we were given previously goes to version 1.0 and not further. Thanks! Re: i.MX6 DDR Stress Test Tool V1.0.3 Grace - can you let me know where the source code for version 1.0.2 is located internally? The link we were given previously goes to version 1.0 and not further. Thanks! Re: i.MX6 DDR Stress Test Tool V1.0.3 Great tool that works well on my Nitrogen6! I am wondering if it is possible (for a future version) to read the temperature of the cpu during the stress test for instance? Re: i.MX6 DDR Stress Test Tool V1.0.3 Great tool that works well on my Nitrogen6! I am wondering if it is possible (for a future version) to read the temperature of the cpu during the stress test for instance? Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi, does the Host USB driver now support a 64Bit version Windows? Greetings Andreas Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi, does the Host USB driver now support a 64Bit version Windows? Greetings Andreas Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi. I am trying to run the tool on SabreSD Board. Once I start the tool it is getting stuck on "Downloading image to IRAM ok" At that point HID device in device manager is disappeared and Usb Input device with "Failed to start (code 10)"  appears. After a while Stress Tool times out and extits. I am using 64-bit Windows 7 SP1 Any ideas? Thanks. Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi. I am trying to run the tool on SabreSD Board. Once I start the tool it is getting stuck on "Downloading image to IRAM ok" At that point HID device in device manager is disappeared and Usb Input device with "Failed to start (code 10)"  appears. After a while Stress Tool times out and extits. I am using 64-bit Windows 7 SP1 Any ideas? Thanks. Re: i.MX6 DDR Stress Test Tool V1.0.3 To run ddr stress test from u-boot, CONFIG_SPLASH_SCREEN must be disabled in u-boot. Because when enter self refresh mode in ddr stress test, DRAM access will be blocked. If splash screen in u-boot is enabled, IPU will continuously access DRAM, so the system will hang up. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 To run ddr stress test from u-boot, CONFIG_SPLASH_SCREEN must be disabled in u-boot. Because when enter self refresh mode in ddr stress test, DRAM access will be blocked. If splash screen in u-boot is enabled, IPU will continuously access DRAM, so the system will hang up. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Thierry, We don't want to release the binary for specific customer here. Please contact your FAE and send your request to FSL. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Thierry, We don't want to release the binary for specific customer here. Please contact your FAE and send your request to FSL. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi, the board I am working on does not have USB OTG either, and doesn't use UART port 1 but ports 3&4 instead. Is there a way to access the sources or get elf files where other uart ports would be used ? Thanks Re: i.MX6 DDR Stress Test Tool V1.0.3 Thanks Grace. It is my lucky day since I was using DAT10/11 for SPI2 but I have test-points on those two pads so I tested them them temporarily for UART. It works (o; Not FSL CRM request is required. Thanks very much! Brent Re: i.MX6 DDR Stress Test Tool V1.0.3 Thanks Grace. It is my lucky day since I was using DAT10/11 for SPI2 but I have test-points on those two pads so I tested them them temporarily for UART. It works (o; Not FSL CRM request is required. Thanks very much! Brent Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Brent, the tx/rx PIN of MX6Q SabraSD board is CSI0_DAT10 and CSI0_DAT11.     /* UART1 TXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT10);     /* UART1 RXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT11); We understand the customer may use different rx/tx pin for UART, that is the reason we only release DDR stress tool which uses USB port for user input and output for general release. Please submit your request to FSL CRM system. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Brent, the tx/rx PIN of MX6Q SabraSD board is CSI0_DAT10 and CSI0_DAT11.     /* UART1 TXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT10);     /* UART1 RXD */     writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT11); We understand the customer may use different rx/tx pin for UART, that is the reason we only release DDR stress tool which uses USB port for user input and output for general release. Please submit your request to FSL CRM system. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Grace... It loads well, and I can interact with u-boot of course, but I cannot interact with this application. My rx/tx in u-boot are :     /* UART1 TXD */     mxc_iomux_v3_setup_pad(MX6Q_PAD_SD3_DAT6__UART1_RXD);     /* UART1 RXD */     mxc_iomux_v3_setup_pad(MX6Q_PAD_SD3_DAT7__UART1_TXD); Is this stress test tool open source? ******************************     DDR Stress Test (1.0.1) for MX6DQ     Build: Oct 21 2013, 14:05:09     Freescale Semiconductor, Inc. ***************************** =======DDR configuration========== BOOT_CFG3[5-4]: 0x00, Single DDR channel. DDR type is DDR3 Data width: 64, bank num: 8 Row size: 15, col size: 10 Chip select CSD0 is used Density per chip select: 2048MB ================================== What ARM core speed would you like to run? Type 0 for 650MHz, 1 for 800MHz, 2 for 1GHz, 3 for 1.2GHz --> System does not respond to my input here. Thanks Brent Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Grace... It loads well, and I can interact with u-boot of course, but I cannot interact with this application. My rx/tx in u-boot are :     /* UART1 TXD */     mxc_iomux_v3_setup_pad(MX6Q_PAD_SD3_DAT6__UART1_RXD);     /* UART1 RXD */     mxc_iomux_v3_setup_pad(MX6Q_PAD_SD3_DAT7__UART1_TXD); Is this stress test tool open source? ******************************     DDR Stress Test (1.0.1) for MX6DQ     Build: Oct 21 2013, 14:05:09     Freescale Semiconductor, Inc. ***************************** =======DDR configuration========== BOOT_CFG3[5-4]: 0x00, Single DDR channel. DDR type is DDR3 Data width: 64, bank num: 8 Row size: 15, col size: 10 Chip select CSD0 is used Density per chip select: 2048MB ================================== What ARM core speed would you like to run? Type 0 for 650MHz, 1 for 800MHz, 2 for 1GHz, 3 for 1.2GHz --> System does not respond to my input here. Thanks Brent Re: i.MX6 DDR Stress Test Tool V1.0.3 The entry point is 0x907000 if anyone needs it. (o: Re: i.MX6 DDR Stress Test Tool V1.0.3 The entry point is 0x907000 if anyone needs it. (o: Re: i.MX6 DDR Stress Test Tool V1.0.3 Thank you Grace, that is excellent! Thanks very much for your help! I will update on how it works. Regards Brent Re: i.MX6 DDR Stress Test Tool V1.0.3 Thank you Grace, that is excellent! Thanks very much for your help! I will update on how it works. Regards Brent Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi  Brent, The image in DDR_Stress_Tester_V1.0.1.zip can't be loaded through sd card. I just attached image DDR_Stress_Tester_V1.0.1_UART1_for_SDboot&JTAG.zip.  The bin files in the packages can be loaded by uboot and elf files are used by JTAG load.  Please note when the image is loaded by u-boot, the DDR is initialized by u-boot. Regards, Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi  Brent, The image in DDR_Stress_Tester_V1.0.1.zip can't be loaded through sd card. I just attached image DDR_Stress_Tester_V1.0.1_UART1_for_SDboot&JTAG.zip.  The bin files in the packages can be loaded by uboot and elf files are used by JTAG load.  Please note when the image is loaded by u-boot, the DDR is initialized by u-boot. Regards, Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello, I do not have the USB OTG port available on my custom board, is it possible to load this stress tester application directly via sd card and u-boot? Thanks Brent Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello, I do not have the USB OTG port available on my custom board, is it possible to load this stress tester application directly via sd card and u-boot? Thanks Brent Re: i.MX6 DDR Stress Test Tool V1.0.3 We got the Stress Tester running. The tool doesn't like when you give it the wrong input file Re: i.MX6 DDR Stress Test Tool V1.0.3 We got the Stress Tester running. The tool doesn't like when you give it the wrong input file Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello, I tried to run the DDR3 Stress Tester but the application crashes after printing a single line: MX6DQ opened. We are using an i.MX6D7CVT08AC (Industrial, 800MHz) and the PC is running Windows 7 Home Premium SP1 64bit. From Linux I'm able to run the imx_usb_loader application and download an image which toggles an LED connected to GPIO2[4]. Regards Matthias Mann Re: i.MX6 DDR Stress Test Tool V1.0.3 Hello, I tried to run the DDR3 Stress Tester but the application crashes after printing a single line: MX6DQ opened. We are using an i.MX6D7CVT08AC (Industrial, 800MHz) and the PC is running Windows 7 Home Premium SP1 64bit. From Linux I'm able to run the imx_usb_loader application and download an image which toggles an LED connected to GPIO2[4]. Regards Matthias Mann Re: i.MX6 DDR Stress Test Tool V1.0.3 Got the program working now, thank you very much! Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Emil Myhrman, Please use version 1.0.1.   For i.MX6DQ, the DDR mapping start address is configured as chapter "2.3 DDR mapping to MMDC controller ports"  in  i.MX 6Dual/6Quad Applications Reference Manual. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 Hi Emil Myhrman, Please use version 1.0.1.   For i.MX6DQ, the DDR mapping start address is configured as chapter "2.3 DDR mapping to MMDC controller ports"  in  i.MX 6Dual/6Quad Applications Reference Manual. Grace Re: i.MX6 DDR Stress Test Tool V1.0.3 We're using i.Mx6DL and LPDDR2 single channel, starting at 0x10000000 (DDR Memory Map Config = '00'). Does this version select the correct address (i.e. not 0x80000000) for our setup? I'm asking because it automatically says "CHANNEL0 is selected." and for previous version 0.042 we had to manually select channel1 to "trick" stress test into using start address 0x10000000. Re: i.MX6 DDR Stress Test Tool V1.0.3 We're using i.Mx6DL and LPDDR2 single channel, starting at 0x10000000 (DDR Memory Map Config = '00'). Does this version select the correct address (i.e. not 0x80000000) for our setup? I'm asking because it automatically says "CHANNEL0 is selected." and for previous version 0.042 we had to manually select channel1 to "trick" stress test into using start address 0x10000000.
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恩智浦 s32k312 SRAM 多位错误 @danielmartynek 对于单位错误,我可以调用 SRAM ISR(ERM0_ISR_Handler),但对于多位错误,却无法调用处理程序。 据我所知,不可纠错事件与多位错误相对应,对吗? 我可以看到 SRAM 不可更正的错误事件位是在 SR0 中设置的,但是 ISR 没有被触发信号。 能否请您帮助我了解如何调用多位错误 ISR? 我还在 CR0 寄存器中启用了 SRAM0 的中断通知功能 Re: NXP s32k312 SRAM MultibitError 你好,@Anitha7、 不可纠正的错误会触发信号 CM7 故障异常。 在我链接的示例中,我启用了 Bus_Fault 异常,但其优先级低于 ERM 处理程序的优先级,这样 ERM 处理程序就会首先被调用。 我认为这可能是您项目中的问题所在。 此外,请仔细检查 VTOR 指针,并确保在 NVIC 中启用 ERM 中断。您可能会注意到 NVIC 中的中断待处理。 Re: NXP s32k312 SRAM MultibitError 你好@丹尼尔-马蒂内克 多比特是指 RM 规定的双比特 我根据你的参考将系统配置为 SRAM0。通过设置 SRO 寄存器中的相应位,可避免发生无法纠正的 ECC 故障(NEC0)。 我在相应的 CR0 寄存器中启用了 NEC0 和单比特事件的中断通知。 发生不可纠正的 ECC 故障后,控制权转移到系统调用功能,此后直到我执行 RESET 后,软件才能运行。尽管我已经添加了 ERM_1_Hand ler ,但它没有被触发。对于单位错误, ERM_0_H andler 会被正确触发信号。 我该如何确保 ERM_1_Handler 在发生多位(不可纠正)ECC 错误时被调用? 另外,我想确认一下,多位错误(双位错误)是否总是表示出现了无法纠正的 ECC 故障? 发生不可纠正的 ECC 事件后,我需要在正常模式下在 ECU 中执行 RESET 运行 Re: NXP s32k312 SRAM MultibitError 你好,@Anitha7、 多位错误是什么意思? 64 位(8 字节)的数据有一个 8 位校验和,不可能检测到所有可能的 ECC 错误。有 ECC SECDED(单错误纠正,双错误检测)。 此致, 丹尼尔 Re: NXP s32k312 SRAM MultibitError 你好@丹尼尔-马蒂内克 VTOR 表仅在 SRAM0 注入无法纠正的 ECC 故障时指向闪存。 我根据您的参考示例代码将系统配置为 SRAM0。通过设置 SRO 寄存器中的相应位,可在发生不可纠正的 ECC 故障时自动恢复 ECC。 我在相应的 CR0 寄存器中启用了中断通知功能。 发生不可纠正的 ECC 故障后,控制权转移到系统调用功能,之后软件将无法运行,直到我执行 RESET。尽管我已经添加了 ERM_1_Handler,但它没有被触发信号。对于单位错误,ERM_0_Handler 会被正确触发。 我该如何确保在发生多位(不可修正)ECC 错误时调用ERM_1_Handler? 另外,我想确认一下,多位错误是否总是表示无法纠正的 ECC 故障? Re: NXP s32k312 SRAM MultibitError 你好,@Anitha7、 我更新了示例,在 SRAM0 中加入了不可纠正的错误注入。 https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-EIM-ERM-DTCM-SRAM-Baremetal-v3-0-S32DS36/ta-p/2193534 您能在应用程序中读取 VTOR 寄存器吗? 在内存中注入无法纠正的 ECC 故障时,中断向量表不得位于 SRAM0 中。 否则,ECC 故障会在获取过程中损坏矢量表,导致另一个故障异常。 此致, 丹尼尔
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Zephyr 的内存详情 如果您对这些资源有任何疑问或问题,请 提出新问题,恩智浦支持团队将为您解答。 在学习 Zephyr 时,存在许多与内存相关的问题。链接器会将代码和数据放置在何处?应用程序应如何配置以使用其他存储器? 链接器所使用的默认内存段是在设备树中进行配置的。通常,设备树会使用选定的节点来配置这些部分。以下是 MIMXRT1060-EVK 板上的一个示例: chosen { zephyr,flash = &is25wp064; zephyr,sram = &sdram0; }; 这些选定节点的名称可能会造成误导。 zephyr,flash 指向链接器用于所有代码(.text)和只读数据段的节点。通常,这指向物理闪存,例如,在这块板上,它被放置在外部 QSPI 闪存中,但它也可以位于非闪存的内存中。 zephyr,sram 指向链接器用于所有 .data和 .bss部分的节点。这应该位于 RAM 中,但不一定在 SRAM 中。在该板上,它位于外部 SDRAM 中。应用程序可以将这些节点指向最适合该应用程序的其他内存。其他常用的内存节点包括 &dtcm 、 &itcm 或 &ocram 。 通常,这些选定的节点在电路板设备树文件中进行设置。但是在学习 Zephyr 以及使用设备树时,最好在应用程序构建过程中生成的设备树文件中确认设备树设置,请参阅实验室指南:设备树和 VS Code 设备树查看器。 i.MX RT内存 大多数内存问题来自使用 i.MX RT 设备的用户。这些微控制器(MCU)是高性能无闪存设备,具备多种内部和外部存储选项,以最大化应用程序的性能和灵活性。以下是一些专门针对 i.MX RT 设备的有用资源: i.MX RT 应用说明: AN12437 i.MX RT系列性能优化 AN12077 使用 i.MX RT FlexRAM AN13970 Zephyr 中的 RT 系列内存重定位 ROM 中的引导加载程序在启动时需要 Flash 配置块(FCB),并且可以选择添加设备配置数据 (DCD) 或外部存储器配置数据 (XMCD),这些数据通常用于启用 SDRAM。这篇文章提供了更多关于在哪里可以找到这些结构,以及如何将它们包含在开发板中的详细信息。 不支持 SDRAM 的情况说明:Zephyr 对配备外部 SDRAM 的实时开发板的支持,通常会将数据存储在 SDRAM 中。ROM 引导加载程序会在 Zephyr 应用程序执行之前,通过 DCD 或 XMCD 配置 SDRAM 接口。这篇文章讨论了如何移除定制主板的 SDRAM。 如需配置 FlexRAM,调整 ITCM、DTCM 或 OCRAM 的大小,请参阅 AN13970 Zephyr 中的 RT 系列内存重定位 将代码重新定位到 RAM 中 将代码移至 RAM 是一个常见需求,例如,为了最大化性能或降低功耗。借助 Zephyr,应用程序可以将所有代码或部分代码迁移到 RAM 中。以下是一些有用的搬迁资源: AN13970 Zephyr 中的 RT 系列内存重定位 Zephyr代码和数据重定位API 重新定位代码的示例应用: 简单示例SDRAM_hello_world.zip将整个应用程序移动到 SDRAM,并在启动时使用 ROM 引导程序加载 RAM,然后再执行应用程序。 Zperf 示例:此 Zephyr 网络示例将网络堆栈和以太网驱动程序代码迁移至 ITCM,以提高在 MIMXRT1170-EVK 上构建时的性能。其余代码保留在默认的外部 QSPI 闪存中。 NXP SmartWatch 演示和网络研讨会:将大部分代码重新定位到内部 SRAM 以降低功耗,同时将图形资产保留在闪存中。 将数据加载到 RAM 在 Zephyr 中,所有数据、变量和堆栈的默认位置都位于 zephyr,sram 节点。然而,某些应用程序希望将特定数据放置在其他位置。例如,将数据放置在 DTCM 中以最大化性能,将 DMA 缓冲区放置在不可缓存的内存中,或将显示的大型帧缓冲区移动到外部 RAM。以下是一些有助于指定数据放置的资源: 静态变量的声明可以包含链接器段标签,以便将它们放置在特定段中。一个参考示例是dma_mcux_edma.c驱动程序,它将 dma_tcdpool 结构放置在 __dtcm_noinit_section 或 __nocache 部分。 静态变量的另一种选择是在变量声明中使用设备树节点,从而将其放置在特定的部分中。一个可以参考的例子是恩智浦的面部检测演示。此演示在设备树中添加选定的节点 zephyr,modelbuf ,该节点指向内存部分节点 sramx 。要使用此方法,内存段节点需要具备属性 zephyr,memory-region 。在源代码中, model_input_buf 缓冲区是用 zephyr_modelbuf 节点声明的。然后,链接程序将 model_input_buf 放置在 sramx 部分。 整个源文件或库中的 data 和 bss 部分可以重定位到其他 RAM,详情请参阅 Zephyr代码和数据重定位 API。 Zephyr 可以使用一个特殊的固定区域,将中断堆栈和主堆栈放置在不同的 RAM 区段中。简单示例pinned_hello_world.zip在 DTCM 中固定中断和主堆栈。   其他内存资源 示例调整内存节点大小,利用 NXP LPC5500 中的所有 SRAM 返回Zephyr知识中心
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[S32K324 / 定制板] HSE 固件已安装 (0x4039C028=1) 但初始化失败 (0x4038C107=0) 大家好, 我正在寻求有关 S32K324 定制板上 HSE 固件初始化无法完成的问题的建议。 1. 开发环境 MCU:S32K324(定制板) HSE固件:s32k3x4_hse_fw_1.5.0_2.55.0_pb250130.bin.pink 调试器:S32DS + T32 (Trace32) 2. 进度和状态登记册 已成功在 UTEST 区域 (0x1B000000) 中编程 HSE FW 使用标志。 已将粉色图像二进制文件下载到闪存中。 执行上电复位(POR)后,状态寄存器如下: 0x4039C028 (HSE GPR): 0x01 (安装已确认) 0x4038C107 (HSE_STATUS_INIT_OK): 0x00 (启动过程中停止) 3. 问题 我想请教各位专家以下问题: 我首先应该检查什么? 由于安装成功但初始化失败,是否有任何特定的寄存器(例如,故障状态)或硬件信号需要检查以找出确切的原因? 自定义板环境是否会影响初始化失败? 由于我使用的是定制板,我怀疑硬件差异(例如,初始晶振频率)或主核心(M7)的早期时钟(PLL)配置代码可能会干扰 HSE 启动序列。如果这是一个已知问题,能否指导我推荐的启动顺序(例如,在进行任何时钟设置之前轮询 INIT_OK 标志)或可能的解决方案? 任何线索都将对我们大有帮助。感谢您的支持! Re: [S32K324 / Custom Board] HSE FW Installed (0x4039C028=1) but Init Failed (0x4038C107=0) 您好, 非常感谢您提供的清晰指导。 首先,我使用演示应用程序进行固件安装,然后在系统启动状态下转储 MU 和 HSE GPR 寄存器值。如果这些注册地址有任何错误,请告知我。 结果如下: 1. MU0 寄存器(基地址:0x4038C000)     2. HSE GPR 寄存器(基地址:0x4039C000)   请您审核一下这些数值好吗?我非常希望您能提供专业意见,帮我判断这些是否表明存在具体的错误原因,例如时钟配置冲突或固件认证失败。 再次感谢您的时间和支持! Re: [S32K324 / Custom Board] HSE FW Installed (0x4039C028=1) but Init Failed (0x4038C107=0) 请问您能否提供以下信息? MU寄存器、FSR、GSR等: HSE GPR3: Re: [S32K324 / Custom Board] HSE FW Installed (0x4039C028=1) but Init Failed (0x4038C107=0) 谢谢。但我需要看到 HSE 核心处于 WFI 状态时的屏幕截图,而不是 RESET 后立即显示的屏幕截图。
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S32K312のPWMピンマッピング方式について明確化が必要 チームの皆さん、こんにちは。 S32K312 100ピンMCUを用いたモータ制御開発において、以下の2つのPWM出力マッピング方式を検討しています。 方法1では、eMIOSチャネルとLCUベースの出力を使用します。 PTA0 - PWMU_HS - eMIOS_0_CH [17] _Y - LCU0_OUT4 PTA1 - PWMU_LS - eMIOS_0_CH [9] _H - LCU0_OUT5 PTA2 - PWMV_HS - eMIOS_1_CH [19] _Y - LCU0_OUT3 PTA3 - PWMV_LS - eMIOS_1_CH [20] _Y - LCU0_OUT2 PTD2 - PWMW_HS - eMIOS_1_CH [21] _Y - LCU0_OUT1 PTD3 - PWMW_LS - eMIOS_1_CH [22] _X - LCU0_OUT0 方法2では、別のPWMマッピングオプションを使用します。 PTB16 - PWMU_HS - eMIOS_0_CH [4] _G PTB13 - PWMU_LS - eMIOS_0_CH [1] _G - LCU0_OUT3 PTB17 - PWMV_HS - eMIOS_0_CH [5] _G PTB14 - PWMV_LS - eMIOS_0_CH [2] _G - LCU0_OUT7 PTB1 - PWMW_HS - eMIOS_0_CH [7] _G PTB0 - PWMW_LS - eMIOS_0_CH [3] _G - LCU1_OUT5 NXP側からは、どのPWMマッピング方法を選択すべきか、また各方法の実用上の効果や制約について、より明確な説明が必要です。 以下の点についてご意見をお聞かせください。 モーター制御用途には、どの方法が推奨されますか? それぞれの方法の長所と短所は何ですか? 同期、デッドタイム挿入、ADCトリガー、障害処理、またはLCU/TRGMUXの使用に関して考慮すべき事項はありますか? 設計を最終決定する前に考慮すべきソフトウェアまたはハードウェア上の制約はありますか? ご自身の経験やリファレンス・デザインに基づいて、おすすめの点をお聞かせください。 よろしくお願いいたします。 シヴァ Re: Clarification Required on PWM Pin Mapping Approach for S32K312 こんにちは、@ VaneB さん。 S32K312 100ピンMCUについては、以下のPWMピンマッピングオプションを検討しています。 ピンネット名 位相側 eMIOS チャネル LCU 出力 PTA0 PWMU_HS - U ハイサイド eMIOS_1_CH [6] _H LCU0_OUT6 PTA1 PWMU_LS - U ローサイド eMIOS_1_CH [15] _H LCU0_OUT11 PTA2 PWMV_HS - V ハイサイド eMIOS_1_CH [19] _Y LCU0_OUT3 PTA3 PWMV_LS - V ローサイド eMIOS_1_CH [20] _Y LCU0_OUT2 PTD2 PWMW_HS - W ハイサイド eMIOS_1_CH [21] _Y LCU0_OUT1 PTD3 PWMW_LS - W ローサイド eMIOS_1_CH [22] _X LCU0_OUT0 この方法では、6つのPWM出力すべてが同じeMIOS_1インスタンスを通してマッピングされます。これは同期やモーター制御におけるPWM生成に有益であると考えています。 この理解が正しいかどうか確認してください。 また、この構成におけるeMIOSチャネルタイプH、Y、Xの意味と影響について明確に説明してください。これらのチャネルタイプが、PWM生成、同期、デッドタイム制御、ADCトリガー、またはLCU TRGMUXの使用に大きな影響を与えるかどうかを理解したいと考えています。 このPWMピン配置が当社のモーター制御アプリケーションに適しているかどうか、ご確認の上、ご指導いただけますでしょうか。 よろしくお願いいたします。 シヴァ Re: Clarification Required on PWM Pin Mapping Approach for S32K312 こんにちは、 @SHIVAKUMAR55さん 方法2では、すべてのPWMチャンネルを単一のeMIOSインスタンス内に保持するため、共有タイムベースが得られ、クリーンな位相調整と全体的なタイミングの簡素化がはるかに容易になります。 一方、方法1では、チャネルを複数のeMIOSインスタンスに分散させ、LCUを通してルーティングします。これは、S32K344 3相センサレスPMSMモータ制御リファレンスデザインで使用されているeMIOS → TRGMUX → LCUアプローチと同様の構造です。この構成は、高度な出力調整、デッドタイム制御、後から障害処理機能を追加するなど、より高い柔軟性が必要な場合に非常に役立ちます。 とはいえ、方法1は複数のeMIOSインスタンスを使用するため、設定の手間がやや多く、同期の手間は少なくなります。実際には、シンプルさと安定したタイミング動作という利点から、まずは方法2から始めるのが良いでしょう。そして、デザインでより高度な制御機能やセーフティ機能が必要になった場合にのみ、方法1のようなLCUベースのソリューションに移行するのが賢明です。 詳細なガイダンスについては、S32K344搭載の3相センサレスPMSMモータ制御キットのアプリケーションノートおよび関連ソフトウェアを参照することをお勧めします。 S32K344 ブラシレス直流・永久磁石同期モータ制御開発キット (MCSPTE1AK344) BR、VaneB Re: Clarification Required on PWM Pin Mapping Approach for S32K312 こんにちは、 @SHIVAKUMAR55さん はい、あなたの理解は正しいです。 eMIOSチャネルタイプに関しては、S32K3xxリファレンスマニュアルRev.12の表403に記載されているように、サポートされる各モードは特定のチャネルタイプによって異なります。すべてのモードがすべてのチャネルタイプで利用できるわけではないため、必要な機能に基づいて適切なチャネルタイプを慎重に選択することが重要です。
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NXP Zephyr OS - 概述页面(日语博客) 最近,一款相对较新的实时操作系统引起了人们的关注。它名为“Zephyr ® OS”,发音为“Zephyr”。 Zephyr OS 是一款开源实时操作系统,其开发合作和支持得到了世界知名公司的大力支持,而 NXP 自 Zephyr 诞生以来一直是其白金会员。 本页面汇总了使用 Zephyr OS 的实用信息,请充分利用。 Zephyr ®系列(Zephyr OS 入门步骤) 步 文章 1 【Zephyr ®系列】第一部分:最近流行的 Zephyr OS 究竟是一款怎样的操作系统?(日语博客) →首先,让我们来了解一下 Zephyr OS 本身的功能特性。 2 【Zephyr ®系列】第二部分:首次构建与测试(日语博客) →接下来我们实际构建并运行 Zephyr OS。我们将以 FRDM-MCXA153 为例,但同样的步骤也适用于其他开发板。 3 【Zephyr ®系列】第三部分:LED 闪烁和软件复用的第一步(日语博客) →以 LED 闪烁程序为例,体验“传统的硬件相关编码”与“Zephyr 推荐的硬件无关(可扩展)编码”之间的区别。 4 [Zephyr ®系列] 第 4 部分:Kconfig 和设备树的概述及实际应用(日语博客) →对于传统的MCU软件工程师来说,“Kconfig”和“设备树”是Zephyr操作系统中比较陌生的概念。本文将通过实际示例进行解释。 Zephyr实用信息☕ 概述 文章 我使用 NXP 的 GUI 生成工具“GUI Guider”(支持用于微控制器的轻量级 GUI 库“LVGL”)生成了一个示例 GUI 代码,然后在 Zephyr OS 上运行了它。 试用 UI:Zephyr OS 上的 GUI Guider 示例代码(日本博客) *有关如何使用 GUI Guider 的说明,请参阅以下文章。 GUI Guider入门指南(Nexty Electronics Co., Ltd.) Zephyr 附带丰富的示例代码,其中包括一个易于运行的 HTTP 服务器示例。本指南提供了在 NXP 评估板“ FRDM-MCXN947 ”上运行该示例的分步说明。运行此示例后,您可以通过 PC 的 Web 浏览器访问 FRDM-MCXN947,并使用页面上的按钮打开/关闭板上的 LED 灯。 我尝试在 FRDM-MCXN947 上运行 Zephyr HTTP 服务器(日本博客) 截至2026年3月23日,NXP工程师发现安装最新版Zephyr环境后,调试器无法启动。本文档详细介绍了该问题及其解决方案。 使用 Zephyr OS(4.3.99 开发版)和 MCUXpresso for VSC 时,调试器是否无法启动?本文将解释如何避免调试器启动错误。(日语博客) 合作伙伴 Zephyr 相关信息 合作伙伴/概览 文章 Lineo Solutions Co., Ltd. 本文分两部分发表了使用 NXP 评估板“ MIMXRT1170-EVKB ”的说明文章:第 1 部分和第 2 部分。 在第一部分中,我们对 Zephyr 进行了基本解释,并介绍了源代码树结构以及用于验证本文运行情况的 NXP MIMXRT1170-EVKB 评估板。 在第二部分中,我们将从准备 Zephyr 环境开始,并解释构建和运行 Zephyr 应用程序的步骤。 第三部分还包括在液晶屏幕上实际显示信息的示例。   Zephyr博客,第一部分:我的第一辆Zephyr(第一部分) Zephyr博客,第二部分:我的第一辆Zephyr(第二部分) Zephyr博客,第三部分:“试用液晶显示屏” IT Access有限公司 本文档清晰地阐述了 Zephyr OS 的基本特性、与传统实时操作系统 (RTOS) 和 Linux 的区别,以及其适用的应用场景。随后,以恩智浦 (NXP) 的高性能微控制器评估板“ MIMXRT1060-EVKC ”为例,介绍了将 Zephyr 与安全引导加载程序“MCUboot”相结合的实际开发流程。通过实际硬件上的构建、烧录和固件更新等步骤,您可以了解使用 Zephyr 进行安全嵌入式系统开发的具体步骤。 什么是 Zephyr OS?本文将解释其特性、优势以及与其他实时操作系统和 Linux 的区别。 在 NXP ® MIMXRT1060-EVKC 上使用 Zephyr ®和 MCUboot 入门:安全启动 IAR Systems Co., Ltd. 我们经常收到用户关于无法配置 IAR 工具链的咨询。右侧链接提供了基于 NXP MCU 的“Zephyr x IAR 工具链”的详细日语配置步骤说明。 Zephyr 项目文档(英文版)中也包含了如何使用 IAR ARM 工具链的说明。   在 NXP 的 FRDM_MCXN947 上运行 ZephyrOS! 在 NXP 的 FRDM-MCXA153 上运行 Zephyr OS! 在 NXP 的 MIMXRT1020-EVK 上运行 Zephyr OS! 如果您对 Zephyr OS 相关内容有任何改进要求或建议,请随时使用以下信息与我们联系。 NXP日本技术博客(日语)内容请求/改进调查——请填写表格 =========================​ 我们目前无法 回复 此帖子“ 评论”部分留下的评论。 对于由此造成的不便,我们深表歉意,但 在进行咨询时, 请 参考“ NXP 技术问题 - 如何联系我们 ( 日语博客 ) ” 。 (如果您已经是 恩智浦的 分销商或 与 恩智浦 有合作关系 ,您可以直接咨询您的代表。 ) 最近,一款相对较新的实时操作系统引起了人们的关注。它名为“Zephyr ® OS”,发音为“Zephyr”。 Zephyr OS 是一款开源实时操作系统,其开发合作和支持得到了世界知名公司的大力支持,而 NXP 自 Zephyr 诞生以来一直是其白金会员。 本页面汇总了使用 Zephyr OS 的实用信息,请充分利用。 i.MX RT 处理器 i.MX 处理器 MCX SW | 下载 日本博客
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MC33772B 的 EPAD MC33772B 底部有一块 5.4 毫米 × 5.4 毫米的裸露金属区域。 然而,PCB 设计指南建议阻焊层的开口度仅为 3.7-3.8毫米,这表明 EPAD 的尺寸约为 3.7 毫米。 在实际检查中,集成电路底部裸露的金属面积为 5.4 毫米,大于建议的 PCB 开口。 根据数据表,从 3.7 毫米(最小)到 5.4 毫米(最大)的区域被指定为 PCB 布线保留区域。 如果 3.7 毫米是建议的 EPAD 尺寸,而 3.7-5.4 毫米是建议的 EPAD 尺寸。mm 区域被定义为 PCB 布线禁止区域,为什么将整个区域设计为封装底部的裸露金属? Re: MC33772B's EPAD 您可以从下面链接文件的第 12 页阅读更多裸露焊盘的 PCB 设计。 AN4388: 四侧扁平封装 (QFP) — 应用笔记 5.2 焊锡钢网和焊锡膏 Re: MC33772B's EPAD 我已经知道了你的答案,但我真正想知道的是,为什么 MC33772 底部的金属开口面积是 5.4 毫米。 根据应用笔记,焊接开口面积为 3.7 mm,但设备的底部金属面积为 5.4 mm。为什么会有区别? 根据数据表,3.7 毫米至 5.4 毫米区域被指定为布线禁区。 有鉴于此,我想了解为什么同样是 3.7-5.4mm 区域以开放金属的形式暴露在设备底部。
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[过滤器:垃圾邮件] evelynteddy 的帖子正文与 " *telegram* " 相符,板 " imx-processors "。 [过滤器:垃圾邮件] evelynteddy 的帖子正文与 " *telegram* " 相符,板 " imx-processors "。 帖子主题:回复:IMX7ULPEVK-等待根设备 /dev/mmcblk0p2... 职位机构: 如何从骗子手中找回丢失或被骗的加密货币,请访问 OPTIMISTIC HACKER GAIUS。 上周我的加密货币被骗后,我感到很无助,不知道该怎么办。我与乐观黑客盖乌斯取得了联系,他一直都很专业,有良好的沟通,并设定了合理的期望值。他细心地处理问题,经常提供最新信息,并描述了每一个步骤。通过坚持不懈的努力和专业技术,我被盗的加密货币被找到并追回。我吸取了重要的网络安全教训,并通过这次遭遇恢复了信心。我感谢你们在这段艰难时期给予我的帮助和指导。强烈建议 网站:optimistichackargaius.co m 电子邮件:support @ optimistichackargaius.com。 WhatsApp number:+44 737 674 0569 电报:t.me /OPTIMISTICHACKERGAIUSS 正文"电报" 匹配的过滤模式"*telegram*" 。 用户[id=259418,login=evelynteddy]的发帖因以下最终用户面临的错误而被拒绝: 信息正文中包含 Telegram,这在本社区是不允许的。请在发送您的帖子前删除这些内容。
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S32R45 SptEcsIsrCb エラー! アラームの原因を検索すると、「PDMA での AXI 読み取りエラー」が表示されます。このアラームが発生する原因は何でしょうか? SPT エラー キューがオーバーフローしました。最初の 10 件のエラーのみが報告されます。最後に実行されたカーネルを確認してください! SPT完了 SptEcsIsrCb エラー!、ステータス: 0x11005、エラー情報: 0x10000 SptEcsIsrCb エラー!、ステータス: 0x11005、エラー情報: 0x10000 SptEcsIsrCb エラー!、ステータス: 0x11005、エラー情報: 0x10000 SptEcsIsrCb エラー!、ステータス: 0x11005、エラー情報: 0x10000 SptEcsIsrCb エラー!、ステータス: 0x11005、エラー情報: 0x10000 SptEcsIsrCb エラー!、ステータス: 0x11005、エラー情報: 0x10000 SptEcsIsrCb エラー!、ステータス: 0x11005、エラー情報: 0x10000 SptEcsIsrCb エラー!、ステータス: 0x11005、エラー情報: 0x10000 SptEcsIsrCb エラー!、ステータス: 0x11005、エラー情報: 0x10000 SptEcsIsrCb エラー!、ステータス: 0x11005、エラー情報: 0x10000 RsdkSptRun が完了しました。SPT プロセッシングが完了しました。次のカーネルの準備ができました。 Re: S32R45 SptEcsIsrCb error! こんにちはピーター、 ご返信ありがとうございます。   あなたが挙げた理由に従い、私は特に以下の点に重点を置いてコードを注意深くチェックしました。   WR_5、問題は見つかりませんでした。さらに、SPT カーネル コードは変更していません。   コード初期リスト:   AppMemAllocBuffer ( pHeapMem 、 & gSdadcSampleBufferBufH [インデックス]、 sizeof ( uint16_t ) * RSDK_SPT_RANGE512_4CH_IN_BUF_SIZE 、                           RSDK_SPT_DATA_ADDR_ALIGN_BYTES 、 RSDK_OALMEM_CHUNK_ID_CBRAM );   RelocSptCode ( gSptModuleCodeRelocBufH . virtAddr 、 RsdkSptRange512smp128crp4ch 、 RSDK_SPT_GET_KERNEL_SIZE ( RsdkSptRange512smp128crp4ch ));   np = 0 ; sptContext . kernelParList [ np ]. paramType= RSDK_SPT_PARAM_TYPE_ADDR ; sptContext 。 kernelParList [ np ++ ]。 paramValue = ( uintptr_t ) gSdadcSampleBufferBufH [ 0 ]。 phyAddr ;   sptContext . kernelParList [ np ]. paramType= RSDK_SPT_PARAM_TYPE_ADDR ; sptContext 。 kernelParList [ np ++ ]。 paramValue = ( uintptr_t ) gRadarCubeResultsBufH 。 phyAddr ;   sptContext . kernelParList [ np ]. paramType= RSDK_SPT_PARAM_TYPE_ADDR ; sptContext 。 kernelParList [ np ++ ]。 paramValue = ( uintptr_t ( gFft512TwiddleFactorsBufH . phyAddr );    sprintf (ファイル名、 " %s% s " 、 FILE_IN_PATH 、 "fft512_twiddle_factors.dat" ); /* RSDKデータは、PPCアーキテクチャとの互換性のため、ビッグエンディアン形式でファイルに保存されます。エンディアンの変換は、ファイルへのデータの読み書き時にのみ行われます。プロセッシングフロー内での変換は必要ありません。*/   DbgReadFileConvert ( fileName 、 0 、 ( char * ) gFft512TwiddleFactorsBufH . virtAddr 、 gFft512TwiddleFactorsBufH . numBytes 、 ENDIAN_CHANGE 、 DATA_BUFF_IS_CACHED );           sptContext . kernelParList [ np ]. paramType= RSDK_SPT_PARAM_TYPE_ADDR ; sptContext 。 kernelParList [ np ++ ]。 paramValue = ( uintptr_t ) gFft512BlackmanWindowBufH 。 phyAddr ;   sprintf (ファイル名、 " %s% s " 、 FILE_IN_PATH 、 "fft512_win_blackman.dat" ); DbgReadFileConvert ( fileName 、 0 、 ( char * ) gFft512BlackmanWindowBufH . virtAddr 、 gFft512BlackmanWindowBufH . numBytes 、 ENDIAN_CHANGE 、 DATA_BUFF_IS_CACHED );   sptContext . kernelParList [ np ]. paramType= RSDK_SPT_PARAM_TYPE_VALUE ; sptContext . kernelParList [ np ++ ]. paramValue = 3 ; /* 出力シフトなし */ sptContext . kernelParList [ np ]. paramType= RSDK_SPT_PARAM_TYPE_LAST ;   印刷リスト: gSptModuleCodeRelocBufH.phyAddr: 0x34000000 gSdadcSampleBufferBufH[0].phyAddr: 0x28000000 gSdadcSampleBufferBufH[1].phyAddr: 0x28003000 gSdadcSampleBufferBufH[2].phyAddr: 0x28006000 gSdadcSampleBufferBufH[3].phyAddr: 0x28009000 gRadarCubeResultsBufH.phyAddr: 0x34002000 gFft512TwiddleFactorsBufH.phyAddr: 0x340bd000 gFft512BlackmanWindowBufH.phyAddr: 0x340bf000 Re: S32R45 SptEcsIsrCb error! こんにちは、 考えられる原因は次のとおりです: 1. SPT入力とS32DS入力の不一致 SPT カーネル入力が予期された S32DS 構成と一致しませんでした。 PDMA は、SPT カーネルの構成によって決定されたアドレスでメモリを読み取ります。バッファ サイズ、キューブ ベース アドレス、またはチャネル カウントが揃っていない場合、PDMA は無効または予期しないメモリ位置を読み取ろうとする可能性があります → AXI 読み取りエラー。   2. 作業レジスタ(WR_x)の設定が正しくないか破損している PDMA が無効または誤って構成されたバッファを指す作業レジスタを使用する場合、AXI ファブリックは不正な読み取り要求を受信し、バス エラーをトリガーします。 https://community.nxp.com/t5/Other-NXP-Products/SPT3-1-1024-128-16range-don-t-work/mp/1621567   3. 同期PDMA実行モードと非同期PDMA実行モード .sync → .async .syncでモードでは、PDMA は誤った構成 (バッファ ポインタ、依存関係など) により満たされない可能性のある条件を待機します。 これにより、エラー フラグが蓄積され、PDMA エンジンが無効な読み取りを繰り返し試行すると AXI エラーが発生する可能性があります。   4. データ幅またはフォーマットが間違っている(例:WR_16とWR_11) PDMA が 16 ビットの複合データを期待しているが、ターゲット レジスタ/バッファが異なる幅/レイアウトに設定されている場合、AXI 読み取りバーストが不整合になる可能性があり、プロトコル エラー → AXI 読み取りエラーが発生します。   5. AXIプロトコルレベルのエラー(一般的な原因) S32R45 に固有のものではありませんが、AXI 読み取りエラー メカニズムは普遍的に適用されます。 バースト長またはサイズが無効です マップされていないアドレスまたは保護されたアドレスからの読み取りの試み スレーブタイムアウトまたは応答しないターゲット アップストリームの問題による読み取り応答エラー(SLVERR または DECERR) PDMA が不正な AXI トランザクションを生成すると、AXI インターコネクトは SLVERR を返します。これは PDMA 読み取りエラーとして表示されます。 あなたのケースで最も可能性の高い原因 両方のログに基づくと、主な容疑者は次のとおりです。 間違ったWR_xレジスタ(特にWR_5 / WR_16の選択) 非常に一般的には誤って構成され、無効な AXI 読み取りにつながります。 SPTカーネル入力とS32DS入力の不一致 以前のケースでは、見落とされ、根本原因として検証されることがよくあります。 PDMA同期モードが依存関係のデッドロックを引き起こす .syncを切り替えてみる→ .asyncデバッグ用。 よろしくお願いいたします。 ピーター     Re: S32R45 SptEcsIsrCb error! こんにちはピーター、 レーダー フロントエンドの波形サンプリング ポイントの数を 2 倍にすると、エラーは発生しなくなりましたが、チャープ バッファのサイズは変更されていません。問題をさらに分析するのにご協力ください。どうもありがとうございます。 Re: S32R45 SptEcsIsrCb error! こんにちは、 シナリオにおける最も可能性の高い根本原因: カーネルの予想されるチャープピッチと実際のバッファレイアウト間のストライド/アライメントの不一致 - サンプルを 2 倍にするとバーストサイズが揃い、バグがマスクされます。 WR_x 選択 / データ幅の不一致 (実数 vs 複素数、16 ビット vs その他)。サンプル数が変化すると偶然に修正されます。 kernelParList 内のパラメータ順序/タイプの混同 (ADDR と VALUE) が、特定のサイズの場合にのみ発生します。ミラー スレッドには同様のパラメータ シーケンスが示されており、インデックスをスリップするのは簡単です。 WR 24ビットオフセットエッジは、2倍にすると異なるパッキング/レイアウトで消えます。 よろしくお願いいたします。 ピーター
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S32N55:充当 GM 时 gPTP 桥接设备中的序列 ID 队员们好 我正在测试gpTP示例中的网桥设备行为。我使用的是 GrayVIP_1_0_22_0。 根据《用户手册》,如果网桥在 启动超时则应开始作为 GM 运行。但我观察到,在这种情况下,同步和同步跟进帧中的序列 ID 都保持在 1024,不会增加。 检查相关代码后,我发现当网桥转换到 GM 模式时,用于生成同步信息的序列 ID 取自 prSyncMachines[prDomain->u8SlaveMachineId].u16SequenceId 从端口的序列号。 如果从端口没有收到任何同步报文,则该值永不更新,这将导致主端口发送的同步报文中的序列 ID 保持不变。 这种行为表明,在这种机制下,桥梁无法正常发挥全球机制的作用。 能否请您解释一下,为什么大桥的设计会出现这种情况? BR, Bridget GPTP_STACK Re: S32N55: sequence ID in gPTP bridge device when acting as a GM 你好,@Bridget、 我们的团队已经受理了一个案件,并将尽快提供答复 ,致以最崇高的敬意, Radu Re: S32N55: sequence ID in gPTP bridge device when acting as a GM 嗨,@Bridget、 我们正在努力重现该问题,并将在团队中讨论进一步的步骤。我会再联系你的。 谢谢, Lukas Re: S32N55: sequence ID in gPTP bridge device when acting as a GM @Bridget、 事实证明,gPTP 网桥的这种行为是有意为之,符合 802.1as 标准。 网桥应转发主端口上接收到的序列 ID。如果Grand Master丢失,序列ID确实会停止更新——这是下游设备能够分辨GM何时丢失的方式之一。 对于本来就没有总经理的桥梁,序列 ID 按标准是随机的。我们对 "随机"的解释是,序列 ID 的任何内容都不能保证,也不应假设。硬编码的 1024 被认为符合这一要求(可以是任何其他数字)。 序列 ID 是否会导致应用程序出现问题?正如您所观察到的,无论序列 ID 如何,端点都完全能够与网桥同步。 抱歉花了这么长时间。如果有不清楚的地方,请告诉我。 BR, Lukas
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MCX W72 ナレッジハブ MCX W72xファミリーは、96MHzのArm ® Cortex ® -M33コアと、Matter、Thread、Zigbee、Bluetooth LEをサポートするマルチプロトコル無線サブシステムを搭載しています。専用のコアとメモリを備えた独立した無線サブシステムは、メインCPUの負荷を軽減し、主要アプリケーションのためにCPUを温存するとともに、FUTURE無線規格をサポートするためのファームウェアアップデートを可能にする。MCX W72xは、統合されたEdgeLock ® Secure Enclave Core Profileによる高度なセキュリティ機能も提供し、認証情報共有のためのNXPのEdgeLock 2GOクラウドサービスにも対応します。 MCX W72xファミリは、Bluetoothチャネルサウンディング機能を搭載し、測距レイテンシを低減するための専用オンチップ測位演算エンジンを備えています。アプリケーション固有のコード、接続スタック、および無線によるファームウェアアップデートをサポートするための追加メモリを搭載しています。さらに、無線サブシステムは、Bluetooth Low Energyスタックと並行して、ThreadまたはZigbeeのフルスタックを実行できます。これにより、無線機のリアルタイム処理がアプリケーションとは別のコアで実行されるため、信頼性の高い無線性能が実現します。 NXPが長年にわたり培ってきた産業用エッジソリューション提供の実績に基づき、MCX Wシリーズは-40℃~125℃の広い動作温度範囲と、オプションのCANインターフェースを含む産業アプリケーション向け**ペリフェラル**を提供し、長期的な産業利用をサポートするNXPの15年間の製品寿命延長プログラムの一部となります。 MCX Wシリーズは、 MCUXpresso開発者エクスペリエンス 組み込みシステム開発を最適化、簡素化、加速化する。   セキュリティ認証 PSA認定レベル2 SESIPセキュリティターゲット SESIP KW47/MCXW72 SESIP証明書とSTはTrustCBにあります Webサイト 規制認証 欧州連合適合宣言書 - FRDM MCXW72 Bluetoothの要件 認定製品 | Bluetooth ®テクノロジーウェブサイト Q360996: KW47 / MCX W72 Bluetooth LE 6.0 (チャンネルサウンディング) コントローラー Q332147: KW47 / MCX W72 Bluetooth LE 6.0 (チャンネルサウンディング) ホスト 文書 MCX W72製品ファミリーデータシート MCX W72 リファレンスマニュアル MCX W72の正誤表 MCXW72 ハードウェア設計ガイド   MCX W72プラットフォームでのMatterの利用開始 NXP MCX W72 で OpenThread を使い始める   FRDM-MCXW72 ユーザーマニュアル FRDM-MCXW72の入門ガイド   MCX W72-LOC ユーザーマニュアル ブルートゥース Bluetooth技術にご興味がありますか? Bluetooth Low Energy Primer – BLEの基礎を理解するために必読の書。 Bluetooth ®仕様 -規格、プロトコル、技術文書の完全なリスト。 受賞歴と表彰 毎年、Bluetooth Special Interest Group (SIG) は、Bluetooth 技術の発展に貢献したとして同業者から認められたワーキンググループ、委員会メンバー、貢献者の努力と献身を称えています。 2024: チャネル Sounding 2025年:チャネルサウンディング振幅ベースの攻撃耐性、LEテストモードの機能強化、および測距プロファイルとサービス。 Bluetooth機能の概要 Bluetooth_5.0_機能の概要 Bluetooth_5.1_Feature_Overview Bluetooth_5.2_機能概要 Bluetooth_5.3_機能概要 Bluetooth_5.4_機能概要 Bluetooth 6の機能概要 Bluetooth 6.1の機能概要 Bluetooth 6.2 機能概要 Bluetooth 6.3 機能概要 アプリケーションノート ソフトウェア、ハードウェア、ペリフェラル: AN14850 MCX W72によるアプリケーションパフォーマンスの向上:このアプリケーションノートでは、汎用組み込みアプリケーションのパフォーマンスを向上させるために、MCX W72マイクロコントローラのデュアルコアアーキテクチャを使用する方法について説明します。 AN14937 MCX W72の32kHzクリスタルレスモード:このアプリケーションノートでは、MCX W72デバイスの32kHzクリスタルレスモードに関する情報を提供します。このモードを使用すると、32kHzのクロック精度を損なうことなく、システムのコストを削減できます。フリーランニング発振器(FRO32K)は32kHzクロックソースとして使用され、MCX W72の信号周波数アナライザ(SFA)モジュールを介して32MHz RF発振器に対して校正されます。 AN14745 MCX W72 のスマート電源スイッチの機能、使用方法、および性能:このアプリケーション ノートでは、MCX W72マイクロコントローラのスマート電源スイッチの使用方法について説明します。MCX W72には、接続されたコンポーネント(MCX W72の電源ドメインを含む)のオン/オフを切り替えるプログラム可能なソリッドステートスイッチが内蔵されています。 AN14747 MCX W72 のロードプルテストレポート:この文書では、供給電流、送信電力、および高調波レベルを測定する目的について説明します。これらの測定値は、被試験デバイス(DUT)が受ける複素出力負荷の振幅と位相を調整しながら監視されます。 パワーマネージメント:  AN14739 MCX W72 Bluetooth Low Energy 消費電力分析:このドキュメントでは、MCXW72-EVK ボードを使用した MCX W72 (IIoT) ワイヤレス MCU の消費電力分析について説明します。 AN14745 MCX W72マイクロコントローラのスマートパワースイッチの機能と使用方法:このアプリケーションノートでは、MCX W72マイクロコントローラのスマートパワースイッチの使用方法について説明します。MCX W72には、コネクテッドコンポーネント(MCX W72の電源ドメインを含む)のオン/オフを切り替えるプログラム可能なソリッドステートスイッチが内蔵されています。 AN14841 802.15.4 MCX W72 の マター および ZigBee 消費電力分析:このドキュメントでは、Kinetis MCX W72 (IIoT) ワイヤレス MCU の消費電力分析について説明します。 AN14742 MCX W72用電源管理ハードウェア:このアプリケーションノートでは、 MCX W72マイクロコントローラにおける電源管理専用の各種モジュールの使用方法について説明します。 AN14664 Kinetis BLEアプリケーション向けコインセルハードウェア推奨事項:この文書では、コインセルレベルでの電流ピークを最小限に抑えるためのハードウェアおよびソフトウェアソリューションについて説明します。 AN14889 :Bluetooth Low EnergyおよびIEEE 802.15.4向けFRDM-MCXW72無線周波数システム評価レポートこの文書では、Bluetooth Low Energy(2FSK変調)およびIEEE 802.15.4(OQPSK変調)アプリケーション向けFRDM-MCXW72ボードの無線周波数(RF)評価試験結果を示します。 RF: AN14865 KW47およびMCX W72用チャネルサウンディングの基礎:このドキュメントでは、CSテクノロジーの基礎と、カスタムソリューションやアプリケーションでどのように使用できるかについての概要を説明します。 AN14779 KW47およびMCX W72用プリントチャネルサウンディングアンテナ:このアプリケーションノートは、NXPがKW47およびMCX W72コントローラ向けに設計した、プリント回路基板(PCB)上に実装されたプリントアンテナに焦点を当てています。 AN14832 チャンネルサウンディングボードを設計するための基本的な手順 - 多様性のないシンプルなPCBの作成: この文書では、最小限のCSサブシステムの例を示します。無線周波数(RF)経路は、CSアプリケーション全体の特性に大きな影響を与えるため、特に注意が払われます。 AN14747 MCX W72用ロードプルテストレポート:この文書では、供給電流、送信電力、および高調波レベルを測定する目的について説明します。これらの測定値は、被試験デバイス(DUT)が受ける複素出力負荷の振幅と位相を調整しながら監視されます。 AN14868 ANSYSにおけるチャネルサウンディングのRFモデリング:チャネルサウンディングのシミュレーションと解析の手法に焦点を当てる ANSYSツールを使用した無線通信システム AN14855 さまざまな環境におけるチャネルサウンディングテスト:このアプリケーションノートは、 Bluetoothチャネルサウンディング(CS)は、Bluetooth周波数帯域における2つのデバイス間の距離を測定する技術です。精度に影響を与える主要な要因について説明します。 AN14869 複雑なチャネルサウンディングボードを設計するための基本的な手順:高度なCS機能をサポートするハードウェアの作成に焦点を当て、精度を向上させ、マルチパス伝搬などの問題を軽減するために、アンテナダイバーシティや最適化されたRFパスなどが含まれます。 AN2731 2.4GHz通信用小型平面アンテナ:このドキュメントは、アンテナ設計に関する網羅的な解説ではありません。むしろ、お客様がアプリケーションに適したアンテナタイプを選択できるよう、基板レイアウトとアンテナの基本について十分な理解を深めていただくこと、また、パフォーマンスの問題や遅延につながる典型的なレイアウトミスを回避していただくことを目的としています。 セキュリティ: AN14648 MCX W72 インシステムプログラミングユーティリティ:このドキュメントでは、MCX W72 MCUをISPモードで起動し、MCUと通信するための各種シリアル接続を確立する手順を説明します。 AN14613 MCX W72 セキュアブート(SECツール使用): MCX W72は、低消費電力でセキュリティの高いシングルチップ無線MCUです。フラッシュメモリの内容を暗号化データとして保存でき、瞬時に復号化できます。これにより、機密データやアルゴリズムの保護に役立ちます。 AN14646 MCX W72 でのデバッグ認証:このアプリケーション ノートでは、MCUXpresso Secure Provisioning Tool (SEC) を使用したデバッグ認証の手順について説明します。 AN14728 MCX W72 NPXを使用したフラッシュ暗号化:セキュリティ上の理由から、フラッシュメモリに保存されているアプリケーションコードとデータを暗号化して保護する必要性が高まっています。NVM PRINCE XEX(NPX)は、フラッシュメモリコントローラ(FMC)内のモジュールで、最大4つのフラッシュ領域の内容を保護することができます。NPXは、フラッシュコンテンツのオンザフライでの低遅延暗号化と復号化を実行し、開発者とCortex-M33プラットフォームに対して透過的です。開発者の視点から特別な操作は必要ありません。 AN14644 MCX W72 ライフサイクルの管理:このドキュメントでは、ユーザーが利用できるライフサイクルステージ、ライフサイクルへのアクセス方法、ライフサイクルの制限、次のライフサイクルへの移行方法について説明します。 AN14670 EdgeLock 2GO の SPSDK による MCU のプロビジョニング: EdgeLock 2GO は、NXP が運営するフルマネージドのクラウドプラットフォームであり、NXP MCU、MPU、および EdgeLock SE05x セキュアエレメントを統合した IoT デバイスの容易な展開と保守のためのセキュアなプロビジョニングサービスを提供します。 AN14624 EdgeLock 2GO のセキュアプロビジョニングツール (SEC) による MCU のプロビジョニング: EdgeLock 2GO は、NXP が運営するフルマネージドクラウドプラットフォームであり、NXP MCU、MPU、および EdgeLock SE05x セキュアエレメントを統合した IoT デバイスの容易な展開と保守のためのセキュアプロビジョニングサービスを提供します。 AN14544 EdgeLock 2Go MPUおよびMCU向けサービス: EdgeLock 2GOは、IoTデバイスのプロビジョニングと管理のためのNXPのサービスプラットフォームです。これにより、製造時または現場で、デバイスに鍵と証明書を安全にインストールし、デバイスのライフサイクル全体を通して認証情報を最新の状態に保つことができます。EdgeLock 2GOは、各デバイスのセキュリティ機能を活用することで、IoT機器群全体にわたって最適なレベルのセキュリティを実現します。 Bluetoothトレーニング Bluetooth Low Energy 6.0 NXP トレーニング MCX Wシリーズ トレーニング - NXPコミュニティ   RFスイッチ比較:吸収型/反射型 規格比較:ETSI / FCC / ARIBの要件 BLEチャネルサウンディング - 概要 BLEチャネルサウンディング - RFハードウェア BLEチャネルサウンディング - ANSYSモデリングツール BLEチャネルサウンディング - アンテナプロトタイプの検証測定 装置 無線機器:この記事では、プロジェクト開発に役立つ機器へのリンクを提供します。 役立つリンク集 KW47-EVKおよびFRDM-MCXW72用デバッグプローブファームウェアのインストールこの記事では、NXPのMCU-LINKインストーラを使用して、KW47-EVKおよびFRDM-MCXW72用のCMSIS-DAP/SEGGER J-linkファームウェアをインストールする方法について説明します。 KW47/MCXW72のワイヤレス環境におけるNBUのアップデートこの記事では、NBUファームウェアのアップデート方法について説明します。 MCUXpresso for Visual Studio Code でデモ例をインポートして実行する方法:この記事では、MCUXpresso for Visual Studio Code で、ARM GCC ツールチェーンを使用した新しい SDK からデモ例をインポートして実行する方法について説明します。 [MCUXSDK] KW4x、MCXW7x、MCXW2x 用 GitHub SDK の使い方 - NXP コミュニティこのコミュニティ投稿では、GitHub SDK の使い方をステップバイステップで解説します。 [MCUXSDK] GitHub SDK - Bluetooth LEプラットフォームのドキュメント - NXPコミュニティこのコミュニティ投稿では、BLEプラットフォームのドキュメントを提供します。 KW47(オートモーティブ)またはMCXW72(IoT/インダストリアル)を使用してPCBを初回から正しく構築する最良の方法:このコミュニティでは、KW45またはK32W148とMCXW71を使用してPCBを構築するための重要なリンクと、無線性能、低消費電力、無線認証(CE/FCC/ICC)に関するすべての情報を提供しています。 駆動強度変更時の DCDC 障害に対する回避策の実装駆動強度を低く変更し、DCDC 出力電圧が現在の出力電圧以上になったときに、まれに DCDC 障害が発生することがあります。 Kinetisファミリー製品でHCI_bbを使用し、DTMモードにアクセスする方法:この記事は2つのパートで構成されています。 HCI_bbバイナリをKinetis製品に書き込む方法。 R&S CMW270を使用してRF測定を実施する BLE HCIアプリケーションでトランスミッタ/レシーバのテストコマンドを設定する:この記事では、ユーザーがデバイスにシリアルコマンドを送信する方法を示す手順を説明します。 Bluetooth LE HCIブラックボックス クイックスタートガイド:この記事では、シリアルコマンドを使用してユーザーが無線を制御できるようにする簡単な手順について説明します。 Kinetis (../45/47/43;MCX W71/72/70) および MCX W23 パワープロファイルツール (ローカライゼーションを含む) : このページは、Kinetis (KW35/KW38/KW45/KW47/KW43) および MCX W7x (MCX W71/W72/W70) パワープロファイルツール専用です。このツールを使用すると、アプリケーション (自動車または IIoT) の消費電力を推定し、ソリューションのバッテリー寿命を評価できます。 KW47/MCXW72 32MHz & 32kHz 発振マージン: この記事では、回路の発振マージンを適切に設定する方法を説明します。 動画 NXPチャネルサウンディング技術とGoogle Pixel 10のインターフェースこれは、MCX W72 LOCボードがチャネルサウンディングを使用してGoogle Pixel 10スマートフォンと通信する様子を示すデモです。   サポート MCX W72に関するご質問がある場合は、弊社のワイヤレスMCUコミュニティにご質問をお寄せください。 ここ
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No SCL/SDA Signals when using I2C Send as Master I have set up LPI2C1 as Master but get no outputs when attempting to send. I have pull-up resistors and the signals are connected to 1 slave device only. Please see below. What are some possible reasons for this problem? Initialization: /* set I2C1 interrupt */ IntCtrl_Ip_EnableIrq(LPI2C1_IRQn); IntCtrl_Ip_InstallHandler(LPI2C1_IRQn, LPI2C1_Master_Slave_IRQHandler, NULL_PTR); /* Init lpi2c in master mode */ Lpi2c_Ip_MasterInit(LPI2C_CHANNEL_0, &I2c_Lpi2cMasterChannel0); Send data: boolean I2C_read_fault_status(uint8 *rx_buffer) { TxBuff[0] = 0x78;   if (LPI2C_IP_SUCCESS_STATUS == Lpi2c_Ip_MasterSendData(LPI2C_CHANNEL_0, (uint8 *)&TxBuff[0], 1U, FALSE)) { LM5171_data_ptr = rx_buffer; LM5171_data_len = 1; return TRUE; } Re: No SCL/SDA Signals when using I2C Send as Master We are using the S32K324 part with the S32DS3.5 debugger and a Multilink FX Universal interface. Our RTD version is 4.00 HF02. There is not an option in the LPI2C peripheral to enable debugging (like there is in other peripherals). I did not think to set the option manually! When I set the DBGEN bit, the signals work as expected. Re: No SCL/SDA Signals when using I2C Send as Master What kind of debug mode you are using? specific debugger or on board debugger? Re: No SCL/SDA Signals when using I2C Send as Master Hi@phil_b Could you tell us the part number you're using? Also, the RTD version is ? If you're using S32K3, could you please try to set this bit and have a try again. Re: No SCL/SDA Signals when using I2C Send as Master The signals were missing while I was running in Debug mode. When I removed the debug connector, the signals were there! Is there a way to see the signals while in Debug mode?
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咨询S32E板子使用方法 你好, 我有2块板子,型号分别是2023 NXP B.V.S32SE28X-DC和2022 NXP B.V.X-S32X-MB。请问下这2块板子的软硬件使用方法,能否提供相应的一些资料。 谢谢
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文本区域错误问题 我创建了几个 Textarea 元器件。当我使用键盘在其中一个输入框中输入内容,然后点击"Finish" 时,键盘会自动切换到另一个文本区进行进一步操作。如何解决这个问题?视频地址为https://github.com/monkeyhorse/guiguider.git Re: Textarea bug issue 嗨,@monkeyhorse、 谢谢你的澄清。我发现这个问题似乎是在模拟过程中出现的。是否只有在模拟时才会出现这种情况?或者在板上运行 GUI 时也是如此? Re: Textarea bug issue @EdwinHz是的,我使用的是最新版本。 Re: Textarea bug issue 嗨,@monkeyhorse、 感谢您的更新。您使用的是哪个版本的 GUI Guider/LVGL?它们是最新的吗(GUI Guider 1.9.1 和 LVGL 9.2.1)? Re: Textarea bug issue 现在我发现,setup_scr_screen.c 中 Textarea 的创建顺序是造成这个问题的原因,但我仍然不知道如何解决这个问题。
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AN4581 的最新版本 您好, 从 2020 年起有 AN4581(在支持 HABv4 的设备上进行 i.MX 安全启动)修订版 4: https://de.scribd.com/document/811030804/AN4581 然而,如果我搜索贵公司的网站或互联网,我只能找到 2012 年或 2018 年的过时版本。 能否告诉我在哪里可以找到AN4581 的最新修订版? 谢谢! Re: Latest version of AN4581 感谢您的支持。 我可以在这里下载 2020 年版本: https://www.readkong.com/page/an4581-i-mx-secure-boot-on-habv4-supported-devices-2622907 旧版本可在此处获取,无需 NDA : https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/imx-processors/225997/1/AN4581.pdf(2012) https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/imx-processors/194321/1/AN4581_2018.pdf(2018) Re: Latest version of AN4581 这个用于安全启动的AN是机密的,您需要与恩智浦签署保密协议。 最好从https://support.nxp.com/s/?language=en_US创建内部票据
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iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP For iMX6DQ, there are two IPUs, so they can support up to 4 cameras at the same time. But the default BSP can only support up to two cameras at the same time. The attached patch can make the BSP support up to 4 cameras based on 3.10.53 GA 1.1.0 BSP.   The 4 cameras can be: - 1xCSI, 3xMIPI - 2xCSI, 2xMIPI - 4xMIPI   For 4xMIPI case, the four cameras should be combined on the single MIPI CSI2 interface, and each camera data should be transfered on a mipi virtual channel.   In this patch, we given the example driver for Maxim MAX9286, it was verified working on iMX6DQ SabreAuto board. The input to MAX9286 is four 720P30 cameras. The verified camera boards:     (1) Onsemi AR0140+AP0101+MAX9271 boards.     (2) OmniVision OV10635+MAX9271 boards.   The MIPI CSI2 CVBS camera surround view solution can be found at: iMX6DQ ISL79985/79987 MIPI CSI2 CVBS camera surround view solution for Linux BSP The MIPI CSI2 CVBS HD camera surround view solution can be found at: iMX6DQ TP2854 MIPI CSI2 720P CVBS camera surround view solution for Linux BSP   The kernel patches: 0001-IPU-update-IPU-capture-driver-to-support-up-to-four-.patch      Updated IPU common code to support up to four cameras.   0002-Add-Max9286-support-on-SabreAuto-board-which-can-sup.patch      MAX9286 driver, it includes MAX9271, AP0101 and AR0140 drivers.   0003-Remove-the-page-size-align-requirement-for-v4l2-capt.patch      With this patch, the mxc_v4l2_tvin test application can use overlay framebuffer as V4l2 capture buffer directly.   0004-Max9286-skip-AP0101-camera-re-initialization.patch      If the camera board's power had been kept after initialized, this patch will bypass the re-initialization to reduce the start up time.   0005-Max9286-set-I2C-speed-to-400Kbps.patch     Set I2C to 400Kbps to reduce the AP0101+AR0140 initialization time.   0006-Max9286-add-retry-for-MAX9271-I2C-access.patch     Added retry for MAX9271 I2C access.   0007-Max9286-Add-support-for-OV10635-camera.patch     Updated code for OV10635 camera.   0008-Max9286-support-auto-detect-camera-number.patch     Make the Max9286 driver can detect the camera number automatically.     How to builld the kernel with MAX9286 support:       make imx_v7_defconfig       make menuconfig (In this command, you should select the MAX9286 driver:             Device Drivers  --->                   <*> Multimedia support  --->                         [*]   V4L platform devices  --->                               <*>   MXC Video For Linux Video Capture                                       MXC Camera/V4L2 PRP Features support  --->                                           <*>Maxim max9286 GMSL Deserializer Input support                                               Select Camera Sensor (OmniVision OV10635 camera sensor)  // Or (Onsemi AP0101 and AR0140 camera sensor)                                           <*>mxc VADC support                                           <*>Select Overlay Rounting (Queue ipu device for overlay library)                                           <*>Pre-processor Encoder library                                           <*>IPU CSI Encoder library)       make zImage       make dtbs   The built out image file:       arch/arm/boot/dts/imx6q-sabreauto.dtb       arch/arm/boot/zImage   "mxc_v4l2_tvin_max9286.tar.gz" is the test application, test command to capture the four cameras and render on 1080P HDMI display: /mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 1 -x 0 -g2d & /mxc_v4l2_tvin.out -ol 960 -ot 0 -ow 960 -oh 540 -d 1 -x 1 -g2d & /mxc_v4l2_tvin.out -ol 0 -ot 540 -ow 960 -oh 540 -d 1 -x 2 -g2d & /mxc_v4l2_tvin.out -ol 960 -ot 540 -ow 960 -oh 540 -d 1 -x 3 -g2d &   Some hardware check point on AR0140+AP0101+MAX9271 camera board (Please get MAX9286 and OV10635 schematics from Maxim): 1. In this patch, MAX9286's I2C address is 0x4D, so ADD0 and ADD1 should be connected to high. AP0101's I2C address is 0xBA, so SADDR should be connected to high.   2. AP0101's DOUT0~DOUT7 should be connected to MAX9271's DIN7~DIN0, the order should be switched, MSB connected to LSB.   3. MAX9271's GPO pin should be connected to AP0101's FRAME_SYNC pin. The pull down resistance on FRAME_SYNC pin should not be 0 ohm.   Some known limitation: 1. AP0101's VSYNC invalid time, last video line's HSYNC to VSYNC porch's max value is 255 pixel clocks, it is not enough for MAX9286 to generate the Frame End MIPI packets for each camera. So in order to let iMX6DQ to capture 1280x720 video for each camera, we had let AP0101 output 1280*724 frame size, and iMX6 will only capture 720 lines, the remained video data and Frame End will be ignored. This solution will not impact the function, but there will be "Error matching Frame Start with Frame End for Virtual Channel x" error reported from iMX6 MIPI_CSI_ERR1 register. Maxim suggested to use MAX96705 to relace the MAX9271, it can delay the VSYNC invalid time, then the MIPI error will be fixed.     2015-11-17 update: Updated for OV10635 camera support. File: L3.10.53_GA1.1.0_MAX9286_Surroundview_Patch_2015-11-17.zip   2015-12-04 update: File: L3.10.53_GA1.1.0_MAX9286_Surroundview_Patch_2015-12-04.zip Added patch 0009-Max9286-updated-PCLK-edge-setting-for-OV10635.patch to correct the OV10635 PCLK edge setting     2016-03-07 update: File L3.14.38_GA_MAX9286_Surroundview_Patch_2016-03-07.zip Added kernel patch for L3.14.38 GA 1.1.0 BSP.   2016-07-26 update: Files: L3.10.53_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip; L3.14.38_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip; L3.14.52_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip. Added gstreamer support. Added MAX96705 support. Added patch for L3.14.52_GA1.1.0.   2017-12-11 update: Added CVBS surround view link: iMX6DQ TP2854 MIPI CSI2 720P CVBS camera surround view solution for Linux BSP 2021-04-26 update: Some customer reported, when system loading is heavy, sometimes, some camera will flicker left and right. It is caused by SFMC FIFO data lost. The original patch used IDMAC 0 and IDMAC 1 for two cameras on one IPU, this is not the best setting.  IDMAC 1 is fixed to use 1/4 SMFC FIFO and it will cause IDMAC 0 to use 1/4 SMFC FIFO too. And another 1/2 of SMFC FIFO can't be used in this case. Some code update to improve it: For each IPU, please use IDMAC 0 and IDMAC 2 to capture the two cameras. This needs change the hard coding in "drivers\media\platform\mxc\capture\ipu_csi_enc.c", "CSI_MEM1" and "IPU_IRQ_CSI1_OUT_EOF" should be changed to "CSI_MEM2" and "IPU_IRQ_CSI2_OUT_EOF". In this case, all SMFC FIFO can be used. And in "ipu_common.c", function ipu_probe(), the followed code should be changed to make IDMAC2 use high priority too. /* Set sync refresh channels and CSI->mem channel as high priority */ - ipu_idmac_write(ipu, 0x18800003L, IDMAC_CHA_PRI(0)); + ipu_idmac_write(ipu, 0x1880000FL, IDMAC_CHA_PRI(0)); Graphics & Display i.MX6Dual i.MX6Quad Linux Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li,   Sorry for the confusion. I assumed that below single pipe which causes saw-tooth issue does not render all cameras.   #gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video2 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false   I am studying about gstreamer to draw 4 cameras to one target buffer.   Thanks and best regards. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP As I explained, this is the render issue, for 60fps display, the PAN display can only be up to 60fps, but for 4x720P30 camera, if you render them alone, there are total 120fps, so it can't work correctly. You need combine the 4 cameras together then render them once. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The log shows there is no enough memory, I think you need reserve more memory for GPU. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, The following two pipelines work normally when run seperately. gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video0 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false  gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video1 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false  However, each pipelines given below (especially with video3) cause sawtooth issue given as attached gif, even if they run seperately. gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video2 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false  gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video3 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false  While twin app does not create any problem for each camera. While using gstreamer, what can cause this situation? Is it about gstreamer patch or IPU2? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP For gstreamer, when you render 4 cameras together, it needs combine the buffer 4 times and swap the buffer 4 times, this will impact the performance. For tvin test application, it just renders the cameras to target framebuffer directly, no buffer swap, this can cause sawtooth issue. The best way for rendering: draw the 4 cameras to one target buffer, then swap it to frambuffer in one time. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, I am using Imx6qp. With following commands, the system is working properly. WIDTH=640 HEIGHT=240 ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow ${WIDTH} -oh ${HEIGHT} -d 0 -x 0 -g2d & ./mxc_v4l2_tvin.out -ol ${WIDTH} -ot 0 -ow ${WIDTH} -oh ${HEIGHT} -d 0 -x 1 -g2d & ./mxc_v4l2_tvin.out -ol 0 -ot ${HEIGHT} -ow ${WIDTH} -oh ${HEIGHT} -d 0 -x 2 -g2d & ./mxc_v4l2_tvin.out -ol ${WIDTH} -ot ${HEIGHT} -ow ${WIDTH} -oh ${HEIGHT} -d 0 -x 3 -g2d & When I try to use gstreamer with the following pipelines, third and forth cameras are jittering and scrolling. WINDOW1="window-x-coord=0 window-y-coord=0 window-width=${WIDTH} window-height=${HEIGHT}" WINDOW2="window-x-coord=${WIDTH} window-y-coord=0 window-width=${WIDTH} window-height=${HEIGHT}" WINDOW3="window-x-coord=0 window-y-coord=${HEIGHT} window-width=${WIDTH} window-height=${HEIGHT}" WINDOW4="window-x-coord=${WIDTH} window-y-coord=${HEIGHT} window-width=${WIDTH} window-height=${HEIGHT}" gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video0 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false $WINDOW1 & gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video1 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false $WINDOW2 & gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video2 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false $WINDOW3 & gst-launch-1.0 -v -e imxv4l2videosrc device=/dev/video3 ! imxg2dvideosink framebuffer=/dev/fb0 force-aspect-ratio=false $WINDOW4 & v4l applications are working properly but gstreamer causes the problem seen above. Do you have any idea about this problem? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Excuse me, can I have another patch of Linux 3.14.38? That link failed Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thanks a lot! Qiang Li.  Understand now. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP 2 x MIPI CSI2 means two MIPI virtual channels(VC1 and VC2) on one physical MIPI CSI2 interface. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thanks Qiang! So can we have 2 x BT656 and 2 x MIPI CSI2 work together?  if yes , how many virtual channels(1~4) can each of the 2x MIPI CSI2 have?  Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Each IPU has two CSI modules, their input can be parallel CSI interface or MIPI CSI2 virtual channel. And for iMX6DQ, it can support up to two parallel CSI interfaces (BT656 interface). Both of them can work at the same time. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Dear Qiang Li,         Sorry, I am some confused, as you said, Imx6Q can support up to 4 cameras,  The 4 cameras can be: - 1xCSI, 3xMIPI - 2xCSI, 2xMIPI - 4xMIPI what is the meaning of  1x CSI and 3x MIPI, etc? usually we say MIPI CSI-2 together,  CSI is the same thing as MIPI CSI-2? BTW, how many BT656 interfaces can be directly supported by Imx6Q simultaneously?      Many thanks~~ Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi z dq, Did you solve the instability problem? I got sensor clk error when connecting more than 2 cameras although MAX96705's GPO pin are connected to AP0101's FRAME_SYNC pin.  I rarely got the error with 2 cameras . 28.463487] max9286_mipi 1-006a: ap0101_initialize: AP0101 hasn't been found, reg = 0x0, index = 4. [ 28.472625] max9286_mipi 1-006a: max9286_write_reg:write reg error:reg=34,val=b6 [ 28.673495] max9286_mipi 1-006a: max9271_write_reg:write reg error:reg= 4,val=83 [ 28.783553] max9286_mipi 1-006a: max9286_write_reg:write reg error:reg=15,val=9b [ 29.403469] mipi csi2 can not receive sensor clk! MIPI_CSI_PHY_STATE = 0x6f0. Regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Qiang_FSL‌ Hi, Liqiang Could you please tell me what's the fps value if we run the surroundview(4 camera 1280x720) application base your patch and  Imx6d processor? whether he DDR bandwidth is enough? thank you! 以下中文: ----------------- 如果使用这个patch并跑在imx6d的板子上,目前surroundview(基于4个720p的摄像头)能达到多少个fps, 内存带宽够用吗?谢谢! --------------- Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The color issue happens between MAX96705 and MAX9286 mapping, so PC USB has no use for reference. There are several kind of mapping order on data line, 8 bits/10bits, MSB/LSB. You need fine tuning it based on the OV10635 and MAX96705 connecting. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP This had been explained, g2d_blit target buffer should be the current displayed framebuffer: " The current mxc_v4l2_tvin demo application will render camera video to current frame buffer directly, so there will be tearing issue. For real use case, you need use multi-buffers, for example, the virtual framebuffer size is 3 times of real display buffer, and each time only one buffer is showing on display, so when buffer 1 is showing on display, you can draw combined camera videos into buffer 2, after finished drawing, call ioctl FBIOPAN_DISPLAY to show buffer 2 on screen. " Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi,liqiang I have solve the color fault problem, by swap data line using ov10635 register 0x4709, so thank you very much!! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi, liqiang In my local environment which using immunity mode, and do data line swap according to your suggestion, which causes image color change but problem NOT solved. (帖子里好像帖不了附件,单独像您提了一个问题。) By the way, I am using leopardimaging LI-USB30-OV10635-SER camera as following: https://www.leopardimaging.com/uploads/LI-OV10635-SER_datasheet.pdf It works well when connecting to PC by USB 3.0. please help check, thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li: I use the IMX6Q core board. Now when using both GC2000 and GC320, there are occasional image tears on the screen display. The specific implementation is like this:    Get the real-time video data of the 4-way camera, display it on the GPU and display it in real time on the lvds screen. At the same time, the 4 channels of video are called by g2d to call the g2g_blit function for resize. The image of each frame is 720P resize to 640*480, and then synthesized into one frame. Image so that 4 channels of video can be displayed in one frame.the spliced video is not display on the screen and saved directly into the video,but now it is found that the video displayed by the GPU rendering in real time will be torn. Playback of the saved video also found that the image has a tearing problem, affecting the viewing effect.    If you test the GPU rendering display separately, or the video of 4 channels of video is saved by G2D synthesis, there will be no image tearing problem. But as long as these two functions are combined into one project, the problem of image tearing will occur when displaying and the saving  video. 1. Can I use the GC2000 of IMX6 and GC320 at the same time? Is there a problem with GPU resource preemption? 2. Is there a problem with data conflicts in the GPU? I have already made the GC2000 and GC320 get data that cannot be bufed, but after the two functions are integrated, there will still be a problem of video tearing. I have been plagued by this problem for several weeks, and there has been no good solution. I am very anxious. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li: I use the IMX6Q core board. Now when using both GC2000 and GC320, there are occasional image tears on the screen display. The specific implementation is like this:    Get the real-time video data of the 4-way camera, display it on the GPU and display it in real time on the lvds screen. At the same time, the 4 channels of video are called by g2d to call the g2g_blit function for resize. The image of each frame is 720P resize to 640*480, and then synthesized into one frame. Image so that 4 channels of video can be displayed in one frame.the spliced video is not display on the screen and saved directly into the video,but now it is found that the video displayed by the GPU rendering in real time will be torn. Playback of the saved video also found that the image has a tearing problem, affecting the viewing effect.    If you test the GPU rendering display separately, or the video of 4 channels of video is saved by G2D synthesis, there will be no image tearing problem. But as long as these two functions are combined into one project, the problem of image tearing will occur when displaying and the saving  video. 1. Can I use the GC2000 of IMX6 and GC320 at the same time? Is there a problem with GPU resource preemption? 2. Is there a problem with data conflicts in the GPU? I have already made the GC2000 and GC320 get data that cannot be bufed, but after the two functions are integrated, there will still be a problem of video tearing. I have been plagued by this problem for several weeks, and there has been no good solution. I am very anxious. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, Sorry, maybe I didn't tell you my question clearly: 1.When I don't use -g2d,the display image is ok,no screen tearing. And the demo code really use FBIOPAN_DISPLAY to change display buffer ; 2.But when I use -g2d,screen tearing occurs. And the demo code use g2d_blit to display. So my question is how to resolve this problem? Thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP MAX96705 data line swap related code are in regiter 0x20~0x29; 0x30~0x39, you can find the discussion from old items here. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Qiang_FSL‌ 谢谢回复! >The ov10635 and max9286 driver captured frame format is YUYV, that means data in buffer is YUYV, if your application handles it other format, such as RGB565, you can >get such wrong color issue 上面图片是使用7yuv查看的结果,选择的格式是YUYV;图像颜色不对。所以不是显示格式不匹配的问题。 >Another thing should be paied attention to is that the MAX96705 can swap the data line order, if you set it to wrong, the color is wrong. 请问您知道驱动那里可以swap dataline order吗?谢谢! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The ov10635 and max9286 driver captured frame format is YUYV, that means data in buffer is YUYV, if your application handles it other format, such as RGB565, you can get such wrong color issue. Another thing should be paied attention to is that the MAX96705 can swap the data line order, if you set it to wrong, the color is wrong. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The current mxc_v4l2_tvin demo application will render camera video to current frame buffer directly, so there will be tearing issue. For real use case, you need use multi-buffers, for example, the virtual framebuffer size is 3 times of real display buffer, and each time only one buffer is showing on display, so when buffer 1 is showing on display, you can draw combined camera videos into buffer 2, after finished drawing, call ioctl FBIOPAN_DISPLAY to show buffer 2 on screen. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi,Liqiang Qiang_FSL‌ We are developing 4 camera surroundview application, based on imx6d/OV10635/MAX96705/MAX9286 boards, the patch we apply is L3.14.52_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip.  but the image color is NOT right as following: Can you please help ? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thans for your support! 1. You means that if input resolution and format is same as output,IPU will not deal with it. Right? 2. I still have another question,when I use command with -g2d argument,like this: root@imx6qsabresd:/# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 1280 -oh 720 -d 1 -x 0 -g2d,screen tearing occurs like the following picture: Could you  give me some advice?Thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The default IPU task doesn't support memory copy use case, input resolution and format is same as output. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, I meet following problem:when I use command without -g2d argument,it display following error, root@imx6qsabresd:/# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 1280 -oh 720 -d 1 -x 0 g_in_width = 1280, g_in_height = 720. fb_fix.id = DISP3 FG. fb: smem_start = 0x26700000, smem_len = 0xa8c000. fb: frame buffer size = 0x1c2000 bytes. fb: g_screen_info.xres = 1280, g_screen_info.yres = 720. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 1280. fb: g_display_height = 720. IPU_CHECK_TASK failed. But when I use the command ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 1280 -oh 719 -d 1 -x 0,the display image is OK. what's the impossible reason?Thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi, How to build the "Surround View Application" and its required packages in Yocto for i.MX6 QuadPLUS Hoping for a better guidance. Regards, Bala Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi,Qiang Li,谢谢回复,我们现在确实是镜头模组上挂了个flash,不过flash里面的固件是安森美的代理商提供的,他们确认已经工作在framesync模式,并且这个固件已经有别的客户在量产,我们读出AP0101的0xC88C,0xC88D,0xC88E寄存器,值分别是0x03,0x03,0x00,同时通过逻辑分析仪分析AP0101对AR0143的配置,感觉也应该是正确的;max9286这端已经确认生成的framesync信号有传输到AP0101,现在sensor出来的帧率是25fps; 请问针对25fps,max9286这边的配置应该如果修改,盼复,谢谢! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The FLASH ROM setting on camera module should follow the driver's setting. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi, VIDIOC_DQBUF  error dissappears when I changed the test hardware with a new set. I will work on the real reason but it seems to be a hardware issue. Although I sometimes  get VIDIOC_DQBUF and MIPI CLK errors; I can succesfully get the image with the below configuration. AR0140 sensor AP0101 ISP MAX96705 Serializer MAX9286 Deserializer Our designed daughter board between MAX9286 EVM and iMX6 board. We use kernel 4.1.15 and use below switch code: + max9271_write_reg(i, 0x20, 0x07); + max9271_write_reg(i, 0x21, 0x06); + max9271_write_reg(i, 0x22, 0x05); + max9271_write_reg(i, 0x23, 0x04); + max9271_write_reg(i, 0x24, 0x03); + max9271_write_reg(i, 0x25, 0x02); + max9271_write_reg(i, 0x26, 0x01); + max9271_write_reg(i, 0x27, 0x00); + + + max9271_write_reg(i, 0x30, 0x17); + max9271_write_reg(i, 0x31, 0x16); + max9271_write_reg(i, 0x32, 0x15); + max9271_write_reg(i, 0x33, 0x14); + max9271_write_reg(i, 0x34, 0x13); + max9271_write_reg(i, 0x35, 0x12); + max9271_write_reg(i, 0x36, 0x11); + max9271_write_reg(i, 0x37, 0x10); Thanks and best regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Ferhat, The camera I used doesn't need such switch, so no such code in patch, but I had show you the sample code, for detail setting on MAX96705 switch, you can check with Maxim. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, Could not find the switch code on patch files. Could you please update the links with your latest versions? Thanks and best regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi DONGON KIM, Some video combining chip can insert some bytes into each video line, then software can check these inserted data to identify the camera number. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The "0003-Add-Max9286-support-on-SabreAuto-board-which-can-sup.patch" files of the L3.14.38_GA andL3.14.52_GA patches have errors. +static int max9271_write_reg(int index, u8 reg, u8 val) +{ + s32 ret; + int retry, timeout = 10; + + max9286_data[0].i2c_client->addr = ADDR_MAX9271 + index; + for (retry = 0; retry < timeout; retry ++) { + ret = i2c_smbus_write_byte_data(max9286_data[0].i2c_client, reg, val); + if (val < 0) + msleep(5); + else + break; + } + + if (retry >= timeout) { + dev_info(&max9286_data[0].i2c_client->dev, + "%s:write reg error:reg=%2x,val=%2x\n", __func__, + reg, val); + return -1; + } + + return 0; +} Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thanks for your ans. Then, is there any example code for split the video from each virtual channel? If not, may I know how to read the raw packet data of mipi_csi? Thanks. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Ferhat, Yes, the switch code:  max9271_write_reg(0, 0x20, 0x09);  max9271_write_reg(0, 0x21, 0x08);  max9271_write_reg(0, 0x22, 0x07);  max9271_write_reg(0, 0x23, 0x06);  max9271_write_reg(0, 0x24, 0x05);  max9271_write_reg(0, 0x25, 0x04);  max9271_write_reg(0, 0x26, 0x03);  max9271_write_reg(0, 0x27, 0x02);  max9271_write_reg(0, 0x28, 0x01);  max9271_write_reg(0, 0x29, 0x00);  max9271_write_reg(0, 0x30, 0x19);  max9271_write_reg(0, 0x31, 0x18);  max9271_write_reg(0, 0x32, 0x17);  max9271_write_reg(0, 0x33, 0x16);  max9271_write_reg(0, 0x34, 0x15);  max9271_write_reg(0, 0x35, 0x14);  max9271_write_reg(0, 0x36, 0x13);  max9271_write_reg(0, 0x37, 0x12);  max9271_write_reg(0, 0x38, 0x11);  max9271_write_reg(0, 0x39, 0x10); Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang, Does the patch you provided include such swap settings on MAX96705? We use MAX96705 and do not do such swap by driver Thank you Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Ferhat, MAX9286's data mapping needs such MSB to LSB switch, if you are using MAX96705, it can do such swap by setting, but MAX9271 doesn't support it. And AP0101 doesn't dupport such swap too, so hardware should be modified. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Dongoh, The iMX8MQ can receive video with multiple virtual channels, but there is no hardware module to split the video from each virtual channel. That means you need use software to split, and the MIPI sender need insert some flag to identify the data for each virtual channel. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi, Qiang Li May I know the reason for i.MX8MQ can't support multiple virtual channel? According to the features and functional description of MIPI-CSI2 Controller on Reference Manual for i.MX8M Quad, i.MX8M seems to support multiple virtual channel.(13.6.1.1 and 13.6.3) Thanks. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Dear Qiang Li, I would like to know the reason of your hardware point stated as below. "2) AP0101's DOUT0~DOUT7 should be connected to MAX9271's DIN7~DIN0, the order should be switched, MSB connected to LSB" In our reference camera board supplied by Onsemi (MARS module) these pins are connected directly (DOUT0-DOUT7 to DIN0-DIN7). Is there any way to switch these connection by software? I could not find on datasheets of MAX96705 and AP0101. Thanks  Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP That means your patch porting has error, please check it. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Dear Qiang Li, we removed eeprom on the camera module and we switched it to host configuration mode by setting SPI-SDI pin to LOW. Thus it is initialized successfully by the driver of max9286 in the beginning, after kernel is loaded. Do you have any other suggestion for both "not a csi channel" and vidioc_dqbuf errors? Thank you, Best regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP “ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode” This log means your camera had already be initialized, so you need check if there is flash ROM on your camera module which will initialize it during power on, if so, you need update that flash ROM to use the driver's setting. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi again Qiang Li, As you can see in our logs, our camera is in shutter-sync mode, thus doesn't this means our camera setting is correct? What do you mean by camera setting, can you be more specific and explain it in detail?. Also MIPI_CSI_ERR1 register is 0, there is no error of transmission of bits, clock signal etc and mpi csi2 can receive the data correctly. Doesnot that mean that camera sends correct signals and is configured properly?  Secondly, we reviewed all patches and applied them directly by copy-paste, also we double checked whether there is an error; thus, we are (almost) sure that we ported correctly. What is the key points we need to look at? Can there be any other possible cause of this problem? Thank you, Best regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP For error "not a csi channel error", I think you haven't ported the patch successfully. For error "vidioc_dqbuf failed", that means no available video frames had been captured. Maybe you need check your AP0101 camera setting. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, In our project we have one camera connected to max9286 and we applied your patches to 4.1.15 kernel; however when we test it, we get the following picture: Logs are as follow: root@esomimx6q:~# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 400 -oh 240 -d 1 -x 0 [ 3144.243857] max9286_mipi: sensor number = 1. [ 3144.248939] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 148 Mbps [ 3144.257446] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x42. [ 3144.743416] max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. [ 3144.751541] max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. g_in_width = 1280, g_in_height = 720. fb_fix.id = DISP4 FG. fb: smem_start = 0x6a100000, smem_len = 0x8ca00. fb: frame buffer size = 0x2ee00 bytes. fb: g_screen_info.xres = 400, g_screen_info.yres = 240. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 400. fb: g_display_height = 240. start time = 1535715437 s, 436911 us [ 3154.993386] ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0 VIDIOC_DQBUF failed. We could not understand the reason of the problem (also we adjusted gpr1 pins 19 and 20 as 0).  Secondly, the following logs show us that there are problems with /dev/video 1 and dev/video3 about csi channel although dev/video0 and /dev/video2 is ok , however all of them have timeout error (note that since only one camera is connected, only "cat /dev/video0" command can initialize ap0101). root@esomimx6q:~# cat /dev/video0 [ 3313.913877] max9286_mipi: sensor number = 1. [ 3313.918963] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 148 Mbps [ 3313.926941] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x42. [ 3314.413402] max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. [ 3314.421469] max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. [ 3324.583392] ERROR: v4l2 capture: mxc_v4l_read timeout counter 0 cat: read error: Timer expired root@esomimx6q:~# cat /dev/video1 [ 3337.083393] ERROR: v4l2 capture: mxc_v4l_read timeout counter 0 [ 3337.089359] imx-ipuv3 2400000.ipu: Not a CSI channel cat: read error: Timer expired root@esomimx6q:~# cat /dev/video2 [ 3351.493394] ERROR: v4l2 capture: mxc_v4l_read timeout counter 0 cat: read error: Timer expired root@esomimx6q:~# cat /dev/video3 [ 3403.463393] ERROR: v4l2 capture: mxc_v4l_read timeout counter 0 [ 3403.469360] imx-ipuv3 2800000.ipu: Not a CSI channel cat: read error: Timer expired Can you help us with them? What is the reason of "not a csi channel error" on video1 and video3 while others don't give this error. Also the first error is more important, which is the error of "vidioc_dqbuf failed". Thank you Best regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP You can check with the AP0101 camera chip vendor. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li,   My problem is as bellow.Can you help me to deal with it. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thinks for your help! I have other problem with devicetree.Look at the picture,reg=6A,but max9286 datasheet is no this address. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The head file is in your rootfs which is built from Yocto. You can also use the binary "mxc_v4l2_tvin.out" directly. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li,   The test application file not contain "g2d.h",but  "mxc_v4l2_tvin.c" has the code #include "g2d.h".So,when I make it,it turn out error.   Can you help me solve the problem?   Think you! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP HI Qiang Li   When I use the "Patch",my kernel show error.My kernel vision is kernel-3.10.53.   So,I want to now what's the differance between the kernel-3.10.53 and L3.10.53_1.1.0-GA.   I think that the different vision make the error. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP From real test, the total delay is about 86ms. Camera number will not impact the delay, capture delay is fixed on camera fps, for example, 30fps camera input, the capture delay is 33ms. And render delay is fixed on display fps, for examlpe, 60Hz display, the delay is 17ms, then the post-process delay, it needs less than camera fps (33ms) to avoid frame lost. So for 8 camera case, you need make sure all the post process is less than 33ms to avoid frame drop. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Li Qiang       Thank you for your Patch.        Now,I have some trouble when I use "patch".        Can you write a manual to me so that I can understand how to use the "patch".        Thanks Sincerely.        Zhongmao Liu. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi. Qiang Li The four camera`s video can render on 1080P HDMI display.  How does the surround view algorithm get the four cameras`s capture buffers. do you have some good ideas? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li ! Is it possible for you to share "60-persistent-v4l.rules" file? It should be inside /lib/udev/rules.d Thank you very much Regards, Gokcen  Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi! Thank you for the reply. The resolution is 1280x720. So, I think that is not the problem. We are using kernel version 4.1.15.  May the following errors be related to that? [ 36.921793] v4l2_int_device wlcore_sdio mxc_dcic [ 36.926813] CPU: 3 PID: 399 Comm: v4l_id Not tainted 4.1.15 #1 [ 94.823493] udevd[215]: worker [230] /devices/soc0/v4l2_cap_1/video4linux/video1 is taking a long time [ 95.098316] udevd[230]: slow: 'v4l_id /dev/video1' [402] bootlogd: cannot allocate pseudo tty: No such file or directory Have a nice day! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP As I remembered, the blank from frame end to new frame is not enough for AP0101, so even the camera output resolution is 1280*800, we need capture just 1280*720, otherwise, the video capture will fail. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Lee, I have tried initializing MAX9286 in high immunity mode and now, ar140 is being found. However, I think there is something wrong with the v4l part. Here is the related log :  [ 34.085201] [ 34.086911] Internal error: Oops: 17 [#1] PREEMPT SMP ARM [ 34.092313] Modules linked in: wlcore mxc_v4l2_capture ipu_bg_overlay_sdc ipu_still ipu_prp_enc ipu_csi_enc max9286_gmsl ipu_fg_overlay_sdc v4l2_int_device wlcore_sdio mxc_dcic [ 34.108239] CPU: 3 PID: 402 Comm: v4l_id Not tainted 4.1.15 #1 [ 34.114078] Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree) [ 34.120628] task: d87b2ac0 ti: d8c78000 task.ti: d8c78000 [ 34.123891] max9286_mipi 1-006a: max9286_write_reg:write reg error:reg=3b,val=1e [ 34.133488] PC is at mxc_v4l_do_ioctl+0xc4c/0x2590 [mxc_v4l2_capture] [ 34.139979] LR is at mxc_v4l_do_ioctl+0xc3c/0x2590 [mxc_v4l2_capture] [ 34.146476] pc : [<7f08539c>] lr : [<7f08538c>] psr: 600e0013 [ 34.146476] sp : d8c79e40 ip : 00000074 fp : 00000000 [ 34.157991] r10: d88f9300 r9 : 7f034094 r8 : d8c79e90 [ 34.163245] r7 : 80685600 r6 : 00000000 r5 : d8d19008 r4 : d8d19000 [ 34.169792] r3 : 00000000 r2 : d8c79ea7 r1 : 7f087ae0 r0 : d8c79ec0 [ 34.176346] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user [ 34.183504] Control: 10c53c7d Table: 6939c04a DAC: 00000015 [ 34.189288] Process v4l_id (pid: 402, stack limit = 0xd8c78210) [ 34.195251] Stack: (0xd8c79e40 to 0xd8c7a000) [ 34.199652] 9e40: d88f9300 00000000 00000000 00000000 d8868550 d6023000 d80fe028 d8c41700 [ 34.207872] 9e60: 80b154c0 80685600 00000068 00000000 00000002 7ebeec88 d8c79e90 7f084750 [ 34.216090] 9e80: 00000000 804dbc10 d88f9300 800f6978 5f63786d 326c3476 00000000 00000000 [ 34.224327] 9ea0: 3978616d 00363832 00000000 00000000 00000000 00000000 00000000 00000000 [ 34.232540] 9ec0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 34.240757] 9ee0: 0004010f 85200005 05200005 00000000 00000000 00000000 9087e695 00000006 [ 34.248978] 9f00: d925f015 76f11000 00000000 d61505d8 d8ffa318 7ebeec88 d8ffa318 d88f9300 [ 34.253976] max9286_mipi: sensor number = 1. [ 34.254788] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 148 Mbps [ 34.254801] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x42. [ 34.276213] 9f20: 00000003 7ebeec88 d8c78000 00000000 00000000 800fa0e4 d8c79f40 800e3970 [ 34.284441] 9f40: 80b06720 00000003 d88f9300 d925f000 d8ffa318 d88f9308 00000020 00000000 [ 34.292668] 9f60: 00000000 800e91ac 00000000 00000000 d88f9300 00000003 d88f9300 80685600 [ 34.300888] 9f80: 7ebeec88 d8c78000 00000000 800fa338 00000000 7ebeee54 00000003 00000036 [ 34.309102] 9fa0: 8000f604 8000f480 00000000 7ebeee54 00000003 80685600 7ebeec88 00000001 [ 34.317312] 9fc0: 00000000 7ebeee54 00000003 00000036 00000000 00000000 76f11000 00000000 [ 34.325534] 9fe0: 76e6e2a0 7ebeec7c 00011cfc 76e6e2ac 600e0010 00000003 8112f040 0420f044 [ 34.333788] [<7f08539c>] (mxc_v4l_do_ioctl [mxc_v4l2_capture]) from [<804dbc10>] (video_usercopy+0x1b8/0x480) [ 34.343777] [<804dbc10>] (video_usercopy) from [<800fa0e4>] (do_vfs_ioctl+0x3e8/0x608) [ 34.351752] [<800fa0e4>] (do_vfs_ioctl) from [<800fa338>] (SyS_ioctl+0x34/0x5c) [ 34.359115] [<800fa338>] (SyS_ioctl) from [<8000f480>] (ret_fast_syscall+0x0/0x3c) [ 34.366711] Code: e5993008 e3071ae0 e2880030 e3471f08 (e5932018) [ 34.374557] ---[ end trace 756e286723ff907f ]--- [ 34.435645] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 34.531108] kjournald starting. Commit interval 5 seconds [ 34.549007] EXT4-fs (mmcblk1p2): recovery complete [ 34.553859] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) [ 34.591916] EXT3-fs (mmcblk0p2): using internal journal [ 34.597183] EXT3-fs (mmcblk0p2): recovery complete [ 34.601980] EXT3-fs (mmcblk0p2): mounted filesystem with ordered data mode [ 34.602407] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 34.644868] wlcore: loaded [ 34.733493] max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. [ 35.357742] ap0101_LastPatchStatus [ 35.812239] ap0101_LastPatchStatus [ 35.985973] ap0101_LastPatchStatus [ 36.194854] ap0101_LastPatchStatus [ 36.243936] ap0101_LastPatchStatus [ 36.392576] ap0101_LastPatchStatus [ 37.086270] max9286_mipi 1-006a: ap0101_InitSensor: AR0140 was found, index = 1. [ 94.823493] udevd[215]: worker [230] /devices/soc0/v4l2_cap_1/video4linux/video1 is taking a long time [ 95.098316] udevd[230]: slow: 'v4l_id /dev/video1' [402] bootlogd: cannot allocate pseudo tty: No such file or directory Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, We have tried with the following equipment :  ONSEMI MARS Reference Desşgn (MAX96705, AP0101, AR0140) 30 cm RG174 (and also 3 m coaxial cable) included in the reference design.  MAX9286S32V Daugter board is used to connect iMX6 board.  I have taken AP0101 to host configuration mode by removing flash. Despite I am writing 0x36 to MAX9286' s 34th register to disable local auto acknowledge, I observed that 9th bit coming immediately after 8th bit of SCL. I am attaching the oscilloscope view. The problematic bits are circled with red.  MAX9286 LFLT led is ON and LOCK led is  OFF.   Down below, we tried to read from AP0101 (address: 0x92).  If you have any suggestions it would be appreciated.  Regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi qiang, The 4 cameras can be: - 1xCSI, 3xMIPI - 2xCSI, 2xMIPI - 4xMIPI 可以解释一下上面的CSI和MIPI什么意思吗?不知道这个csi是指ipu内部的csi0-3 还是camera mipi总线。 Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, 1xCSI, 3xMIPI,  what does it meanning? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP I think you need check the signal quality on Coax between MAX9286 and MAX96705. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Lee! I am using ap0101 with max96705 and max9286 deserializer. I was able to establish connection with max9286 and max96705. However, while reading max96705 registers, I get the following error:  [ 21.113432] max9286_mipi 1-006a: max9271_read_reg:read reg error: reg=35 [ 21.120143] MAX9271 Reg 0x35 = 0xffffffff. [ 21.323460] max9286_mipi 1-006a: max9271_read_reg:read reg error: reg= a [ 21.330183] MAX9271 Reg 0x0a = 0xffffffff. [ 21.533474] max9286_mipi 1-006a: max9271_read_reg:read reg error: reg= b [ 21.540199] MAX9271 Reg 0x0b = 0xffffffff. [ 21.743480] max9286_mipi 1-006a: max9271_read_reg:read reg error: reg= c [ 21.750201] MAX9271 Reg 0x0c = 0xffffffff. Any help would be appreciated !  Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi qiang ,     I use the 'mx8_v4l2_cap_drm.out' test my board, but the test progress is stopped in the 'start_capturing' function. Finally , I found that it actually stopped in the 'ioctl(fd_v4l, VIDIOC_DQBUF, &buf)' function . And then , I test the four output singal of the max9286, Dout0~Dout3 are all have singal, and the clock I tested  is 295MHz,the input also have singal too. It seems that max9286 and sensors are all work well ,but there is nothing showed on my screen. It confused me for some days. Could you give some advieces to me ? Thanks.  The log is attached below. root@imx8mqevk:~# ./mx8_v4l2_cap_drm.out -cam 3 init_video_channel, /dev/video0 init 0 init_video_channel, /dev/video1 init 1 Open /dev/dri/card0 success num of fb:0 num of crtc:2 num of encoder:1 num of connector:1 num of modes = 1 num of encoders = 1 num of props = 2[ 21.059227] mxc-mipi-csi2 58227000.csi: width=1280, height=800, fmt.code=0x2011 modes[0] info:resolution=1024*600 pixels kms info: fb_base = 0[ 21.071187] input fmt YUV4 x789b3000 w/h=(1024,600) bits_per_pixel=4 bpp=32 screen_buf_s[ 21.079551] output fmt RGB4 ize =2457600 xres=1024, y_res=600 ch_id=0, w=512, h=300, x_offs[ 21.088947] mxc-isi 58100000.isi: input_size(800,1280), output_size(300,512) et=0, y_offset=0 ch_id=1, w=512, h=300, x_offset=512, y_offset=0[ 21.105981] mxc-mipi-csi2 58227000.csi: width=1280, height=800, fmt.code=0x2011 Try to open device /dev/video0 cap=0x84201000 index=0 pixelf[ 21.113602] input fmt YUV4 ormat (output by camera): RGBP index=1 pixelformat (output by c[ 21.121958] output fmt RGB4 amera): RGB3 index=2 pixelformat (output by camera): RGB4 inde[ 21.130400] mxc-isi 58110000.isi: input_size(800,1280), output_size(300,512) x=3 pixelformat (output by camera): BGR3 index=4 pixelformat (output by camera): BA24 index=5 pixelformat (output by camera)[ 21.150628] mxc-mipi-csi2 58227000.csi: width=1280, height=800, fmt.code=0x2011 : YUYV index=6 pixelformat (output by camera): YUV4 VIDIOC ENUM FMT failed, index=7 video_ch=0, width=512, height=300, pixelformat: RGB4 WxH@fps = 512x300@30 Image size = 614400 v4l_capture_setup, Open v4l_dev=0x4, channel=0 Try to open device /dev/video1 cap=0x84201000 index=0 pixelformat (output by camera): RGBP index=1 pixelformat (output by camera): RGB3 index=2 pixelformat (output by camera): RGB4 index=3 pixelformat (output by camera): BGR3 index=4 pixelformat (output by camera): BA24 index=5 pixelformat (output by camera): YUYV index=6 pixelformat (output by camera): YUV4 VIDIOC ENUM FMT failed, index=7 video_ch=1, width=512, height=300, pixelformat: RGB4 WxH@fps = 512x300@30 Image size = 614400 v4l_capture_setup, Open v4l_dev=0x5, channel=1 buffer[0] startAddr=0x7891d000, offset=0x0, buf_size=614400 buffer[1] startAddr=0x78887000, offset=0x96000, buf_size=614400 buffer[2] startAddr=0x787f1000, offset=0x12c000, buf_size=614400 buffer[0] startAddr=0x7875b000, offset=0x0, buf_size=614400 buffer[1] startAddr=0x786c5000, offset=0x96000, buf_size=614400 buffer[2] startAddr=0x7862f000, offset=0x12c000, buf_size=614400 start_capturing channel=0, v4l_dev=0x4 start_capturing channel=1, v4l_dev=0x5 Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP For iMX8M, it is not "mx8_v4l2_cap_xxx.c", it is mx6s_v4l2_cap_drm.c, you can find it from the L4.9.51 GA release for IMX8MQ. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang, It can't work. The error message is as below. Do you know which one is the correct executable for i.MX8M? Thanks. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP iMX8 has its own test application, you can find it from the yocto imx-test-xxx.tar.gz, test/mxc_v4l2_test/mx8_v4l2_cap_xxx.c Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi qiang,       I am porting the 360 surround view based on imx8qxp, and the kernel is 4.9.51,and the sensor is ap0101+AR0140,the other is max9286+max96705 . I port the driver from imx6q's driver to imx8 just like all right , because the mxa9286 and four ap0101 have been found successfully in the log. But when I use the imx6's test code 'mxc_v4l2_tvin.out ' ,there is a error just like 'no such files found '. I am not sure imx6's test code could be used in the imx8qxp, is there  any other test code just for imx8 ?? If yes ,could you  provide one demo for me ? Thanks a lot.    Best regards jun Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Jianfeng, Can you try the mxc_v4l2_tvin from "https://community.nxp.com/docs/DOC-335803", I haven't seen your issue. And you can also modify the mxc_v4l2_tvin.c source code, it can capture video data to file, then you can check the file on PC with some YUVPlayer to check if the captured data is correct or not. /*  char still_file[100] = "./still.yuv";  int fd_still = 0;  if ((fd_still = open(still_file, O_RDWR | O_CREAT | O_TRUNC, 0x0666)) < 0)  {   printf("Unable to create y frame recording file\n");  } */ ... ... //  if(i>100 && i<120) //   write(fd_still, capture_buffers[capture_buf.index].start, 720*240*2); ... ... // close(fd_still); Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi liqiang,    i use the imx6q instead of imx6d, but the problem still exits. now i have no idea to solve this problem. Is it an application problem or a kernel problem? please help,thank you ,anyway. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi liqiang,    Thank you for advice.  Maybe it is due to i use the imx6d ,not the imx6Q?? if i use the imx6D ,how can i make it right? tkank you very much for your help. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP You can reference to the mxc_v4l2_tvin in https://community.nxp.com/docs/DOC-335803 It had fixed some issues. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The hardware has pixel align requirement, you'd better let the width and height to align in 16 pixels. Another thing should be checked: the G2D will set frame buffer to RGB format, but without "-g2d", it will use IPU to render and it needs YUV format fb1. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi liqiang, two question about the test mxc_v4l2_tvin_max9286.tar,the screen resolution is 800x480 when i use the command "mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 800 -oh 480 -d 1 -x 0" ,the camera seem normal 1.when i use the command "mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 400 -oh 240 -d 1 -x 0"  the screen will scroll  2.when i use the command " mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 800 -oh 480 -d 1 -x 0 -g2d", the sreen show fliker  thank you very much .looking for you answer. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li, We know that IMX8 BSP has support for MAX9286, but it seems only for i.MX8Q. MAX9286 driver must work with MIPI CSI2 driver. In i.MX8Q device tree (fsl-imx8qm-mek.dts), we see it is linked with 'fsl,mxc-mipi-csi2' driver (drivers/media/platform/imx8/mxc-mipi-csi2.c). But in i.MX8M device tree, MIPI CSI2 driver is 'fsl,mxc-mipi-csi2_yav' (drivers/media/platform/imx8/mxc-mipi-csi2-yav.c). After comparing these two drivers, we found the major differences are the hardware manipulation and V4L2 media control pad initialization. Our questions are:   1. Does 'fsl,mxc-mipi-csi2' driver work on i.MX8M?   2. Otherwise, does the 'fsl,mxc-mipi-csi2_yav' driver support virtual channel well?   3. Furthermore, how to support virtual channel feature in 'fsl,mxc-mipi-csi2_yav' driver? (the i.MX8M reference manual does not have enough information for MIPI CSI2 virtual channel)? Thanks. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The camera we verified on iMX8 is MAX9271+OV10635, but if you are using the MAX96705, you can reference to this iMX6 patch, there is only some small modifications for MAX96705. Your failure means when MAX9286 try to access OV10635 with Coax cable (I2C signals are transfered on it), there is I2C access error, the I2C between MAX9286 and iMX8 has no error. There is is between MAX9286 and camera module. It is more like Coax signal issue. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang, We use the LI-USB30-OV10635-SER  connect to PC by usb 3.0,  the capture show normal on tools, We think the ov10635 modules is OK. max9286 driver load,  max9286 can access by I2C, I2C driver I think is OK. We doubt the configure of max9286 and max96705,Is this combination be worked on imx8x 4.9.51 version? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The I2C access issue is more like hardware issue, I think you need check your hardware. The default iMX8 BSP supports MAX9286 directly, no patch is needed. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang, I use max9286 and max96705+ov10635 on imx8x kernel version is 4.9.51, Does this version have patch? Use the default max9286 driver which exist in kernel  4.9.51 source code,It show some error when driver load。 It seems ov10635 Communication failure by I2C, But the max9286 is success use the same I2C access error log as below: [    2.525043] mxc-mipi-csi2 58227000.csi: mipi_csi2_probe [    2.549343] mxc-mipi-csi2 58227000.csi: lanes: 4, name: mxc-mipi-csi2.0 [    2.556705] max9286_mipi 0-006a: In max9286_hardware_preinit() [    2.854197] max9286_mipi: reg = 0xf0. [    2.857870] max9286_mipi: sensor number = 4. [    2.862158] max9286_mipi 0-006a: In max9286_hardware_init() [    2.893273] max9286_mipi: initialized sensor  = 0x01. [    2.921271] max9286_mipi: initialized sensor  = 0x02. [    2.949272] max9286_mipi: initialized sensor  = 0x03. [    2.977271] max9286_mipi: initialized sensor  = 0x04. [    3.145279] max9286_mipi 0-006a: ov10635_read_reg:read reg error: reg=0x300a. [    3.152433] max9286_mipi 0-006a: ov10635_check_device: OV10635 hasn't been found, reg[0x300a] = 0x0., index=1 [    3.321275] max9286_mipi 0-006a: ov10635_read_reg:read reg error: reg=0x300a. [    3.328419] max9286_mipi 0-006a: ov10635_check_device: OV10635 hasn't been found, reg[0x300a] = 0x0., index=2 [    3.497275] max9286_mipi 0-006a: ov10635_read_reg:read reg error: reg=0x300a. [    3.504421] max9286_mipi 0-006a: ov10635_check_device: OV10635 hasn't been found, reg[0x300a] = 0x0., index=3 [    3.673275] max9286_mipi 0-006a: ov10635_read_reg:read reg error: reg=0x300a. [    3.680420] max9286_mipi 0-006a: ov10635_check_device: OV10635 hasn't been found, reg[0x300a] = 0x0., index=4 [    4.752679] max9286_mipi 0-006a: max9286_mipi is found, name max9286_mipi 0-006a Could you help me which part error will lead to ov10635 access failure. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Chris, if they are two MIPI CSI2 cameras, you can't connect them to CPU directly. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang, This is great information!  In the event that you want to use 2 CSI2 cameras, do you know if it's possible to hook both cameras directly to the processor (how do you handle the 2 clk pairs from the two cameras?) of if you need to use a signal aggregator to combine the cameras into one interface? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The MAX9286 needs all camera working at frame sync mode and same timing, so the cameras should send out vsync at almost same time. If some camera is working at free run mode, there will be scroll issue, because MAX9286 can't sync them. You can measue the VSYNC for all cameras to check this.  Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP i used the patch L3.10.53_GA1.1.0_MAX9286_Surroundview_Patch_2015-12-04.zip , when i connect 2 camera , i can capture image correctly. but when i connect three cameras i can not get image correctly, the image scroll. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP I think you need check with Maxim for both the MAX9286 Programming Guider and the MAX9286 hardware schematics. From my point, the power supply to camera board with Coax cable is easy to cause such stable issue. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP it like the signle is not stable , 70% it can work succefully ,the  hard ware is designed according to the official schematic design.I am not sure where to check Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP would you please send the MAX9286 Programming Guide to me Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The Max9286 setting is from "MAX9286 Programming Guide", I think you need check your hardware, if the MAX9286 can't lock the camera signals, it will not output valid MIPI CSI2 signal, then on iMX6 side, it will show "mipi csi2 can not receive sensor clk". Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi li i use max9286 and max96705 i found the connect is not very stable, sometime i get "mipi csi2 can not receive sensor clk..." ,when i  git this error i fount all the config are success i use the patch L3.10.53_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip, in the patch i found you config max9286 register 0x3f 0x3b ,but i did not found any introduction about these register ? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP "ap0101_initialize:AP0101 is not in Host Configuration Mode" This log means the camera is not in I2C config mode, so we can't initialize it. You need check your camera board, if it has flash on board, then you need update the flash ROM setting with the driver's. You can also remove the flash ROM on camera board, then the MAX9286 driver can initialize it with I2C commands. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Lion, You need include blank data too. So use the pixel clock to calculate the throughput is more simple and accuracy. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang I also use ov10635, and use  the same sensor register values as in your patch the sensor output 1280*800@30fps with yuv422(uyvy,0x1e) per my understanding, the camera data rate should be 30M*16bits=480Mbps how to get the value of 768Mbps? and in function mipi_csi2_reset, it just sets register MIPI_CSI_PHY_TST_CTL1, from the name, it is just a test related register, is it useful for the mipi csi2 init? thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Lion Wei, the MAX throughput for IMX6 MIPI CSI2 is 3.2Gbps in 4 lanes mode, so each camera can be up to 800Mbps (include blank data). And the followed code should be adjust for your real camera, the 768 should be your real camera bps:  /* 48MHz pixel clock (1280*800@30fps) * 16 bits per pixel (YUV422) = 768Mbps mipi data rate for each camera */  mipi_csi2_reset(mipi_csi2_info, (768 * g_sensor_num) / (lanes + 1)); Anoter limitation, at least 3 blank lines are needed for two frames from camera. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang thanks for your help! after tune the ti settings, I can receive four camera data now. currently for 1/2/3 sensors, I can receive the data with correct pixels however for 4 sensors, the pixel data has some line corruptions(see the below picture) from TI side, we can set the data lane numbers and data lane rate however, the data lane rate has only three options(400M, 800M, 1.6G) with different rate+lane number setting, the 1/2/3 sensors can work perfectly for 4 sensors, only 800M+4 data lanes works, but the data has some corruptions my question is 1) for imx6 mipi csi2 receiver, is there any special requirement on the rate and data lanes setting? 2) for imx6 mipi csi, what is the suitable ratio between the real data rate and the total data capability? 2) any suggestions? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Mustafa, These packages are implemented by the MIPI CSI2 hardware, from software side, we just tell it the virtual channel number and Data Identifier (It can be found at include\linux\mipi_csi2.h). Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thank you for respond Qiang_FSL‌ I am now looking at the MIPI CSI2 Reference Documentation , I am checking all. Also I made search on the my imx6q(Wandboard Quad) custom board source and header files. After my research I could not find  relative source code in the my kernel files, which defines packet types and communication sub-structures for CSI-2 Interface Low Level Protocol message protocol , SoT and EoT package sample codes. I will take the video by using  "mxc" relative files and it's ipu source codes. So If you can share any source code or any relative codes which informs me about  SoT,EoT and LLP Massage Package Structures sample codes, It would be very nice and useful for me because I don't have any reference code in my kernel files.  Best Regards. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Lion, The MIPI CSI2 error registers can be used to check the MIPI CSI2 package is correct with CRC or follows the protocol. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Mustafa, the information can be found from MIPI CSI2 specification: Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi lionwei Qiang_FSL ; According to iMX6 CSI2IPU documentation we need to create  short or long type packages  and also we need Start Of Transmission and End Of Transmission packages too,  How can I send this packages for example in the camera device driver source this packages should be created and sent these data types or we are defining these values to another files . What is the format of SoT and EoT packages? Can someone give me any example about that, I have been working to solve the csi2 format mipi clock and data lane problem, I couldnt define to the iMX6Q processor custom board since 3 week. It would be very very appreciated. Best Regards Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang is there any way on imx6 to confirm the mipi data correct or not from mipi csi-2? for example some register show the status of the mipi csi-2, specially the virtual channel/frame size related Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Lion, no special modification is needed on iMX6 side, you should tune the Ti chip setting. As I know, some customer had already make the Ti 964 work on iMX6 platform, the main work is in Ti side, you should check with them. For iMX6, you just need make sure the four cameras is transfered on 4 MIPI virtual channel. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang I am using following hardwares for similiar surroundview implementation under linux 3.14.52 ov10635 <--> ds90ub913 <--> ov10635 <--> ds90ub913 <--> DS90ub964-q <-----> imx6q ov10635 <--> ds90ub913 <--> ov10635 <--> ds90ub913 <--> the driver patches are most the same as the one you provided and currently the mipi-csi2 can detect the pixclock successfully also the waves on the data lines of mipi-csi2 seems correctly however, I can not receive the camera_callback for camera 0-2, only can receive camera_callback of camera 3 I have read all the comments above, and can not find the similiar causes I have checked the following things 1) the MIPI_IPU1_MUX and MIPI_IPU2_MUX are set to 0 for mipi_csi 2) the register dumps: IPU1_CSI0_SENSE_CONF(0x2630000): 0x04008a00 IPU1_CSI1_SENSE_CONF(0x2638000): 0x04008a00 IPU2_CSI0_SENSE_CONF(0x2a30000): 0x04008a00 IPU2_CSI1_SENSE_CONF(0x2a38000): 0x04008a00 IPU1_IDMAC_CH_EN_1(0x2608004): 0x00000003 IPU1_IDMAC_CH_EN_2(0x2608008): 0x00000000 IPU2_IDMAC_CH_EN_1(0x2a08004): 0x00800003 IPU2_IDMAC_CH_EN_2(0x2a08008): 0x00000000 IPU1_IDMAC_CH_BUSY_1(0x2608100): 0x00000003 IPU2_IDMAC_CH_BUSY_1(0x2a08100): 0x00800002 IPU1_SMFC_MAP(0x2650000): 0x00000020 IPU2_SMFC_MAP(0x2a50000): 0x00000020 my questions are 1) are the smfc and idmac setting correct for these four cameras? 2) from the spec, it says ipu mipi should use non-gated mode, but mxc_v4l2_capture.c uses gated mode in mxc_v4l2_s_param which mode should I use(I have tried both modes, and neither of them works for me) 3) which case need me to set the hsync_pol, vsync_pol? 4) any suggestion to identify this issue? thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP That means your kernel is not aligned with the GPU libs in your rootfs. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang,       Have a nice holiday. I have some trouble with  my borad. We refer to the sabresd and max9286+max96705+ap 0101, and we used the 3.14.52 BSP.  Now our four camera are all working properly, but when I used '-g2d'  in the test command  there is a error just like 'Segmentation fault'. I think It may be  something wrong with  my GPU,but I don't kown how to deal with the problem. Could you give  some advices to me ?Thanks . Here is the log below.                    root@imx6qdlsolo:~# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 0 -x 0 ------------------------------here is AP0101-------------------------------- max9286_mipi: sensor number = 4. mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 594 Mbps mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x2e. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 2. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 3. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 4. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. g_in_width = 1280, g_in_height = 720. fb_fix.id = DISP4 BG. It is background screen, only full screen default format was supported. fb: smem_start = 0x25600000, smem_len = 0x546000. fb: frame buffer size = 0x1c2000 bytes. fb: g_screen_info.xres = 1280, g_screen_info.yres = 720. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 1280. fb: g_display_height = 720. start time = 1449238585 s, 124037 us ^CERROR: v4l2 capture: mxc_v4l_dqueue() interrupt received root@imx6qdlsolo:~# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 0 -x 0 -g2d ------------------------------here is AP0101-------------------------------- max9286_mipi: sensor number = 4. mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 594 Mbps mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x2e. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 2. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 3. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 4. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. g_in_width = 1280, g_in_height = 720. fb_fix.id = DISP4 BG. fb: smem_start = 0x25600000, smem_len = 0x546000. fb: frame buffer size = 0x1c2000 bytes. fb: g_screen_info.xres = 1280, g_screen_info.yres = 720. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 960. fb: g_display_height = 540. Segmentation fault      With my best regards  Jun Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Yu fe, This error means MAX9286 can't detect the cameras, you need check your hardware signal and power between MAX9286 and MAX96705. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi, Qiang Li my custom board is ref to saresd, max9286+max96705+ap010. my yocto version is 3.14.52, i  got message below after patched the kernel pr_info("max9286_mipi: sensor number = %d.\n", g_sensor_num); if (g_sensor_num == 0) { pr_err("%s: no camera connected.\n", __func__); return -1; } can you please give me some suggestion to find the program? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP When you used IPU for CSC on 1280*720 frames, the IPU loading is heavy, there is chance that IPU can't service the capture on time. To improve it, you need use IDMAC 0 and IDMAC 2, then all FIFO can be used: In ipu_common.c, function ipu_probe(), please make sure all CSI->MEM channels are set to high priority:  /* Set sync refresh channels and CSI->mem channel as high priority */ - ipu_idmac_write(ipu, 0x18800003L, IDMAC_CHA_PRI(0)); + ipu_idmac_write(ipu, 0x1880000FL, IDMAC_CHA_PRI(0)); Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP This file can be found from your rootfs. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hello Qiang, The attached tvin source code includes a local file #include "g2d.h".  However this file is not included in the archive.  Where do we get this file? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP 4 in 1 HD recorder resolved? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Brave, That error means there is no valid MIPI CSI2 signal to IMX6, from your log, it seems there is flash in your camera module, if so, the flash setting for the camera should be algined with the AP0101 setting in max9286.c, the camera should work in frame sync mode. On Max9286, there is a lock pin, only when the four cameras are working in frame sync mode and are locked by MAX9286, it will output valid MIPI CSI2 signal to iMX6. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Dear Qiang Li, could you please kindly take a look at following post and give me an insight ? Adding X11 Interlace Video Mode Support to Yocto  Thanks in Advance Anuradha Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The iMX6 SabreAuto board can only supply 5V power to MAX9286 board, so if you are using long Coax cable, there will be issue. You can rework your MAX9286 board, and supply 7~12V power to it. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP "MAX9296 + 4 96705 +4camera" the reference patch had already covered this, the sync setting is in camera and Maxim chip side. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang, How to sync the camera of the MAX9296 + 4 96705 +4camera?  We have 2 customer want to use the IMX.6 + MAX9268+ 4 MAX96705---camera. Could you suggest how to sync the camera? Thank you very much. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Li, Why do I need to set video format to 4 (UYVY) when using grecorder tool? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Qiang_FSL‌ now i try use h.264, ./mxc_vpu_test.out -E "-x 0 -f 0 -c 1800 -a 30 -w 1280 -h 792 -o ss.mp4 -l 0 -b 5204" when i try to play ss.mp4 on PC i can't play it normally, like the mp4 file has no header, how to create a mp4 file when use H.264 recoder video data? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi, Li now i try to use VPU to encode the camera data, i use MJPEG, i do not want to use other standed (H263 H264), the the file is a too large, 100 frames will make a file about 11M. how to reduce MJPEG file? thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Dear Qiang! I am using MAX9286+OV10635+MAX9271. I have tested 3.10.53patch and 3.14.52patch, but both of them are not work. When I ran "/mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 1 -x 0 -g2d &". I got the same errors, like this [ 2027.062578] max9286_mipi 0-0048: max9286_write_reg reg = 0x15, val = 0x13. [ 2027.070238] max9286_mipi 0-0048: max9286_write_reg reg = 0xe, val = 0x5f. root@wandboard-quad:/usr/src# [ 2027.093488] max9286_mipi 0-0048: max9286_write_reg reg = 0x3f, val = 0x4f. [ 2027.113488] max9286_mipi 0-0048: max9286_write_reg reg = 0x3b, val = 0x1e. [ 2027.332778] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 4,val=43 [ 2027.552770] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 8,val= 1 [ 2027.573473] max9286_mipi 0-0048: max9286_write_reg reg = 0x3b, val = 0x19. [ 2027.593452] max9286_mipi 0-0048: max9286_write_reg reg = 0x12, val = 0xf3. [ 2027.601029] max9286_mipi 0-0048: max9286_write_reg reg = 0x1, val = 0x2. [ 2027.713713] max9286_mipi: sensor number = 1. [ 2027.718679] max9286_mipi 0-0048: max9286_write_reg reg = 0xe, val = 0x50. [ 2027.728809] max9286_mipi 0-0048: max9286_write_reg reg = 0xb, val = 0xe1. [ 2027.735691] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 192 Mbps [ 2027.744033] mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x44. [ 2027.751624] max9286_mipi 0-0048: max9286_write_reg reg = 0x0, val = 0xe2. [ 2027.760490] max9286_mipi 0-0048: max9286_write_reg reg = 0xa, val = 0x22. [ 2027.962765] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 0,val= 4 [ 2028.182767] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 7,val=84 [ 2028.402761] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 1,val=90 [ 2028.602752] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 9,val=c4 [ 2028.802767] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= a,val=c0 [ 2029.002791] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= b,val= a [ 2029.202766] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= c,val= 4 [ 2029.223462] max9286_mipi 0-0048: max9286_write_reg reg = 0xa, val = 0x22. [ 2029.230955] max9286_mipi 0-0048: max9286_write_reg reg = 0xa, val = 0xff. [ 2029.432766] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 4,val=43 [ 2029.441134] max9286 reg 0x0A = 0xff. [ 2029.447266] max9286_mipi 0-0048: max9286_write_reg reg = 0x34, val = 0x36. [ 2029.652766] max9286_mipi 0-0048: max9271_read_reg:read reg error: reg= 4 [ 2029.659488] max9271 reg 0x04 = 0xffffffff. [ 2029.862766] max9286_mipi 0-0048: max9271_read_reg:read reg error: reg= 4 [ 2029.869489] max9271 reg 0x04 = 0xffffffff. [ 2030.072766] max9286_mipi 0-0048: max9271_read_reg:read reg error: reg= 4 [ 2030.079487] max9271 reg 0x04 = 0xffffffff. [ 2030.282776] max9286_mipi 0-0048: max9271_read_reg:read reg error: reg= 4 [ 2030.289497] max9271 reg 0x04 = 0xffffffff. [ 2030.492792] max9286_mipi 0-0048: ov10635_read_reg:read reg error: reg=0x300a. [ 2030.499957] max9286_mipi 0-0048: ov10635_check_device: OV10635 hasn't been found, reg[0x300a] = 0x0. [ 2030.510196] max9286_mipi 0-0048: max9286_write_reg reg = 0x34, val = 0xb6. [ 2030.712770] max9286_mipi 0-0048: max9271_write_reg:write reg error:reg= 4,val=83 [ 2030.823490] max9286_mipi 0-0048: max9286_write_reg reg = 0x15, val = 0x9b. [ 2031.442763] mipi csi2 can not receive sensor clk! MIPI_CSI_PHY_STATE = 0x200. g_in_width = 1280, g_in_height = 800. fb_fix.id = DISP3 FG. fb: smem_start = 0x40800000, smem_len = 0xa8c000. fb: frame buffer size = 0x384000 bytes. fb: g_screen_info.xres = 1280, g_screen_info.yres = 720. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 960. fb: g_display_height = 540. start time = 1499055466 s, 40751 us [ 2041.482836] ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0 VIDIOC_DQBUF failed. It shows that can't find OV10635 and MAX9271. If there are something wrong with I2C drivers? I can confirm my hardware board is OK, because I am using the "MAX9286 COAX EVKIT" board. Could you help me? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP 3.14.52 BSP release has this tool. For other release, it is same as normal camera recode. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP where can i get grecorder-1.0 Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP VPU performance is not enough for 4x720P30 recoder. For one camera: grecorder-1.0 --camera_id 0 --video_format 4 --width1280 --height 720 --fps 30 Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi li How to use gstreamer record the four channel camera data? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thanks for your reply. where should i change the ipu driver code?like csi_enc_setup in ipu_csi_enc.c ,and  camera_callback in mxc_v4l2_capture.c Could you please describe in more detail? thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP You can alloc a big buffer array for V4l2 capture driver with 2560*1440 pixel buffers: For camera 1, let its DMA buffer base address to pixel (0, 0), width 1280, height 720, but set the stride to 1280*2*2; then after filled 1280 pixels (1280*2 bytes for UYVY input), it will jump 1280*2*2 bytes; so camera 1 will fill the left-up 1280*720 pixels of the buffer; For camera 2, let its DMA buffer base address to pixel (1280, 0), width 1280, height 720, but set the stride to 1280*2*2; then after filled 1280 pixels (1280*2 bytes for UYVY input), it will jump 1280*2*2 bytes; so camera 2 will fill the right-up 1280*720 pixels of the buffer;  For camera 3, let its DMA buffer base address to pixel (0, 720), width 1280, height 720, but set the stride to 1280*2*2; then after filled 1280 pixels (1280*2 bytes for UYVY input), it will jump 1280*2*2 bytes; so camera 3 will fill the left-down 1280*720 pixels of the buffer;  For camera 4, let its DMA buffer base address to pixel (1280, 720), width 1280, height 720, but set the stride to 1280*2*2; then after filled 1280 pixels (1280*2 bytes for UYVY input), it will jump 1280*2*2 bytes; so camera 4 will fill the right-down 1280*720 pixels of the buffer. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Qiang_FSL‌  @zhang hongliang  i want to put the four Independent camera data together in the ipu driver like one of below image , so then user can just use once DQBUF call to get all the four camera data. Any suggestions? or Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Please check with your S32V contact window for that, here is just for IMX6. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP I think you still need check and tuning your ISX016 camera setting, the reference code is for AP0101+AR0140 camera board. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thank you for your reply, the camera is working in sync mode. sometime i can connect two camrea successfully: max9286_mipi: sensor number = 2. mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 336 Mbps mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x2a. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 2. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. but when i try to get image,the image is not  normal, the clock configure is not right? g_sensor_num = 2  lanes = 3 mipi_csi2_reset(mipi_csi2_info, (672* g_sensor_num) / (lanes + 1)); Qiang_FSL‌ Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP I think your cameras are not working in sync mode. They should work in such mode: MAX9286 send a pulse to each camera, then each camera send out one frame. The VSYNC for each camera should appear in almost same time. If MAX9286 can't sync the multi-cameras, it will not output MIPI signals. But for single camera, no sync was needed. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP now i use BSP 3.10.53, max9286+max96707+ISX016 when connest one camera i can get image successfully,but when i connect tow cameras i always get mipi csi2 can not receive sensor clk! MIPI_CSI_PHY_STATE = 0x6f0. i have patched L3.10.53_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip my code :  max9271_write_reg(0, 0x40, 0x2F);  msleep(2);  max9271_write_reg(0, 0x97, 0x5F); ....  max9286_write_reg(0x01, 0x00);  max9286_write_reg(0x63, 0x00);  max9286_write_reg(0x64, 0x00);  max9286_write_reg(0x06, 0x00);  max9286_write_reg(0x07, 0x00);  max9286_write_reg(0x08, 0x26); ... mipi_csi2_reset(mipi_csi2_info, (576 * g_sensor_num) / (lanes + 1)); i have refer Debug steps for customer MIPI sensor.docx. my doubt is how to  confirm hsp_clk  and  ccm_pixel_clkm and where to configure hsp_clk  and  ccm_pixel_clkm? another question is about MAX9286 (FSYN CLOCKED in register 0x31 ) when i read it it is 0x0, if the two camera can not get FSYNC LOCKED, this will lead to can not receive sensor clk??? how to fix this? thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thanks. The problem has been resoved. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Reference to MIPI specification, the YUV422 data transferred on MIPI CSI2 is UYVY, no YUYV, so in max9286_mipi.c, we have the followed code: max9286_data[0].pix.pixelformat = V4L2_PIX_FMT_UYVY; if (sensor->pix.pixelformat == V4L2_PIX_FMT_UYVY) { for (i=0; i mipi_csi2_set_datatype(mipi_csi2_info, i, MIPI_DT_YUV422); If your camera can only be YUYV format, you should change the max9286_mipi.c as followed: max9286_data[0].pix.pixelformat = V4L2_PIX_FMT_YUYV; if (sensor->pix.pixelformat == V4L2_PIX_FMT_YUYV) { for (i=0; i mipi_csi2_set_datatype(mipi_csi2_info, i, MIPI_DT_YUV422); Note: MIPI_DT_YUV422 can't be changed, it is defined by MIPI CSI2 specification for UYVY, there is no MIPI data type for YUYV. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The patch had already show you the reference code to set the GPR register in file arch/arm/mach-imx/mach-imx6q.c. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP You need check your kernel boot up log to confirm there is no other V4l2 capture driver used video0. You can also use command "ls /dev/video*" to list all video device in your system. And register IOMUXC_GPR1 (0x020E0004) should also be checked, bit 20 and bit 19 must be 0. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP (1) Onsemi AR0140+AP0101+MAX9271 boards. We got this board from Onsemi. (2) OmniVision OV10635+MAX9271 boards. This board is made by Maxim, you can check with them. And as I know AVNET China team had also built some camera boards for both AR0140 and OV10635. "http://entroninc.com/" had also built camera boards for this solution. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP I want to get your Test camera board      (1) Onsemi AR0140+AP0101+MAX9271 boards.     (2) OmniVision OV10635+MAX9271 boards. where can I get them? Could you please recommend  Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Li, when i build BSP L3.14.52.1.1,i got some error, please give some help,thanks bitback fsl-image-gui Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Thanks for your reply. There is no flash ROM on OV10635 board. Follow are the wave of FSIN,HRFE and VSYNC. I think the issure in the OV10635 register setting, My OV10635 is producted in 2014, did you test the patch on the 2014 version chip and have the correct register setting?  Coment:yellow is FSIN, blue is VSYNC. Coment:yellow is HREF, blue is VSYNC. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang,      The patch of HD 720p sound view we have tested on I.MX6qp-sabreauto .But  now our board designed based on I.mx6qsabresd and BSP version is L3.14.52 for imx6qsabresd. So ,my question is  can you send us the patch for L3.14.52 of  imx6qsabresd ? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Winter, did you measure the correct pin? The HREF is the HSYNC signal, it is for line, so it will not be 30fps. I think you need check your OV10635 setting, if it is initialized by on board flash ROM, not from the MAX9286 driver, you should update your flash ROM setting. The VSYNC should align with the FSIN signal, this signal is from MAX9271's GPO. One FSIN, one VSYNC. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi~Li Qiang!       Thank you for your Patch~       I use your patch for my camera OV10635 board,  it is not work. I found  the VSYNC of the OV10635  is discontinuous,the HREF is ok and looks about 30fps.  Can you paste your VSYNC wave here? Thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP The camera sensor AR0140 should connect to ISP AP0101, then AP0101 should connected to MAX9271 to output the serial signal. And I think, without AP0101, the AR0140 can't work in the solution. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi  Li Qiang:                     have change the config,But i find i your code only  have AP0101,not have AR0140,i run the board,like this: Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Please read the readme file again, it had already told you where to select the camera sensor. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi  Li qiang:                       i find my sensor is AR0140,not OV10635,Where I need to change?thank you Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Haifeng, yes the MAX9286 board was powered from iMX6 board with 5V power, and the OV10635 camera boards can also be powered from iMX6 boards's 5V, but there is another power connector on MAX9286 board which can be used to power the 4xOV10635 camera board, you can connect 12V power to it and select the jump on MAX9286 boards. So the final power: 5V from iMX6 board to MAX9286 board; 12V from MAX9286 board's power connector to OV10635 camera boards. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP hi  qiang li:                  i use the MAX9286 board,i find the max9286 board supply by 5V, my max9286board supply by maxim,they designed for I.mx6. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP These setting are used in mxc_mipi_csi2.c and mxc_v4l2_capture.c, you can modify the code directly. By the way, I think you should not compare the patched 3.10.53 files with 3.0.35 files, you can manually modify the 3.0.35 files directly, based on the code modification in patches. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP inux_3.10.35/arch/arm/boot/dts/imx6q-sabreauto.dts  中     &mipi_csi { status = "okay"; lanes = <4>; mipi-csi2-channel@0 { ipu_id = <0>; csi_id = <0>; v_channel = <0>; status = "okay"; }; mipi-csi2-channel@1 { ipu_id = <0>; csi_id = <1>; v_channel = <1>; status = "okay"; }; mipi-csi2-channel@2 { ipu_id = <1>; csi_id = <0>; v_channel = <2>; status = "okay"; }; mipi-csi2-channel@3 { ipu_id = <1>; csi_id = <1>; v_channel = <3>; status = "okay"; }; }; 这一段在3.0.35中怎么处理? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Jin, if you supply the camera board with 5V power and using long Coax cable, there is chance to get such issue. The OV10635 camera board is designed for 7~12V power supply, so you can supply the camera board with 12V power. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP dear Qiang Li:                              have you try on the imx6q-sabreauto board? i can not use the max9286 on sabreauto board,it is some error: 1 -x 0 -g2d &lo:/unit_tests# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d [1] 845 root@imx6qdlsolo:/unit_tests# max9286_mipi: sensor number = 1. mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 192 Mbps mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x44. max9286_mipi 1-006a: ov10635_read_reg:read reg error: reg=0x300a. max9286_mipi 1-006a: ov10635_check_device: OV10635 hasn't been found, reg[0x300a] = 0x0. mipi csi2 can not receive sensor clk! MIPI_CSI_PHY_STATE = 0x6f0. g_in_width = 1280, g_in_height = 800. fb_fix.id = DISP4 FG. fb: smem_start = 0x73600000, smem_len = 0x480000. fb: frame buffer size = 0x180000 bytes. fb: g_screen_info.xres = 1024, g_screen_info.yres = 768. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 960. fb: g_display_height = 540. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP You can link the libg2d.so to libg2d.so.0.8. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP dear Qiang Li:                       i have use the L3.14.52,it is some error use the binary in mxc_v4l2_tvin_max9286.tar.gz which yours,the log : ./mxc_v4l2_tvin.out: error while loading shared libraries: libg2d.so.0.8: cannot open shared object file: No such file or directory Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP There is binary file in mxc_v4l2_tvin_max9286.tar.gz, you can use it directly. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li                  i use de 3.14.52,all patch used,but i have not use,mxc_v4l2_tvin_max9286.tar.gz,in the rootfs,i use unit_tests/mxc_v4l2_tvin.out ,it is nothing to display,can you help me?in the 3.14.52 yocto ,i can not complie the mxc_v4l2_tvin_max9286.tar.gz ,it is something wrong Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP After commented out adv7180, it became OK. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li I see. the adv7180 should be commented out in imx6qdl-sabreauto.dtsi file. Thank you! ZongbiaoLiao Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP From your log "g_in_width = 720, g_in_height = 624", I think the IPU0 CSI0 port hasn't been used by the MAX9286, it is still combined with adv7180. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li The log is as bellow: --------------------------------------- root@imx6qsabreauto:/unit_tests# ./max9286.sh root@imx6qsabreauto:/unit_tests# g_in_width = 1280, g_in_height = 800. fb_fix.id = DISP3 FG. g_in_width = 1280, g_in_height = 800. g_in_width = 1280, g_in_height = 800. fb: smem_start = 0x72c00000, smem_len = 0xbdd800. fb_fix.id = DISP3 FG. fb: frame buffer size = 0x3f4800 bytes. fb: g_screen_info.xres = 1920, g_screen_info.yres = 1080. fb: g_display_left = 960. fb: g_display_top = 0. fb: g_display_width = 960. fb: g_display_height = 540. fb: smem_start = 0x72c00000, smem_len = 0xbdd800. start time = 1457509993 s, 697691 us fb: frame buffer size = 0x3f4800 bytes. fb: g_screen_info.xres = 1920, g_screen_info.yres = 1080. fb: g_display_left = 0. fb: g_display_top = 540. fb_fix.id = DISP3 FG. fb: g_display_width = 960. fb: g_display_height = 540. fb: smem_start = 0x72c00000, smem_len = 0xbdd800. fb: frame buffer size = 0x3f4800 bytes. fb: g_screen_info.xres = 1920, g_screen_info.yres = 1080. fb: g_display_left = 960. fb: g_display_top = 540. fb: g_display_width = 960. fb: g_display_height = 540. start time = 1457509993 s, 717597 us start time = 1457509993 s, 717698 us g_in_width = 720, g_in_height = 624. fb_fix.id = DISP3 FG. fb: smem_start = 0x72c00000, smem_len = 0xbdd800. fb: frame buffer size = 0x3f4800 bytes. fb: g_screen_info.xres = 1920, g_screen_info.yres = 1080. fb: g_display_left = 0. fb: g_display_top = 0. fb: g_display_width = 960. fb: g_display_height = 540. start time = 1457509994 s, 45827 us ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0 VIDIOC_DQBUF failed. ------------------------------------------------------ and what the HDMI display showed is as bellow: The first camera shows nothing and after several seconds the 'ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0' is output, all other three cameras also stop and show nothing. Thank you! ZongbiaoLiao Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP What's the error log? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi, Qiang Li I selected MAX9271. My problem is three cameras work except the first one. Thank you! ZongbiaoLiao Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP You need select MAX96705 or MAX9271 in the kernel config, if it is different with your hardware, it will not work. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi Qiang Li Thank you for releasing patch for L3.14.52_GA1.1.0. I have tested the patch,but  I met  a problem. The first camera(mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 1 -x 0 -g2d &) does not show anything, and after several seconds, error 'VIDIOC_DQBUF failed' happened,all other three cameras also stopped. Then I tested patch for 3.10.53,all cameras have no problem. Could you help me? Thank you! ZongbiaoLiao Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP We have no plan to back porting the driver to 3.0.35 BSP, please do it by yourself. Thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP Hi~Li Qiang!       Thank you for your Patch~        But our cpu is IMX6Q-Sabresd, Camera is Ov10635. LTIB is L3.0.35_4.1.0        Can you help me support this Patch ?        Thanks Sincerely~~ Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> FRSYNC/GPI does not need to be connected to iMX6, and CSI0_MCLK is not used. All working mode settings are between MAX9286 and camera, so you need to confirm with Maxim about the specific connection settings between MAX9286 and Camera (AP0101). For iMX6, you only need to connect the data and clock of MIPI CSI2. If the working mode of MAX9286 and Camera is not correct, the data coming from MIPI will be abnormal. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Thank you very much. The problem of video0 not displaying has been solved. Now there is another problem, that is, the YUV data obtained through the mxc_v4l2_tvin_max9286 process is always reversed. For example, I set g_in_fmt = V4L2_PIX_FMT_UYVY in my application, and the data viewed in capture_buffers is actually YUYV. If g_in_fmt = V4L2_PIX_FMT_YUYV, the data viewed in capture_buffers is actually UYVY. I configured the CSI data format YUYV and UYUV by changing CSI0_SENS_DATA_FORMAT, but it didn't work. Is this modification correct? What causes this problem? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Boss, didn't you adjust it on version 3.0.35 before? Please share with us. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Supplement: The sensor I use is ov490 (isp) + ov10640 (sensor), and the data format output by the sensor is YUV422---YUYV. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> @Qiang Li - Mpu Se Hello! Thanks for your reply! First of all, the high and low data lines from the camera to the MAX96705 are indeed reversed, but we only connected 8 data lines instead of 10. The picture shown above is the image after the data lines are reversed. The specific settings are as follows: max9271_write_reg(i, 0x20, 0x07); max9271_write_reg(i, 0x21, 0x06); max9271_write_reg(i, 0x22, 0x05); max9271_write_reg(i, 0x23, 0x04); max9271_write_reg(i, 0x24, 0x03); max9271_write_reg(i, 0x25, 0x02); max9271_write_reg(i, 0x26, 0x01); max9271_write_reg(i, 0x27, 0x00); max9271_write_reg(i, 0x30, 0x17); max9271_write_reg(i, 0x31, 0x16); max9271_write_reg(i, 0x32, 0x15); max9271_write_reg(i, 0x33, 0x14); max9271_write_reg(i, 0x34, 0x13); max9271_write_reg(i, 0x35, 0x12); max9271_write_reg(i, 0x36, 0x11); max9271_write_reg(i, 0x37, 0x10); Then we changed it according to your settings, and after that the image lost more outline details. Could there be some other factor causing this? Thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi, our current board is IMX6QP+MAX9286+MAX96705+AP0101AT+AR0143AT , and the kernel version is L4.1.15. AP0101 is equipped with a flash and uses the firmware provided by the supplier. The video format is: YUV422 8bit/LSB. It has been confirmed that the video data output by the ISP is normal. Currently only one camera module is connected for debugging. After applying the patch you provided, the following prompt appears: root@imx6qp-avm718:/unit_tests# ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 0 -x 0 In MVC: mxc_v4l_open device name is Mxc Camera End of mxc_v4l_open: v2f pix widthxheight 288 x 352 End of mxc_v4l_open: crop_bounds widthxheight 1280 x 720 End of mxc_v4l_open: crop_defrect widthxheight 1280 x 720 End of mxc_v4l_open: crop_current widthxheight 1280 x 720 On Open: Input to ipu size is 1280 x 720 max9286_mipi: sensor number = 1. mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: mipi_lane_bps = 148 Mbps mxc_mipi_csi2 21dc000.mipi_csi: mipi_csi2_reset: value = 0x42. max9286_mipi 1-006a: ap0101_initialize: AP0101 was found, index = 1. max9286_mipi 1-006a: ap0101_initialize:AP0101 is already in Slave (Shutter-Sync) Mode. In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl 80685600 case VIDIOC_QUERYCAP In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c0045627 case VIDIOC_S_INPUT In MVC:mxc_streamoff In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c02c563a case VIDIOC_CROPCAP In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c0cc5616 case VIDIOC_S_PARM In mxc_v4l2_s_param Current capabilities are 0 Current capturemode is 0 change to 0 Current framerate is 30 change to 0 clock_curr=mclk=27000000 g_fmt_cap returns widthxheight of input as 1280 x 720 In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c0cc5605 case VIDIOC_S_FMT In MVC: mxc_v4l2_s_fmt type=V4L2_BUF_TYPE_VIDEO_CAPTURE End of mxc_v4l2_s_fmt: v2f pix widthxheight 1280 x 720 End of mxc_v4l2_s_fmt: crop_bounds widthxheight 1280 x 720 End of mxc_v4l2_s_fmt: crop_defrect widthxheight 1280 x 720 End of mxc_v4l2_s_fmt: crop_current widthxheight 1280 x 720 In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c0cc5604 case VIDIOC_G_FMT In MVC: mxc_v4l2_g_fmt type=1 type is V4L2_BUF_TYPE_VIDEO_CAPTURE End of mxc_v4l2_g_fmt: v2f pix widthxheight 1280 x 720 End of mxc_v4l2_g_fmt: crop_bounds widthxheight 1280 x 720 End of mxc_v4l2_g_fmt: crop_defrect widthxheight 1280 x 720 End of mxc_v4l2_g_fmt: crop_current widthxheight 1280 x 720 g_in_width = 1280, g_in_height = In MVC:mxc_v4l_ioctl 720. In MVC: mxc_v4l_do_ioctl c0145608 case VIDIOC_REQBUFS In MVC:mxc_streamoff MVC: In mxc_free_frame_buf In MVC:mxc_allocate_frame_buf - size=1843200 fb_fix.id = DISP3 BG - DI1. It is background screen, only full screen default format was supported. fb: smem_start = 0x73500000, smemIn MVC:mxc_v4l_ioctl _len = 0xbdd800. fb: frame buffIn MVC: mxc_v4l_do_ioctl c0445609 er size = 0x3f4800 bytes. fb: g case VIDIOC_QUERYBUF _screen_info.xres = 1920, g_screeIn MVC:mxc_v4l2_buffer_status n_info.yres = 1080. fb: g_displIn MVC:mxc_mmap ay_left = 0. fb: g_display_top pgoff=0x72d00, start=0x75e00000, end=0x75fc2000 = 0. fb: g_display_width = 1920In MVC:mxc_v4l_ioctl . In MVC: mxc_v4l_do_ioctl c0445609 case VIDIOC_QUERYBUF In MVC:mxc_v4l2_buffer_status In MVC:mxc_mmap pgoff=0x72f00, start=0x75c3e000, end=0x75e00000 In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c0445609 case VIDIOC_QUERYBUF In MVC:mxc_v4l2_buffer_status In MVC:mxc_mmap pgoff=0x73100, start=0x75a7c000, end=0x75c3e000 In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c0445609 case VIDIOC_QUERYBUF In MVC:mxc_v4l2_buffer_status In MVC:mxc_mmap pgoff=0x73300, start=0x758ba000, end=0x75a7c000 In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c044560f case VIDIOC_QBUF In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c044560f case VIDIOC_QBUF In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c044560f case VIDIOC_QBUF In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl c044560f case VIDIOC_QBUF In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl 40045612 case VIDIOC_STREAMON In MVC:mxc_streamon IPU:In csi_enc_enabling_tasks In csi_enc_setup start time = 1540834851 s, 23859 In MVC:mxc_v4l_ioctl us In MVC: mxc_v4l_do_ioctl c0445611 case VIDIOC_DQBUF In MVC:mxc_v4l_dqueue ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0 VIDIOC_DQBUF failed. In MVC:mxc_v4l_ioctl In MVC: mxc_v4l_do_ioctl 40045613 case VIDIOC_STREAMOFF In MVC:mxc_streamoff CSI_MEM0:fffffc0,CIS_MEM1:10ffffc1,CSI_MEM2:11ffffc2,CSI_MEM3:12ffffc3,CSI_PRP_ENC_MEM:13ffffd4,CSI_PRP_VF_MEM:14ffffd5 channel:fffffc0 In MVC:mxc_free_frames In MVC:mxc_v4l_close In MVC:mxc_streamoff mxc_v4l_close: release resource MVC: In mxc_free_frame_buf In MVC:mxc_free_frames It seems that the video data is not obtained. I measured the output of MAX9286 mipi, where the mipi clk is 72MHz, and the waveform on the data pin is as follows; I considered the problem of the data pins of AP0101 and MAX96705 being misaligned or reversed, but from other people's previous experience, if the data pins are misaligned, the video can be seen, but the video picture is abnormal, and VIDIOC_DQBUF failed will not appear; Could you please provide some debugging tips? Thanks! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> I want to compress four cameras into one 720p video in up, down, left, and right format for storage. How can I integrate the four videos? Do you have any suggestions? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> ferhatolgun ‌Hello, have you solved your problem? I am facing the same problem as yours. If you have solved it, could you let me know? Thank you! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Our image was called out in version 3.0.35. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi, I reversed the polarity of VS, and then added the code you provided, and now the picture appears, thank you! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Thank you very much for your reply. Bit 19 is 1 and it is ok now. The CSI0_SENS_DATA_FORMAT configuration of CSI data format YUYV and UYUV did not work. Is this modification correct? What causes this problem? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi Pengtao, AP0101 needs to be set to Frame Sync mode instead of the default Free Run mode. In Free Run mode, you will see your phenomenon: a single camera is OK, but multiple cameras are not. If your camera settings are in the flash ROM, then these settings need to be modified according to the driver. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> This should be the high and low data lines from the camera to the MAX96705 are reversed. They can be reversed when setting 96705 (italic part): #ifdef MAX96705 //Invert VSYNC max9271_write_reg(0, 0x40, 0x2F); msleep(2); max9271_write_reg(0, 0x08, 0x81); msleep(2);  max9271_write_reg(0, 0x97, 0x5F);  max9271_write_reg(0, 0x20, 0x09);  max9271_write_reg(0, 0x21, 0x08);  max9271_write_reg(0, 0x22, 0x07);  max9271_write_reg(0, 0x23, 0x06);  max9271_write_reg(0, 0x24, 0x05);  max9271_write_reg(0, 0x25, 0x04);  max9271_write_reg(0, 0x26, 0x03);  max9271_write_reg(0, 0x27, 0x02);  max9271_write_reg(0, 0x28, 0x01);  max9271_write_reg(0, 0x29, 0x00);  max9271_write_reg(0, 0x30, 0x19);  max9271_write_reg(0, 0x31, 0x18);  max9271_write_reg(0, 0x32, 0x17);  max9271_write_reg(0, 0x33, 0x16);  max9271_write_reg(0, 0x34, 0x15);  max9271_write_reg(0, 0x35, 0x14);  max9271_write_reg(0, 0x36, 0x13);  max9271_write_reg(0, 0x37, 0x12);  max9271_write_reg(0, 0x38, 0x11);  max9271_write_reg(0, 0x39, 0x10); #else Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hello, the picture is out now, but the picture is abnormal. The whole picture is green, and the light part is pink. I guess it is because the sensor output is YUYV. In the application mxc_v4l2_tvin.c, I converted the captured data into UYVY and displayed it. The picture color is normal. It is verified that this problem is caused by the sensor output format being YUYV. Since converting data to UYVY in the application will occupy system resources, make the following changes in the driver and in max9286_mipi.c: - max9286_data[0].pix.pixelformat = V4L2_PIX_FMT_UYVY;  + max9286_data[0].pix.pixelformat = V4L2_PIX_FMT_YUYV;  - if(sensor->pix.pixelformat == V4L2_PIX_FMT_UYVY){ + if(sensor->pix.pixelformat == V4L2_PIX_FMT_YUYV){       for(i = 0; i < MAX_SENSOR_NUM;i++)             mipi_csi2_set_datatype(mipi_csi2_info,i,MIPI_DT_YUV422); } Then, execute the following command: ./mxc_v4l2_tvin.out -ol 0 -ot 0 -ow 960 -oh 540 -d 1 -x 0 -if YUYV Track and check that the CSI_SENS_CONF register value is 0x900, which means that SENS_DATA_FORMAT has been successfully configured to YUYV; However, the picture output through HDMI is still abnormal, and it is exactly the same as the picture before the modification, which makes it feel like the modification has not taken effect; Is there any problem with the above modification method? Is there any other place that needs to be modified synchronously? Thank you! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hello! We are currently adjusting a camera with IMX225+FH8536+MAX96705, platform: IMX6+MAX9286, Kernel version 3.14.52. The basic outline of the video is normal, but the color is not normal, as shown in the figure In order to verify whether there is a problem with the front-end ISP output, we did an experiment. We disconnected the ISP from the MAX96705, connected the ISP output to a decoder (TW8836), and then debugged 8836. We found that the image can be output normally, that is, there is no problem with the data output by the ISP, and the output format is YVYU. So I would like to ask, can max96705 convert YVYU data into UYVY format and then pass it to MAX9286? Or how should the display part be processed on the imx6 end? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi Qiang Li: I debugged the situation on the L3.14.52_GA1.1.0 version: 1. Onsemi AR0143+AP0101+MAX9 6705+Max9286+Imx6D single channel display is normal. 2. Onsemi AR0143+AP0101+MAX9 6705+Max9286+Imx6D two-way display effect is as shown in the figure: The camera on the right shows why this is the case, and there are four identical images, all with a green tint. What is the problem? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hello Qiang Li , Thanks for your help. The problem has been solved with the solution you provided! The system instability mentioned above is caused by other reasons and has nothing to do with this solution! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Dear Qiang, I am using the s32v-evb development board to debug MAX9286 + Onsemi AR0140 + AP0101 + MAX9271. Do you have any relevant debugging documents or reference code that you can provide me with? Thanks a lot. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Currently, the MAX96705 is set up to sample the camera image using 10 data lines. If only 8 lines are connected, the high 2 bits of the image will be lost after inversion, which is basically unacceptable. You can ask Maxim how to handle the 8-line method. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Let's see if your input is: Raw data input or YUV input, if it is raw CMOS sensor input, it should be 12bit. Bit loss will cause problems. If it is 8-bit YUV input (BT656), it depends on whether you have the right bits, 0~7 or 2~9... Serdis usually does a transmission, what is input is what is output~ [email protected] Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hello, can I ask you a question: 1. I see that FH8536 seems to have only analog output, how did you connect it to 96705; 2. If IMX225+FH8536 is used, how do you synchronize the images of the four lens modules? Looking forward to your reply, thank you! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> You can measure the lock pin of MAX9286. It should be high all the time to ensure the stable output of MIPI data. If the camera and MAX9286 are not set up properly, the high level cannot be maintained all the time, and the data will be incomplete. From the test results of AP0101, the MAX9286 needs to be set to manual mode, and the register 0x08 needs to be adjusted according to the camera's frame rate setting: #ifdef SENSOR_AP0101  //Manual Mode  max9286_write_reg(0x01, 0x00);  max9286_write_reg(0x63, 0x00);  max9286_write_reg(0x64, 0x00);  max9286_write_reg(0x06, 0x00);  max9286_write_reg(0x07, 0x00);  max9286_write_reg(0x08, 0x26); #endif Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> hi  Qiang li: Because the products we developed with BYD include tw6865 + max9286. I have already adjusted tw6865 on 3.0.35, but it is more difficult to adjust 9286 on 3.0.35, so I hope to get your help. I think the first step should be to enable the 4 virtual channels of imx6 to collect data at the same time. The second step is to adjust the device. At present, max9286 can sometimes detect the device AP0101, but sometimes it cannot detect it. I don’t know why. I suspect that there is a problem with enabling the 4 virtual channels. I transplanted it according to the patch 3.10.53 you released. I hope to get your help. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi Qiang Li ! How many 720P 60fps camera inputs can imx8 support? (All IMX8 included) Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> On the MAX9286 side, you can try to modify register 0x08 max9286_write_reg(0x08, 0x26); Change to max9286_write_reg(0x08, 0x2C); It is best to refer to the settings in the Driver for the Flash settings in your Camera module. The frame rate under FrameSync mode should be determined by the MAX9286. So in theory, it should not happen that the MAX9286 sends FrameSync to the camera at 30fps while the camera sends images at 25fps. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi, our lens uses MAX96705+AP0101+AR0143AT, AP0101 is connected with a flash, ISP output is YUV422/8bit/LSB, and VIDIOC_DQBUF failed is displayed. After reading other people's questions, it seems that VIDIOC_DQBUF failed will not appear if it is a data misalignment problem. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> hello yu  :  能否将l3.0.35的补丁给我一份,[email protected]。感激不尽 Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> According to the MIPI specification, the YUV422 transmitted by MIPI CSI2 should be in UYVY format, but you are transmitting YUYV, so you cannot use a unified setting to process it. In mxc_v4l2_tvin, the settings of g_in_fmt (g_g2d_fmt) will be set in the Driver by default, and will also be used when rendering. According to your situation, the Driver should use all UYVY settings, and then when rendering, just change g_in_fmt (g_g2d_fmt) to YUYV. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> The lock pin of MAX9286 cannot maintain a high level, which means it cannot completely lock the camera signal. Then the data on MIPI CSI2 must be problematic. This has nothing to do with the iMX6. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Qiang_FSL‌ In addition, my environment is as follows: OV10635 sensor MAX96705 Serializer MAX9286 Deserializer kernel 4.1.15 patch L3.14.52_GA1.1.0_MAX9286_Surroundview_Patch_2016-07-26.zip The image can be displayed, but the color is wrong. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi, my previous statement was wrong. The real reason is that the CSI2IPU gasket output format is configured as YUYV. The problem is solved after setting the YUV422_8BIT_FM of the CSI2IPU_SW_RST register to UYVY. Thank you! Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hello Qiang_FSL , there is also a color problem! I saw your email and compared it with the original code. I found that the ov10635_setting in the email is exactly the same as the setting in the original code. There is also the file MAX9286_OV10635_1280x800_Quad_FSIN_MOD.C. I don’t know if it is useful to me. How can I modify the original code? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Hi. Qiang Li When we connect 4 720p@60pfs cameras, what is the delay from camera connection to display on the screen? Do you have this performance indicator?      When we access 8-way For a 720p@60pfs camera, what is the latency from camera access to screen display? Do you have this performance indicator? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Thanks for your reply. We are now running normally with 0143+0101+96705. The synchronization of 0143 is indeed controlled by the trigger in of the sensor, but IMX225 does not seem to have a trigger pin. The datasheet describes that slave mode requires VS and HS. In addition, I see that the FH8536 ISP only has analog output, and 96705 does not seem to be able to connect to analog input. I don't know how the IMX225+FH8536+MAX96705 solution solves these two problems. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> The photosensitive sensor I use here is AP0143; the sensor has been frame synced, because in the previous mode, multiple sensors cannot produce images; Now when I capture 320 lines and connect three sensors, there will be no scrolling, but there will be horizontal bars and jitter. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> HiJiajie Wu It depends on what camera sensor you use. If you buy a ready-made module, it usually comes with flash, and its working mode is set in the flash ROM. Even if the Frame Sync mode is set on the MAX9286, the camera mode cannot be changed. In addition, for some camera sensors (such as AP0101+AR0130), the time from HSYNC to VSYNC of the last line is less than 255 pixel clocks, which may also cause problems. In this case, the IPU CSI needs to capture fewer lines of data. For example, for an input of 720 lines, the IPU CSI only captures 712 lines. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> I also need the patch for version L3.0.35_4.1.0, thank you Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Qiang li: The patches applied in bsp 3.10.53 are as follows:      static int mipi_csi2_probe(struct platform_device *pdev) { . . . . . . . . . . ret = of_property_read_u32(np, "lanes", &(gmipi_csi2->lanes)); if (ret) { dev_err(&pdev->dev, "lanes missing or invalid\n"); goto err; } if (gmipi_csi2->lanes > 4) { dev_err(&pdev->dev, "invalid lanes for mipi csi2!\n"); ret = -EINVAL; goto err; } for_each_child_of_node(np, child) { struct mipi_csi2_chan *chan; if (!of_device_is_available(child)) continue; ret = of_property_read_u32(child, "v_channel", &v_channel); if (ret) { dev_err(&pdev->dev, "v_channel missing\n"); goto err; } if (v_channel > 3) { dev_err(&pdev->dev, "v_channel invalid\n"); ret = -EINVAL; goto err; } chan = &(gmipi_csi2->mipi_chan[v_channel]); ret = of_property_read_u32(child, "ipu_id", &(gmipi_csi2->mipi_chan[v_channel].ipu_id)); if (ret) { dev_err(&pdev->dev, "ipu_id missing or invalid\n"); goto err; } ret = of_property_read_u32(child, "csi_id", &(gmipi_csi2->mipi_chan[v_channel].csi_id)); if (ret) { dev_err(&pdev->dev, "csi_id missing or invalid\n"); goto err; } if ((gmipi_csi2->mipi_chan[v_channel].ipu_id < 0) || (gmipi_csi2->mipi_chan[v_channel].ipu_id > 1) || (gmipi_csi2->mipi_chan[v_channel].csi_id > 1)) { dev_err(&pdev->dev, "invalid param for mipi csi2!\n"); ret = -EINVAL; goto err; 。。。。。。。。。。。。 This is how I handled this part in 3.0.35. Please help me check if there is any problem.    static int mipi_csi2_probe(struct platform_device *pdev) { struct mipi_csi2_platform_data *plat_data = pdev->dev.platform_data; struct resource *res; u32 mipi_csi2_dphy_ver; struct mipi_csi2_chan *chan; int ret , v_channel; printk("mipi_csi2 probe start !!!!!!!!!!!!!!!!!!!!!\n"); gmipi_csi2 = kmalloc(sizeof(struct mipi_csi2_info), GFP_KERNEL); if (!gmipi_csi2) { ret = -ENOMEM; goto alloc_failed; } printk("v_channel is %d !!!!!!!!!!!!!!!!1111\n",v_channel); /* initialize mutex */ mutex_init(&gmipi_csi2->mutex_lock); chan = &(gmipi_csi2->mipi_chan[v_channel]); /* get mipi csi2 informaiton */ gmipi_csi2->pdev = pdev; gmipi_csi2->mipi_en = false; //gmipi_csi2->ipu_id = plat_data->ipu_id; //gmipi_csi2->csi_id = plat_data->csi_id; //gmipi_csi2->v_channel = plat_data->v_channel; gmipi_csi2->lanes = plat_data->lanes; printk("plat_data lanes is %d !!!!!!!!!!!!!!!\n", plat_data->lanes); v_channel = plat_data->v_channel; gmipi_csi2->mipi_chan[v_channel].ipu_id= plat_data->ipu_id; gmipi_csi2->mipi_chan[v_channel].csi_id= plat_data->csi_id; if ((gmipi_csi2->mipi_chan[v_channel].ipu_id < 0) || (gmipi_csi2->mipi_chan[v_channel].ipu_id > 1) || (gmipi_csi2->mipi_chan[v_channel].csi_id > 1)) { dev_err(&pdev->dev, "invalid param for mipi csi2!\n"); ret = -EINVAL; } . . . . . . . The platform data is as follows:   static struct mipi_csi2_platform_data mipi_csi2_pdata = { .ipu_id = 0, //0 // modify by lee .csi_id = 0, .v_channel = 0, .lanes = 4, .dphy_clk = "mipi_pllref_clk", .pixel_clk = "emi_clk", }; Is this operation OK? Thank you. I have been dealing with max9286 on 3.0.35 for a long time. There has been no progress. I hope to get your support. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Thanks for your reply, Our application scenario is like this: the 4-way spliced display screen is encoded and stored, so it is equivalent to only encoding one 720P. Since it is not a direct encoding of the original image, it is impossible to output the UYVY image into NV12 for encoding through the camera driver. Our splicing is achieved through the GPU, and the image sent to the encoder is RGBA32, so the color space conversion is required before encoding, and then the image is abnormal. In fact, we also tested the color conversion of a single-channel 720×480 image, that is, first reduce the 720P image to 720×480 through the GPU and then transcode and record with this resolution image, which will also cause input image abnormality. If we transcode 720×480 (RGBA32 -> NV12 or UYVY -> NV12), only one channel will be abnormal. If the transcoding is 1280×720, except for the first channel, the other three channels are all abnormal. I checked the underlying driver and found that the data flow is CSI--> SMFC--> IDMAC--> MEM. I tracked the IDMAC channel usage and the default is CSI_MEM0 = _MAKE_CHAN(15, NO_DMA, NO_DMA, NO_DMA, 0). CSI_MEM1 = _MAKE_CHAN(16, NO_DMA, NO_DMA, NO_DMA, 1), CSI_MEM2 = _MAKE_CHAN(17, NO_DMA, NO_DMA, NO_DMA, 2), CSI_MEM3 = _MAKE_CHAN(18, NO_DMA, NO_DMA, NO_DMA, 3), The problem at 720×480 is CSI_MEM1 = _MAKE_CHAN(16, NO_DMA, NO_DMA, NO_DMA, 1). If the above channel control is modified as follows CSI_MEM0 = _MAKE_CHAN(15, NO_DMA, NO_DMA, NO_DMA, 1), CSI_MEM1 = _MAKE_CHAN(16, NO_DMA, NO_DMA, NO_DMA, 0), CSI_MEM2 = _MAKE_CHAN(17, NO_DMA, NO_DMA, NO_DMA, 2), CSI_MEM3 = _MAKE_CHAN(18, NO_DMA, NO_DMA, NO_DMA, 3), Then the problematic channel becomes CSI_MEM0 = _MAKE_CHAN(15, NO_DMA, NO_DMA, NO_DMA, 1). From this perspective, it seems that the driver has a conflict in managing the underlying resources. Or the hardware itself does not support this usage. Can you help confirm the root cause of the problem and do you have any suggestions? Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> zhang hongliang : Hello. My sensor is the same as yours, ov10640+ ov490 ISP + max96705. Could you please send me a copy of your debugged code? Or what parameters or registers should I change in the official code? Thanks Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> The standard 720P60 pixel clock is 74.25MHz. If it is UYVY For a 16bpp camera, the bandwidth of a single camera is 74.25M*16. = 1.188Gbps The maximum bandwidth of MIPI CSI2 of iMX8 and iMX8X is 6Gbps, and each can support 4 virtual channels, so each MIPI CSI2 port can support 4 720P60 cameras. iMX8 has 2 MIPI CSI2 ports, so it can support 8. iMX8X has only one MIPI CSI2, so it can support 4 channels, but it has an 8-bit parallel CSI, which can also support one 720P camera, which adds up to 5 channels. Although iMX8M has 2 MIPI CSI2, it does not support multi virtual channel, so it can only support 2 cameras. Re: iMX6DQ MAX9286 MIPI CSI2 720P camera surround view solution for Linux BSP <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> HI Liqiang: Hello! I use imx6d + max9286 + max96705 to preview three cameras at the same time. When two or three cameras are connected, the preview screen will shake and roll; It's normal for me to only connect one camera. Confirmed with Maxim FAE that all cameras are in frame sync mode. I have been looking for this question for a long time. Please help me
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S32Kの例 S32K1xx S32K144 例:S32K144 CMPラウンド・ロビンS32DS2.0  例:S32K144バックドア・アクセス・キー検証S32DS1.3  例:S32K144 FlexCAN0 RXFIFO DMA非SDK S32DS13  例:S32K144 PDB ADCトリガDMA ISR S32DS  例:S32K144 Flash RWシンプルS32DS  例:S32K144 DMAメモリ・コピー・テストS32DS  例:S32K144 EEEPROMの使用方法 例:S32K144 EEEPROMの使用方法 - 非SDK  例:S32K144 RTC VLPS  例:S32K144 WDOG RCM割り込み  例:S32K144 SRAM ECC注入  例 S32K144 RAM 保持 S32DS.R1 例:S32K144 I2CマスタMPL3115A2 S32DSR1_v3  例:S32K144 FlexCAN RXFIFO DMA S32DS.ARM.2018.R1  例:S32K144_printf_implementation - S32DS_1.0  例:FreeRTOS環境でのS32k144 UART printf/scanf - S32DS 例:S32K144 LPITタイマを使用した構成可能期間に対するSDK関数の呼び出し  例:S32K144 .noinitセクションの使用方法 例:S32K144 PDB ADC DMA S32DS.ARM.2018.R1   例:S32K144 RAMセルフテスト・シンプルS32DS 2018.R1  例:S32K144ポジショニング独立コード 例:S32K144 FlexCAN疑似ネットワーキングSTOPモードのテストS32DS.ARM.2.2  例:S32K144 LPIT DMA LPSPI  例:S32K144 FlexCAN TX/RX/エラーISRテストS32DS2.2  例:S32K144 FlexIOアイドル検出S32DS2.2 S32K146 S32K146 Set_whole_FlexRAM-as_RAM S32DS.ARM.2.2の例 S32K148 例:S32K148 PDB0-PDB1リングS32DS3.4 RTM4.0.3  例:S32K148 PDB0-PDB1 ring DMA S32DS3.4 RTM4.0.3  例:S32K148 GPIO割り込み  S32K116 例:S32K116 WDOG高速テスト  例:S32K116 LPUART LINスレーブTXRX ISR S32DS.ARM.2.2  例 S32K116 FlexCAN PN STOP S32DS.ARM.2.2 例:S32K116 FlexCAN VLPRテストS32DS.ARM.2.2 S32K118 例 S32K118-SRAM-keep_data_over_SW_reset v0_1 S32DS.ARM.2.2 S32K3XXシリーズ S32K344 例:S32K344 PIT BTCU ADC DMA DS3.4 RTD100   例:S32K344 FlexCAN_Ip TX/RX/EnhanceRXFIFOテストS32DS3.4 RTD200     例Siul2_Port_Ip_Example_S32K344_ITCM_DTCM S32DS3.4RTD300   例:S32K358 FlexCAN TXRX ISR S32DS35 RTD400/500     
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使用 Jlink-Segger 脚本下载 HSE 固件 你好 我需要将 FW 下载到 S32k310 中 目前,我使用的是移植到 s32k310 上的恩智浦演示程序 HSE_FW_INSTALL。 我注意到 Trace32 练习脚本可用于此目的。 有可能为此创建一个 Segger Jlink 脚本吗? 需要采取哪些步骤? 我需要一个更快的批量生产流程。 顺祝商祺! 法比奥 Re: Download HSE Firmware using a Jlink-Segger Script 目前,我们没有使用SEGGER J-Link安装HSE固件的现成解决方案或参考流程。 可用且经过验证的方法有 TRACE32 Practice 脚本(官方支持用于此目的)和 HSE Demo 应用程序(独立于调试器,可以移植并用于执行安装)。 如果您计划使用J-Link,则需要根据通用HSE安装顺序(UTEST标志编程、固件映像下载、RESET)自行开发自定义脚本解决方案,因为恩智浦目前不为该用例提供专用的J-Link脚本。 有关 SEGGER 的具体指导,请参阅其文档或联系其支持人员: https://www.segger.com/support/。
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只有 VDD(INTF)存在时 TDA8035 的行为,没有 VDDP 供电 我想知道 TDA8035 在下列情况下的表现: VDD(INTF)=3.3V VDDP= 0V(未通电) 看来 TDA8035 处于 RESET 模式但我不确定...你能确认一下吗? 这种情况是否可以持续很长时间(> 数小时)? 在这种情况下,VDD(INTF)消耗量是多少? 顺祝商祺! 顺祝商祺! 西尔万 接触式智能卡读卡器芯片 Re: TDA8035 behaviour when only VDD(INTF)is present, not powered VDDP 你好@sylvainbouriot 在 VDD (INTF) = 3.3V 和 VDDP = 0V 的情况下开机时: TDA8035 将保持重置状态,不会尝试启动智能卡。 允许这种状态持续较长时间而不会损坏芯片或导致异常行为。 当 VDDP = 0 且芯片处于 RESET/掉电模式时: VDD (INTF) 的典型电流非常小,通常在几微安到几十微安之间。目前的消耗量主要用于数字控股。 Re: TDA8035 behaviour when only VDD(INTF)is present, not powered VDDP 谢谢你,Kaily,非常准确的回答。 当 TDA8035 处于运行模式时,VDD (INTF) = 3.3 V 时 VDD (INTF) 的近似功耗是多少? 顺祝商祺! 西尔万 Re: TDA8035 behaviour when only VDD(INTF)is present, not powered VDDP VDDP = 3.3V 或 5V ...
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