S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff I developed the program in S32DS. When trying to transmit CAN frames, only a short low-level pulse  is output on the TX pin, and the subsequent ID and data bits are truncated, so complete frames cannot be sent. No data is received by the USB-CAN analyzer, and the FlexCAN controller directly enters the bus-off state. I have checked clock configuration and register values, and tested different CAN channels, but the problem remains unsolved. I want to figure out which configuration parameter is set incorrectly. Thanks for your help. Re: S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff Hi Julián, Thank you for your reply. I'd like to correct and add some important details to my earlier message, which was written in a hurry. Board: This is a third-party board (not an NXP EVB), model S32K148_REV2_Q144. Worth noting: I found errors in the seller's schematic (labeled transceiver position didn't match the actual PCB silkscreen), so the reference design documentation for this board may not be fully reliable. Official CAN example: I did try building Can_example_S32K148, but hit environment issues unrelated to CAN itself (missing toolchain/include paths, and finally a version mismatch error between Port_Ci_Port_Ip.h and Port_Ci_Port_Ip_Cfg.h — "different vendor ids"/"AutoSar Version Numbers are different"). This looks like an RTD package version mismatch with my own project, not an IDE version issue. I'll try to resolve it, but I don't think it's central to the hardware problem. New evidence (from my own project you already reviewed): I've done deeper verification with a logic analyzer since my last message: MB8 content is 100% correct — read directly from registers right after CDD_CanTransmit(): CS=0x0C080000 (CODE=0xC pending, DLC=8), ID=0x00400304 (>>18 = 0x10, matches config), DATA=0x01020304/0x05060708 (matches my 8-byte payload exactly). TX signal at the pin is correct too — probing PTE5 and the transceiver's TXD input simultaneously (200MHz logic analyzer), the two waveforms are identical, confirming the PCB trace is fine. But transmission aborts after only ~8-9 bit transitions (roughly SOF + a few arbitration bits), and the controller enters Bus-Off shortly after (ESR1 confirms FLTCONF=11, TXERRCNT increments each attempt). CANH/CANL show zero activity, even with the USB-CAN analyzer properly connected and 120Ω termination enabled (bus not floating). As a control test, I ran the same setup (floating vs. terminated) on a different, known-working STM32 board — CANH showed proper transitions once terminated. On my S32K148 board under identical terminated conditions, CANH/CANL remain completely flat. Same result on CAN1 (different pins/transceiver). Since MCU-side TXD is confirmed correct up to the transceiver input, but CANH/CANL never respond even with proper termination, I suspect the transceiver output stage (or something shared between both channels, e.g. supply transient behavior — I haven't been able to check this with a scope, only a logic analyzer). Questions: Does "TXD correct at transceiver input, but CANH/CANL completely flat under proper termination" more strongly suggest a transceiver hardware fault, or are there other common board-level issues (enable/standby circuit, supply decoupling) that could cause this exact symptom? Is it expected for FlexCAN to abort after only the first few arbitration bits (rather than completing the full frame and failing at the ACK slot) when there's no real bus activity? Want to confirm my understanding of the bit-monitoring mechanism. For the RTD version mismatch in the example project — is there a way to check which RTD version matches a given S32 Configuration Tool release, so I can get a matching example package? Thanks again for your help. Best regards, April Re: S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff Hi Julián, I’m really surprised and thankful for your reply to my question.   I am using a self-designed hardware board; only the power supply circuit differs from the official EVB schematic, while the rest of the circuits are consistent with the reference design. I have tested the official CAN example project. I only configured CAN0 pins without enabling and configuring the PORT module inside the MCAL layer, and the project keeps failing to compile repeatedly.   The specific compile error is: " f../board/Port_Ci_Port_Ip_Cfg.h:47:10: fatal error: Port_Ci_Port_Ip_Types.h: No such file or directory".   I have this header file available in my self-configured project files, yet after importing this official example project, this header file is not generated automatically during code generation. Could this missing header file error be caused by mismatched IDE software versions? At present I’m developing on S32DS for S32 Platform, and I am downloading S32DS for ARM 2.2.2 to switch the development environment. Looking forward to your guidance.   Best regards,   April Re: S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff Hello @April, From your project, configuration and routine seem to be correct. Could you please share if you are using an S32K148EVB from NXP, or if this is a custom design? Have you tried testing the Can_example_S32K148 project included within the RTD? You can simply add the CAN0 pins and disable loop back mode to enable Tx/Rx and test the routine.  Lastly, have you confirmed that both nodes (S32K148 and CAN analyzer) are set to the same bit timing and protocol configuration (CAN vs CAN FD)? You can use the following tool to calculate the values: MPC5xxx/S32Kxx/LPCxxxx: CAN / CAN FD bit timing calculation. If you are using a custom design, you can refer to the S32K148 EVB's schematic and Hardware Design Guidelines for S32K1xx for the CAN interface design and recommendations. Best regards, Julián Re: S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff Hello @April, 1. Yes, this points to a transceiver fault, rather than module configuration. Can you check which transceiver is being used in your custom design? I'd recommend checking STB, EN, S, RS, WAKE, INH, or similar pins against the actual mounted transceiver. S32K148 EVB uses a UJA1132HW, however, if you are using something like a TJA1043, you must configure it to Normal mode (STB_N = high EN = high). 2.  Yes, early abort after a few arbitration bits is plausible if the transceiver is not actually driving the bus. 3. Usually, the "different vendor ids"/ "AutoSar Version Numbers are different" errors show up when importing a project, and trying to update the configuration with a different RTD / S32 Config Tool version, however, if you simply imported the example from "File -> New -> S32DS Project From Example", there should not be any compatibility issues: From the project you've shared, I can see you are using S32K1 RTD 3.0.0 QLP04, however, when I imported the project, I can see from properties that GCC 11.4 is configured: From RTD release notes, 3.0.0 QLP04 only supports NXP GCC 10.2: I'm not sure how you imported and compiled the project, but please make sure you have at least S32DS 3.6.4, and only one RTD package installed. S32DS does not support multiple RTD versions installed simultaneously. Best regards, Julián Re: S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff Hello @April, Thank you for the additional information. 1. Regarding TJA1051, it is true this transceiver only has the S pin in order to configure normal mode, however, please check if you are using TJA1051T/E derivative, as this has an additional EN pin you must drive HIGH: 2. The 'File not found' error is most likely caused by a wrong Port configuration, and consequently, wrong code generation by the tool. The error you've shared in the Port container is caused because the 'Pins' functional group name should be named after 'Port container name' + 'Peripheral functional group name', in your case 'PortContainer_0_VS_0' Before requesting RMA, can you please test the project I've attached? It is a simple test code in MCAL, which enables Rx in interrupt, and Tx in polling mode. After 10 successful echoed frames, the green led is toggled.  I've tested the routine through the J11 CAN header, with a PCAN-USB analyzer, with the following settings: I can see the frames successfully being echoed, and the green led toggled every 10 frames: Since I've used S32K148-EVB, there is no need for transceiver enablement, however, in your setup, check that the TJA1051 is correctly enabled (and if it also needs EN pin to be enabled). Best regards, Julián Re: S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff Hi Julián, Thanks again for your patience with this — a few updates since my last message. Transceiver check: I looked more closely and confirmed it's a TJA1051, not a UJA1132-series SBC. This one only has a single enable pin (S pin), which is hardwired to ground on my board (= Normal mode), so the multi-pin STB_N/EN logic you mentioned doesn't really apply here — that part of the control circuit already looks correct. Cross-check with a second, independent project: I built and ran a completely different CAN demo for this board (from the reseller, using the older Processor Expert/S32 SDK stack — can_pal — instead of RTD/AUTOSAR). Pressing the button correctly calls CAN_Send(), but I noticed the return value is consistently STATUS_BUSY (0x002), meaning the previous transmission never actually completes. And just like with my RTD project, the USB-CAN analyzer receives nothing at all, on all three channels. So now I have two completely independent driver stacks giving me the same result, which makes me fairly confident this isn't a software/config issue on my end. Regarding the official example project: I switched the GCC version back to 10.2 as you suggested, but I'm still hitting the same "file not found" errors during the build. I dug into it a bit more and I now suspect it might be related to the Port module (MCAL layer) not being fully configured — there seems to be a validation error tied to how the Port module and the Pins tool's functional group are linked, but I haven't been able to get it configured correctly no matter what I try.  they are form example: This is from the project I built myself earlier: Given everything so far — control pin wiring looks correct, TXD is confirmed correct at the pin, and two independent software stacks show consistent "no bus activity" / stuck transmission behavior across all three channels — do you think this is solid enough to treat as a hardware fault and proceed with an RMA, or is there anything else worth checking first? Thanks again for all your help with this. Best regards, April

使用 IMXRT1172 LPSPI EDMA 传输 API 时，DMA IRQ 处理程序在 SPI 传输完成之前被调用。 您好， 我一直在使用 IMXRT1172 上的 SDK (2.16.100) 中的 LPSPI EDMA 传输 API 同时读取和写入 SPI 数据（即在两个大小相同的缓冲区的两个 DMA 通道上进行 TX+RX 传输）。不幸的是，EDMA 回调似乎在传输实际完成之前就被调用了。在回调中，检查 LPSPI 的 SR、FSR 和 RSR 显示，即使 DMA 认为它已完成，SPI 仍然认为它很忙。IEMBF 仍然已设置，TXCOUNT 为 1。 SR = 0x01000100（MBF、WCF） FSR TXCOUNT = 1，RXCOUNT = 0 RSR = 0x00000002 (RXEMPTY, !SOF) 如果我只执行 TX 操作，这在某种程度上是有意义的，因为 SPI 外设可能仍然会输出从 DMA 加载的最后一个字节。因此，在这种情况下，DMA 外设实际上已经完成了将最后一个字节从 RAM 加载到 SPI 数据 TX 寄存器，但 SPI 仍然需要做一些工作才能将其发送出去。 但是，当同时执行 TX 和 RX 时，我原本预期如果 TXCOUNT 为 1，那么 RXCOUNT 也应该为 1。也就是说，在所有 TX 数据时钟输出完毕之前，DMA 不应该完成 RX，因为最后一个字节需要通过 DMA 从 SPI RX 数据寄存器传输到 RAM 中，而这只会在传输的最后一个时钟周期发生。 这真的是个问题吗？ 如果是这样，是用SDK实现的吗？还是用硬件IP实现的？ 我希望能够在 DMA 回调中检查 LPSPI SR，以确定是否存在任何 SPI 错误。 谢谢！ -m Re: Using IMXRT1172 LPSPI EDMA transfer API, DMA IRQ handler called before SPI transfer is done 嗨@nxp16 ， 非常感谢您对我们产品的关注以及对我们社区的使用。 DMA 完成和 SPI 总线完成是两个不同的概念。 eDMA 回调表明 DMA 引擎已完成在内存和 LPSPI FIFO/寄存器路径之间移动配置的字节数。这并不一定意味着 LPSPI 总线状态机已经完成最后一帧或返回空闲状态。 对于 LPSPI 总线完成情况，请检查 SR[TCF] 或等待 SR[MBF] 清除。 希望对你有帮助 顺祝商祺！ 5月

S32K148 FlexCAN 仅输出 SOF 脉冲，然后进入总线关闭状态 我用S32DS开发了这个程序。当尝试发送 CAN 帧时，TX 引脚上只会输出一个短的低电平脉冲，后续的 ID 和数据位会被截断，因此无法发送完整的帧。USB-CAN 分析仪未收到任何数据，FlexCAN 控制器直接进入总线关闭状态。 我已经检查了时钟配置和寄存器值，并测试了不同的 CAN 通道，但问题仍然没有解决。我想找出哪个配置参数设置错误。感谢您的帮助。 Re: S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff 嗨，朱利安， 感谢你的回复。我想更正并补充我之前匆忙写成的消息中的一些重要细节。 主板：这是第三方主板（不是 NXP EVB），型号为 S32K148_REV2_Q144。值得注意的是：我发现卖家提供的原理图存在错误（标注的收发器位置与实际 PCB 丝印不符），因此该电路板的参考设计文档可能并不完全可靠。 官方 CAN 示例：我尝试构建 Can_example_S32K148，但遇到了与 CAN 本身无关的环境问题（缺少工具链/包含路径，最终 Port_Ci_Port_Ip.h 和 Port_Ci_Port_Ip_Cfg.h 之间出现版本不匹配错误——“不同的供应商 ID”/“AutoSar 版本号不同”）。这看起来像是 RTD 包版本与我的项目不匹配，而不是 IDE 版本问题。我会尝试解决这个问题，但我认为这与硬件问题的核心无关。 新证据（来自您已审阅过的我自己的项目）：自从我上次留言以来，我使用逻辑分析仪进行了更深入的验证： MB8 内容 100% 正确— 直接从 CDD_CanTransmit() 之后的寄存器读取：CS=0x0C080000 (CODE=0xC 待定，DLC=8)，ID=0x00400304 (>>18 = 0x10，与配置匹配)，DATA=0x01020304/0x05060708 (与我的 8 字节有效载荷完全匹配)。 引脚上的 TX 信号也正确——同时探测 PTE5 和收发器的 TXD 输入（200MHz 逻辑分析仪），两个波形相同，证实 PCB 走线良好。 但传输在大约 8-9 位转换后中止（大致为 SOF + 几个仲裁位），控制器随后进入总线关闭状态（ESR1 确认 FLTCONF=11，TXERRCNT 每次尝试递增）。 即使正确连接了 USB-CAN 分析仪并启用了 120Ω 终端（总线未浮空）， CANH/CANL 也显示为零活动。作为对照测试，我在另一块已知可正常工作的 STM32 板上运行了相同的设置（浮空与终端），终端后 CANH 显示出了正确的转换。在我的 S32K148 板上，在相同的端接条件下，CANH/CANL 保持完全平坦。 在 CAN1 上也出现了同样的结果（不同的引脚/收发器）。 由于 MCU 端的 TXD 信号在收发器输入端之前均已确认正常，但即使正确端接，CANH/CANL 信号也始终没有响应，因此我怀疑是收发器输出级（或两个通道共用的某个部分，例如……）出现了问题。电源瞬态行为——我只能用逻辑分析仪检查，无法用示波器检查。 问题： “TXD 在收发器输入端正确，但 CANH/CANL 在正确端接下完全平坦”是否更强烈地表明收发器硬件故障，还是存在其他常见的板级问题（使能/待机电路、电源去耦）也可能导致这种症状？ 当总线上没有实际活动时，FlexCAN 是否应该在发送完前几个仲裁位后中止（而不是完成整个帧并在 ACK 时失败）？我想确认一下我对位监控机制的理解是否正确。 对于示例项目中的 RTD 版本不匹配问题——是否有办法检查哪个 RTD 版本与给定的 S32 配置工具版本匹配，以便我可以获取匹配的示例包？ 再次感谢您的帮助。 此致敬礼，艾普丽尔 Re: S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff 嗨，朱利安， 我非常惊讶，也很感谢您回复我的问题。   我使用的是自己设计的硬件板；只有电源电路与官方 EVB 原理图不同，而其余电路与参考设计一致。 我测试了官方的 CAN 示例项目。我只配置了 CAN0 引脚，而没有启用和配置 MCAL 层中的 PORT 模块，但项目一直编译失败。   具体的编译错误是： “f ../board/Port_Ci_Port_Ip_Cfg.h:47:10: 致命错误: Port_Ci_Port_Ip_Types.h: 没有该文件或目录”。   我的自定义项目文件中已有此头文件，但是导入此官方示例项目后，代码生成过程中并未自动生成此头文件。 缺少头文件错误是否可能是由于 IDE 软件版本不匹配造成的？目前我正在使用S32DS 为 S32 平台进行开发，现在我正在下载S32DS for ARM 2.2.2来切换开发环境。 期待您的指导。   顺祝商祺！   四月 Re: S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff 你好@April ， 从你的项目来看，配置和流程似乎都是正确的。请问您使用的是恩智浦半导体的S32K148EVB芯片，还是您自己设计的芯片？ 您是否尝试过测试 RTD 中包含的 Can_example_S32K148 项目？您可以简单地添加 CAN0 引脚并禁用环回模式以启用 Tx/Rx 并测试该程序。 最后，您是否确认两个节点（S32K148 和 CAN 分析仪）都设置为相同的位时序和协议配置（CAN 与 CAN FD）？您可以使用以下工具来计算值： MPC5xxx/S32Kxx/LPCxxxx：CAN / CAN FD 位定时计算。 如果您使用的是自定义设计，您可以参考S32K148 EVB 的原理图和S32K1xx 硬件设计指南，了解 CAN 接口设计和建议。 此致， 朱利安 Re: S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff 你好@April ， 1. 是的，这表明是收发器故障，而不是模块配置问题。能否确认一下您的定制设计中使用的是哪种收发器？ 我建议检查 STB、EN、S、RS、WAKE、INH 或类似引脚与实际安装的收发器是否匹配。 S32K148 EVB 使用UJA1132HW ，但是，如果您使用的是TJA1043之类的芯片，则必须将其配置为正常模式（ STB_N = 高EN = 高）。 2. 是的，如果收发器实际上没有驱动总线，那么在几个仲裁位之后提前中止是合理的。 3. 通常情况下，“不同的供应商 ID”/“AutoSAR 版本号不同”错误会在导入项目并尝试使用不同的 RTD / S32 配置工具版本更新配置时出现；但是，如果您只是从“文件 -> 新建 -> 从示例创建 S32DS 项目”导入示例，则应该不会有任何兼容性问题： 从您分享的项目来看，您使用的是 S32K1 RTD 3.0.0。然而，当我导入 QLP04 项目时，从属性中可以看到配置的是 GCC 11.4： 根据 RTD 版本说明，3.0.0QLP04 仅支持 NXP GCC 10.2： 我不确定你是如何导入和编译这个项目的，但请确保你至少安装了 S32DS 3.6.4 版本。仅安装了一个RTD软件包。S32DS不支持同时安装多个RTD版本。 此致， 朱利安 Re: S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff 你好@April ， 感谢您提供的补充信息。 1. 关于 TJA1051，确实该收发器只有 S 引脚用于配置正常模式，但是，请检查您是否使用的是TJA1051T/E衍生型号，因为该型号有一个额外的 EN 引脚，您必须将其拉高： 2. “找不到文件”错误很可能是由于端口配置错误，从而导致工具生成了错误的代码。您在端口容器中遇到的错误是由于“引脚”功能组名称应该以“端口容器名称”+“外围设备功能组名称”的形式命名造成的，在您的情况下应该是“ PortContainer_0_VS_0 ”。 在申请RMA之前，能否请您测试一下我附上的项目？这是 MCAL 中的一个简单的测试代码，它使 Rx 以中断模式运行，Tx 以轮询模式运行。成功回波 10 帧后，绿色 LED 指示灯会切换状态。 我使用 PCAN-USB 分析仪，通过 J11 CAN 接头对该程序进行了测试，设置如下： 我可以看到帧已成功回放，并且绿色 LED 指示灯每 10 帧切换一次： 由于我使用的是 S32K148-EVB，因此不需要启用收发器，但是，在您的设置中，请检查TJA1051 是否已正确启用（以及是否还需要启用 EN 引脚）。 此致， 朱利安 Re: S32K148 FlexCAN Only Output SOF Pulse then Enter BusOff 嗨，朱利安， 再次感谢您的耐心等待——自从我上次发消息以来，又有一些更新。 收发器检查：我仔细查看后确认它是TJA1051 ，而不是 UJA1132 系列 SBC。这个只有一个使能引脚（S 引脚），在我的板上硬连接到地（= 正常模式），所以你提到的多引脚 STB_N/EN 逻辑在这里并不适用——控制电路的这一部分看起来已经是正确的了。 与第二个独立项目进行交叉验证：我为该板（从经销商处购买）构建并运行了一个完全不同的 CAN 演示，使用了较旧的 Processor Expert/S32 SDK 堆栈 — can_pal — 而不是 RTD/AUTOSAR。按下按钮后，CAN_Send() 函数被正确调用，但我注意到返回值始终为 STATUS_BUSY (0x002)，这意味着之前的传输实际上从未完成。就像我的 RTD 项目一样，USB-CAN 分析仪在所有三个通道上都没有接收到任何信号。现在我有两个完全独立的驱动程序堆栈，它们都给出了相同的结果，这让我相当确信这不是我这边的软件/配置问题。 关于官方示例项目：我按照您的建议将 GCC 版本切换回 10.2，但在构建过程中仍然遇到同样的“文件未找到”错误。我进一步研究了一下，现在怀疑这可能与端口模块（MCAL 层）未完全配置有关——似乎存在一个与端口模块和引脚工具的功能组链接方式相关的验证错误，但我无论尝试什么都无法正确配置它。 它们就是一个例子： 这是我之前自己搭建的项目的一部分： 鉴于目前的情况——控制引脚接线看起来正确，引脚上的 TXD 也已确认正确，并且两个独立的软件堆栈在所有三个通道上都显示出一致的“无总线活动”/传输卡顿行为——您认为这是否足以将其视为硬件故障并进行 RMA，或者还有其他值得先检查的地方吗？ 再次感谢你在这件事上提供的帮助。 此致敬礼，艾普丽尔

KW45B41Z EVK 无法通过板载调试器 MCU Link 进行编程。 你好， 我正在尝试使用kw45b41zevk_hello_world SDK 示例代码对KW45B41Z-EVK进行编程。开始调试时，板载调试器被检测到，但随后出现以下错误： 未检测到可用短波除尘设备。 连接设备后再试一次。 我已将 USB 电缆连接到J14 ，并将JP22 保持开路状态（以便使用板载调试器本身进行编程）。此外，如KW45UM中所述， JP28 引脚 1 和 2 短路了。然而，即使那样，我仍然无法对示例进行编程和调试。 我也尝试过kw45b41zevk_led_blinky SDK 示例，但它的表现也一样。 我还尝试使用外部调试器通过短接JP22来调试电路板，正如KW45UM中所述，但我遇到了同样的问题。 我附上了遇到的问题的截图。 我还尝试使用安全配置工具擦除闪存并写入映像。首先，我短接JP25以启用SW4 ，进入 ISP 模式，然后长按SW4和RESET (SW3) 。测试连接通过后，我成功擦除了闪存（位置0x00000000 ，大小0x100000 ）。然后我使用了以下图片： ${SPT_INSTALL_BIN} \data\sample_data\targets\KW45B41Z8\source_images\kw45b41zevk_led_blinky.s19 我已经成功构建并编程了图像，并且预期的RGB LED1也闪烁，表明 KW45B41Z 微控制器工作正常。然而，即使这样，我仍然无法对电路板进行编程或调试。

Linux QBMan QMan 驱动程序 safe_copy_dqrr QorIQ 处理器的 Linux SDK 在驱动程序暂存树中包含qman_high.c 。这包括 safe_copy_dqrr() 函数，注释中说该函数确保读取操作按顺序到达 QBMan ，并且//防止 QBMan 看到 WRAP 事务//。 我推测这里指的是 AXI WRAP 突发事务，而不是与 DQRR 索引回绕有关的任何事情。 谁能解释一下为什么这是一个需要解决的安全问题？ 提前致谢。 QorIQ LS1设备

FRDM-RW612 EVKで外部U.FLアンテナを有効にする方法 こんにちは、NXP チームの皆様、 私はFRDM-RW612 EVKをSDKのwifi_cli例で使っています。ロードされたWi-Fiファームウェアはrw61x_sb_wifi_a2.binです。 EVKのUFLコネクタ(J11)にMolex 1461539050外部アンテナを接続しました。しかし、オンボードPCBアンテナと比較して、RSSIの改善は見られませんでした。場合によってはRSSIがさらにわずかに低いこともあります。 FRDM-RW612の回路図とユーザーガイドから、RFスイッチ(U16 - RTC7608U)はオンボードPCBアンテナと外部UFLコネクタのどちらかを選択し、RF_CNTL_3がこのスイッチの制御信号であることを理解しています: RF_CNTL_3 = 0 -> PCBアンテナ（デフォルト） RF_CNTL_3 = 1 -> 外部UFLアンテナ RF_CNTL_3を制御する方法は？ RF_CNTL_3はWi-Fiファームウェアによって自動的に駆動されますか？はいの場合、そのデフォルト値は何ですか？その値を変更するにはどうすればよいですか？ EVKの外部アンテナを有効にするには、ハードウェアまたはファームウェアの設定が必要ですか？ 何かご指導やサンプルコードがあれば大変助かります。 よろしくお願いします。 Re: How to enable the external U.FL antenna on FRDM-RW612 EVK こんにちは、 確認させてください。 よろしくお願いいたします。 ダニエル。 Re: How to enable the external U.FL antenna on FRDM-RW612 EVK こんにちは、 @DanielRuvalcaba さん。この件について確認していただけましたでしょうか？何か進展がありましたらお知らせください。 よろしくお願いいたします。 プラティシュ Re: How to enable the external U.FL antenna on FRDM-RW612 EVK こんにちは、 プライベートメッセージを送りました。 よろしくお願いいたします。 ダニエル。 Re: How to enable the external U.FL antenna on FRDM-RW612 EVK こんにちは @DanielRuvalcaba また、FRDM-RW612のUFLコネクタ(J11)にアンテナを交換したいとも思っています。 どうやってやるのか、教えていただけますか? フロントエンドモジュール（FEM）の設定でアンテナを切り替えているのでしょうか？ よろしくお願いいたします マルチン Re: How to enable the external U.FL antenna on FRDM-RW612 EVK こんにちは、 プライベートメッセージでご連絡いたしました。 よろしくお願いいたします。 ダニエル。

访问T2081处理器上的MT29F64G08AECAB 与非闪存 您好， 我正在尝试使用T2081 处理器访问MT29F64G08AECAB NAND Flash 。 与非闪存设备的总容量为8 GB，CE1（芯片使能 1）和CE2（芯片使能 2）分别通过CS5和CS6连接到IFC 控制器。 CS5用于连接到CE1 的4 GB 与非闪存。 CS6用于连接到CE2 的4 GB 与非 Flash。 此与非设备的XML闪存配置文件不在以下路径中： {CodeWarrior}\PA\bin\plugins\support\Products\ProductData\FPDevices.mwpdb\FP 因此，我参考文档《 Power Architecture Processors Flash Programmer 应用笔记》（AN4349）创建了一个新的 XML 文件。 我有以下几个问题： 对于 Flash Programmer 配置文件 (.xml)，我应该将 与非 Flash 大小配置为4 GB （每个片选）还是8 GB （CS5 和 CS6 之间的设备总容量）？ 我根据CS5上4 GB容量的 与非 Flash 配置修改了 T2081QDS_init_core.tcl 文件。 运行诊断测试以读取制造商 ID和设备 ID时，我在控制台中遇到以下错误。   我已附上 T2081QDS_init_core.tcl 和 MT29F64G08AECAB.xml 文件供您参考。 请您审核配置，并提供使用T2081 处理器访问 与非 闪存设备的正确步骤？ 此致， 维马尔。 QorIQ T2 设备

Uart using DMA is not working correct on S32K314 Hello,  We are currently trying to configure LPUART0 channel to work with DMA. The uart channel need to be working at a bitrate of 1Mbps. Our current configuration for UART and DMA looks like this.  The clock is enable in MCU, the buffers are declared inside a non cacheable area , the DMA ISR priority is smaller than the LPUART. Our problem is that we are not able to see the data inside the RX buffer or is incomplete.  Our workflow is like this (similar to LIN communication 😞 prepare rx buffer -> AsyncReceive send the header to the slave -> AsyncSend wait until the data from the slave is received in the next cycle (my function runs in a 1ms task) If I put a break point after AsyncSend is executed I can see all the data send from slave inside the RX buffer. If I let it run there is nothing there or is incomplete. My assumption is that the DMA interrupt comes later.  Could you give us some hints on what is wrong inside our configuration or what I could check next? Thank you! Cosmin Re: Uart using DMA is not working correct on S32K314 Hi@CosminSbera 1.Don't forget to enable DMA Request Option. 2.Don't forget to enable the LPUART0_IRQn interrupt in the "Platform" component. "Platform"->"LPUART0_IRQn --LPUART_UART_IP_0_IRQHandler“

TagWriterはPN7160タグを読み取ることができません 私はRWandCEのサンプルプログラム（LPC55S69+PN7160）を実行しています。AndroidスマートフォンでTagWriterアプリを使ってタグを読み取ろうとすると、応答がなく失敗します。ログには、ポーリングモードが有効になったことが示されています。しかし、TagInfoはそれを読み取ることはできますが、「通信中断」のポップアップが表示され、電話機に表示される結果が正しくない可能性があります。これは、検出ループでポーリングとリスニングの両方が有効になっているためでしょうか？しかし、私の要件は、ポーリングとリスニングの両方を同時に有効にすることです。また、Androidスマートフォン上のすべてのエミュレーションカードも無効にしました。 どうか助けてください、ありがとうございます。 LPC55xx Re: TagWriter can not read the PN7160 tag こんにちは、 @BillyHu さん。 あなたの調子が良いといいのですが。 PN7160 FWを最新バージョンに更新してみてください。詳細については、 PN7160 - MCUXpressoのFWアップデート を参照してください。 よろしくお願いいたします。 エドゥアルド。 Re: TagWriter can not read the PN7160 tag こんにちは、エドゥアルドさん。 私のファームウェアのバージョンは既に12.50.11です。ポールとリッスンは個別に使うと問題なく動作しますが、discoveryTechnologiesで両方を有効にしていると、タグライターを使ってPN7160のカードエミュレーションを読み取ることができません。そちら側でも同様の問題が発生したことはありますか？ ありがとうございます Re: TagWriter can not read the PN7160 tag エドゥアルド様、 何かご提案はありますか？この現象はPN7160では正常なものですか？ ありがとうございます

i.MX93处理器并行编程系统 我正在使用imx93处理器，需要同时对两块板子进行编程。但是每当我尝试这样做时，其中一个板子会出现HID(W)错误，而其他板子的刷写则成功完成。 uu.exe -m 1:10 -b uuu-xxxxxx.flash uu.exe -m 1:7 -b uuu-xxxxxx.flash 即使我指定路径（1:10,1:7），也会出现同样的错误。 请指导。 Re: Parallel Programming System for i.MX93 Processors 你好， 请尝试运行以下命令： uuu -d -m 1:7 -m 1:10 uuu-xxxxxx.flash 你能得到什么？ uuu -lsusb 请确保您使用的端口与枚举结果一致。 顺祝商祺！

KW45B41Z EVKが搭載デバッガーMCUリンクでプログラムされていないこと。 こんにちは、 kw45b41zevk_hello_world SDKのサンプルコードを使ってKW45B41Z-EVKをプログラムしようとしています。デバッグを開始すると、オンボードデバッガーは検出されますが、その後、次のエラーが発生します。 検出された利用可能なSWDデバイスは0個です。 デバイスを接続して、もう一度お試しください。 USBケーブルは J14 に接続し、 JP22はオン ボードデバッガでプログラムするために開いたままにしています。また、 KW45UMで述べられているように、 JP28のピン1と2は短絡されています。しかし、その後もサンプルプログラムをプログラミングしたりデバッグしたりすることができません。 kw45b41zevk_led_blinky SDKの例も試しましたが、同じように動作します。 KW45UMで説明されているように、外部デバッガを使用してJP22をショートさせてボードのデバッグも試みましたが、同じ問題が発生します。 発生している問題のスクリーンショットを添付しました。 セキュアプロビジョニングツールを使用して、フラッシュメモリを消去してイメージを書き込むことも試しました。まず、 JP25をショートさせてSW4を有効にし、次にSW4とリセット（SW3）を長押ししてISPモードに入りました。接続テストが成功した後、フラッシュメモリ（位置0x00000000 、サイズ0x100000 ）の消去に成功しました。次に、以下の画像を使用しました。 ${SPT_INSTALL_BIN} \data\sample_data\targets\KW45B41Z8\source_images\kw45b41zevk_led_blinky.s19 画像の構築とプログラムは無事にでき、意図した RGB LED1 も点滅しており、KW45B41Z マイクロコントローラが正常に動作していることを示しています。しかし、それでもなお、基板のプログラミングやデバッグができません。

IMXRT1172 LPSPI with EDMA random intermittent SPI SR = REF error Hi, When using the LPSPI EDMA transfer API, sometimes when my callback is called from the SDK (when EDMA is complete), if I look at the LPSPI SR register, about one in 5-10 times it has the REF bit set (Read error flag / overflow).  My SPI clock is running at 500Khz.  I'm not really sure why I'm  getting this SPI RX overflow as the SPI clock is nowhere near fast enough to cause DMA to not be able to keep up.  Is there any way I can troubleshoot this and has anyone else seen this problem?  The data always looks correct even when I get the overflow (I zero my buffer between each transfer, so I know it's not old stale data I'm looking at).  I'm doing simultaneous TX/RX using the transfer API, and doing the transfer every 4ms.  There shouldn't be any issues with timing. Thanks, -m Re: IMXRT1172 LPSPI with EDMA random intermittent SPI SR = REF error Hi @nxp16 , Thank you so much for your interest in our products and for using our community. SR[REF] indicates a receive FIFO overflow. If this flag is really set during a transfer, the recommended recovery is to stop the transfer, empty the RX FIFO, clear REF, and restart the transfer. However, at 500 kHz, this does not look like a normal DMA bandwidth issue, assuming the RX EDMA channel is already prepared/enabled before the SPI clocks start. Since the received data is still correct, I suggest first check whether REF is a stale flag or is being set by the transfer start/stop sequence. For troubleshooting, please try the below: 1. Clear SR[REF] before starting each new transfer. 2. Make sure RX DMA is enabled before TX starts generating clocks. 3. Check whether LPSPI is disabled/re-enabled between transfers. If yes, apply the applicable errata workaround: clear REF after enabling LPSPI, or reset LPSPI before re-enabling. Wish it helps you Best Regards May

RMII 中 imx93 和 eqos 出现 DMA 错误 我正在尝试让以太网与连接到 eqos 的 LAN8742A PHY 配合使用，采用 RMII 模式。 我以 imx93-11x11-frdm.dts 为基础，并进行了以下更改： &iomuxc { pinctrl_eqos: eqosgrp { fsl,pins = < MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e /* OK */ MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e /* OK */ MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e /* OK */ MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e /* OK */ /* MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e */ MX93_PAD_ENET1_RXC__ENET_QOS_RX_ER 0x51e /* OK */ /* MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x51e */ MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e /* OK */ MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e /* OK */ MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e /* OK */ /* refclock for Eth phy */ MX93_PAD_ENET1_TD2__CCM_ENET_QOS_CLOCK_GENERATE_REF_CLK 0x57e /* OK */ /* MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e */ /* MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x5fe */ MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x0000051e /* OK */ /* MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e */ >; }; &eqos { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_eqos>; phy-mode = "rmii"; phy-handle = <&ethphy1>; status = "okay"; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-rates; assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>, <&clk IMX93_CLK_ENET>; assigned-clock-rates = <100000000>, <50000000>; mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; #size-cells = <0>; clock-frequency = <5000000>; ethphy1: ethernet-phy@0 { reg = <0>; eee-broken-1000tx; post-power-on-delay-ms = <100>; reset-gpios = <&pcal6524 19 GPIO_ACTIVE_LOW>; reset-assert-us = <15000>; reset-deassert-us = <100000>; }; }; }; U-Boot 中的结果是： u-boot=> bootp EQOS_DMA_MODE_SWR stuckFAILED: -110 u-boot=> Linux 系统中的结果为： [ 11.484536] imx-dwmac 428a0000.ethernet: Failed to reset the dma [ 11.490536] imx-dwmac 428a0000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed [ 11.499228] imx-dwmac 428a0000.ethernet eth0: __stmmac_open: Hw setup failed 我不明白我哪里做错了，哪里配置错误了，或者为什么DMA无法正确初始化。很明显我漏掉了一些东西（DMA 错误看起来像是芯片内部的错误，所以即使引脚复用出现错误，我认为也不会出现这种情况，而且我已经仔细检查过引脚复用了）。 我检查过的项目： 时钟信号已正确发送至PHY。 与mdio上的PHY通信正常 任何提示都将不胜感激。 顺祝商祺！ 朱利安 Re: DMA Error with imx93 and eqos in RMII uboot 中的 RESET 设置正确。我可以看到 PHY 芯片工作正常（LED 灯亮着），并且可以与它通信，但我仍然会收到 DMA 错误。 我尝试通过 u-boot 中的复位引脚手动禁用和重新启用 PHY，但这并没有任何改变。 以下是 dmesg 的完整日志： [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050] [ 0.000000] Linux version 6.6.36 ([email protected]@UC155-BE2) (aarch64-sprinte450sp-linux-gnu-gcc.br_real (Buildroot 2026.05-2-gf0cfb0f3cf-dirty) 14.3.0, GNU ld (GNU Binutils) 2.45.1) #4 SMP PREEMPT Thu Jul 23 17:04:50 CEST 2026 [ 0.000000] KASLR disabled due to lack of seed [ 0.000000] Machine model: Sprinte 450SP board [ 0.000000] efi: UEFI not found. [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000b0000000, size 256 MiB [ 0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool [ 0.000000] OF: reserved mem: 0x00000000b0000000..0x00000000bfffffff (262144 KiB) map reusable linux,cma [ 0.000000] earlycon: lpuart32 at MMIO32 0x0000000044380000 (options '') [ 0.000000] printk: bootconsole [lpuart32] enabled [ 0.000000] NUMA: No NUMA configuration found [ 0.000000] NUMA: Faking a node at [mem 0x0000000080000000-0x00000000bfffffff] [ 0.000000] NUMA: NODE_DATA [mem 0xafdcf6c0-0xafdd1fff] [ 0.000000] Zone ranges: [ 0.000000] DMA [mem 0x0000000080000000-0x00000000bfffffff] [ 0.000000] DMA32 empty [ 0.000000] Normal empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000080000000-0x00000000bfffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000000bfffffff] [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.1 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] psci: SMC Calling Convention v1.4 [ 0.000000] percpu: Embedded 22 pages/cpu s50600 r8192 d31320 u90112 [ 0.000000] pcpu-alloc: s50600 r8192 d31320 u90112 alloc=22*4096 [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [ 0.000000] Detected VIPT I-cache on CPU0 [ 0.000000] CPU features: detected: GIC system register CPU interface [ 0.000000] CPU features: detected: Virtualization Host Extensions [ 0.000000] CPU features: detected: Qualcomm erratum 1009, or ARM erratum 1286807, 2441009 [ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923 [ 0.000000] alternatives: applying boot alternatives [ 0.000000] Kernel command line: console=ttyLP0,115200 earlycon root=/dev/mmcblk1p2 rootwait rw [ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear) [ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear) [ 0.000000] Fallback order for Node 0: 0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 258048 [ 0.000000] Policy zone: DMA [ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off [ 0.000000] software IO TLB: area num 2. [ 0.000000] software IO TLB: mapped [mem 0x00000000aac00000-0x00000000aec00000] (64MB) [ 0.000000] Memory: 666980K/1048576K available (20608K kernel code, 1638K rwdata, 7744K rodata, 1984K init, 643K bss, 119452K reserved, 262144K cma-reserved) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] rcu: RCU event tracing is enabled. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2. [ 0.000000] Trampoline variant of Tasks RCU enabled. [ 0.000000] Tracing variant of Tasks RCU enabled. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode [ 0.000000] GICv3: 960 SPIs implemented [ 0.000000] GICv3: 0 Extended SPIs implemented [ 0.000000] Root IRQ handler: gic_handle_irq [ 0.000000] GICv3: GICv3 features: 16 PPIs [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000048040000 [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention. [ 0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns [ 0.000000] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns [ 0.008305] Console: colour dummy device 80x25 [ 0.012529] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=96000) [ 0.022711] pid_max: default: 32768 minimum: 301 [ 0.027347] LSM: initializing lsm=capability,integrity [ 0.032485] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear) [ 0.039785] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear) [ 0.048237] cacheinfo: Unable to detect cache hierarchy for CPU 0 [ 0.054656] RCU Tasks: Setting shift to 1 and lim to 1 rcu_task_cb_adjust=1. [ 0.061512] RCU Tasks Trace: Setting shift to 1 and lim to 1 rcu_task_cb_adjust=1. [ 0.069127] rcu: Hierarchical SRCU implementation. [ 0.073752] rcu: Max phase no-delay instances is 1000. [ 0.079653] EFI services will not be available. [ 0.084098] smp: Bringing up secondary CPUs ... [ 0.088812] Detected VIPT I-cache on CPU1 [ 0.088870] GICv3: CPU1: found redistributor 100 region 0:0x0000000048060000 [ 0.088904] CPU1: Booted secondary processor 0x0000000100 [0x412fd050] [ 0.089007] smp: Brought up 1 node, 2 CPUs [ 0.110357] SMP: Total of 2 processors activated. [ 0.115028] CPU features: detected: 32-bit EL0 Support [ 0.120154] CPU features: detected: 32-bit EL1 Support [ 0.125257] CPU features: detected: Data cache clean to the PoU not required for I/D coherence [ 0.133840] CPU features: detected: Common not Private translations [ 0.140073] CPU features: detected: CRC32 instructions [ 0.145196] CPU features: detected: RCpc load-acquire (LDAPR) [ 0.150906] CPU features: detected: LSE atomic instructions [ 0.156453] CPU features: detected: Privileged Access Never [ 0.161998] CPU features: detected: RAS Extension Support [ 0.167374] CPU features: detected: Speculative Store Bypassing Safe (SSBS) [ 0.174355] CPU: All CPU(s) started at EL2 [ 0.178380] alternatives: applying system-wide alternatives [ 0.187922] devtmpfs: initialized [ 0.194925] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.204430] futex hash table entries: 512 (order: 3, 32768 bytes, linear) [ 0.216607] pinctrl core: initialized pinctrl subsystem [ 0.223019] DMI not present or invalid. [ 0.227066] NET: Registered PF_NETLINK/PF_ROUTE protocol family [ 0.233367] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations [ 0.240250] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations [ 0.247941] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations [ 0.255804] audit: initializing netlink subsys (disabled) [ 0.261291] audit: type=2000 audit(0.172:1): state=initialized audit_enabled=0 res=1 [ 0.261671] thermal_sys: Registered thermal governor 'step_wise' [ 0.268851] thermal_sys: Registered thermal governor 'power_allocator' [ 0.274855] cpuidle: using governor menu [ 0.285411] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. [ 0.292025] ASID allocator initialised with 65536 entries [ 0.297950] Serial: AMBA PL011 UART driver [ 0.301832] imx mu driver is registered. [ 0.305685] imx rpmsg driver is registered. [ 0.314130] imx93-pinctrl 443c0000.pinctrl: initialized IMX pinctrl driver [ 0.326962] Modules: 24576 pages in range for non-PLT usage [ 0.326973] Modules: 516096 pages in range for PLT usage [ 0.333009] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages [ 0.344824] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page [ 0.351063] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages [ 0.357821] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page [ 0.364062] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages [ 0.370821] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page [ 0.377062] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages [ 0.383821] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page [ 0.391518] ACPI: Interpreter disabled. [ 0.395792] iommu: Default domain type: Translated [ 0.400360] iommu: DMA domain TLB invalidation policy: strict mode [ 0.406743] SCSI subsystem initialized [ 0.410355] libata version 3.00 loaded. [ 0.410523] usbcore: registered new interface driver usbfs [ 0.415761] usbcore: registered new interface driver hub [ 0.421054] usbcore: registered new device driver usb [ 0.426646] mc: Linux media interface: v0.10 [ 0.430689] videodev: Linux video capture interface: v2.00 [ 0.436154] pps_core: LinuxPPS API ver. 1 registered [ 0.441049] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.450155] PTP clock support registered [ 0.454144] EDAC MC: Ver: 3.0.0 [ 0.457601] scmi_core: SCMI protocol bus registered [ 0.462617] FPGA manager framework [ 0.465811] Advanced Linux Sound Architecture Driver Initialized. [ 0.472369] Bluetooth: Core ver 2.22 [ 0.475701] NET: Registered PF_BLUETOOTH protocol family [ 0.480981] Bluetooth: HCI device and connection manager initialized [ 0.487298] Bluetooth: HCI socket layer initialized [ 0.492148] Bluetooth: L2CAP socket layer initialized [ 0.497182] Bluetooth: SCO socket layer initialized [ 0.502337] vgaarb: loaded [ 0.505250] clocksource: Switched to clocksource arch_sys_counter [ 0.511308] VFS: Disk quotas dquot_6.6.0 [ 0.515015] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) [ 0.521961] pnp: PnP ACPI: disabled [ 0.530265] NET: Registered PF_INET protocol family [ 0.535027] IP idents hash table entries: 16384 (order: 5, 131072 bytes, linear) [ 0.542962] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear) [ 0.551110] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear) [ 0.558774] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear) [ 0.566509] TCP bind hash table entries: 8192 (order: 6, 262144 bytes, linear) [ 0.573930] TCP: Hash tables configured (established 8192 bind 8192) [ 0.580120] UDP hash table entries: 512 (order: 2, 16384 bytes, linear) [ 0.586625] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear) [ 0.593729] NET: Registered PF_UNIX/PF_LOCAL protocol family [ 0.599609] RPC: Registered named UNIX socket transport module. [ 0.605277] RPC: Registered udp transport module. [ 0.609945] RPC: Registered tcp transport module. [ 0.614624] RPC: Registered tcp-with-tls transport module. [ 0.620084] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.627260] PCI: CLS 0 bytes, default 64 [ 0.631165] kvm [1]: IPA Size Limit: 40 bits [ 0.635194] kvm [1]: GICv3: no GICV resource entry [ 0.639942] kvm [1]: disabling GICv2 emulation [ 0.644371] kvm [1]: GIC system register CPU interface enabled [ 0.650191] kvm [1]: vgic interrupt IRQ9 [ 0.654088] kvm [1]: VHE mode initialized successfully [ 0.660051] Initialise system trusted keyrings [ 0.664421] workingset: timestamp_bits=42 max_order=18 bucket_order=0 [ 0.670898] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.676710] NFS: Registering the id_resolver key type [ 0.681531] Key type id_resolver registered [ 0.685658] Key type id_legacy registered [ 0.689659] nfs4filelayout_init: NFSv4 File Layout Driver Registering... [ 0.696326] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... [ 0.703831] 9p: Installing v9fs 9p2000 file system support [ 0.734526] Key type asymmetric registered [ 0.738370] Asymmetric key parser 'x509' registered [ 0.743258] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243) [ 0.750590] io scheduler mq-deadline registered [ 0.755095] io scheduler kyber registered [ 0.759113] io scheduler bfq registered [ 0.766447] EINJ: ACPI disabled. [ 0.773498] Bus freq driver module loaded [ 0.782271] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [ 0.790543] 44380000.serial: ttyLP0 at MMIO 0x44380010 (irq = 17, base_baud = 1500000) is a FSL_LPUART [ 0.799853] printk: console [ttyLP0] enabled [ 0.808289] printk: bootconsole [lpuart32] disabled [ 0.827377] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops) [ 0.835386] imx93-ldb ldb-display-controller: No data-mapping in DT, will use negotiated bus format. [ 0.844862] imx93-ldb ldb-display-controller: Failed to create device link (0x180) with 4ae30000.lcd-controller [ 0.858799] loop: module loaded [ 0.863014] megasas: 07.725.01.00-rc1 [ 0.870948] tun: Universal TUN/TAP device driver, 1.6 [ 0.876567] thunder_xcv, ver 1.0 [ 0.879836] thunder_bgx, ver 1.0 [ 0.883080] nicpf, ver 1.0 [ 0.886825] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version [ 0.894055] hns3: Copyright (c) 2017 Huawei Corporation. [ 0.899390] hclge is initializing [ 0.902728] e1000: Intel(R) PRO/1000 Network Driver [ 0.907598] e1000: Copyright (c) 1999-2006 Intel Corporation. [ 0.913354] e1000e: Intel(R) PRO/1000 Network Driver [ 0.918310] e1000e: Copyright(c) 1999 - 2015 Intel Corporation. [ 0.924238] igb: Intel(R) Gigabit Ethernet Network Driver [ 0.929635] igb: Copyright (c) 2007-2014 Intel Corporation. [ 0.935216] igbvf: Intel(R) Gigabit Virtual Function Network Driver [ 0.941476] igbvf: Copyright (c) 2009 - 2012 Intel Corporation. [ 0.947488] sky2: driver version 1.30 [ 0.951466] usbcore: registered new device driver r8152-cfgselector [ 0.957746] usbcore: registered new interface driver r8152 [ 0.963616] VFIO - User Level meta-driver version: 0.3 [ 0.970278] usbcore: registered new interface driver uas [ 0.975636] usbcore: registered new interface driver usb-storage [ 0.981731] usbcore: registered new interface driver usbserial_generic [ 0.988270] usbserial: USB Serial support registered for generic [ 0.994286] usbcore: registered new interface driver ftdi_sio [ 1.000031] usbserial: USB Serial support registered for FTDI USB Serial Device [ 1.007339] usbcore: registered new interface driver usb_serial_simple [ 1.013862] usbserial: USB Serial support registered for carelink [ 1.019959] usbserial: USB Serial support registered for flashloader [ 1.026317] usbserial: USB Serial support registered for funsoft [ 1.032327] usbserial: USB Serial support registered for google [ 1.038251] usbserial: USB Serial support registered for hp4x [ 1.043996] usbserial: USB Serial support registered for kaufmann [ 1.050089] usbserial: USB Serial support registered for libtransistor [ 1.056614] usbserial: USB Serial support registered for moto_modem [ 1.062880] usbserial: USB Serial support registered for motorola_tetra [ 1.069494] usbserial: USB Serial support registered for nokia [ 1.075326] usbserial: USB Serial support registered for novatel_gps [ 1.081686] usbserial: USB Serial support registered for siemens_mpi [ 1.088040] usbserial: USB Serial support registered for suunto [ 1.093963] usbserial: USB Serial support registered for vivopay [ 1.099966] usbserial: USB Serial support registered for zio [ 1.105629] usbcore: registered new interface driver usb_ehset_test [ 1.114691] input: 44440000.bbnsm:pwrkey as /devices/platform/soc@0/44000000.bus/44440000.bbnsm/44440000.bbnsm:pwrkey/input/input0 [ 1.126836] i2c_dev: i2c /dev entries driver [ 1.133908] imx7ulp-wdt 42490000.watchdog: imx93 wdt probe [ 1.165969] Bluetooth: HCI UART driver ver 2.3 [ 1.170432] Bluetooth: HCI UART protocol H4 registered [ 1.175564] Bluetooth: HCI UART protocol BCSP registered [ 1.180885] Bluetooth: HCI UART protocol LL registered [ 1.186018] Bluetooth: HCI UART protocol ATH3K registered [ 1.191417] Bluetooth: HCI UART protocol Three-wire (H5) registered [ 1.197782] Bluetooth: HCI UART protocol Broadcom registered [ 1.203454] Bluetooth: HCI UART protocol QCA registered [ 1.209726] sdhci: Secure Digital Host Controller Interface driver [ 1.215922] sdhci: Copyright(c) Pierre Ossman [ 1.220572] Synopsys Designware Multimedia Card Interface Driver [ 1.226885] sdhci-pltfm: SDHCI platform and OF driver helper [ 1.233614] ledtrig-cpu: registered to indicate activity on CPUs [ 1.240850] fsl-se-fw se-fw2: failed to init reserved memory region -19 [ 1.247608] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping .... [ 1.254330] usbcore: registered new interface driver usbhid [ 1.259901] usbhid: USB HID core driver [ 1.270337] mmc0: SDHCI controller on 42850000.mmc [42850000.mmc] using ADMA [ 1.302222] hw perfevents: enabled with armv8_cortex_a55 PMU driver, 7 counters available [ 1.312041] cs_system_cfg: CoreSight Configuration manager initialised [ 1.319751] optee: probing for conduit method. [ 1.324215] optee: api uid mismatch [ 1.325699] mmc0: new HS400 Enhanced strobe MMC card at address 0001 [ 1.327700] optee: probe of firmware:optee failed with error -22 [ 1.334598] mmcblk0: mmc0:0001 eMMC 58.2 GiB [ 1.342512] NET: Registered PF_LLC protocol family [ 1.345923] mmcblk0: p1 [ 1.349519] u32 classifier [ 1.352252] mmcblk0boot0: mmc0:0001 eMMC 4.00 MiB [ 1.354567] input device check on [ 1.360666] mmcblk0boot1: mmc0:0001 eMMC 4.00 MiB [ 1.363094] Actions configured [ 1.363485] NET: Registered PF_INET6 protocol family [ 1.368956] mmcblk0rpmb: mmc0:0001 eMMC 4.00 MiB, chardev (234:0) [ 1.372113] Segment Routing with IPv6 [ 1.386309] In-situ OAM (IOAM) with IPv6 [ 1.390278] NET: Registered PF_PACKET protocol family [ 1.395349] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this. [ 1.408425] Bluetooth: RFCOMM TTY layer initialized [ 1.413310] Bluetooth: RFCOMM socket layer initialized [ 1.418455] Bluetooth: RFCOMM ver 1.11 [ 1.422203] Bluetooth: BNEP (Ethernet Emulation) ver 1.3 [ 1.427502] Bluetooth: BNEP filters: protocol multicast [ 1.432721] Bluetooth: BNEP socket layer initialized [ 1.437676] Bluetooth: HIDP (Human Interface Emulation) ver 1.2 [ 1.443589] Bluetooth: HIDP socket layer initialized [ 1.448783] 8021q: 802.1Q VLAN Support v1.8 [ 1.452998] lib80211: common routines for IEEE802.11 drivers [ 1.458652] lib80211_crypt: registered algorithm 'NULL' [ 1.458656] lib80211_crypt: registered algorithm 'WEP' [ 1.458659] lib80211_crypt: registered algorithm 'CCMP' [ 1.458663] lib80211_crypt: registered algorithm 'TKIP' [ 1.458693] 9pnet: Installing 9P2000 support [ 1.463084] Key type dns_resolver registered [ 1.467497] NET: Registered PF_VSOCK protocol family [ 1.486367] registered taskstats version 1 [ 1.490717] Loading compiled-in X.509 certificates [ 1.512663] usb_phy_generic usbphynop1: dummy supplies not allowed for exclusive requests [ 1.521013] usb_phy_generic usbphynop2: dummy supplies not allowed for exclusive requests [ 1.539006] imx93-ldb ldb-display-controller: Failed to create device link (0x180) with ldb-phy [ 1.550623] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops) [ 1.558672] imx93-ldb ldb-display-controller: No data-mapping in DT, will use negotiated bus format. [ 1.569462] imx-dwmac 428a0000.ethernet: IRQ eth_lpi not found [ 1.575451] imx-dwmac 428a0000.ethernet: tx clock enable start [ 1.581464] imx-dwmac 428a0000.ethernet: User ID: 0x10, Synopsys ID: 0x52 [ 1.588255] imx-dwmac 428a0000.ethernet: DWMAC4/5 [ 1.593038] imx-dwmac 428a0000.ethernet: DMA HW capability register supported [ 1.600159] imx-dwmac 428a0000.ethernet: RX Checksum Offload Engine supported [ 1.607283] imx-dwmac 428a0000.ethernet: TX Checksum insertion supported [ 1.613973] imx-dwmac 428a0000.ethernet: Wake-Up On Lan supported [ 1.620110] imx-dwmac 428a0000.ethernet: Enable RX Mitigation via HW Watchdog Timer [ 1.627757] imx-dwmac 428a0000.ethernet: Enabled L3L4 Flow TC (entries=8) [ 1.634536] imx-dwmac 428a0000.ethernet: Enabled RFS Flow TC (entries=10) [ 1.641316] imx-dwmac 428a0000.ethernet: Enabling HW TC (entries=256, max_off=256) [ 1.648876] imx-dwmac 428a0000.ethernet: Using 32/32 bits DMA host/device width [ 1.657380] imx-dwmac 428a0000.ethernet: tx clock disable start [ 1.663414] imx-dwmac 428a0000.ethernet: err_drv_probe [ 1.668557] imx-dwmac 428a0000.ethernet: err_dwmac_init [ 1.677361] ci_hdrc ci_hdrc.0: EHCI Host Controller [ 1.682306] ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1 [ 1.709253] ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00 [ 1.715211] hub 1-0:1.0: USB hub found [ 1.718981] hub 1-0:1.0: 1 port detected [ 1.726882] ci_hdrc ci_hdrc.1: EHCI Host Controller [ 1.731789] ci_hdrc ci_hdrc.1: new USB bus registered, assigned bus number 2 [ 1.753257] ci_hdrc ci_hdrc.1: USB 2.0 started, EHCI 1.00 [ 1.759191] hub 2-0:1.0: USB hub found [ 1.762965] hub 2-0:1.0: 1 port detected [ 1.770674] rtc rtc0: Power loss detected, invalid time [ 1.776048] rtc-pcf85063 0-0051: registered as rtc0 [ 1.781185] rtc rtc0: Power loss detected, invalid time [ 1.786407] rtc-pcf85063 0-0051: hctosys: unable to read the hardware clock [ 1.793553] pca953x 0-0020: supply vcc not found, using dummy regulator [ 1.800254] pca953x 0-0020: using no AI [ 1.804716] i2c i2c-0: LPI2C adapter registered [ 1.810507] pca953x 1-0022: supply vcc not found, using dummy regulator [ 1.817269] pca953x 1-0022: using AI [ 1.822077] at24 1-0050: supply vcc not found, using dummy regulator [ 1.828917] at24 1-0050: 1024 byte 24c08 EEPROM, writable, 16 bytes/write [ 1.835795] i2c i2c-1: LPI2C adapter registered [ 1.841329] i2c i2c-2: LPI2C adapter registered [ 1.846907] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops) [ 1.854932] imx93-ldb ldb-display-controller: No data-mapping in DT, will use negotiated bus format. [ 1.865632] imx-dwmac 428a0000.ethernet: IRQ eth_lpi not found [ 1.871579] imx-dwmac 428a0000.ethernet: tx clock enable start [ 1.877611] imx-dwmac 428a0000.ethernet: User ID: 0x10, Synopsys ID: 0x52 [ 1.884419] imx-dwmac 428a0000.ethernet: DWMAC4/5 [ 1.889206] imx-dwmac 428a0000.ethernet: DMA HW capability register supported [ 1.896327] imx-dwmac 428a0000.ethernet: RX Checksum Offload Engine supported [ 1.903449] imx-dwmac 428a0000.ethernet: TX Checksum insertion supported [ 1.910153] imx-dwmac 428a0000.ethernet: Wake-Up On Lan supported [ 1.916235] imx-dwmac 428a0000.ethernet: Enable RX Mitigation via HW Watchdog Timer [ 1.923878] imx-dwmac 428a0000.ethernet: Enabled L3L4 Flow TC (entries=8) [ 1.930655] imx-dwmac 428a0000.ethernet: Enabled RFS Flow TC (entries=10) [ 1.937446] imx-dwmac 428a0000.ethernet: Enabling HW TC (entries=256, max_off=256) [ 1.945009] imx-dwmac 428a0000.ethernet: Using 32/32 bits DMA host/device width [ 2.091986] imx-dwmac 428a0000.ethernet: tx clock disable start [ 2.092418] sdhci-esdhc-imx 42860000.mmc: Got CD GPIO [ 2.099328] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops) [ 2.111052] imx93-ldb ldb-display-controller: No data-mapping in DT, will use negotiated bus format. [ 2.122102] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops) [ 2.130156] imx93-ldb ldb-display-controller: No data-mapping in DT, will use negotiated bus format. [ 2.134093] mmc1: SDHCI controller on 42860000.mmc [42860000.mmc] using ADMA [ 2.139573] nxp-pca9450 1-0025: pca9451a probed. [ 2.152583] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops) [ 2.160637] imx93-ldb ldb-display-controller: No data-mapping in DT, will use negotiated bus format. [ 2.171559] cfg80211: Loading compiled-in X.509 certificates for regulatory database [ 2.180575] Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7' [ 2.186741] Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600' [ 2.194068] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2 [ 2.197312] clk: Disabling unused clocks [ 2.202716] platform regulatory.0: Falling back to sysfs fallback for: regulatory.db [ 2.214819] ALSA device list: [ 2.217793] No soundcards found. [ 2.221596] Waiting for root device /dev/mmcblk1p2... [ 2.287788] mmc1: host does not support reading read-only switch, assuming write-enable [ 2.298005] mmc1: new high speed SD card at address 0001 [ 2.303890] mmcblk1: mmc1:0001 00000 1.81 GiB [ 2.311020] mmcblk1: p1 p2 [ 2.315100] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops) [ 2.323111] imx93-ldb ldb-display-controller: No data-mapping in DT, will use negotiated bus format. [ 2.339143] exFAT-fs (mmcblk1p2): invalid boot record signature [ 2.345082] exFAT-fs (mmcblk1p2): failed to read boot sector [ 2.350777] exFAT-fs (mmcblk1p2): failed to recognize exfat type [ 2.358002] erofs: (device mmcblk1p2): mounted with root inode @ nid 36. [ 2.364768] VFS: Mounted root (erofs filesystem) readonly on device 179:98. [ 2.371789] devtmpfs: mounted [ 2.375967] Freeing unused kernel memory: 1984K [ 2.380690] Run /sbin/init as init process [ 2.384782] with arguments: [ 2.384785] /sbin/init [ 2.384787] with environment: [ 2.384790] HOME=/ [ 2.384792] TERM=linux [ 4.633259] random: crng init done [ 12.406378] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops) [ 12.414399] imx93-ldb ldb-display-controller: No data-mapping in DT, will use negotiated bus format. [ 12.424617] platform imx-lcdifv3-crtc.0: deferred probe pending 当 ip link 设置 eth0 时（我向驱动程序添加了一些非标准跟踪，以尝试调试此 DMA 问题）： # ip link set eth0 up [ 236.851517] imx-dwmac 428a0000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0 [ 236.859339] imx-dwmac 428a0000.ethernet: tx clock enable start [ 236.974901] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops) [ 236.982933] imx93-ldb ldb-display-controller: No data-mapping in DT, will use negotiated bus format. [ 237.081392] imx-dwmac 428a0000.ethernet eth0: PHY [stmmac-1:00] driver [Generic PHY] (irq=POLL) [ 237.090112] Checking DMA clocks before reset... [ 237.094643] DMA_HW_CAPABILITY = 0x0 [ 237.098124] RESET START: DMA_BUS_MODE = 0x1 [ 237.102301] AFTER WRITE: DMA_BUS_MODE = 0x1 [ 238.107432] POLL RESULT: ret=-110, DMA_BUS_MODE = 0x1 [ 238.112492] imx-dwmac 428a0000.ethernet: Failed to reset the dma [ 238.118519] imx-dwmac 428a0000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed [ 238.127210] imx-dwmac 428a0000.ethernet eth0: __stmmac_open: Hw setup failed [ 238.194819] imx-dwmac 428a0000.ethernet: tx clock disable start ip: SIOCSIFFLAGS: Connection timed out 感谢您的帮助！ 顺祝商祺！ 朱利安 Re: DMA Error with imx93 and eqos in RMII 你好， 请确认PHY中的复位信号是否正确生效。 当 PHY 在短时间内没有获得时钟信号，并且时钟信号恢复后，必须对 PHY 进行 RESET，以锁存所有配置带，恢复到正常工作模式。 请分享您的完整 dmesg 日志。 顺祝商祺！

FETMX6ULL-C：LCD 和 CTP 同时连接时出现随机 CTP I2C 通信错误，CTP 硬件平台：FETMX6ULL-C 核心板。   当仅连接电容式触摸面板 (CTP) GT911 时，该面板能够稳定工作，不会出现任何 I2C 错误。   同时连接液晶显示屏和CTP后，CTP上会出现随机的I2C通信异常，导致触摸功能偶尔失效。 我们怀疑液晶显示电路引入的电磁干扰导致触摸面板的 I2C 信号不稳定。   已附上相关的内核 dmesg 日志以供分析。   我们的软件环境：Linux 4.1.15电路板支持包。.   CTP通过I2C总线进行通信。我们已经检查了硬件线路和电源，但问题仍然存在。   期待您的技术建议。

Getting a Dev Board PCB imported to Altium Our team is working with the S32K148-Q176 Evaluation Board RevB. We are designing a board to interface with the evaluation board and were trying to get a model of it to aid in that endeavor. The files are saved as a BRD when downloaded from your site. We use Altium here and so we cannot import that file. Would your engineering team be able to convert the .BRD to an ASCII .alg file, or another file format that altium can import? Re: Getting a Dev Board PCB imported to Altium Hi @rollypoli  Unfortunately, I do not have a way to convert the Allegro BRD database into Altium format. For similar requests in the past, I have typically recommended using the free Cadence Allegro viewer. Cadence provides a free viewer that can open BRD files and allows you to inspect the PCB database directly. Using the measurement and inspection tools available in the viewer, you should be able to accurately determine the placement and spacing of the connectors, mounting holes, and other mechanical features. This is usually sufficient to reproduce the board outline and connector locations on your own Altium design so that the new PCB remains mechanically compatible with the original board. The free Cadence viewer can be downloaded from: https://www.cadence.com/en_US/home/tools/pcb-design-and-analysis/allegro-downloads-start.html While this is not as convenient as having a native Altium design file, it has worked well for customers who needed to reference an Allegro PCB layout and recreate the relevant mechanical dimensions in another CAD tool. Regards, Lukas

GUIGuider 1.10.1 to 2.0.0 migration We have build our GUIGuider projects in version 1.10.1 and I am interested in migrating to the new 2.0.0 version to check out the new features. I found out the old GUIGuider project file could not be loaded in the new version, and I think it is because of the new JSON structure 2.0.0 projects use. Is there an easy way to migrate the projects to the newer version of GUIGuider or do we have to manually convert it? Re: GUIGuider 1.10.1 to 2.0.0 migration Hi @MJHammers_ICP, As you correctly mention, due to the redesigned architecture and new project structure of GUI Guider v2.0.0, this new version of GUI Guider is not fully backward compatible with GUI Guider v1.x. The recommended path would be to recreate the project in GUI Guider v2.0 rather than attempting a file-level conversion. You can find the recommended migration workflow to help you with this task in the following link: Tutorials — GUI Guider Documentation BR, Edwin.

S32K118 FlexIO こんにちは、 FlexIOモジュールをS32K118でモーターホールセンサー信号の両端検出を実装する件について相談したいです。 現在、BLDCモーターからの3つのホールフィードバック信号の立ち上がりエッジと立ち下がりエッジの両方を取得する必要があります。FlexIOピンを入力キャプチャチャネルとして設定しようとしています。しかし、FlexIOで立ち上がりエッジと立ち下がりエッジを同時に検出するように設定する方法がよくわかりません。 デュアルエッジキャプチャのための適切なFlexIOタイマーとシフターの設定ワークフローを共有してもらえますか?それに、割り込みがすべてのエッジでトリガーできるのか、またS32K118 FlexIOをホール信号サンプリングに使う場合に既知の制限や注意点があるのかも知りたいです。どうもありがとうございます。

未解決: プログラマーは TEA2016 および TEA2017 を書き込むことができません。 お客様はTEA2016およびTEA2017のプログラミング用に、2つのバッチのI2Cプログラマを受け取りました。以前のプログラマは問題なく動作しましたが、新しく納品されたプログラマはプログラミング中にほとんどの場合問題が発生し、プログラミングが不可能でした。お客様からの説明は以下のとおりです。ドキュメントを参照してください。 Re: 尚未解決: 燒錄器不能燒錄 TEA2016和 TEA2017 こんにちは風火 良い一日！ 新しいプログラマーに関する苦情の記録は一切ありません。 プログラミングが成功したサイクル（旧プログラマー使用時）と失敗したサイクル（新プログラマー使用時）で取得したI²C波形を提供してください。 また、これら2つの製品の部品番号や識別番号も教えていただけるととても助かります。私の記憶が正しければ、あなたはRDK01DB1563を使用していますよね？ 良い一日をお過ごしください。幸運を祈ります。 Re: 尚未解決: 燒錄器不能燒錄 TEA2016和 TEA2017   下記は、同じ製品をテストした旧型および新型ボックスの波形です。新型ボックスがテストできない理由を分析するお手伝いをお願いします。 新しいボックステストのFAIL波形は以下のとおりです。 ありがとう！ Re: 尚未解決: 燒錄器不能燒錄 TEA2016和 TEA2017 この投稿に波形を添付しましたので、分析していただけないでしょうか？よろしくお願いいたします！

iMXEBOOKDC5のタッチコントローラーIC部品番号 チームの皆様へ 私はiMXEBOOKDC5とi.MX8ULP EVKを組み合わせて使用しています。 今のところ、すべて順調に動いています。Eインクディスプレイは正常に動作しており、ボタンとジョイスティックも期待どおりに動作しています。 それでは、ディスプレイのタッチパネルを有効にしたいと思います。しかし、EPDモジュールに使われているタッチコントローラーICの部品番号は特定できません。ICのマーキングがレーザーマーキングで消されているように見えます。 私自身も情報を探してみましたが、見つけることができませんでした。 ぜひ教えていただけますか: iMXEBOOKDC5ディスプレイで使用されるタッチコントローラーのIC部品番号。 タッチ機能をサポートする利用可能なLinuxドライバ、ライブラリ、ソフトウェアパッケージのいずれかです。 ご協力ありがとうございます。 よろしくお願いいたします。 評価ボード Re: Touch Controller IC Part Number for iMXEBOOKDC5 こんにちは、 使用されているタッチコントローラーICはGoodix Technology製のGT911です。 次のリンクでドライバーについてご覧いただけます: https://github.com/nxp-imx/linux-imx/blob/lf-6.18.y/drivers/input/touchscreen/goodix.c よろしくお願いいたします。

S32K118 FlexIO 您好。 我想咨询一下关于在 S32K118 上使用 FlexIO 模块实现电机霍尔传感器信号的双边沿检测的问题。 目前，我需要捕获来自 BLDC 电机的三个霍尔反馈信号的上升沿和下降沿。我正在尝试将 FlexIO 引脚配置为输入捕获通道。但是，我不太清楚如何设置 FlexIO 以同时检测上升沿和下降沿。 能否分享一下用于双边沿捕获的 FlexIO 定时器和移位器的正确配置流程？此外，我还想知道是否可以在每个边沿触发中断，以及在 S32K118 平台上使用 FlexIO 进行霍尔信号采样时是否存在已知的限制或注意事项。非常感谢。