Multi Source Translation Content

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

Multi Source Translation Content

讨论

排序依据:
How can I boot the Linux kernel with U-Boot when HAB is enabled? I am using the i.MX8M Nano. I have read the uboot-imx documentation and other related materials, and I am now able to boot U-Boot with secure boot and encrypted boot enabled. Now, I am trying to manually load a pre-built kernel and DTB and boot using the booti command. However, I encountered the following error: I suspect that the error is due to the kernel image not being signed. u-boot=> fatload mmc 2:1 ${loadaddr} Image 28013056 bytes read in 144 ms (185.5 MiB/s) u-boot=> fatload mmc 2:1 ${fdt_addr} imx8mn-ddr3l-evk.dtb 40155 bytes read in 9 ms (4.3 MiB/s) u-boot=> booti ${loadaddr} - ${fdt_addr} Authenticate image from DDR location 0x40400000... bad magic magic=0xff length=0xffff version=0xff bad length magic=0xff length=0xffff version=0xff Bad version magic=0xff length=0xffff version=0xff Error: Invalid IVT structure Authenticate Image Fail, Please check How can I boot the Linux kernel with U-Boot when HAB is enabled? If signing is required, how should I sign the kernel? Additionally, the method described in the earlier guide seems to assume a standalone environment. How can I generate an HAB-compatible image within Yocto? Best regards. Re: How can I boot the Linux kernel with U-Boot when HAB is enabled? Resolved. The reason was that bootargs was not configured. Re: How can I boot the Linux kernel with U-Boot when HAB is enabled? Hi @Harvey021, Thanks for your help. HAB authentication passes now, but I get a kernel panic. Do you know what might be causing this? Best Regards, Re: How can I boot the Linux kernel with U-Boot when HAB is enabled? Please have a reference to the <3. Authenticating additional boot images> of mx8m_secure_boot.txt for kernel signing. About How can I generate an HAB-compatible image within Yocto? -> Please have a reference to <10.9 Security reference design> of IMX_LINUX_USERS_GUIDE.pdf  Regards Harvey
查看全文
HABが有効になっているときにU-BootでLinuxカーネルを起動するにはどうすればよいですか? i.MX8M Nanoを使用しています。 uboot-imx のドキュメンテーションやその他の関連資料を読み、セキュアブートと暗号化ブートを有効にして U-Boot を起動できるようになりました。 現在、ビルド済みのカーネルとDTBを手動でロードし、bootiコマンドを使用して起動しようとしています。ただし、次のエラーが発生しました。 エラーはカーネルイメージが署名されていないことが原因であると思われます。 u-boot=> fatload mmc 2:1 ${loadaddr} Image 28013056 bytes read in 144 ms (185.5 MiB/s) u-boot=> fatload mmc 2:1 ${fdt_addr} imx8mn-ddr3l-evk.dtb 40155 bytes read in 9 ms (4.3 MiB/s) u-boot=> booti ${loadaddr} - ${fdt_addr} Authenticate image from DDR location 0x40400000... bad magic magic=0xff length=0xffff version=0xff bad length magic=0xff length=0xffff version=0xff Bad version magic=0xff length=0xffff version=0xff Error: Invalid IVT structure Authenticate Image Fail, Please check HABが有効になっているときにU-BootでLinuxカーネルを起動するにはどうすればよいですか? 署名が必要な場合、カーネルにどのように署名すればよいですか? さらに、前のガイドで説明した方法は、スタンドアロン環境を前提としているようです。 Yocto内でHAB互換イメージを生成するにはどうすればよいですか? よろしくお願いいたします。 Re: HAB が有効になっているときに U-Boot で Linux カーネルを起動するにはどうすればいいですか? 解決。 その理由は、bootargs が設定されていなかったためです。
查看全文
S32K310 CAN Init Fault 我在使用MCAL版本SW32K3_S32M27x_RTD_R21-11_5.0.0来调用CAN_Init初始化CAN控制器时无法成功,原因是在这个静态代码中,我将会返回一个超时状态,导致初始化失败。 我不知道是否是我理解有误,MCR->SOFTRST已经置1,但是下面的while循环却在等待它等于0,否则会一直等待直到超时错误置位。而且我在修改这个代码让他越过这个while后,在下面的FLEX_ClearRAM以及(base->IFLAG1) = FLEXCAN_IMASK1_BUF31TO0M_MASK语句都会触发我的hardfault。这会导致MCR->FRZ处于置1状态,我的CAN控制器无法工作。我想知道该如何处理,感谢! Re: S32K310 CAN Init Fault Hi@Embedded_novice 这个位需要等待一段时间才能置零,所以要去轮询,至于你的程序超时,那么你应该去看一下这个模块的时钟配置是不是正常的,这应该和时钟配置有关。 回复: S32K310 CAN Init Fault 同时在这个MCAL中,I2C的其中一个函数编写似乎存在语法错误,缺少了},但编译器不报错(可能是因为未调用)
查看全文
802.11n を 2.4GHz 40MHz で接続するようにデバイスを設定するにはどうすればよいですか? 現在、mlanutlを使用して「bandcfg 31」を設定していますが、2.4GHz 40MHzで802.11nを使用して接続できません。 802.11n 2.4GHz 40MHzで接続するには、「bandcfg」の「使用方法」セクションに記載されているように、「bit5:AC 2.4G」を有効にする必要がありますか? また、「AC 2.4G」とはどういう意味ですか?
查看全文
Inquiry Regarding Firmware Integrity Verification After Bootloader Flashing and Porting Functionalit Dear NXP Support Team, I am currently working on a project involving the S32K146 microcontroller and the S32 Design Studio (S32DS) development environment. My question concerns two topics: After the Bootloader has successfully flashed the firmware, I would like to know if there is a way to verify the integrity of the firmware to ensure that it has been correctly written without any corruption. Could you provide guidance on any available methods or tools for achieving this firmware integrity verification? I am also attempting to port an existing MPC5606 project to the S32K146. Specifically, the original MPC5606 project uses the following code for section manipulation:#pragma push #pragma force_active on #pragma section_sconst_type "_bblk_entry" "_bblk_entry" extern __asm void __start(); const uint32_t bblk_entry_addr = (uint32_t)__start; /*vcus*/ #pragma pop         I would like to know how to implement similar functionality in the S32K146 environment. Could you provide guidance on how to achieve this in the S32K146? Thank you for your time and assistance. I look forward to your response.   Best regards, ChandlerX Re: Inquiry Regarding Firmware Integrity Verification After Bootloader Flashing and Porting Function Hi VaneB, I wanted to express my gratitude for the information you provided. It has been extremely helpful to me. Thank you so much for your support! Best regards, ChandlerX Re: Inquiry Regarding Firmware Integrity Verification After Bootloader Flashing and Porting Function Hi @ChandlerX  1. Please refer to the following link where this topic has been discussed, as it may be helpful to you: Secure boot implementation for boot loader as well as application image security 2. To port the code from the MPC5606 to the S32K146, you will need to adjust it for the GCC compiler used in the S32K146 environment. Unlike the MPC5606, GCC does not use pragmas for section manipulation but instead relies on __attribute__((section(".user_section"))). For further guidance, please refer to the following links: Common Function Attributes HOWTO: Place custom data into flash memory BR, VaneB
查看全文
当启用 HAB 时,如何使用 U-Boot 启动 Linux 内核? 我正在使用 i.MX8M Nano。 我已经阅读了 uboot-imx 文档和其他相关材料,现在我能够在启用安全启动和加密启动的情况下启动 U-Boot。 现在,我正在尝试手动加载预构建的内核和 DTB 并使用 booti 命令启动。但是,我遇到了以下错误: 我怀疑该错误是由于内核映像未签名造成的。 u-boot=> fatload mmc 2:1 ${loadaddr} Image 28013056 bytes read in 144 ms (185.5 MiB/s) u-boot=> fatload mmc 2:1 ${fdt_addr} imx8mn-ddr3l-evk.dtb 40155 bytes read in 9 ms (4.3 MiB/s) u-boot=> booti ${loadaddr} - ${fdt_addr} Authenticate image from DDR location 0x40400000... bad magic magic=0xff length=0xffff version=0xff bad length magic=0xff length=0xffff version=0xff Bad version magic=0xff length=0xffff version=0xff Error: Invalid IVT structure Authenticate Image Fail, Please check 当启用 HAB 时,如何使用 U-Boot 启动 Linux 内核? 如果需要签名,我应该如何对内核进行签名? 此外,早期指南中描述的方法似乎假设了一个独立的环境。 如何在 Yocto 中生成与 HAB 兼容的图像? 顺祝商祺! 回复:当启用 HAB 时,如何使用 U-Boot 启动 Linux 内核? 已解决。 原因是没有配置 bootargs。
查看全文
S32 Design studio for ARM 2.2 License extend Hi,     I will use S32 Design studio for ARM 2.2 , pls help me, tks. Item Description S32 Design Studio for ARM v2.2 Activation Code: 067C-DFBC-9C46-C280 Re: S32 Design studio for ARM 2.2 License extend Hi,  your S32DS license has been extended. 
查看全文
ブートローダのフラッシュおよびポーティング機能後のファームウェアの完全性検証に関するお問い合わせ NXPサポートチームの皆様へ 現在、S32K146マイコンと開発環境S32 Design Studio(S32DS)のプロジェクトに取り組んでいます。私の質問は2つのトピックに関するものです。 ブートローダーがファームウェアを正常にフラッシュした後、ファームウェアの整合性を確認して、ファームウェアが破損せずに正しく書き込まれていることを確認する方法があるかどうかを知りたいのですが。このファームウェアの整合性検証を実現するために利用可能な方法やツールについて、ガイダンスを提供していただけますか? また、既存のMPC5606プロジェクトをS32K146に移植しようとしています。具体的には、元の MPC5606 プロジェクトでは、セクション操作に次のコードを使用します #pragma。 #pragma force_active オン #pragma section_sconst_type 「_bblk_entry」「_bblk_entry」 extern __asm void __start(); 定数 uint32_t bblk_entry_addr = (uint32_t)__start;/*VCUS*/ #pragma ポップ S32K146環境で同様の機能を実装する方法を知りたいです。これをS32K146で達成するためのガイダンスを提供していただけますか? お時間を割いていただき、ありがとうございました。皆様のご回答をお待ちしております。   よろしくお願いいたします チャンドラーX Re: ブートローダのフラッシュ後のファームウェアの整合性検証とポーティング機能に関するお問い合わせ こんにちはベーンB、 皆様からご提供いただいた情報に感謝の意を表したいと思います。それは私にとって非常に役に立ちました。応援いただき、誠にありがとうございます! よろしくお願いいたします チャンドラーX
查看全文
How can I configure my device to connect using 802.11n at 2.4GHz 40MHz? I am currently using mlanutl and setting 'bandcfg 31', but I am unable to connect using 802.11n at 2.4GHz 40MHz. To connect at 802.11n 2.4GHz 40MHz, is it necessary to enable 'bit5: AC 2.4G' as mentioned in the 'Usage' section of 'bandcfg'? Also, what does 'AC 2.4G' mean? Re: How can I configure my device to connect using 802.11n at 2.4GHz 40MHz? Dear @mkawa , Band width control or limitation is not implemented on STA side. The better way is to set in on AP or router side.  [Note] It is worthing noticing that disconnection maybe occur if you set only 40M band width to be permitted due to hostapd mechanism. Because hostapd will switch from 40M to 20M when signals quality is bad. For 802.11n, this is regular setting: ...... ht_capab=[HT40+][SHORT-GI-20][SHORT-GI-40] ...... So it is not recommended that you try this! Thanks1 Regards, weidong
查看全文
如何配置我的设备以使用 2.4GHz 40MHz 的 802.11n 进行连接? 我目前正在使用 mlanutl 并设置“bandcfg 31”,但无法使用 2.4GHz 40MHz 的 802.11n 进行连接。 要以 802.11n 2.4GHz 40MHz 进行连接,是否需要启用“bandcfg”的“使用”部分中提到的“bit5:AC 2.4G”? 另外,“AC 2.4G”是什么意思?
查看全文
GPU stress test in imx8qxp Hi  NXP, How to stress the GPU in imx8qxp, Can you please guide me. Provide sample code for gpu stress test. Re: GPU stress test in imx8qxp Hi @Rita_Wang , Thank you! Re: GPU stress test in imx8qxp Benchmark Tests: /usr/bin/glmark2-es2-wayland Re: GPU stress test in imx8qxp Hi , I found that glmark2 utility is used to stress the gpu, and I just enabled it in the board. glmark2-es2 , glmark-es2-drm , glmark-es2 -wayland , these 3 utilities showing. Among these which should I prefer and can you please provide the commands needed. Re: GPU stress test in imx8qxp We have the GPU sdk that include several examples for stress the GPU on the Linux BSP, also it includes a benchmark for the testing, you can check the hands on I attach to you. The method is the same. Re: GPU stress test in imx8qxp Hi @Rita_Wang , BSP version is imx-5.10.72-2.2.0 . Re: GPU stress test in imx8qxp I will confirm it for you, which version BSP are you using?
查看全文
imx8qxp での GPU ストレステスト こんにちはNXPの、 imx8qxpでGPUに負荷をかける方法、ガイドしていただけますか。GPU ストレス テストのサンプル コードを提供します。 Re: imx8qxp での GPU ストレステスト こんにちは @Rita_Wang 、 ありがとうございます! Re: imx8qxp での GPU ストレステスト ベンチマークテスト: /usr/bin/glmark2-es2-ウェイランド Re: imx8qxp での GPU ストレステスト こんにちは glmark2ユーティリティがGPUにストレスを与えるために使用されていることを発見し、ボードで有効にしました。glmark2-es2 , glmark-es2-drm , glmark-es2 -wayland , これらの3つのユーティリティを示しています。これらの中で、私が好むべきであり、必要なコマンドを提供していただけますか。 Re: imx8qxp での GPU ストレステスト 私たちは、Linux BSP上のGPUにストレスを与えるためのいくつかの例を含むGPU SDKを持っています、また、それはテストのためのベンチマークを含んでいます、あなたは私があなたに添付するハンズオンをチェックすることができます。方法は同じです。 Re: imx8qxp での GPU ストレステスト こんにちは @Rita_Wang 、 BSP のバージョンは imx-5.10.72-2.2.0 です。 Re: imx8qxp での GPU ストレステスト 確認します、どのバージョンのBSPを使用していますか?
查看全文
C Compiler error Hi, I am using the S32G3 development board to port rtos, there is a problem with the compilation, see the picture below, how do I choose the Libraries support, and if I want to solve the problem of "cannot read spec file 'nano.specs'",I What should I do? S32G-VNP-RDB3  Re: C Compiler error Hi @jiajun,  Thank you for contacting NXP Support! I have reviewed your issues with the S32G example, and it seems that you met with the same issues that are described on the following community thread: unable to build Uart_Example_S32G274A_M7 - NXP Community Please have a look to that thread and tell me if you have questions. 
查看全文
imx8qxp 中的 GPU 压力测试 你好,恩智浦, 如何在 imx8qxp 中强调 GPU,您能指导我吗?提供gpu压力测试的示例代码。 回复:imx8qxp 中的 GPU 压力测试 你好@Rita_Wang , 谢谢你! 回复:imx8qxp 中的 GPU 压力测试 基准测试: /usr/bin/glmark2-es2-wayland 回复:imx8qxp 中的 GPU 压力测试 你好 , 我发现 glmark2 实用程序用于强调 gpu,我刚刚在主板上启用了它。glmark2-es2 , glmark-es2-drm , glmark-es2 -wayland ,显示这 3 个实用程序。其中我应该选择哪一个?您能否提供所需的命令? 回复:imx8qxp 中的 GPU 压力测试 我们有 GPU sdk,其中包含几个用于在 Linux BSP 上强调 GPU 的示例,还包括一个测试基准,您可以检查我附给您的实践。方法是一样的。 回复:imx8qxp 中的 GPU 压力测试 你好@Rita_Wang , BSP版本是imx-5.10.72-2.2.0。 回复:imx8qxp 中的 GPU 压力测试 我帮您确认一下,您使用的是哪个版本的BSP?
查看全文
[imx8mp] use FLEXCAN2 controller by M7 Hello everyone, I am new here and I got my hands on an imx8mp µC. On the µC I want to run an application which needs two CANs. For this µC are CAN demo implementations available, which I am able to run on my Hardware. To run one of this examples on FLEXCAN2 instead of FLEXCAN1 the board configuration has to change. In particular I added the PIN and Clock config for FLEXCAN2. Currently the initialization for FLEXCAN1 is running fine, but the initialization of FLEXCAN2 is stuck while disabling the FLEXCAN Module.  Within the Demo Code is a init for an specific GPIO pin. /* GPIO5_IO05 is used to control CAN1_STBY which is ebaled active high */ gpio_pin_config_t config = {kGPIO_DigitalOutput, 1, kGPIO_NoIntmode}; GPIO_PinInit(GPIO5, 5U, &config); I do not set an GPIO for CAN2 and I think there is my issue. Does anyone know where I can find the information which GPIO I have to use for CAN2? Thanks for your help in advance. Greetings schwammal i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: [imx8mp] use FLEXCAN2 controller by M7 Hi Aldo, thanks for this information. From the Files you have shared I assume, that I have to set the MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 to high to switch for CAN2. The initialization is still not working properly, but I will talk to my colleagues about it bevor posting an update. Best regards schwammal Re: [imx8mp] use FLEXCAN2 controller by M7 Hello, it is actually a bit difficult to use FlexCAN2 on the EVK, as the pins used for this one are shared with PDM and also there is a switch that need to be enabled in order for it to actually be selected. So, it is not enough to just mux the FlexCAN correctly but to set this switch as well, to see an example of such implementation one could refer to the Linux Device tree: https://github.com/nxp-imx/linux-imx/blob/lf-6.6.y/arch/arm64/boot/dts/freescale/imx8mp-evk.dts#L422 https://github.com/nxp-imx/linux-imx/blob/lf-6.6.y/arch/arm64/boot/dts/freescale/imx8mp-evk.dts#L1077 https://github.com/nxp-imx/linux-imx/blob/lf-6.6.y/arch/arm64/boot/dts/freescale/imx8mp-evk.dts#L1090 Best regards/Saludos, Aldo.
查看全文
Problems with elf File generated by MCUXpresso Good afternoon,  due to problems with the on board debug probe on the FRDM-K66 board and problems of this board with Segger J-Link Plus, I want to use Segger's Ozone and generate the elf file with MCUXPresso.  After Debug->Start Debug Session -> Download and Reset Program the program should start executing the function main(). The corresponding map file shows that main() starts at 0x428 in the program memory. extract from frdmk66f_lwip_tcpecho_bm.map .text.main 0x00000428 0x240 ./source/lwip_tcpecho_bm.o 0x00000428 main In Ozone at the disassembly window everything looks alright but the code line in the file scope window does not match to the reset conditions. If I understand elf files correctly, the C-code and the corresponding executabble code are linked together. Here, the executable code starts at the right position but is not linked to the corresponding c-code which would be the first non comment or signal declaration line in main(). Thanks in advance for your help Christof Abt Re: Problems with elf File generated by MCUXpresso Hello, I am glad to hear that.  Any new issues, welcome to create a new post. BRs, Celeste Re: Problems with elf File generated by MCUXpresso Hello all,  I have just found out a working designflow with the FRDM-K66F evaluation board. The on board debugger often dies when the board is connected to a Windows 10 computer. I think it is a problem with the software on the additional microcontroller on the board.  I connected a SEEGER J-link and the connection was established but afterwards the whole system stalled. Yesterday I updated the MCUXpresso IDE to version 24.12.148 and this combination of an external debugger, the FRDM-K66F and the MCUXpresso seems to work.  My problem is solved! Thanks for your support Re: Problems with elf File generated by MCUXpresso Hello @ChristofAbt , Thanks for your post. We don't have Ozone on our side, so I'm unable to replicate your issue in the exactly same way. I used the on-board debugger to debug the axf file generated by MCUXPresso and didn't encounter any problems. In the .map file: .text.main 0x000005fc 0x188 ./source/lwip_tcpecho_bm.o 0x000005fc main Through the disassembly in the following way. You can see from the following picture that there is no problem.   You mentioned that your ELF file was generated by MCUXpresso. Could you please tell me how exactly you generated it? BRs, Celeste Re: Problems with elf File generated by MCUXpresso Sorry, I have forgotten to add the screenshot
查看全文
PN7642 MCUXpresso SDK v02.15.00 example import Hello!  I`m using MCUXpresso IDE v11.9.1 [Build 2170] [2024-04-19]. After  PN7642 MCUXpresso SDK v02.15.00 installation I`m trying to import example from SDK but I cannot complete example import because of error that is shown after example selection  There was no such problem with previous SDK version. What can be the reason and how to fix it?  Thanks in advance. Artem Re: PN7642 MCUXpresso SDK v02.15.00 example import Thank you! Now all is OK. Re: PN7642 MCUXpresso SDK v02.15.00 example import Hello @ArtemPN, Hope you are doing well. Please, unzip the SDK package by right clicking the file in the Installed SDKs window > Unzip archive: After this, try importing a project from the SDK. Please, let me know your findings. Regards, Eduardo.
查看全文
Reason for disable of clock gate before setting the module clock Hi all, I noticed that void BOARD_BootClockRUN(void) disables clock gates before configuring the module clocks in the SDK. Could someone explain the reason? For example, uart module Best regards, Doris Re: Reason for disable of clock gate before setting the module clock Hi @MCW  Thank you for your interest and my apologies for the delayed respose! The main reason is to safely change the  clock mux settings for a clock. Take for example the LPUART clock figure you attached: Yes, LPUART clocks  are shut down, but after that the mux settings for LPUART clocks are changed. This is my interpretation according to section 14.6.1.7 Clock Switching Multiplexers of the RT1060 RM, there are some asynchronous muxes, that could cause undersired clock glitches.  Also the BOARD_BootClockRUN(void) is auto generated by the Config Tool's Clock Tool,  if a clock is disabled in the Clocks tool diagram, it is expected that will be disabled on the generated code.  I hope this could help you! Diego
查看全文
Setting S32K312 PLL then system will reset Hi All, The customer setting S32K312 PLL then system will reset, attached file is the customer sample code. could you give me some comments? thanks. FUNC(void, SYSDAL_APPL_CODE) SysDal_DriverInitZero(void) {     OsIf_Init(NULL_PTR);     /* Initialise MCU Driver */ #if (MCU_PRECOMPILE_SUPPORT == STD_ON)     Mcu_Init(NULL_PTR); #else     Mcu_Init( &Mcu_Config ); #endif     /* Set the CPU Clock to the PLL */ #if (MCU_INIT_CLOCK == STD_ON)     Mcu_InitClock(McuClockSettingConfig_HighPerf);  // only do this setting, system will reset every one second.  #endif #if(MCU_NO_PLL == STD_OFF)     /* Wait until the PLL is locked */     while (MCU_PLL_LOCKED != Mcu_GetPllStatus()); //include this setting, system will reset one time only.     /* Activate the PLL Clock */     Mcu_DistributePllClock(); //include this setting, system will reset one time only. #endif/*MCU_NO_PLL == STD_OFF*/     /* Initialize PORT */     Port_Init( &Port_Config );     /* Set the MCU to RUN mode */     Mcu_SetMode(McuModeSettingConf_Run); } Main Loop     for (;;) {                 (void)Dio_FlipChannel((Dio_ChannelType)DioConf_DioChannel_View1);     } Re: Setting S32K312 PLL then system will reset Please refer to the discussion in HSE PLL configuration. Re: Setting S32K312 PLL then system will reset Hi Robin Thank for your reply, the system reset problem is fixed. One more question, S32K3xx_DCF_clients.xlxs mentions HSE_CLK_MODE_AND_GSKT_CTRL register can set to 1x then HSE clock can set up to 120MHz, but how to change register setting? Because I can't find HSE_CLK_MODE_AND_GSKT_CTRL register in reference manual, I have found related register is HSE_CLK_MODE_OPTION, but that is read only register. Thanks. Re: Setting S32K312 PLL then system will reset Hi Please check if it is related to the reasons mentioned in the following discussion: If I don't give s32k312 delay, the CAN stop during operation I checked your Clock_Ip_PBcfg.c, and it seems to be caused by it: { AIPS_SLOW_CLK, 4U, { 0U, } }, { HSE_CLK, 1U, { 0U, } }, Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------
查看全文
IMX93 - AHAB セキュアブート - SRKテーブル NXPの専門家の皆さん、こんにちは。 私はIMX93プロセッサでAHAB SecureBootを勉強しており、証明書を生成するためにCSTツールを使用しています。 多くの例は、4つのリーフ(SRKn、1から4までのn)を持つPKIツリーの生成を示しています。 生成後、SRK_TableとSRK_TableFuseを生成しなければなりません。 SRK_Tableは画像に追加され、SRK_TableFuseをeFuseにフラッシュする必要があります。 CST ToolはSRK_TableFuseを16ワードとして生成しますが、リファレンスマニュアルには16個のヒューズ(Yが0から15までのOES_SRKHy)がありますが、そのうちのいくつかは予約されています。 これらのeFuse(8から15までのヒューズ)もフラッシュできますか? さらに、ターゲットに対して 1 つの証明書のみを含む SRK テーブルを生成できますか? どうもありがとうございます! 日時:IMX93 - AHABセキュアブート - SRKテーブル git の例では、証明書は sha384 で生成されています。
查看全文