板载 LPC LINK-2 是否适用于 LPC55S16-EVK 这 在 木板 低压控制电路 未找到 Link - 2 探测器。 WIN11 或该 EVK 不支持此功能吗？ 我以前在其他基于 LPC4300 的 EVK 上多次使用过它。 我很困惑...这个 LPC55S16 EVK 板是否适用？ 回复：板载 LPC LINK-2 是否适用于 LPC55S16-EVK 亚历克斯，谢谢你的帮助。我所有问题的根本原因是 USB 电缆有问题。将其换掉并扔掉。 一切都如广告宣传的那样。板载 LPC Link2、MCU Link Pro 和 MCU Link 均工作正常。下载并运行了一堆应用程序。 这是我方操作员的错误。 认为这已经结束了。 回复：板载 LPC LINK-2 是否适用于 LPC55S16-EVK 我尝试了CMSIS-DAP_2.1.3_83。 我得到以下信息： 无法打开 DFU 设备 04f2:b760 无法打开 DFU 设备 04f2:b760 无需启动 启动失败： 确保单个 LPC18xx 或 LPC43xx MCU 已连接并配置为从 USB 启动。 在我看来，link2 lpc43XX 没有被枚举为 DFU 设备。 如果我运行任何其他脚本，如 boot_lpcscrypt.cmd 或LPCScrypt_CLI.cmd - 我会得到相同的结果。 很确定 Link2 没有枚举，因此找不到 DFU 设备 04f2:b760。 你确定这对这个 EVK 真的有用吗？ 我有 2 个全新购买的。跳线处于默认位置。我将 P6 更改为添加 P6 用于 DFU 模式，没有任何枚举周期。 由于无法下载图像，因此无法运行任何东西。 您有其中一种可以尝试吗？ 回复：板载 LPC LINK-2 是否适用于 LPC55S16-EVK JP7 默认为打开状态。 当我在 hello world 应用程序上运行调试器时，没有发现任何内容。 意思是它没有找到任何可以连接的 cmsis link 2 调试器？ 那么解决方案是什么？ 回复：板载 LPC LINK-2 是否适用于 LPC55S16-EVK 问题是——为什么“板载LPC Link 2”不能和这些 EVK 兼容？如果真是这样——为什么用户手册里没有说明呢？我花了一个小时琢磨着这玩意儿能用，就像我以前用过的 EVK 一样。看来我得开门见山地买个 MCU Link Pro 了。我的旧硬件库存里还有几个旧的 LPC Link 2。我本来以为这玩意儿能即插即用。结果它内置了板载 LPC Link 2——这玩意儿到底是什么鬼？

搭載されているLPC LINK-2はLPC55S16-EVKで動作しますか? の オン ボード LPC Link-2 プローブが見つかりません。 これは WIN11 またはこの EVK ではサポートされていませんか? 私は過去にこれを他のLPC4300ベースのEVKで何度も使用しました。 戸惑っちゃいます...このLPC55S16 EVKボードでは機能しますか? Re:オンボードLPC LINK-2はLPC55S16-EVKで動作しますか アレックス、すべての助けに感謝します。私のすべての問題の根本的な原因は、USBケーブルの不良でした。それを交換して捨てました。 すべてが宣伝どおりに機能します。オンボードLPC Link2、MCU Link Pro、MCU Linkはすべて正常に動作します。たくさんのアプリをダウンロードして実行しました。 私の側のオペレーターエラー。 これは閉じたと考えてください。 Re:オンボードLPC LINK-2はLPC55S16-EVKで動作しますか CMSIS-DAP_2.1.3_83を試してみました。 私は次のように答えます。 DFUデバイス04f2:b760を開くことができません DFUデバイス04f2:b760を開くことができません 起動するものはありません 起動に失敗しました: 単一のLPC18xxまたはLPC43xx MCUが接続され、USBから起動するように設定されていることを確認します。 私には、link2 lpc43XXがDFUデバイスとして列挙されていないように見えます。 boot_lpcscrypt.cmdやLPCScrypt_CLI.cmdなどの他のスクリプトを実行しても、同じ結果が得られます。 Link2 が列挙されていないことは確かです。そのため、DFU デバイス 04f2:b760 は見つかりません。 これが実際にこのEVKで機能すると確信していますか? 私は新品で購入したこれらのうちの2つを持っています。ジャンパーはデフォルトの位置にあります。P6を変更してDFUモードのP6を追加しますが、ピリオドを列挙するものはありません。 イメージをダウンロードできないため、何も実行できません。 あなたはこれらのうちの1つを試してみますか? Re:オンボードLPC LINK-2はLPC55S16-EVKで動作しますか JP7 のデフォルトは open です。 hello worldアプリでデバッガを実行すると、何も見つかりません。 mesning接続するCMSISリンク2デバッガが見つかりませんか? では、解決策は何ですか? Re:オンボードLPC LINK-2はLPC55S16-EVKで動作しますか 問題は、なぜ「オンボードLPCリンク2」がこれらのEVKで動作しないのかということでした。そして、もしそうなら、なぜ彼らはユーザーマニュアルのどこかにそれを述べないのですか?私はこれがうまくいくと思って1時間を費やしました、それは私が以前に使用したEVKでそうであったように。私は本題に入り、MCUリンクプロを購入すると思います。古いハードウェアの備蓄のどこかに古いLPCリンク2がいくつかあります。 これはプラグアンドプレイになると思っていました。オンボードのLPCリンク2が組み込まれています-一体何。

Prevention of USB Suspend Mode in PN7462 We want to exercise the Suspend Mode on PN7462 EVK on the phExCcid SDK example. The EVK is connected to the Laptop through a micro USB cable. We configured the macro as PH_EXNFCCCID_USB_IF_USB_SUSPEND_RESUME_FTR 1 and run the code in debug mode. I am getting prevention reason as E_HOSTCOMM_ONGOING though there is no ongoing communication with the Host. Why is there prevention? Or could you share a proven example of Suspend Mode? PN7462 Thanks Re: Prevention of USB Suspend Mode in PN7462 @KaiLi Thanks for pointing to the right document. The PH_EXCCID_USB_IF_USB_REMOTE_WAKEUP_FTR macro also needs to be set as 1. Re: Prevention of USB Suspend Mode in PN7462 Hello @Bhavin-Dhulkotiya  It's recommended that you refer to the below example and document to debug your device. Example project: SW368334\ExamplesPN7462AU\phExNFCCcid Document: https://www.nxp.com/docs/en/user-guide/UM10915.pdf BR kelly

YOCTO build : vulkan-cts:do_compile failed. imx-image-multimedia, imx8mpevk Hello, I hope this email finds you well. I'm encountering an issue while attempting to build Yocto and would greatly appreciate your assistance in resolving it. Here are the details of my build environment: Build PC:     Processor: i5-12400     RAM: 16GB     Storage: 512GB SSD     Graphics: None     OS: Ubuntu 22.04.1 Target Board:     imx8mpevk Build Environment:     imx-docker: imx-6.6.3-1.0.0     Dockerfile: Dockerfile-Ubuntu-22.04     Build docker image:             ./docker-build.sh Dockerfile-Ubuntu-22.04         Edit env.sh:         IMAGES="imx-image-multimedia"     Edit yocto-build.sh:         remove line:             bitbake ${IMAGES}         add line:             /bin/bash         Build Execution Command:         ./docker-run.sh imx-6.6.3-1.0.0/yocto-build.sh         bitbake vulkan-cts -c cleanall && bitbake vulkan-cts     Error message: =============================================================== Build Configuration: BB_VERSION           = "2.6.0" BUILD_SYS            = "x86_64-linux" NATIVELSBSTRING      = "universal" TARGET_SYS           = "aarch64-poky-linux" MACHINE              = "imx8mpevk" DISTRO               = "fsl-imx-xwayland" DISTRO_VERSION       = "6.6-nanbield" TUNE_FEATURES        = "aarch64 armv8a crc crypto" TARGET_FPU           = "" meta meta-poky            = "HEAD:046b70083f3bc9e25f547e8026400032f5c563d9" meta-oe meta-multimedia meta-python          = "HEAD:1750c66ae8e4268c472c0b2b94748a59d6ef866d" meta-freescale       = "HEAD:0a73d1bdd7713a6189482e463c98043c9939a2a2" meta-freescale-3rdparty = "HEAD:7725256e3859b62f1ff201db7f2cf7026c17656d" meta-freescale-distro = "HEAD:4f1f101ebab5eb054bfbed10b247fc0547b30793" meta-imx-bsp meta-imx-sdk meta-imx-ml meta-imx-v2x         = "HEAD:773c0049c3b35af8f5b5bdf8da78a6236a4fc184" meta-nxp-demo-experience = "HEAD:db34fa86ad5f3c0d9c0a6c68f5f20240c04f2bfb" meta-arm meta-arm-toolchain   = "HEAD:4d22f982bce8dff6f8c4d11845c47a4d39f961c6" meta-chromium        = "HEAD:dc31889c0899971def535dc1c040edf18bc16691" meta-clang           = "HEAD:9b08495e6bcef524789aefb6a7cc80fdfd2ff409" meta-gnome meta-networking meta-filesystems     = "HEAD:1750c66ae8e4268c472c0b2b94748a59d6ef866d" meta-qt6             = "HEAD:fd054cf5fc1b50d50cd606384ab338c6d9206437" meta-parsec meta-tpm             = "HEAD:070a1e82cc59424d230a23c0b2a104b01fbaa2ad" meta-virtualization  = "HEAD:9e92984ff47b3ca2106b1d27a93af061b28d1e8a" Initialising tasks: 100% |##########################################################################################################################################| Time: 0:00:00 Sstate summary: Wanted 19 Local 0 Mirrors 0 Missed 19 Current 605 (0% match, 96% complete) NOTE: Executing Tasks ERROR: vulkan-cts-1.3.3.1-r0 do_compile: ExecutionError('/home/mnd/work/yocto/imx-6.6.3-1.0.0-build/build_fsl-imx-xwayland/tmp/work/armv8a-mx8mp-poky-linux/vulkan-cts/1.3.3.1/temp/run.do_compile.2956', 1, None, None) ERROR: Logfile of failure stored in: /home/mnd/work/yocto/imx-6.6.3-1.0.0-build/build_fsl-imx-xwayland/tmp/work/armv8a-mx8mp-poky-linux/vulkan-cts/1.3.3.1/temp/log.do_compile.2956 ... =============================================================== During the build process, I encountered an error specifically when attempting to build vulkan-cts. I have attached the error log file generated by the build command "bitbake vulkan-cts" for your reference. Your guidance on resolving this issue would be immensely helpful. Please let me know if you require any further information. Thank you very much for your assistance. Best regards, Patrick Kim Linux Yocto Project Re: YOCTO build : vulkan-cts:do_compile failed. imx-image-multimedia, imx8mpevk Thank you!! The solution you provided works well.

Installation of S32DS for S32 platform with S32 RTD Hello, I would like to install S32DS for S32 platform, with S32 RTD, for software development targeting S32K344. I went to S32 RTD page and downloaded HVBMS package: The downloaded file is 'NXP_Multi_Installer_08.04.24.095916_setup.exe'. However, when installing it, I got the following errors and eventually have to quit the installation process:   Please advise on how to resolve such "SSL certificate problem...". Thank you. Re: Installation of S32DS for S32 platform with S32 RTD Hi Robin, I have this doc instead: By following the steps in the doc, I am able to install the sw tools and build the projects referenced in Ch. 5 of the document. Thanks. Re: Installation of S32DS for S32 platform with S32 RTD Hi Robin, I searched for "Ug763620 - HVBMS Software Installation Guide (2.0)" while logged in at the NXP site, but cannot find such document. Could you please provide it? Thank you. John Re: Installation of S32DS for S32 platform with S32 RTD Have you downloaded the Ug763620 - HVBMS Software Installation Guide (2.0)?  Please note that this document is confidential and therefore can only be downloaded with a valid NDA through the link I sent you via private message. Re: Installation of S32DS for S32 platform with S32 RTD Hi Robin, Thank you for the reply. After working with our IT team and disabled our firewall temporarily, I was able to run 'NXP_Multi_Installer_09.04.24.125506_setup.exe', which then eventually downloaded all 16 components: However, now my question is: What is the correct order of going into each of the above 16 folders and install the component properly? Our plan is to develop RTD based application software, with FreeRTOS, targeting the S32K344 MCU, and have it running on the RD-K344BMU eval board initially. If successful, then we will attempt to run such software on our own custom board with the S32K344 MCU on-board. Please advise. Thanks. Re: Installation of S32DS for S32 platform with S32 RTD Hi Sorry for replying to you so late. There was a problem with the company's network a few days ago. I just saw your question on the internal system today. I tried to download BMS Application 0.8.0 today. I haven't encountered the problem you mentioned. Does your colleague's computer have the same problem downloading? Have you contacted your IT to check on the issue? Best Regards, Robin

FatFs directories explaination Hello, In the SDK for RT1xxx I find the meddleware related to FatFs. It is hosted on github here https://github.com/nxp-mcuxpresso/fatfs/tree/mcux_release In there I find some directories that implement abstraction for sd, ram disk, mmc, etc. Can you explain the fsl_usb_disk directory? Where is the filesystem archived? In ram like the ram disk? best regards Max 回复： FatFs directories explaination Hi @mastupristi , Yes, your understanding is absolutely correct. Best regards, Gavin 回复： FatFs directories explaination Hi @Gavin_Jia , let me see if I have understood correctly: in this scenario, the RT1xxx microcontroller is usb host, right? And the device is a usb storage stick, right? best regards Max 回复： FatFs directories explaination Hi @mastupristi , Thanks for your interest in NXP MIMXRT series! In the RT series SDK, the fsl_usb_disk is the abstraction layer in the FatFs file system for USB storage devices. Instead of being stored in RAM, the file system is stored on an external storage device connected via USB, such as a USB flash drive or hard disk. When you use `fsl_usb_disk`, it manages the file system on the USB storage device. Best regards, Gavin

Win10 IoT on customized i.mx8m board, Audio microphone not found Hi team platform: imx8m Quad build command we use:    ./buildme64.sh -b MX8M_EVK -t all -c The Win10 IoT BSP version 1.5.1 already run well on my custom board.   In addition, we already create a driver for the audio codec chip we use "ES8388". The codec driver references the design of WM8962 in BSP driver folder. Issue: Sound play is work !  But recording is not. After checking device manerger and audio setting in win10, seems like the microphone device is missing. I have attached the windows screentshot for this. I think the correct situation will see a microphone device in audio setting interface. Such like microphone(i.MX Audio Controller with DMA support). update: We use SAI2 to connect with codec,  here is my modification in iMX8BoardInit.c. I added the SAI2 RX pin initial in AudioInit(). /** Initalize the Audio system **/ #define SAI_PAD_CFG_OUT (IOMUXC_PAD_PUE_ENABLE | IOMUXC_PAD_DSE_R0_DIV_3 | IOMUXC_PAD_SRE_FAST) #define SAI_PAD_CFG_IN (SAI_PAD_CFG_OUT | IOMUXC_PAD_HYS_ENABLED) VOID AudioInit(VOID) {     EFI_STATUS status;     // Mux the SAI2 pins to wm8524 codec     IOMUXC_SW_MUX_CTL_PAD_SAI2_TXFS = IOMUXC_MUX_ALT0;     IOMUXC_SW_MUX_CTL_PAD_SAI2_TXC = IOMUXC_MUX_ALT0;     IOMUXC_SW_MUX_CTL_PAD_SAI2_TXD0 = IOMUXC_MUX_ALT0;     IOMUXC_SW_MUX_CTL_PAD_SAI2_RXD0 = IOMUXC_MUX_ALT0;     IOMUXC_SW_MUX_CTL_PAD_SAI2_MCLK = IOMUXC_MUX_ALT0;     IOMUXC_SW_PAD_CTL_PAD_SAI2_TXFS = SAI_PAD_CFG_OUT;     IOMUXC_SW_PAD_CTL_PAD_SAI2_TXC = SAI_PAD_CFG_OUT;     IOMUXC_SW_PAD_CTL_PAD_SAI2_TXD0 = SAI_PAD_CFG_OUT;     IOMUXC_SW_PAD_CTL_PAD_SAI2_RXD0 = SAI_PAD_CFG_IN;     IOMUXC_SW_PAD_CTL_PAD_SAI2_MCLK = SAI_PAD_CFG_OUT;     // unmute audio     IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO08 = IOMUXC_MUX_ALT0;     GPIO1_DR |= GPIO_DR_DR(1 << 8);     GPIO1_GDIR |= GPIO_DR_DR(1 << 8);     // enable the AUDIO_PLL - 44,100 Hz * 256     status = ImxSetSAI2ClockRate (11289600);      if (EFI_ERROR (status)) {     DebugPrint (DEBUG_ERROR, "AudioInit - ImxSetAudioMclkClockRate failed");     } } Please give me some hints to trace root cause.   Thanks. i.MX 8 Family | i.MX 8QuadMax (8QM) | 8QuadPlus i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Windows 10 IoT Enterprise 回复： Win10 IoT on customized i.mx8m board, Audio microphone not found I found the solution. In file "AcpiTables/Dsdt-Audio.asl", the SAI2 capture interface is disabled for IMX8MEVK !  After enable this, now we can see the microphone device in win10 audio interface. Also it work fine right now.  

i.MX 8/9 series support EtherCAT? Hello, I knew layerscape processors support EtherCAT. How about i.MX 8 seres and I.MX 9 series applicatin processor? I would like to know some of them support EtherCAT? If so, what is the application processor? Thank you. Best regards, Andy Re: i.MX 8/9 series support EtherCAT? Hi @andy_kim  Please find support info from here: https://www.nxp.com/webapp/connect/displayPartnerProfile.sp?partnerId=14260&offeringId=23241 Or refer the Real-Time Edge support list https://www.nxp.com/design/design-center/software/development-software/real-time-edge-software:REALTIME-EDGE-SOFTWARE Best Regards Zhiming

DEsign Studio登録 おはようございます、 マイコンのペリフェリアル(IO、ADCなど)を設定しようとしています。私は例のコードを使用していますが、 Undeclared(この関数で最初に使用)レジスタへのアクセスはありません。PATHを確認したところ、例と同じように見えました。 プロジェクトは「ファイル-新規-S32アプリケーションプロジェクト」で作成します 私はS32 - 3.5バージョン、コンパイラ - 10.2バージョン用のDSを持っています

PN7462のUSBサスペンドモードの防止 phExCcid SDKの例でPN7462 EVKのサスペンドモードを実行したいと思います。EVKはマイクロUSBケーブルを介してラップトップに接続されています。マクロをPH_EXNFCCCID_USB_IF_USB_SUSPEND_RESUME_FTR 1として構成し、コードをデバッグモードで実行しました。 私はE_HOSTCOMM_ONGOINGとして予防的な理由を得ていますが、ホストとの継続的なコミュニケーションはありません。なぜ予防が必要なのですか?それとも、サスペンドモードの実証済みの例を教えてください。 PN7462の ありがとうございます Re:PN7462のUSBサスペンドモードの防止 @KaiLi正しいドキュメントを指していただきありがとうございます。 PH_EXCCID_USB_IF_USB_REMOTE_WAKEUP_FTR マクロも 1 に設定する必要があります。

Yocto does not generate u-boot.dtb when local.conf configured to enable verify boot Hello everyone, I am currently trying to enable the verified boot feature in U-boot in order to boot a signed FIT image. I am working with the i.MX93 EVK and Yocto Kirkstone release. My goal is to configure "local.conf" file so that after building the image I get a u-boot image with public key added to it. I want to secure the process of passing from u-boot to linux (in FIT format). To do so I have configured the "local.conf" as follows (info related to u-boot verification is provided only): # to use FIT image for kernel and devicetree MACHINE_FEATURES += "fit" #signing key UBOOT_SIGN_KEYDIR = "/home/gorka/timesys/bad_keys" UBOOT_SIGN_KEYNAME = "dev" # Sign FIT image UBOOT_SIGN_ENABLE = "1" # generate new signing key if not exist FIT_GENERATE_KEYS = "1" # Uboot mkimage option UBOOT_MKIMAGE_DTCOPTS = "-I dts -O dtb -p 2000" While compiling the next warning is shown: WARNING: u-boot-imx-2022.04-r0 do_deploy: Failure while adding public key to u-boot binary. Verified boot won't be available. And if I take a look at deployed files: There u-boot binary is shown (with dtb and without dtb). And the dtb itself appears twice as symbolic links. But the real u-boot.dtb file isn't available. I have compiled it twice with different keys and compared both u-boot.bin files, but they don't differ so I guess that the public key isn't hardcoded (as the warning had adviced). Is there any way to solve it? Is it something wrong in "local.conf"? Thank you in advance, Gorka. Re: Yocto does not generate u-boot.dtb when local.conf configured to enable verify boot Hi,  Please have a reference to the <10.9 Security reference design> of IMX_LINUX_USERS_GUIDE.pdf  Regards Harvey

S32K142 flexcan dominant detection Hello, I used flexcan's RxFIFO for CAN development. How can I detect dominant time-out through flexcan or other methods. What interrupts or interfaces does flexcan have? Dominant time-out refers to the detection of the SOF segment of the CAN frame as shown in the figure Re: S32K142 flexcan dominant detection Hi, 1) No, just IDLE, TX and RX bits of ESR1 shows that something is on the bus. 2) there is no indication for a message that is not matched in neither MB nor RXFIFO, frame is lost. BR, Petr Re: S32K142 flexcan dominant detection Sorry, there was an error in my description. Let me rephrase the problem. 1.Can flexcan notify me through interrupts or other means when it changes from an recessive state to an dominant state on the CAN bus. 2.Can flexcan notify me through interrupts or other means when receiving frames outside of the filter. Re: S32K142 flexcan dominant detection Hi, why would dominant time-out refer to the detection of the SOF segment? SOF is single dominant bit and is normally detected by module. Long time dominant condition will be detected via stuff or form errors and error interrupt will be called if enabled. Module tolerates 5 consecutive dominant bits then stuff bit (opposite level) must be detected. Dominant time out feature is obviously implemented on CAN transceiver to disable transmitter when TXD line is held low for extended/defined time, so a node will not disturb bus anymore. BR, Petr

PN7462 中 USB 挂起模式的预防 我们想在 phExCcid SDK 示例上练习 PN7462 EVK 上的挂起模式。EVK 通过微型 USB 电缆连接到笔记本电脑。我们将宏配置为PH_EXNFCCCID_USB_IF_USB_SUSPEND_RESUME_FTR 1，并在调试模式下运行代码。 尽管没有与主机进行持续通信，但我收到预防原因 E_HOSTCOMM_ONGOING。为什么要预防？或者您能分享一个已证实的挂起模式示例吗？ PN7462 谢谢！ 回复：PN7462 中 USB 挂起模式的预防 @KaiLi感谢您指出正确的文档。 PH_EXCCID_USB_IF_USB_REMOTE_WAKEUP_FTR宏也需要设置为1。

OTA-requestor-app issue on NXP i.MX8MM I met the following problems when I was working on the project matter with NXP i.MX8MM board. Current state 1.    I ran OTA-requestor-app on the YOCTO system to upgrade the thermostat-app.  44,384 packets were received and used for more than three hours. 2.   After I used gzip compression, I used OTA-requestor-app to upgrade   the thermostat-app  .16,319 packets. 36 minutes. 3 . The upgrade files received by the preceding two methods can run properly. Present problems : 1.  How to solve the problem of long OTA upgrade time 2.  I changed the thermostat-app  software version number(/connectedhomeip/src/include/platform/CHIPDeviceConfig.h) 2.  I run the thermostat-app  at YOCTO.What Can I do if the OAT upgrade command fails to be executed?The information is as follows: Execute a command: sudo ./connectedhomeip/out/standalone/chip-tool  otasoftwareupdaterequestor announce-otaprovider 5678 0 0 0 8888  0 Receive the message:     [1712041578.206873][3710:3712] CHIP:IN: (S) Sending msg 237563467 on secure session with LSID: 3224 [1712041578.207262][3710:3712] CHIP:EM: Flushed pending ack for MessageCounter:244084226 on exchange 9381i [1712041578.208019][3710:3710] CHIP:CTL: Shutting down the commissioner [1712041578.208160][3710:3710] CHIP:CTL: Stopping commissioning discovery over DNS-SD [1712041578.208589][3710:3710] CHIP:CTL: Shutting down the controller [1712041578.208675][3710:3710] CHIP:IN: Expiring all sessions for fabric 0x1!! [1712041578.208858][3710:3710] CHIP:IN: SecureSession[0xffff7800b4f0]: MarkForEviction Type:2 LSID:3224 [1712041578.208938][3710:3710] CHIP:SC: SecureSession[0xffff7800b4f0]: Moving from state 'kActive' --> 'kPendingEviction' [1712041578.209014][3710:3710] CHIP:IN: SecureSession[0xffff7800b4f0]: Released - Type:2 LSID:3224 [1712041578.209091][3710:3710] CHIP:FP: Forgetting fabric 0x1 [1712041578.209197][3710:3710] CHIP:TS: Pending Last Known Good Time: 2023-05-08T17:09:28 [1712041578.209704][3710:3710] CHIP:TS: Previous Last Known Good Time: 2023-05-08T17:09:28 [1712041578.209785][3710:3710] CHIP:TS: Reverted Last Known Good Time to previous value [1712041578.209950][3710:3710] CHIP:CTL: Shutting down the commissioner [1712041578.210023][3710:3710] CHIP:CTL: Stopping commissioning discovery over DNS-SD [1712041578.210487][3710:3710] CHIP:CTL: Shutting down the controller [1712041578.210566][3710:3710] CHIP:CTL: Shutting down the System State, this will teardown the CHIP Stack [1712041578.212047][3710:3710] CHIP:DMG: All ReadHandler-s are clean, clear GlobalDirtySet [1712041578.212442][3710:3710] CHIP:BLE: BleConnectionDelegate::CancelConnection is not implemented. [1712041578.212578][3710:3710] CHIP:FP: Shutting down FabricTable [1712041578.212673][3710:3710] CHIP:TS: Pending Last Known Good Time: 2023-05-08T17:09:28 [1712041578.213232][3710:3710] CHIP:TS: Previous Last Known Good Time: 2023-05-08T17:09:28 [1712041578.213311][3710:3710] CHIP:TS: Reverted Last Known Good Time to previous value [1712041578.214035][3710:3710] CHIP:DL: writing settings to file (/tmp/chip_counters.ini-CEwe0s) [1712041578.216682][3710:3710] CHIP:DL: renamed tmp file to file (/tmp/chip_counters.ini) [1712041578.217104][3710:3710] CHIP:DL: NVS set: chip-counters/total-operational-hours = 1 (0x1) [1712041578.217189][3710:3710] CHIP:DL: Inet Layer shutdown [1712041578.217262][3710:3710] CHIP:DL: BLE shutdown [1712041578.217336][3710:3710] CHIP:DL: System Layer shutdown [1712041578.218125][3710:3710] CHIP:TOO: Run command failure: IM Error 0x00000581: General error: 0x81 (UNSUPPORTED_COMMAND) i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: OTA-requestor-app issue on NXP i.MX8MM Got it. Thanks. Re: OTA-requestor-app issue on NXP i.MX8MM Hello, Make sure you are using the CHIP thermostat example for the MX8MM, the matter examples will be upgraded but so far is the only examples it provides. Regards

1-slot delay when using I2S with DSP/TDM mode Using the EVK MIMXRT685 as I2S slave configured as: TDM / DSP mode A (mono) 16 slots (channels) per frame 512 SCK per frame 32 SCK per slot 24 bits of audio data per slot, left aligned (but I'm sampling 32-bits) WS pulsed for one SCK time Data sampled on WS rising edge A sample capture for the first 2 channels in the following picture (`0x000001FF` on the first channel, and `0x00000200` on the second channel, ...) The I2S controller is used in interrupt mode configured as follows: I2S_RxGetDefaultConfig(&s_RxConfig); s_RxConfig.masterSlave = kI2S_MasterSlaveNormalSlave; s_RxConfig.mode = kI2S_ModeDspWsShort; s_RxConfig.leftJust = true; s_RxConfig.divider = 1; s_RxConfig.oneChannel = true; s_RxConfig.dataLength = 32; s_RxConfig.frameLength = 32; The problem is that the first channels / slot is skipped. If I break into the I2S ISR and check the content of `FIFORD` the first data I get is `0x00000200` instead of `0x000001FF`. Why the first slot / channel is skipped? i.MXRT 600 Re: 1-slot delay when using I2S with DSP/TDM mode This is due to a misconfiguration of the I2S instance on my side. To read 16-channels we need at least I2S instances (for example I2S4 and I2S5), configured as follows: s_RxConfig.masterSlave = kI2S_MasterSlaveNormalSlave; s_RxConfig.mode = kI2S_ModeDspWsShort; s_RxConfig.dataLength = 32; s_RxConfig.frameLength = 32 * 16U; s_RxConfig.position = 0; I2S_RxInit(I2S5, &s_RxConfig); I2S_EnableSecondaryChannel(I2S5, kI2S_SecondaryChannel1, false, (64 * 1)); I2S_EnableSecondaryChannel(I2S5, kI2S_SecondaryChannel2, false, (64 * 2)); I2S_EnableSecondaryChannel(I2S5, kI2S_SecondaryChannel3, false, (64 * 3)); s_RxConfig.position = 256; I2S_RxInit(I2S4, &s_RxConfig); I2S_EnableSecondaryChannel(I2S4, kI2S_SecondaryChannel1, false, 256 + (64 * 1)); I2S_EnableSecondaryChannel(I2S4, kI2S_SecondaryChannel2, false, 256 + (64 * 2)); I2S_EnableSecondaryChannel(I2S4, kI2S_SecondaryChannel3, false, 256 + (64 * 3));   To be perfectly honest the user manual is not crystal clear about how and when to use multiple instances and channels pairs. Re: 1-slot delay when using I2S with DSP/TDM mode Hello @carlocaione , I'm looking into this issue, and I'll respond you as soon as possible. In the meantime, can you provide me information about what example of the SDK you're using and in which version you're working with? BR, Habib.

设计工作室注册 早上好， 我正在尝试配置微控制器的外围设备（IO、ADC 等）。我正在使用示例中的代码，但我无权访问未声明的寄存器（在此函数中首次使用）。我检查了 PATH，它看起来与示例中的相同。 该项目通过“文件-新建-S32应用程序项目”创建 我有 DS for S32 - 3.5 版本，编译器 - 10.2 版本

DEsign Studio register Ggood morning, I'm trying to configure microcontroller's peripherial (IO, ADC, etc.). I'm using code from examples, but I have no acces to registers Undeclared (first use in this function). I checked the PATH and it look the same like in example. The project is create by "File  - New - S32 Application Project" I have DS for S32 - 3.5 version, compiler - 10.2 version Re: DEsign Studio register Hi Sorry for replying so late. There were some problems with the community tool a few days ago. I just saw your question in the internal system yesterday. It seems that you are referring to the project of AN5413SW\S32K1xx cookbook. That project was created many years ago, and the S32K1 header file in S32DS v3.5 has been updated, so it is different from before. Please modify the code according to the latest S32K146.h. By the way: It is recommended to install S32K1 RTD 2.0.x with S32DS Extensions and Updates in S32DS v3.5. Or install S32K1 SDK RTM 4.0.3 with S32DS Extensions and Updates in S32DS v3.4. Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------

SDK driver for SerialMWM Wi-Fi module Hi, Are there any plans to add a SerialMWM Wi-Fi module driver (as in LPC55xx) to SDK for MCX chips? Regards Daniel MCXA MCXN Re: SDK driver for SerialMWM Wi-Fi module Thank you so much.  Best Regards, Daniel Re: SDK driver for SerialMWM Wi-Fi module Well noted. Thanks for your comments Re: SDK driver for SerialMWM Wi-Fi module Hi, It would be useful for IoT applications. I think many users are planning to upgrade from the LPC55xx family to the MCX. We are currently modernizing the IoT laboratory at our University (University of Applied Sciences in Tarnow) and we have already purchased a set of EV boards MCX A and MCX N for teaching - we need to connect our WiFi modules. So far we are using EV Boards LPC55s69. Regards Daniel Re: SDK driver for SerialMWM Wi-Fi module Hi danielkrol  Unfortunately we don't have the same driver for MCX in recent plan. I will escalate if necessary. But for the moment, we don't have it. Best Regareds, Jun Zhang

EEPROM emulation Hi. In a previous response. "If a power failure occurs while erasing a sector of Flash Read-Only Memory (FROM), or while writing to FROM, it can lead to corruption of the flash content. This is because the erase or program operation is an atomic process that, if interrupted, may leave the flash in an undefined state. Depending on when the interruption occurs, you might encounter issues such as double-bit ECC (Error Correction Code) errors, which the system cannot correct." I found the following information. https://community.nxp.com/t5/Kinetis-Microcontrollers/What-happens-if-a-power-failure-occurs-while-erasing-a-sector-of/m-p/1801274 #M66020. If a portion of the FROM is used with EEPROM emulation, could the code area of the FROM (where the program is written) be affected by this system uncorrectable error? Kinetis M Series MCUs Re: EEPROM emulation Thank you very much. Understood. Re: EEPROM emulation Hi, As you know that the KM14 does not have FlexNVM, it has only program flash, so you have to use the second method. When you erase/program flash, the flash can not be accessed,so you have to disable interrupt or allocate vector table and ISR in RAM, the code to operate flash must be copied to internal RAM and execute from RAM. if a power failure occurs when writing to FROM and a FROM error occurs,it does not take affect to the other flash page. error can be resolved by erasing operation. Hope it can help you BR XiangJun Rong Re: EEPROM emulation Thanks for the answer. I am considering using FROM for VEE and am thinking of the kinetisKM14 series. So, if a power failure occurs when writing to FROM and a FROM error occurs, will this affect other areas of FROM? For example, would it be impossible to fetch the program code? Also, can FROM errors be resolved by erasing sectors? I am thinking of checking VEE when recovering from a power failure and erasing sectors if there is an error. Thank you in advance. Re: EEPROM emulation Hi, As you know that there are two methods to implement the virtual EEPROM, which one is used is dependent on the flash resource. For example for Kinetis family K64, this is the memory resource: The K64 has FlexNVM and FlexRAM resources, which can simulate the EEPROM by hardware. The second is the MCU has only on-chip programmable flash, if you want to implement EEPROM function, you can declare an array with the page flash size or multiple page size, which is saved in SRAM. After start-up, you can copy the array from flash, then the application can write the array as EEPROM, after a fixed cycle time, or whatever you expected, you can write the array to flash. Hope it can help you BR XiangJun Rong Re: EEPROM emulation Software to emulate EEPROM. For example, virtual EEPROM emulation software called VEE. Re: EEPROM emulation I asked about software that uses FROMs like EEPROMs, not that they have built-in EEPROMs. Re: EEPROM emulation Hi, Can you tell us the part number you are using? not all Kinetis derivatives  support EEPROM. BR XiangJun Rong

SM1.FLASH.AI_SELFCHECK and MEM_43_INFLS/C40_Ip RTD Hi There. We are implement SM1.FLASH.AI_SELFCHECK safety mechanism using MEM_43_INFLS and the C40_Ip rtd. Is this the righe way to implement it?. I 'd ask you if there is an axample code available. We have 2 problems: 1.-The Array integrity check goes in HardFault (Instruction bus error). Seems that the functions for the AI must be allocated in a RAM section. How we can configurate the modules Mem_43_INFLS and C40_Ip to allocate the functions in RAM?    2.- How we can calculate the MISR of the Flash offline?. I am reading the manuals and the calculation of the MISR of our binary is not clear, I supose a tool must be downloaded, but is not clear. Thanks   Re: SM1.FLASH.AI_SELFCHECK and MEM_43_INFLS/C40_Ip RTD Hi @FabioG, An Array Integrity Check is calculated on top of the Flash content from the customer. As such the corresponding value is dependent on the programming of this content.  This is why calculating it during development with the hardware is a better approach, as sometimes it is difficult to get the same results from the parameters (ensuring a proper padding to the programming page boundaries, srecord file, etc.) Best regards, Julián Re: SM1.FLASH.AI_SELFCHECK and MEM_43_INFLS/C40_Ip RTD Hi @Julián_AragónM Thanks you for informations. In order to implement SM1.FLASH.SELFCHECK for s32k344  ASILD, the MISR should  be calculated by an external tool, and in production we  will need to change EOL with this feature; so  we need, at least, the agorithm  for MISR calculation, suitable for S32k344 in order to build our own external tool. (MISR_Cxx.exe). Is it possible?  Best regards, Fabio Re: SM1.FLASH.AI_SELFCHECK and MEM_43_INFLS/C40_Ip RTD Hi @FabioG, 1. You can refer to the following post on how to move the API function to the RAM section: Solved: S32K344 C40 IP Hardware Fault Problem - NXP Community 2. Currently, there is no tool available for the S32K family. There are some old examples and tools (such as the following community posts: Example MPC5744P FlashArrayIntegrityCheck test SSD GHS614 - NXP Community, Solved: What is MISR and how to calculate MISR? - NXP Community. These tools are not fully compatible with the S32K3 devices since configuration parameters do not match with the S32K3 flash layout.  The way to calculate the expected MISR values is by using the Integrity Check driver itself. The MISR should be calculated with "gold samples" approach - so use some samples for calculation and use it. MISR values are like a CRC, and these values are dependent on the data stored in memory, and not on the device, if you run the same test in a sample under the same values and the same memory contents, you should get the same result. Chapter 21.5.4.1 (Array integrity self-check) from the reference manual explains the array integrity self-check steps. Best regards, Julián