关于S32K3XX RTOS示例 我尝试执行RTPS_example_S32K312_SC1/RTOS_example_S32K312_SC1 我确实安装了 EB tresos.exe 并安装了新软件，添加了一个文件名以 updatestie 结尾的文件。 生成新项目然后构建项目 但是我遇到了一个错误，该文件名为 Os.h，不在这个项目中。并且在外设中没有在toolcahin/IDE项目中找到RTOS_S32K3XX。该项目将无法编译！ 我该怎么做才能解决这个错误？

Missing requirement for S32k3xx RTD extension I have installed the S32 design studio v 3.5 to work with SK32K312 microcontroller and need to install the extension/update of S32k3xx RTC v3.0.0 The installation seems to proceed but it is not successful the Reason shown is that there is a missing requirement, but I don't know how to get that requirement. Re: Missing requirement for S32k3xx RTD extension Thank you for the support, using the 1st comment link (instructions) and the last comment link (files to download) I managed to complete the installation of the set up required.  Re: Missing requirement for S32k3xx RTD extension S32K3 Standard Software -> Automotive SW - S32K3 - S32 Design Studio Re: Missing requirement for S32k3xx RTD extension Hi, thank you for your answer. I am logged (see figure below) but when I click on the links of step 3 it redirects me to my profile page in nxp. Re: Missing requirement for S32k3xx RTD extension You must be logged into your account on NXP.com to gain access to the download link. Re: Missing requirement for S32k3xx RTD extension Hi, thanks for the answer I followed the instructions but in step 3 clicking in any of it links redirects me to my NXP profile. Any other way to download the S32k3xx RTD extension? Re: Missing requirement for S32k3xx RTD extension Hi Please offline install it by refer to HOWTO: offline install S32K3 RTD 3.0.0 in S32DS v3.5 Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------

MBDT with non-AUTOSAR drivers Hi guys, I was wondering if it is possible to use MBDT with the regular drivers on the S32 config tool. I have always used non-AUTOSAR drivers and all the code and config for our custom board is done this way. Now we are using Simulink and when loading the custom .mex file the Simulink blocks do not seem to recognise the drivers. I loaded some MCAL peripherals and then the blocks showed several options, so I assume MBDT only works with MCAL? If so, is there any tool to migrate from standard drivers to MCAL? I am doing it manually, but the S32 config tool is extremely slow (maybe my PC problem, would be great to clarify) and it could take days to migrate. Thanks, BR Re: MBDT with non-AUTOSAR drivers Hi @Irina_Costachescu I have already configured the Tresos and generated a simple program to test de config. The problem is I am unable to load the code as I am getting some errors at Simulink. I am attaching the report, it seems like it is failing to access several include files even though they are located where they have to be. Another thing I noticed is that Timers option shows 0 Hz on both solver and profiler timers. First I didn't have a Gpt configured on Tresos; now I do but it still shows 0 Hz. This is not related to the previous problem, but I am curious about it. BR Re: MBDT with non-AUTOSAR drivers Hi @Irina_Costachescu Thanks for your reply. Unfortunately I was afraid that it wouldn't be possible to use non-MCAL drivers. So, I started modifying the default config as you suggested. I also switched to EB Tresos since I found it to be much faster and more fluid than S32 configuration tool. We are using two different microcontrollers for two different projects, S32K312 and S32K344 (both 172MQFP), but the one I am currently working on is the S32K312. Please let me know if you need any other info. BR Re: MBDT with non-AUTOSAR drivers Hello @AsierMaser  MBDT is built on top of the RTD MCAL, so indeed the default configuration project we provide for the peripherals and processors we enable, as well as the APIs exposed inside our Simulink blocks, are based on this layer of the drivers package. Unfortunately, I am not aware of any straightforward manner in which you could port the low level drivers configurations to MCAL components. However, my suggestion would be to start from the default configuration project that MBDT provides for the processor your custom board is using, and try reconfiguring those settings to match your design particularities. Could you please share with us what hardware platform are you using, so that we could point you to the necessary documentation? We are describing the process of building specific configuration templates for custom hardware designs inside our toolboxes Release Notes documents. Thank you, Irina

MPC5777C - Possible connection between PRAMC and PFLASH Hello! In the PRAMC chapter of the MPC5777C RM there is one figure that I did not understand quite well. In my interpretation, this image suggests that there might be a direct connection between the PRAMC and the PFLASH. I searched more about it in the reference manual, but did not find more details. 1 - How do I know if my device has this connection? 2 - In which situation is this connection used? 3 - What are the properties of this connection? Is this also a 64 bits width AHB? 4 - The RM says that "The RAM controller supports two 64-bit AHB interfaces and a 64-bit RAM array interface. The primary AHB port provides a connection to the platform crossbar for direct RAM access from the various crossbar masters." I thought that the two AHB interfaces were individually connected to the PRAMC_0 and PRAMC_1. However, with this possible connection to the PFLASH, I am not sure about that. The text says that "the primary AHB port provides a connection to the platform crossbar". What about the secondary AHB port? What does it do? Is it the connection to the PFLASH? Best regards, Matheus Re: MPC5777C - Possible connection between PRAMC and PFLASH 1) Flash overlay means you can read data from RAM instead of flash, portion of flash address is remapped to RAM for development purposes. But how I said, this is NOT used on MPC5777C. There is no direct interconnection between FLASH and RAM. 2) One XBAR slave port is connected to PRAMC_0 and one XBAR slave port is connected to PRAMC_1. Nothing else Re: MPC5777C - Possible connection between PRAMC and PFLASH 1,2) What is a flash overlay? How does the MMU replaces the use of flash overlay? 4) So each of the two 64-bit AHB interfaces are indeed connected to PRAMC_0 and PRAMC_1? Re: MPC5777C - Possible connection between PRAMC and PFLASH 1,2) It is related to devices having flash overlay feature what's just not the case Cof MPC5777C. All other MPC57xx device has the feature. MPC5777C cores have MMU allowing using of virtual/physical address translation what can be used instead. 3) Yes, it would be. 4) PRAMC_0 and PRAMC_1 are two independent instances. There is not PFLASH to PRAMC connection on this device.

カーネルログのシーケンス番号とタイムスタンプの順序が間違っている NOINIT RAMにカーネルログを作成して、再起動後も保存できるようにしました。当初の目標は、割り込みが無効になっている間にウォッチドッグタイムアウトが発生する直前の状態でカーネルログを保存することでした。悲劇的なことに、割り込みは購入したライブラリコードで無効になっていました。NOINIT RAMにあるため、コンソールにダンプして、次回の起動時にSDカード上のファイルに保存できます。これはすべてうまく機能しているように見えますが、ログデータにはいくつかの興味深い異常が不安です。具体的には、一部のログエントリのシーケンス番号またはタイムスタンプが順不同です。ログの大部分にはすべてのタイムスタンプとシーケンス番号が順番に並んでいますが、この情報が順番にずれている可能性がある場合、最後のログエントリ(ウォッチドッグしたアクティブなタスクを指す)を特定できると確信するのは困難です。この情報がログで順序付けられていないのが正常かどうか、誰かが教えてくれますか? ありがとうございます！ Re:カーネルログのシーケンス番号とタイムスタンプの順序が間違っています MQXタスク・ウォッチドッグと有効期限機能を使用して問題を解決する別の方法を見つけたので、カーネル・ロギング機能の取り組みは放棄します。カーネルのロギングコードは長い間変更されておらず、問題ないはずだと聞きました。なぜそれが私にはうまくいかなかったのかわかりませんが、それはおそらく何らかの形で私のせいでした。 Re:カーネルログのシーケンス番号とタイムスタンプの順序が間違っています Linuxフォーラム?これはMQXに関する質問であり、Linuxに関する質問ではありません。

适用于 S32K3 的 S32 设计工作室 我目前正在使用 S32 设计工作室来设计 S32K1 系列。我应该做哪些更改才能将 S32 用于 S32K3？配置项目时无法查看 S32K3。 回复：S32K3的S32设计工作室 我正在使用 S32 Design Studio for ARM，版本 2018.R1

如何找到已安装 SDK 的确切位置？ 我正在阅读“EVK-MIMXRT1060 的 MCUXpresso SDK 入门”，这篇文章介绍了包文件夹和每个示例的结构。 我尝试从已安装 SDK 窗口打开已安装 SDK 的本地位置，但只有 .zip文件。我尝试使用 Welcome | MCUXpresso SDK Builder (nxp.com) 从互联网下载 SDK，我解压了 .zip文件，还有一些示例文件夹。在哪里可以找到安装在 MCUXpresso IDE 中与 .zip 相同的示例文件夹文件？ 此外，我还检查了 IDE 中的 hello_world 文件夹结构和 hello_world 项目结构。这太不同了。在IDE中，有很多文件夹，例如“board”，“component”，“device”......您可以在所附图片中看到。例如，IDE 中有文件“semihost_hardfault.c”，但 .zip 的 hello_world 文件夹中没有此文件文件。如何了解IDE中项目的结构？现在我无法从文件夹（.zip将文件复制到 IDE。 抱歉我的英语不太好。谢谢。

i.MX8Nano 可压缩 RAM 作为一名探索 i.MX8 系列处理器平台的学生，我面临着为我的应用程序选择合适的 RAM 的挑战。在查阅了@jan_spurek的RAM 选择指南后，我决定在我的 i.MX8Nano 设计中使用 MT53E1G32D2FW-046 (1Gx32) 4GB 模块。如果您能验证此 RAM 选择，或者在 RAM 不兼容的情况下提供有关 RAM 选择时需要考虑的关键方面和规格的指导，我将不胜感激。 回复：i.MX8Nano 可压缩 RAM 你好，Rajanand， 那么在这种情况下，该 RAM 应该适合 IMX8PLUS 设计。正如您所提到的，RAM 应该是 LPDDR4 或 LPDDR4/LPDDR4X。但不仅仅是LPDDR4X。 是的，正确。 因此，我猜测这个 RAM 满足条件，我还需要考虑什么才能使设计正常工作？ 是的，只是 i.MX8MNano 的 DRAM 总线宽度需要注意。有关设计的更多考虑，请参阅硬件开发人员指南。 顺祝商祺！ Jan 回复：i.MX8Nano 可压缩 RAM @jan_spurek谢谢， 那么在这种情况下，该 RAM 应该适合 IMX8PLUS 设计。正如您所提到的，RAM 应该是 LPDDR4 或 LPDDR4/LPDDR4X。但不仅仅是LPDDR4X。 因此，我猜测这个 RAM 满足条件，我还需要考虑什么才能使设计正常工作？ 回复：i.MX8Nano 可压缩 RAM 你好，Rajanand， 谢谢你的提问。请附上所选存储设备的相应数据表，以便更详细地检查兼容性。 根据现有信息，所选设备似乎具有 32 位宽的数据总线，而 i.MX8MNano 仅具有 16 位 DRAM 数据总线。对于 LPDDR4 来说，这不是一个大的功能问题，因为 32 位宽的设备由两个独立的 16 位通道组成，并且只能使用其中一个。但是，您只能访问其密度的一半 - 因此 4 GB 中只有 2 GB 可用。从这个原因来看，寻找 16 位 LPDDR4 设备看起来更为实际。 顺祝商祺！ Jan

インストールされているSDKの正確な場所を見つけるにはどうすればよいですか? 「EVK-MIMXRT1060用のMCUXpresso SDK入門」を読んでいるのですが、この記事では各例のパッケージフォルダと構造について述べています。 インストールされたSDKウィンドウからインストールされたSDKのローカルロケーションを開こうとしましたが、.zipしかありませんファイル。インターネットからSDKをダウンロードしてみましたが、Welcome |MCUXpresso SDK ビルダー (nxp.com)、.zipを抽出しましたファイルと例のいくつかのフォルダがあります。.zipと同じMCUXpresso IDEにインストールされているサンプルフォルダはどこにありますかファイル。 さらに、IDEでhello_worldフォルダの構造とプロジェクトの構造を確認しhello_world。全然違うんですよ。IDEには、「ボード」、「コンポーネント」、「デバイス」など、多くのフォルダがあります。添付画像でご覧いただけます。たとえば、IDEには「semihost_hardfault.c」というファイルがありますが、このファイルは.zipのフォルダhello_worldありませんファイル。IDEでプロジェクトの構造をどのように理解しますか?今、私はフォルダ(の.zipからファイルをマップすることはできませんfile) を IDE のファイルにコピーします。 私の英語が苦手で申し訳ありません。ありがとうございます。

i.MX8Nano compactible RAM As a student exploring the i.MX8 series processor platform, I'm facing a challenge in selecting the right RAM for my application. After consulting @jan_spurek 's RAM selection guide, I decided on the MT53E1G32D2FW-046 (1Gx32) 4GB module for my i.MX8Nano design. I would appreciate it if you could validate this RAM choice or provide guidance on the key aspects and specifications to consider for RAM selection if it's not compatible. Re: i.MX8Nano compactible RAM Hi Rajanand, well in that case this RAM should be suitable for IMX8PLUS designs right. As you mentioned that the RAM should be LPDDR4 or LPDDR4/LPDDR4X. But not LPDDR4X alone. Yes, that is correct. So, I guess this RAM satisfies the condition and is there anything else I need to consider making the design to work properly? Yes, just with the DRAM bus width caveat in case of i.MX8MNano. For more considerations regarding the design, please refer to the Hardware Developer's Guide. Best Regards, Jan Re: i.MX8Nano compactible RAM @jan_spurek Thank you, well in that case this RAM should be suitable for IMX8PLUS designs right. As you mentioned that the RAM should be LPDDR4 or LPDDR4/LPDDR4X. But not LPDDR4X alone. So, I guess this RAM satisfies the condition and is there anything else I need to consider making the design to work properly? Re: i.MX8Nano compactible RAM Hi Rajanand, thank you for the question. Please attach the respective datasheet of the selected memory device so compatibility could be checked in more detail. From the available information, the selected device appears to have 32-bit wide data bus while i.MX8MNano only has 16-bit DRAM data bus. This is not a big functional problem in case of LPDDR4 as the 32-bit wide devices consist of two independent 16-bit channels and only one of them can be used. However, you would only be able to access half of its density - so only 2 out of 4 GB would be available. From this reason, it looks more practical to look for 16-bit LPDDR4 devices. Best Regards, Jan

内核日志中的序列号和时间戳乱序 我在 NOINIT RAM 中创建了一个内核日志，以便它可以在重启后保存。最初的目标是将内核日志保存在中断被禁用时发生看门狗超时之前的状态。不幸的是，我们购买的库代码中禁用了中断。由于它位于 NOINIT RAM 中，我们可以将其转储到控制台并在下次启动时将其保存到 SD 卡上的文件中。一切似乎都运行良好，然而日志数据中的一些有趣的异常令人不安。具体来说，一些日志条目的序列号或时间戳是不按顺序排列的。日志的大部分内容都按顺序包含时间戳和序列号，但如果这些信息可能无序，则很难确定我们能否精确定位最后一个日志条目（指向监视的活动任务）。有人能告诉我这些信息在日志中顺序混乱是否正常吗？ 谢谢！ 回复：内核日志中的序列号和时间戳乱序 我找到了一种使用 MQX 任务看门狗和到期函数来解决我们问题的另一种方法，所以我放弃了内核日志记录工具的努力。我听说内核日志代码很长时间没有改变，应该很好。不确定为什么它对我不起作用，但这可能是我的错。 回复：内核日志中的序列号和时间戳乱序 Linux 论坛？这是关于 MQX 的问题，而不是 Linux 的问题。

sequence number and timestamps out of order in kernel log I created a kernel log in NOINIT RAM so that it could be saved across reboots. The initial goal was to save the kernel log in the state it was in right before a watchdog timeout occurred while interrupts were disabled. The interrupts, tragically, were disabled in library code we purchased. Since it's in NOINIT RAM we could dump it to the console and save it to a file on an SD card on the next boot. This all appears to be working well, however a couple of interesting anomalies in the log data are unsettling. Specifically, some of the log entries have either the sequence number or timestamp out of order. The majority of the log have all the timestamps and sequence numbers in order, but it's tough to feel certain that we can pinpoint the last log entry (to point to the active task that watchdogged) if this info can be out of sequence. Can anyone tell me if it's normal for this info to be out of sequence in the log? Thanks! Re: sequence number and timestamps out of order in kernel log I found a different way to solve our problem by using the MQX task watchdogs and expiry functions, so I'm abandoning the kernel logging facility effort. I heard that the kernel logging code has not changed in a very long time and should be good. Not sure why it wasn't working for me, but it was probably my fault somehow. Re: sequence number and timestamps out of order in kernel log sorry for confusion, because I saw same issues happened on Linux .  If you are using MQX,    it maybe MQX v5.    I would suggest you contact our MQX partner, Embedded Access for fast support.     Embedded Access - MQX Design, Products, & Services or contact with mqxsales@nxp.com. Regards Daniel Re: sequence number and timestamps out of order in kernel log The Linux Forum? This is a question about MQX, not Linux. Re: sequence number and timestamps out of order in kernel log Hi Sodacan I would suggest you post this question on Linux Forum, Linux experts are there. Forums - The Linux Forum Regards Daniel Re: sequence number and timestamps out of order in kernel log A related piece of confusion is that when I dump my saved kernel log to the console, in general (as long as none are out of order), the timestamps and sequence numbers do advance from the beginning of the log all the way to the end, even though I created it using the overwrite option. My expectation was that somewhere in the middle of the log the sequence numbers and timestamps would switch to an earlier value/time and advance from there. Not being an ARM ASM expert, I haven't figured out whether or not this is the expected behavior for the overwrite feature. I was expecting circular FIFO type behavior. Was my expectation incorrect? memset(kloginfo, 0xEE, sizeof(kloginfo)); result = _klog_create_at(sizeof(kloginfo), LOG_OVERWRITE, static_cast (kloginfo));

FlexCAN Receiving message Frames from PCAN GUI to S32K358 board Hi @Senlent  I have been working on the FlexCAN RTD driver to send and recieve message using my S32K358 Board. I am using the TJA443 chip connected to theFLEXCAN2 instance RX and TX at PTC7 and PTC6 respectively. I am also using the PTB11, PTC12 and PTC16 pins for the can chips EN,STB and ERR pins respectively. Right now i am able to transmited CAN frames to the CAN analyer tool PCAN from my Board. I have set the FLEXCAN2 instance to Normal mode. I am also able to see the CANH, CANL and the TX-RX waves in the scope. I am trying to get the CAN frames from the CAN analyser tool PCAN to my board. I have set the FLEXCAN instance to Listen mode and enabled the legacy RX fifo with default configuartions. Whenever i run the code, i get to the CANH, CANL and the TX-RX waves in the scope, but not able to decode the data. When i add the rxdata var in the expressions window, it shows that the data is not set. In the PCAN tool i am transmitted the data (STD CAN frame), When i connect the differential probe across the CAN_H and CAN_L pins of the TJA1443 chip, i am getting the differential CAN wave, but the not data was decoded. I tried decode the CAN_H and CAN_L waves seperately, still no data decoded. Please find the attached project and please tell me and help me understand where i have missed out. I am pressed with time BR, Soumik Re: FlexCAN Receiving message Frames from PCAN GUI to S32K358 board It was an error from my end, my settings in the scope were not right, i have changes from high trigger to a low trigger mode and i am getting the decoded data. Sorry for the misinformation Re: FlexCAN Receiving message Frames from PCAN GUI to S32K358 board Hi@soumik1506 Please provide your project and I can help you check if the clock is correct. If your PCAN can receive information from the S32K358 end, then there should be no problem with the communication. Re: FlexCAN Receiving message Frames from PCAN GUI to S32K358 board I have set to normal mode like you said, i am not getting any error logs in the PCAN GUI, but still not able to decode in the scope (SOF, DLC,DATA,etc). I have made sure that the baudrate and sample rate set in the project and in the scope are the same. I am just able to identify the bits where i am setting it high and low. Following are my flexcan configurations: Please tell me what i am missing out here clearly. Re: FlexCAN Receiving message Frames from PCAN GUI to S32K358 board Hi@soumik1506 yes, you must set the flexcan to normal mode otherwise it won't able send any messages or response to bus. Re: FlexCAN Receiving message Frames from PCAN GUI to S32K358 board Thanks @Senlent for your reply. If this is the case, the how do i send the the data to my board? Should i set to normal mode and then send the data from the PCAN GUI? Re: FlexCAN Receiving message Frames from PCAN GUI to S32K358 board Hi@soumik1506 If the node is set to listen-only mode, then the node will not send ACK to the CAN bus network. Therefore, in your case, there are only two nodes on the network, and one of them is set to listen-only mode, so any message sent by your PCAN will not get a correct response.

S32 Design Studio for S32K3 I am currently using S32 design studio for S32K1 family. What changes should I make so that I can use S32 for S32K3? I am unable to view S32K3 while configuring project. Re: S32 Design Studio for S32K3 Hi @pranav_prabhu  The S32 Design Studio for ARM, Version 2018.R1 does not support S32K3 devices. The Ide versions that support them are S32DS Version 3.4 and 3.5. The recommended is version 3.5. You can download the IDE and the S32K3 software from the following links.  S32 Design Studio 3.5 – Windows/Linux S32K3 Standard Software S32K3 Reference Software Re: S32 Design Studio for S32K3 I am using S32 Design Studio for ARM, Version 2018.R1 Re: S32 Design Studio for S32K3 Hi @pranav_prabhu  To work with S32K3 devices is required to install the corresponding development packages, but the software versions and the S32K3 derivates supported depend on the S32DS version you have. Which IDE version are you using? B.R. VaneB

i.MX8NanoコンパクティブルRAM i.MX8シリーズ・プロセッサ・プラットフォームを検討している学生として、私は自分のアプリケーションに適したRAMを選択するという課題に直面しています。@jan_spurekのRAMセレクションガイドを参考にした結果、i.MX8Nanoの設計にはMT53E1G32D2FW-046(1Gx32)4GBモジュールを決定しました。このRAMの選択を検証したり、互換性がない場合にRAMの選択について考慮すべき主要な側面と仕様に関するガイダンスを提供していただければ幸いです。 日時:i.MX8NanoコンパクトRAM こんにちはラジャナンド、 その場合、このRAMはIMX8PLUS設計に適しているはずです。RAMはLPDDR4またはLPDDR4 / LPDDR4Xである必要があるとおっしゃいました。しかし、LPDDR4Xだけではありません。 はい、その通りです。 では、この RAM は条件を満たしていると思いますが、デザインを適切に機能させるために他に考慮すべきことはありますか? はい、i.MX8MNanoの場合のDRAMバス幅の注意点があります。デザインに関するその他の考慮事項については、『ハードウェア開発者ガイド』を参照してください。 よろしくお願いいたします。 Jan 日時:i.MX8NanoコンパクトRAM @jan_spurekありがとうございます その場合、このRAMはIMX8PLUS設計に適しているはずです。RAMはLPDDR4またはLPDDR4 / LPDDR4Xである必要があるとおっしゃいました。しかし、LPDDR4Xだけではありません。 では、この RAM は条件を満たしていると思いますが、デザインを適切に機能させるために他に考慮すべきことはありますか? 日時:i.MX8NanoコンパクトRAM こんにちはラジャナンド、 ご質問ありがとうございます。互換性をより詳細に確認できるように、選択したメモリデバイスのそれぞれのデータシートを添付してください。 入手可能な情報から、選択したデバイスには32ビット幅のデータバスがあり、i.MX8MNanoには16ビットDRAMデータバスしかないように見えます。LPDDR4の場合、32ビット幅のデバイスは2つの独立した16ビットチャネルで構成され、そのうちの1つしか使用できないため、これは大きな機能上の問題ではありません。ただし、その密度の半分にしかアクセスできないため、4GBのうち2GBしか利用できません。この理由から、16ビットLPDDR4デバイスを探す方が実用的に見えます。 よろしくお願いいたします。 Jan

S32G399ARDB3-Yocto/Bitbake error Hardware：S32G399ARDB3 Bsp version：bsp41.0 Reference documentation：S32G3_LinuxBSP_41.0_User_Manual.pdf Ubuntu version: Ubuntu 24.04.1 LTS  I followed up the steps mentioned in the user manual but after i executed the command to build the image: bitbake fsl-image-auto  i got this error:  WARNING: Your host glibc version (2.39) is newer than that in uninative (2.38). Disabling uninative so that sstate is not corrupted. Initialising tasks: 100% |#######################################| Time: 0:00:10 Sstate summary: Wanted 1938 Local 0 Mirrors 0 Missed 1938 Current 0 (0% match, 0% complete) NOTE: Executing Tasks ERROR: PermissionError: [Errno 1] Operation not permitted During handling of the above exception, another exception occurred: Traceback (most recent call last): File "/home/mohamedabdelslam/Abdelslam/IPC_BSP3/fsl-auto-yocto-bsp/sources/poky/bitbake/bin/bitbake-worker", line 268, in child bb.utils.disable_network(uid, gid) File "/home/mohamedabdelslam/Abdelslam/IPC_BSP3/fsl-auto-yocto-bsp/sources/poky/bitbake/lib/bb/utils.py", line 1653, in disable_network with open("/proc/self/uid_map", "w") as f: PermissionError: [Errno 1] Operation not permitted How could i troubleshoot the problem  Re: S32G399ARDB3-Yocto/Bitbake error Hello @MohamedAbdelslam , I have faced similar issues when building on Ubuntu 24.04. The issue is that in this Ubuntu release the AppArmor is enabled by default, as described here . What works for me is running the following command: sudo apparmor_parser -R /etc/apparmor.d/unprivileged_userns and then running bitbake. As @alejandro_e pointed, using Ubuntu 22.04 is a more convenient solution. Best regards, Guilherme Re: S32G399ARDB3-Yocto/Bitbake error Hello @MohamedAbdelslam, Thanks for the detailed description of your problem. Given that you are getting errors related to your glibc version, the first thing I recommend is to use an older version of ubuntu, preferably Ubuntu-20.04 LTS, since that is the recommended version in the BSP41 manual [page 9, Linux BSP 41.0 User Manual for S32G3 platforms]: I can also recommend using Ubuntu 22.04 LTS, it is what I'm using for yocto without problems. user@machine:~/RDB2/bsp-41/build_s32g274ardb2$ uname -srm ; lsb_release -a Linux 5.15.0-84-generic x86_64 No LSB modules are available. Distributor ID: Ubuntu Description: Ubuntu 22.04.4 LTS Release: 22.04 Codename: jammy Let me know if using one of these versions solves your problem.

How can I find the exact location of installed SDK? I am reading "Getting Started with MCUXpresso SDK for EVK-MIMXRT1060" and this article said about package folder and structure of each example. I tried to open local location of installed SDK from installed SDK window, but there is only .zip file. I tried to download SDK from the internet by using Welcome | MCUXpresso SDK Builder (nxp.com), I extracted .zip file and there are some folders of example. Where can I find example folders installed in MCUXpresso IDE that is same as in .zip file? Furthermore, I checked structure of hello_world folder and structure of hello_world project in IDE. It is so different. In IDE, there are many folders such as "board", "component", "device"... You can see in attached images. For example, there is the file "semihost_hardfault.c" in the IDE, but this file is not in hello_world folder of .zip file. How to understand the structure of the project in the IDE? Now I cannot map files from folder (of .zip file) to files to the IDE.  Sorry for my not good English. Thank you. Re: How can I find the exact location of installed SDK? @Habib_MS  I have one more question. This is folder of tflm_cifar in the SDK .zip file. As you said, I can run "source" folder in my PC without board (remove .c files related to board). Is that right? Because I want to evaluate tfml model on my PC. Do you have any reference about evaluation of tflm classification model in PC? Thanks. Re: How can I find the exact location of installed SDK? @Habib_MS  Thank you so much. It is so clear. Re: How can I find the exact location of installed SDK? Hello @nnxxpp ,   The hello world files that you are looking at, are just the application layer of that project.To create a functional project you need more layers, as shown in the following image collected from the "Getting Started with MCUXpresso SDK" document: So, when you import an example of the SDK from MCUxpresso, it takes all the layers that the project needs to work, downloading only those that are going to be needed for the implementation of the SDK. Finally, as an example, we can locate the driver's folder used by the MCUxpresso, as can be seen in the image you provided, by looking into the following path of the SDK: SDK_2_15_000_EVK-MIMXRT1060.zip\devices\MIMXRT1062\drivers. BR, Habib.

S32K3のためのS32デザインスタジオ 現在、S32K1ファミリー用のS32デザインスタジオを使用しています。S32K3でS32を使用できるようにするには、どのような変更を加える必要がありますか?プロジェクトの設定中にS32K3が表示されません。 日時:S32K3のためのS32デザインスタジオ S32 Design Studio for ARM バージョン 2018.R1 を使用しています

IMX93QSB - 在 Windows/Linux 上通过 USB-C (FTDI FT4232H) 进行 JTAG 闪存/调试 大家好， 我希望你一切都好。我目前正在寻求帮助，了解如何使用 USB-C 调试端口在 IMX93QSB 上执行 JTAG 闪存和调试。具体来说，我想知道是否可以通过 USB-C 端口使用 FTDI FT4232H（端口 A 配置为 JTAG）来完成此操作。Windows 10/11 和 Linux 都支持此功能吗？ 我已查阅过参考手册，但找不到有关此功能的明确指导。有人可以确认这是否可行吗？如果可行，请提供使其发挥作用的必要步骤？ 提前感谢您的帮助！

LIN Example S32K344 questions Hi, Situation is as the following: -> currently using : S32K3X4EVB-T172 evaluation board -> installed S32DS, SDK, LIN Stack, RTD, ...  Then I want to use the LIN_Master example "Lin_Master_S32K344_Example_DS" and configured my board with S32DS but at compiling the project, it is missing the following files: "lin_stack_cfg.h"  "lin_common_api.h" "lin_commontl_api.h" "lin_diagnostic_service.h" Do you have any idea where the files come from? Are they generated out from a .ldf file (in S32DS?)  Thanks in advance. Re: LIN Example S32K344 questions Thanks a lot. Re: LIN Example S32K344 questions Hi, PMC is configured in With above setting I was able to pass outlined code when set VDD_HV_A to 3.3V using J18.2-3 jumper setting. Or if V15_MCU is sourced from ballast transistor using J31.2-3. BR, Petr Re: LIN Example S32K344 questions Hello All, So finally we can build the LIN example. The next problem is that the MCU is not getting over a generated/configured function in the file : "Power_Ip_PMC.c" in function "Power_Ip_PMC_PowerInit" exactly in this piece of code (highlighted line, line number 304): If we go with debugger over the highlighted line , we are in some kind of deadlock/reset loop of the S32K3. Debugger is not working, we can not reset MCU. So we have to erease the whole memory of the chip with J-Flash Lite.  If we do this again with the debugger and just set "ConfigValue" (before execution in line 304) just to "0" we have a normal run. Can anyone explain why? And where exactly we can find the configuration menu for this ConfigValue in S32DS? What is a optimal configuration for this register? Thanks in advance. Re: LIN Example S32K344 questions Hi, I tried to change the .mex file as you mentioned but I still got the same issue: ../src/main.c:30:10: fatal error: lin_stack_cfg.h: No such file or directory 30 | #include "lin_stack_cfg.h" | ^~~~~~~~~~~~~~~~~ compilation terminated. What I did:  - Deleted old LIN example - Opened LIN example again (with S32DS) - Closed S32DS  - Changed mex file as you mentioned - Opened S32DS  - Clicked on LIN example / Opened Configuration Tools - Switched to my Package S32K344_172HDQFP - Updated Code --> Then I tried to build the whole project, where I got the error from above. Re: LIN Example S32K344 questions Hi, it is part of linstack installation. On my RTD4.0.0 and linstack 2.0.4 c:\NXP\S32DS.3.5_RTD400\S32DS\software\PlatformSDK_S32K3\stacks\lin\documentation\LIN_UserManual.pdf BR, Petr Re: LIN Example S32K344 questions Hi Petr, Thanks a lot I will try. Can you help me where I can get the LinStack user manual? I just found LPUART and LIN with RTD - Training... Re: LIN Example S32K344 questions Hi, I was able to built example following below steps. -just open/create example -modify mex file in external editor before opening in S32DS, search for src\LIN21.ldf and change it to src/LIN21.ldf - do a code update and allow changes for generated LinIf.h and LInIf.c as described in LINStack user manual chapter 6 Known issues and limitations Then project can be built and elf generated BR, Petr