如何通过单个 S32DS 安装支持多个版本的 RTD？ 我有不同的小组使用不同版本的 RTD，具体取决于他们正在从事的项目。不幸的是，RTD 不向后兼容。 我安装了 S32K3XX 实时驱动程序 AUTOSAR R21-11 版本 4.0.0。 另一个项目是用 3.0.0 版本构建的。如果我导入项目，配置器会报告许多错误并且不会生成代码。 当我尝试安装 3.0.0 版本时，S32DS 表示无法安装它，因为已经安装了较新的版本。 支持使用不同版本 RTD 的不同项目的最佳方法是什么？找出需要安装哪个版本的平台工具来支持它们的最佳方法是什么？

LLC 模式会引入抖动噪声吗？ 几十年前，我为一系列欧司朗光谱灯开发了一种高频稳定电源。这些是弧光灯，由荧光灯型扼流圈和启动器以 50Hz 运行。电源以 20KHz 运行，但启动时使用约 70KHz 的 LC 谐振。 我的想法是通过在谐振点附近运行使电源工作电压在 85 至 250Vac 之间，它也能启动得更快。而且由于灯的额定功率为 10W 至 60W，因此不需要 PFC 控制器。 但我担心的是，由于 LLC 针对零电流开关进行了优化，开关时间会出现抖动？这种抖动可能会影响光输出的质量，或者与弧光灯往往会产生的小闪烁相比，它可能微不足道。 我已经上传了输出电路和来自灯的传感电流变压器的控制器低压电源，但没有上传控制器，无论如何，它都是 20 世纪 80 年代和 90 年代的传统电流模式控制器，没有斜率补偿。 如果我走错了路，请建议另一个控制器？ 回复：LLC 模式会引入抖动噪声吗？ 我预计另一家公司会生产这些产品，飞利浦/恩智浦倾向于生产一段时间，然后出售知识产权 你知道现在哪家制造商生产这些零件吗？ 回复：LLC 模式会引入抖动噪声吗？ 谢谢你，约瑟夫， 您给了我一些有趣的链接。我担心的不是眼睛对闪烁的敏感度，而是电子设备对闪烁的敏感度。我之前经过多次集成后制作的电源非常坚固，很好地解决了这些问题。但它的效率却比应有的要低。 您提到了水银型电源，是吗？ https://www.nxp.com/docs/en/brochure/75017226.pdf 我可以看到，要启动灯，控制器必须在 LC 谐振下工作。运行时，频率可能会发生变化（有点感应，数据表解释道）。我不知道他们是否会这么做？ 无论如何，我会考虑您的建议并寻求其他途径？ 回复：LLC 模式会引入抖动噪声吗？ 亲爱的约瑟夫， 我已经从他们的网站上传了欧司朗数据表。我的博客上还有一段 YouTube 视频，展示了其中一盏灯的启动和运行，请参见下面的链接。 https://blog.andrew-lohmann.me.uk/2018/07/electronics-high-frequency-arc-lamp.html 谢谢 安德鲁

How to support multiple versions of RTDs with single S32DS installation? I have different groups using different versions of the RTDs depending on which project they're working on. Unfortunately, the RTDs are not backward compatible.  I have S32K3XX Real-Time Drivers AUTOSAR R21-11 Version 4.0.0 installed. Another project was built with version 3.0.0. If I import the project, the configurator reports many errors and will not generate code. When I tried to install version 3.0.0, S32DS says it cannot install it because a newer version is already installed. What's the best way to support different projects that use different versions of the RTDs and what is the best way to figure out what version of platform tools needs to be installed to support them? Re: How to support multiple versions of RTDs with single S32DS installation? Hi @hns80, Unfortunately, there is no current way to install multiple RTD packages in the same instance, as a workaround, you can install multiple instances for S32DS like: c:\NXP\S32DS.3.5_RTD300\ c:\NXP\S32DS.3.5_RTD400\ and then install specific RTD to each instance. Best regards, Julián

NXP Versioning Scheme for kernel/u-boot/yocto Hi, quick question: How can I read the NXP versioning numbers? e.g.: lf-5.15.71-2.2.1 How can I read that? What does "lf" stand for? what's 2.2.1 ? 5.15.71 is the kernel version? So it must be yocto kirkstone? Thanks for enlightening me! Re: NXP Versioning Scheme for kernel/u-boot/yocto Hi, Please refer to release note, we have some related information about these there. The GA releases are named L _ . : BSP Kernel version (For example, L5.15.71 indicates that this BSP release is based on the kernel version 5.15.71). : Semantic versioning specification, where X is the major version, Y is the minor version, and Z is the patch version. LF stands for Linux Factory.   IMX_LINUX_RELEASE_NOTES.pdf  Regards Harvey

Does LLC mode introduce jitter noise? Some decades ago, I developed a high frequency stabilised power supply for a range of Osram spectral lamps. These are arc lamps that run from a fluorescent lamp type choke and starter at 50Hz.  The power supply ran at 20KHz but used LC resonance at about 70KHz when starting. My thought was to make the power supply work wider voltage 85 to 250Vac by running at about resonance, it would also start more quickly.  And because the lamps are rated 10W to 60W not require PFC controller. My concern though is that because the LLC is optimised for zero current switching, the switching time would have jitter?  This jitter would affect the quality of the light output perhaps, or it may be trivial compared to the little flicker that the arc lamps tend to have anyway. I have uploaded the output circuit and the controller's low voltage power supply derived from the lamp's sensing current transformer but not the controller, which is in any case a conventional current mode controller with no slope compensation of the 1980s and 1990s. If I am on the wrong track, please advise an alternative controller? Re: Does LLC mode introduce jitter noise? Dear Andrew, I do not have this information. I apologize for inconvenience.  With Best Regards, Jozef Re: Does LLC mode introduce jitter noise? I expect another company make them Philips/NXP tend to make things for a period then sell the I.P. Would you know which manufacture now make those parts? Re: Does LLC mode introduce jitter noise? Dear Andrew, the UBA2016/15/15A would be suitable to supply the one spectral lamp, which can be supplied with DC current. These have the DC output. Unfortunately they are no longer manufactured and we do not have any replacement.  With Best Regards, Jozef Re: Does LLC mode introduce jitter noise? Thank you, Jozef, You have given me some interesting links.  It was not eye sensitivity to flicker so much as electronic device sensitivity to flicker was my concern.  The power supply that I made previously after many integrations is robust and resolved the issues very well.  Its efficiency is poorer than it could be, though. You mention a Mercury type power supply, is that;  https://www.nxp.com/docs/en/brochure/75017226.pdf I can see that to start the lamp, the controller must work at LC resonance.  When running, the frequency can change (be a little inductive, the datasheets explains).  I can not see if they will do that? Anyway, I shall consider your recommendations and may pursue other avenue? Re: Does LLC mode introduce jitter noise? Dear Andrew, thank you for the datasheet and additional information. I see the spectral lamp type is similar to the fluorescent lamp type.  From the datasheet you shared, you need to supply the Sodium spectral lamp with Alternating Current, so you need an AC/AC controller. Unfortunately we do not have any such type. We have plenty of AC/DC controllers, so we can offer you one for the Mercury type, which is the only one, which can work with both AC and DC current.  Please check this link for our AC/DC controllers portfolio. For the powers from 10W to 60W a flyback type would be more suitable, than the LLC type. For example TEA1755T is suitable for power supplies from 0W to 250W. E.g. the TEA2017 LLC and PFC combo is suitable for powers from 90W to 1000W. For lower powers the LLC controllers have low efficiency.  Regarding the jitter, yes every power supply produces some jitter, but human eye will not be disturbed by that. Current converters works in kHz, latest in MHz. The human eye will not perceive the jitter.  "The human eye can see electromagnetic radiation roughly in the frequency range of 400 to 800 teraherz. The eye has trouble decerning modulation of the radiation roughly above 60 to 70 Hz, but it depends precisely where in your field of view the modulation occurs. Light modulated above the cut off frequency is not invisible. It is perceived as steady light. That is the very simplified answer. There is a lot more to it, and no you can't see 120 Hz, that is a strobe effect and probably a conspiracy to sell high speed monitors to people who think they know what's going on but don't. It is the result of high speed shutters and poor CGI techniques, but let them buy and enjoy, their graphics cards." With Best Regards, Jozef Re: Does LLC mode introduce jitter noise? Dear Jozef, I have uploaded the Osram datasheet from their website.  There is also a YouTube video of one of these lamps starting and running on my blog see the link below. https://blog.andrew-lohmann.me.uk/2018/07/electronics-high-frequency-arc-lamp.html Thankyou Andrew Re: Does LLC mode introduce jitter noise? Dear Andrew, could you please share a datasheet of the Lamp you want to create a power supply for? I am not sure if I understand the meaning of the Arc Lamp you are referring to. Do you mean the Fluorescent Lamp?  With Best Regards, Jozef

1つのS32DSインストールで複数のバージョンのRTDをサポートするにはどうすればよいですか? 私は、彼らが取り組んでいるプロジェクトに応じて、異なるバージョンのRTDを使用するさまざまなグループを持っています。残念ながら、RTDには下位互換性がありません。 S32K3XX Real-Time Drivers AUTOSAR R21-11 Version 4.0.0 をインストールしました。 別のプロジェクトはバージョン 3.0.0 でビルドされました。プロジェクトをインポートすると、コンフィギュレーターで多くのエラーが報告され、コードが生成されません。 バージョン3.0.0をインストールしようとしたところ、S32DSは、新しいバージョンがすでにインストールされているため、インストールできないと言っています。 RTDの異なるバージョンを使用するさまざまなプロジェクトをサポートする最善の方法と、それらをサポートするためにインストールする必要があるプラットフォームツールのバージョンを把握する最善の方法は何ですか?

S32DS with S32K3xx: Installation of FreeRTOS fails Hi, I am currently having a problem with a fresh install with S32DS. I'm targeting a S32K358, and using RTD 4.0 with S32DS 3.5.11 (code drop quality?) and the S32K3xx development package 3.5.8. The update manager is not letting me install FreeRTOS for S32K3 in version 4.0.0: The suspicious part for me is the "0.0.0" for the 2nd requirement. Operation details Software being installed: com.nxp.FREERTOS.S32K3_S32M27X.root.4.0.0.feature.feature.group 4.0.0.202312180411 Missing requirement: com.nxp.FREERTOS.S32K3_S32M27X.root.4.0.0.feature.feature.group 4.0.0.202312180411 requires 'org.eclipse.equinox.p2.iu; com.nxp.RTD.S32K3_S32M27X.root.feature.feature.group 0.0.0' but it could not be found Remark: I installed RTD 3.0 before 4.0 in order to be able to use the BMS SDK as suggested in another thread. Here is my current installation: BR Andreas Re: S32DS with S32K3xx: Installation of FreeRTOS fails Hi @AndreasStolze  The S32K3_S32M27x comes with additional support for S32M274 and S32M276, so it will require to have installed the development package for both families (S32K3 and S32M2). The S32K3xx just has support for S32K3 devices. Re: S32DS with S32K3xx: Installation of FreeRTOS fails Hi @VaneB  can you quicky explain the difference between S32K3_S32M27x  and S32K3xx and why only one seems not to work? Thanks Andreas Re: S32DS with S32K3xx: Installation of FreeRTOS fails Hi @AndreasStolze  Thank you for the feedback, we are working to improve our tools. Sorry for the inconvenience caused.  Re: S32DS with S32K3xx: Installation of FreeRTOS fails I installed S32K3xx now manually and now it seems to work. It's really tricky as a user to know what's going on. Re: S32DS with S32K3xx: Installation of FreeRTOS fails Hi @VaneB  I uninstalled RTD 4.0.0 and reinstalled FreeRTOS again. This time it installed it's dependency itself: But now I'm getting this error when opening my mex file: I just don't understand why when adding the RTD 4.0.0 archive zip, more than one package appears: I get, that I don't need the S32K39X package. FreeRTOS installed the S32K3_S32M27x package. Why isn't the S32K358 target included, although it's stated in the package description? BR Andreas Update: I installed S32K3xx now manually and now it seems to work. Re: S32DS with S32K3xx: Installation of FreeRTOS fails Hi @AndreasStolze  We have faced unexpected behaviors when more than one RTD version is installed. Could you please try uninstalling all the packages and installing only the packages on which the software has dependencies? B.R. VaneB

MKL02Z32VFK4 PTB2 alternative(2) Rxd Hi, just want to know if anyone came across the same problem as I have with Rx pin PTB2. The thing is that Txd is sending correctly at 115200b(that's verified) but when receiving it it's completely crap but defined crap(like when the baudrate is extremely wrong). I have also verified this by connecting a terminal prog(rxd) to listen to the message, and the message is ok at 115200b but UART is messing it up. If I send 'O','K',cr,lf the message in the rx buffer says 202(dec),106(dec),194(dec). The status flag indicate overrun and frame error all the time. The rx is interrupted, not the tx. Any ideas ? Cheers Claes Kinetis L Series MCUs Re: MKL02Z32VFK4 PTB2 alternative(2) Rxd Hello again @claeskjellstrom , Regarding your question, I understand that you want to modify the trim register that feeds the module, through the Jlink. However, as the following post says, Jlink doesn't support this feature: https://community.nxp.com/t5/Kinetis-Design-Studio/trimming-internal-oscillator/td-p/383412. If you need more information about the trim register, you can consult the reference manual for the chapter 21 called "Multipurpose Clock Generator (MCG)" in the register "MCG Control 3 Register (MCG_C3)" as well as "MCG Control 4 Register (MCG_C4)". BR Habib Re: MKL02Z32VFK4 PTB2 alternative(2) Rxd Hi, It turns out that FLL clock was out of tune, so funny thing was that Tx was sending correct but Rx couldn't receive correct, I had to switch clock to MCGIRCLK instead and now it's working. I would like to know if there is any possibility to trim oscillator through Segger J-link. /Claes Re: MKL02Z32VFK4 PTB2 alternative(2) Rxd Hello @claeskjellstrom , Can you give me more information about how you configured the peripheral? for example: - 115200 baud rate - 8 data bits - No parity - One stop bit - No flow control. For the moment, you can check an example of SDK (version 3.2) called "hello World", in this example, they use UART 0 for communicate at terminal. BR Habib

S32K324 Lpuart_lin Master Continually Returning Status "LPUART_LIN_IP_STATUS_TX_BUSY" Hi, I am using the S32K324 in a project, and am running into issues using the Lpuart_lin driver. Executing the function "Lpuart_Lin_Ip_SendFrame" returns "LPUART_LIN_IP_STATUS_SUCCESS", however when polling the LIN instance's status after it returns "LPUART_LIN_IP_STATUS_TX_BUSY". All subsequent calls to "Lpuart_Lin_Ip_SendFrame" return a fail. I checked the RX and TX lines going into my LIN transcoder, as well as the LIN output and I can see a 650 microsecond low pulse followed by nothing. There is no data sent apart from this break, which is seen on all 3 lines. Any ideas as to what could be causing the issue? I have attached the file containing the Init and Send functions I have created. Thanks! EDIT: Wanted to add, the LIN instance has a "CurrentNodeState" of "LPUART_LIN_IP_NODE_STATE_SEND_BREAK_FIELD". Re: S32K324 Lpuart_lin Master Continually Returning Status "LPUART_LIN_IP_STATUS_TX_BUSY" hello @PetrS  I have encountered the same problem now, when MCU sends as host, LPUART_LIN_IP_STATUS_TX_BUSY, and the LIN instance has a "CurrentNodeState" of "LPUART_LIN_IP_NODE_STATE_SEND_BREAK_FIELD". But now the api for rerouting interrupts seems to have been removed, leaving only the IntCtrl_Ip_Init function. I can't find another solution, please tell me if there is another way to check my error. Re: S32K324 Lpuart_lin Master Continually Returning Status "LPUART_LIN_IP_STATUS_TX_BUSY" Hi Petr, Thanks for the response, I had already added the interrupt handler to IntCtrl_Ip. The issue turned out to be, I was initializing the interrupt and configuring the interrupt routing after initializing the LIN. Now that I am initializing the interrupt before the LIN I am successfully sending LIN frames. Thanks! Re: S32K324 Lpuart_lin Master Continually Returning Status "LPUART_LIN_IP_STATUS_TX_BUSY" Hi, it looks like driver interrupt is not called to next frame bytes are not processed. Try to check that. You can also refer to RTD demo examples. BR, Petr

LLCモードではジッターノイズが発生しますか? 数十年前、私はオスラムのスペクトルランプ用の高周波安定化電源を開発しました。蛍光灯タイプのチョークとスターターから50Hzで作動するアークランプです。電源は20KHzで動作しましたが、起動時には約70KHzでLC共振を使用しました。 私の考えは、電源を85〜250Vacの電圧で広く動作させることで、共振程度で動作させることで、より早く始動するだろうということでした。また、ランプの定格は10W〜60Wであるため、PFCコントローラーは必要ありません。 しかし、私の懸念は、LLCがゼロ電流スイッチングに最適化されているため、スイッチング時間にジッターが発生することですか?このジッターは、おそらく光出力の品質に影響を与えるか、アークランプが持ちがちな小さなちらつきに比べれば些細なことかもしれません。 出力回路と、ランプのセンシング電流トランスから派生したコントローラの低電圧電源をアップロードしましたが、コントローラはアップロードしていません。これは、いずれにせよ、1980年代と1990年代のスロープ補償のない従来の電流モードコントローラです。 間違った方向に進んでいる場合は、別のコントローラーにアドバイスしてください。 Re:LLCモードはジッターノイズを導入しますか? 私は別の会社が彼らを作ることを期待しています、フィリップス/ NXPは一定期間物を作り、その後IPを売る傾向があります。 現在、どのメーカーがそれらの部品を製造しているか知っていますか? Re:LLCモードはジッターノイズを導入しますか? ありがとう、ヨゼフ、 あなたは私にいくつかの興味深いリンクをくれました。それは、ちらつきに対する目の感度というよりは、電子機器のちらつきに対する感度が私の関心事でした。以前に多くの統合を行った後に作成した電源は堅牢で、問題を非常にうまく解決しました。しかし、その効率は本来あるべき姿よりも劣っています。 あなたはマーキュリータイプの電源について言及しましたが、それはそれです。 https://www.nxp.com/docs/en/brochure/75017226.pdf ランプを始動するには、コントローラーがLC共振で動作する必要があることがわかります。実行中、周波数は変化する可能性があります(データシートに説明されているように、少し誘導性があります)。彼らがそれをするかどうかはわかりませんか? とにかく、私はあなたの推薦を検討し、他の道を追求するかもしれませんか? Re:LLCモードはジッターノイズを導入しますか? 親愛なるヨゼフ、 Osramのデータシートを彼らのウェブサイトからアップロードしました。私のブログには、これらのランプの1つが開始して実行しているYouTubeビデオもあります(以下のリンクを参照してください)。 https://blog.andrew-lohmann.me.uk/2018/07/electronics-high-frequency-arc-lamp.html ありがとう アンドリュー

[JN5189] Size of a flash memory page hello It seems that the flash page size for the JN5189 is 512 bytes, as defined in the SDK's app_flash.h file with '#define APP_FLASH_PAGE_SIZE 512'. Is it possible to modify this part to change the unit for writing to flash to 256 bytes? I tested by changing only APP_FLASH_PAGE_SIZE and it seems to read but not write. Do I need further modifications? Is changing the page size not supported originally? Could you guide me on the best approach to take? Thank you. Jonny9. Re: [JN5189] Size of a flash memory page Hi, Thank you for the confirmation. The Page size is something related to the internal flash of the MCU and not should be changed. Regards, Ricardo Re: [JN5189] Size of a flash memory page Hi, I made a mistake. The name I used for #define was FLASH_PAGE_SIZE, not APP_FLASH_PAGE_SIZE. For your reference, the base code is 'jn5189dk6_zigbee_ed_rx_on_bm'. That part is located in 'fsl_flash.h'. I apologize for any confusion this may have caused. Best Regards, Jonny9 Re: [JN5189] Size of a flash memory page Hi, Could you please confirm #define you are using? I could not find it on SDK. Regards, Ricardo Re: [JN5189] Size of a flash memory page Hello, I am using version 2.6.10. Best Regards, Jonny9 Re: [JN5189] Size of a flash memory page Hello, Hope you are doing well. Could you please clarify what SDK version are you using? Best Regards, Ricardo

NFCLIB init issues with PN7642 folowing a failed flash Hello, A board for a ISO 15693 tag reader worked perfectly for two days of testing. While working on another project I clicked on the wrong probe to flash the board, I accidently selected the probe my PN7642 board was connected to instead of the one for the other project. The J-Link driver indicated "CPU not found" but the board reseted and started to reset every few seconds. I can flash and run a program that doesn't require the NFC but if I try to run any program that uses the NFC the following message shows up and the program crashes. "Line: 154 Error - (0x001E) has occurred in NFCLIB" Did I damage something and is there a way to fix it ? Thank you, have a nice day. Re: NFCLIB init issues with PN7642 folowing a failed flash Hello, It solved the problem, thank you ! However I had to use IAR to flash the firmware update project because mcuexpresso couldn't do it. Thank you again for your help. Gwendal Re: NFCLIB init issues with PN7642 folowing a failed flash Hello @glev  Could you try to update FW and test again? Re: NFCLIB init issues with PN7642 folowing a failed flash Hello @KaiLi  It seems to me that the error comes from the PN76_Sys_Clif_Init() function, returning 0x001E. BR Gwendal Re: NFCLIB init issues with PN7642 folowing a failed flash Hello @glev  So when you debug, can you locate which API the error occurred? BR Kelly Re: NFCLIB init issues with PN7642 folowing a failed flash Hello @KaiLi, Thank you for your response. This board is not an NXP demo board, but it's based on the same module as the PNEV7642A and the design is heavily inspired by the demo board. All the proper antenna matching has been done. The two boards we have worked perfectly before this incident and the other one still does work with no issues. I run a custom firmware based on the NfcrdlibEx5_ISO15693 example running freeRTOS, but I also tried running the NfcrdlibEx5_ISO15693 example directly with the same result. "Line: 154 Error - (0x001E) has occurred in NFCLIB" at startup The same programs work perfectly on the other board and the demo board.  I'm using a J-LINK plus probe with IAR to program the device, I have added the proper JLINKscript. I also the direct storage method to program, with the same result. Best Regards Gwendal Re: NFCLIB init issues with PN7642 folowing a failed flash Hello @glev  Is your board an NXP demo board? Are you running the NXP application routine? If so, which routine is it? I may need to run trace on my side. BR kelly

Misleading LPDDR4 size in NXP DDR Tool Hello NXP-Team, hello Forum, we have a custom addapted iMX8mq-based board with 3G, running without any complains. Due to a LPDDR-memory discontinuation, we changed our LPDDR-Memory. Current LPDDR is: MT53B768M32D4NQ-062 New LPDDR is: MT53E768M32D2ZW-46 https://www.farnell.com/datasheets/4000640.pdf  We rerun the DDR-StressTest to configure the correct parameters of our new LPDDR The new LPDDR size is indicated in Excel sheet as expected with 24Gb But after loading the exported DDR-Script into NXP DDR Tool, the LPDDR size is announced with 1576MB. We expeted 3072MB per Controller / of the board. The DDR Stresstest is completed successfully, the Memory can be accessed up to the 3GB adresses within DDR-Tool (0x40000000 to 0xFF000000), In U-Boot, where we changed only the adapted DDR-Setting (code exported from DDR-Tool), runs without any Problem. But Linux boot fails (U-Boot's "Starting kernel ...." is the last reported info) What is the reason of the unexpected 1536MB memory announcment in DDR Tool, which is not according to the 3GB announced by MX8M-RPA-Excel sheet? Is there a misconfiguration, leading to the linux start failure? We are using i.MX 8M Family DDR Register Programming Aid (RPA), v33. Thank you for all your efforts N. Wiedmann i.MX 8 Family | i.MX 8QuadMax (8QM) | 8QuadPlus Re: Misleading LPDDR4 size in NXP DDR Tool Thank you, that is the reason for the incompatibility of the MT53E768M32D2ZW-46 The LPDDR needs 17 row bits to address its number of 98304 rows According to the linked 'memory compatibility guide', the i.MX 8M Quad is limited to 16 row bits. N. Wiedmann Re: Misleading LPDDR4 size in NXP DDR Tool Hi Sir, i.MX8M Quad  only support ROW=16 You can see this link https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Quad-8M-Mini-8M-Nano-8M-Plus-LPDDR4-DDR4-and-DDR3L/ta-p/1434761 Re: Misleading LPDDR4 size in NXP DDR Tool Hello Salas, thank you for responding. I tried with the Config Tools v15 (selected CPU, completed in the fields in DDRC-Tab, exported .ds and lpppdr4_timing.c file). The StressTestTool still reports the 'incorrect' LPDDR-size 1536MB (instead of 3072), U-Boot is running, Linux doesn't start. Could there be an issue with the "Number of ROW-Adresses"? The 'MT53E768M32D2ZW-46' data sheet reports R[16:0], the ExcelSheet blocks >16, in ConfigTool we tried 17, but it doesn't change the reported LPDDR-size Best regards, N. Wiedmann Re: Misleading LPDDR4 size in NXP DDR Tool Hello @NWiedmann  Could you please try to do the same but with the Config Tools v15 software? I will attach the user guide. Please let me know how it was. Best regards. Salas.

S32K144 EEPROMのデータの書き込み問題 AN11983にS32K144のEEPROMの設定を依頼し、0x14000000 0x14000004など4アドレスごとに正常にデータを書き込むことができますが、上記のアドレスでない場合、例えばデータが0x14000001 0x14000002 0x14000003に書き込まれている場合などは、「F:\...\...\Debug_FLASH/../Project_Settings/Startup_Code/startup_S32K144 です。S」が表示されますが、どこがうまく設定されていないのか、それとも他の理由なのか聞いてもいいですか?

fw_setenv corrupts environment on MTD for Linux kernels after 5.4 I'm using a BoundaryDevices Nitrogen 6 SOM2v2 with an i.MX6Q and sst25vf016b SPI NOR for U-Boot (environment stored on /dev/mtd1). System image is built via buildroot. For our system upgrade process, we need to change U-Boot variables from a shell script which is achieved via fw_setenv. The issue now is, that trying to use a kernel after 5.4 (tested with 5.10. 5.15, and 6.1), fw_setenv destroys the environment on the MTD, making the upgrade process fail (same failure for fw_setenv from UBOOT_TOOLS and LIBUBOOTENV). According to the folks at Boundary Devices, "The issue you're seeing is related to a bug in the MTD driver.  The driver comes from NXP, and we haven't made any modifications." The latest buildroot (2024.02.1), using the defconfig for this board uses the MTD driver from https://github.com/boundarydevices/linux/tree/boundary-imx_6.1.y/drivers/mtd The failure can easily be triggered using the following steps: # fw_printenv bootdelay bootdelay=3 # fw_setenv bootdelay 5 # fw_printenv bootdelay Warning: Bad CRC, using default environment Looking at the stored environment after these steps by means of hexdump -C /dev/mtd1 we can see that everything but the first byte for each block is 0xff, pointing to the erase being successful but the write only writing one byte. Any ideas on how to fix the driver? We really would like to move on past a 5.4 kernel/buildroot 2021.02… i.MX6Quad Linux Re: fw_setenv corrupts environment on MTD for Linux kernels after 5.4 We experienced the same issue using the sst25vf032b and sst26vf032b in both the 6.1 and 6.6 kernels. Thanks for this patch it has fixed the problem in both kernels versions for us as well.  Re: fw_setenv corrupts environment on MTD for Linux kernels after 5.4 After comparing the SPI traffic during write with working vs. non-working kernel issues I was able to track the issue down to the SST write code in the MTD driver and managed to fix this using the attached patch (patch against Linux 6.1, only tested against sst25vf016b). Re: fw_setenv corrupts environment on MTD for Linux kernels after 5.4 If by "Nitrogen" you mean the people at Ezurio (formerly Boundary Devices), I've tried that first and they said that their Linux kernel is the one from NXP so I should try here… Re: fw_setenv corrupts environment on MTD for Linux kernels after 5.4 Hello, Maybe someone of @Nitrogen could help on this. Regards

S32K144 EEPROM的写入数据问题 我参考AN11983对S32K144的EEPROM进行配置，可以正常每隔4个地址比如0x14000000 0x14000004写入数据，但如果不是上述地址，比如在0x14000001 0x14000002 0x14000003等写入数据，就会出现“Can't find a source file at "F:\...\...\Debug_FLASH/../Project_Settings/Startup_Code/startup_S32K144.S"”的警告，请问是我哪里没有配置好，还是有其他原因？

The writing data issues of the S32K144 EEPROM I refer the AN11983 to configure the EEPROM of S32K144, and the data can be written normally every 4 addresses such as 0x14000000 0x14000004, but if it is not the above address, for example, if the data is written in the 0x14000001 0x14000002 0x14000003, etc., the warning "Can't find a source file at "F:\...\...\Debug_FLASH/../Project_Settings/Startup_Code/startup_S32K144.S" " will appear, may I ask where I am not configured well, or is it some other reason? Re: The writing data issues of the S32K144 EEPROM thanks for Julián help.The problem has been solved, and I found that it was my understanding of the pointer, and when I used the 8-bit pointer to point to the address, I was able to store the 8-bit data. RobinY Re: The writing data issues of the S32K144 EEPROM Hi,Julián thanks for your reply. But the problem i want to solve is write 8 bit data int any location of the 4k EEPRAM, but when i write 8 bit data int 0x14000001 or 0x14000002 or 0x14000003, or any other address that can not be Divisible by 4,  the warning is appear "Can't find a source file at "F:\...\...\Debug_FLASH/../Project_Settings/Startup_Code/startup_S32K144.S".  i set the FlexRAM used for normal emulated EEPROM (No quick writes). Best regards, RobinY Re: The writing data issues of the S32K144 EEPROM Hi @RobinY, You can find the reason for this in section 3.2.1.3 (FlexRAM used for EEPROM quick writes) from AN11983: You can also refer to this community post for some notes: Solved: About S32K144 FlexRAM used for EEPROM quick writes - NXP Community Best regards, Julián

PIN Interrupt hi, i am configure  PIN Interrupt in lpc55s16  (level sensitive or active level triggering) using below the registers: Intr_No=0; PINT->ISEL = (1<< LOW_LEVEL); PINT->SIENR = 1UL << (uint32_t)Intr_No; PINT->SIENF= 1UL << (uint32_t)Intr_No; i want to configuration for using level sensitive active low, and active high Re: PIN Interrupt It seems you don't understand what "pin level interrupt" means in this context. This term relates to the logic levels "H" and "L", which are defined and fixed by hardware and supply voltage. You cannot detect other voltage levels that way. If this is your objective use an ADC, or specific external custom hardware. Re: PIN Interrupt In the SDK example pin interrupt level triggering interrurpt is worked but sometimes doesnt worked. controller not detect  varying voltage,  using 3.3 v  controller is detect the interrupt in level triggering same LOW&HIGH. as the same 1.2 v controller is not detected only sometimes i got interrupt. interrupt detect voltage for controller is 0.8v but why? this not happened continue interrupt signal. Re: PIN Interrupt The following SDK examples show you how to use the Pin interrupt & pattern match: Hope it helps you!

XRDC Memory regions HI there, I don't understand the cross reference between MRC Slave protected PFLASH_0, PFLASH_1,...PFLASH_WR, ...,PRAM0,PRAM1 (see below) and the s32k3xx_Memory Maps where FLASH splitted in program flash data flash  and ram is splitted in SRAM0,1,2 (see below). I need to know that in order to configure xrdc configurations Can you help me ? Re: XRDC Memory regions Hi @FabioG, You can see the ports in the block diagram. Figure 8. Block diagram – S32K324, S32K344 and S32K314 The PFLASH_WR port is for writting/programming the flash (not depicted), while other ports are just for reading. Refer to RM sections: 22.1.1 Flash memory architecture 23.1 Chip-specific PRAMC information Regards, Daniel

IVOR1 IRQは、SPC5746R割り込みをトリガーすることによって発生します。 私は現在SPC5746RMMT5チップを使用しており、電源用のS32 DSでeTPU set2をデバッグするときにIVOR1_IRQ割り込みを入力します。 TG機能は今のところ問題なく動作していますが、クランクキャプチャ割り込みを設定すると、IVOR1_IRQ割り込みがトリガーされます。 MCSRが正しく設定されていないか確認してください。 どうすれば修正できますか? Re: IVOR1 IRQ は、SPC5746R が割り込みをトリガーすることによって引き起こされます。 ありがとうございました。あなたは私のためにこの問題を解決しました!