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From default Project template - Convert *CAN FD* to *CAN* Hi All, I'm working on the MR-CANHUBK344-S32.  I can run the tutorial: https://community.nxp.com/t5/NXP-Model-Based-Design-Tools/Communicating-over-the-CAN-Bus/ta-p/1758456 But, I cannot observe the CAN messages exchanged between CAN0 and CAN1 with my required hardware. I have to use a Kvaser Leaf Light v2 and I have to get those messages in a "standard CAN" format (the "old" version of CAN that is limited to 1000Kbps), not "CAN-FD" which is more recent and faster. I tried several things but I can't figure out how to: Get the same example working using the "old" CAN protocol with 500Kbps. I tried unchecking this box:  I tried playing with the CAN FD baudrate to set it to 500Kbps, or simply removing the whole section "0", with no success. I'm a little lost now. I'm sure it's super simple to solve but I'm not yet familiar enough with S32CT. Thank you in advance for your help. Aris Re: From default Project template - Convert *CAN FD* to *CAN* Hello @Aris_ , Glad to hear it worked! Regards, Robert V Re: From default Project template - Convert *CAN FD* to *CAN* Perfect! It works Re: From default Project template - Convert *CAN FD* to *CAN* Hello @Aris_ , To clarify some things first, the option you unchecked in the configuration is not used to enable or disable CanFD, but to select the protocol it's using (ISO CanFD or non-iso CanFD): In terms of sending normal Can frames (not FD), that should be achieved by simply opening the Can_Write block and unchecking the "Can FD Message" option, which you can see here: Let me know if this helps and you start seeing the Can frames on your Kvaser Leaf Light v2.  Regards, Robert V
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将NFC库移植到FRDM_K64F时出现问题 我正在尝试 根据网络研讨会和文档 NFC-READER-K64.pdf 将 NFC 阅读器 库 移植 到 K64F。 预期的屏幕截图和实际的屏幕截图之间存在一些差异,我认为这是由于软件的新版本(看起来网络研讨会是几年前做的)但一切都很简单,直到我尝试将 K64F 板的 SDK 导入到项目中。从文档和网络研讨会来看,SDK 文件应该出现在主项目文件夹和示例项目(NfcrdlibEx1_BasicDiscoveryLoop)中。事实并非如此。 当我检查 DAL 文件夹中的电路板时,K64RC633 的电路板也不在那里 不确定如何继续。是否有可反映当前软件构建的较新文档? 回复:将NFC库移植到FRDM_K64F时出现问题 嗨,丹尼尔 非常感谢您及时的回复。我认为我没有充分描述我的问题。 我已经导入了 FRDM64 板的 SDK。 我感到困惑的问题是链接过程之后 DAL 目录的位置。 NFC 阅读器库移植 FRDM_K64F 中描述的过程描述了链接 DAL、phOsal 和 infs 目录后,它们应该像这样出现在项目文件夹中。 但事实并非如此。我的项目文件夹看起来像这样...... infs 目录在那里,但 DAL、NxpNfcRdLib 和 phOsal 似乎不在那里。但我知道它们在那里——它们只是“隐藏”了。 有没有办法显示隐藏的文件夹? 回复:将NFC库移植到FRDM_K64F时出现问题 嗨,丹尼尔 问题更多的是 DAL 目录似乎位于正确的位置(链接后),但查看项目资源管理器时,它仅显示在工作区中,而不是在项目本身下。 就好像它被“隐藏”了一样…… 有没有办法显示“隐藏”目录。 谢谢! 微波熔炉 回复:将NFC库移植到FRDM_K64F时出现问题 嗨,丹尼尔 谢谢你,今天早上按照这个指南操作,一切都很顺利,直到我尝试链接各种 NFC 阅读器库。我按照 NxpNfsRdLib、DAL、phOsal 和 intfs 文件夹的程序进行操作。该过程似乎有效,但文件夹没有出现在 frdmk64f_basic_loop_discovery 项目文件夹中。 当尝试编辑以 phDriver_KinetisSDK.c 开头的源文件时,就会出现这个问题 该文件不在项目文件夹下。 非常感谢您的帮助, 微波熔炉
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MCUXpresso IDEコンパイルされた生成されたbinファイルのサイズを修正するにはどうすればよいですか HI:NXPテクニカルサポート NXP RT1172マイコンを使用し、MCUXpresso IDEを使用していますv11.6.1_8255 相談したい質問があります、私はブートローダーをやっています。これでブートコードがコンパイルされ、binファイルが100Kになり、コードは実際のコード量に応じて生成されますが、それを固定し、コンパイルされたサイズを512Kなどに固定したいのですが、どのように変更すればよいですか? 予約されたブートスペースは 3M (0x30000000~30300000) です。スペースは間違いなく十分です。 別の問題は、ビンファイルをコンパイルしたいのですが、値の内部に固定アドレスが定数である操作方法、たとえば、ブートサイズをコンパイルすると100Kになり、511Kにしたいアドレスが定数です0xAA55AA55 日時:MCUXpresso IDEどのように私はコンパイルされた生成されたbinファイルのサイズを修正しますか このスクリーンショットを見せてもらえますか [ビルド ステップ] の下の [ビルド後のステップ] セクションで、バイナリをパディングするコマンドを追加します。 あなたが言ったことによると、515Kはすべて0x00であり、それは私が望んでいるものではありません。ビン ファイルの合計サイズを 512K にし、未使用の塗りつぶし 0x00 または 0xFF にする必要があります
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Problems porting NFC Library into FRDM_K64F I am trying to port the NFC reader library to K64F based on webinar and document NFC-READER-K64.pdf. There were a few discrepancies between the expected screen shots and actual which I put down to the new versions of software (it looks like the webinar was done a number of years ago) but all was pretty straight forward until I tried to import the SDK for the K64F board into the project. It looks from the document and webinar that the SDK file should appear in the main project folder and the example project (NfcrdlibEx1_BasicDiscoveryLoop). It doesn't. When I examin the boards in the DAL folder, the one for the K64RC633 is not there either Not sure how to proceed here. Is there a newer document available that reflects the current software build..? Re: Problems porting NFC Library into FRDM_K64F Hi Daniel Thanks for the very prompt reply. I don't think I am describing my problem/issue well enough. I have imported the SDK for the FRDM64 board. The issue I am confused about is the location of the DAL directory after the linking process. The process described in the NFC Reader Library Porting FRDM_K64F, describes that after linking the DAL, phOsal and infs directories, they should appear in the project folder like this.. but they don't. My project folder looks like this.. The infs directory is there, but the DAL, NxpNfcRdLib and phOsal do not appear to be there. BUT I know they are there - they are just "hidden". Is there a way to display the hidden folders..? Re: Problems porting NFC Library into FRDM_K64F Hi @MWMinor : This file is in Frdm_k64 SDK. You can download this SDK and drag it into your IDE    -  "installed SDK",  as below picture shows. You can download the SDK for FRDMK64F from below link https://mcuxpresso.nxp.com/en/select Regards Daniel Re: Problems porting NFC Library into FRDM_K64F Hi Daniel The issue is more of the DAL directory seems to be in the correct place (after linking) but when looking at the project explorer, is only displayed in the workspace and not under the project itself. It is as though it is "hidden"... Is there a way to display "hidden" directories. Thanks MWM Re: Problems porting NFC Library into FRDM_K64F Hi @MWMinor  This package is based on LPC1769 by default. Maybe you need to select your own board.  (boardselection.h) Regards Daniel Re: Problems porting NFC Library into FRDM_K64F Hi Daniel Thanks for this, and working through this guide this morning, all was well until I tried linking the various NFC reader libraries. I followed the procedure for the NxpNfsRdLib, DAL, phOsal and intfs folders. The procedure appeared to work but the folders do not appear in the frdmk64f_basic_loop_discovery project folder. This becomes an issue when attempting to edit the source files starting with phDriver_KinetisSDK.c This file isn't under the project folder. Your assistance would be appreciated, MWM Re: Problems porting NFC Library into FRDM_K64F Hi  @MWMinor  I would suggest you refer to below link:  NFC Reader Library Porting FRDM_K64F, I hope it helps https://community.nxp.com/t5/NFC-Knowledge-Base/NFC-Reader-Library-Porting-FRDM-K64F/ta-p/1117798 Regards Daniel
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MCUXpresso IDE如何修复编译生成的bin文件大小 HI:NXP技术支持 我使用 NXP RT1172 微控制器并使用 MCUXpresso IDE v11.6.1_8255 有个问题想咨询一下,我在做bootloader。现在我的boot代码编译出来bin文件有100K,大小是根据我代码实际代码量生成的,但是我想让它固定大小,编译后的大小也是固定的,比如512K,请问应该怎么修改?预留的boot空间是3M(0x30000000~30300000),这个空间肯定够用。 还有一个问题是:我要编译的bin文件固定地址里面的值是一个常数怎么操作,比如我编译的boot大小是100K我想要511K里面的地址是一个常数0xAA55AA55 回复:MCUXpresso IDE 如何修复编译生成的 bin 文件大小 你能给我看一下这个截图吗?在“构建步骤”下,在“构建后步骤”部分,添加一个命令来填充二进制文件。 按照你的说法,515K全是0x00,这不是我想要的。我需要总 bin 文件大小为 512K,未使用的部分填充 0x00 或 0xFF
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Unable to connect to MCXC444 through USB in ISP mode I can list MCXA153 using nxpdevscan and connect to it using blhost; I used FRDM-MCXA153 through USB. As for FRDM-MCXC444, I can do none of these. Appreciate any help. MCXC USB Re: Unable to connect to MCXC444 through USB in ISP mode Hello Alireza, nxpdevscan returns all device names that match the VID and PID of the connected board. Unfortunately, RTs and MWCT have the same VID and PID for mboot. MCXC is not listed among the devices because you are probably using an older version of SPSDK that does not support MCXC. Support for MCXC was added in SPSDK 2.6.0. Regarding provisioning, did you reset the processor after erasing? If so, you moved the processor into a secure state, making provisioning impossible. You need to call blhost -- flash-erase-all-unsecure to move it out of the secured state. The erase operation sets the SEC field in the FSEC register in the FCF to a secured state. The provisioning process should be as follows: 1) blhost -- flash-erase-all-unsecure 2) Reset 3) blhost -- flash-erase-region 4) blhost -- write For provisioning and FCF editing, you can use MCUXPRESSO-SECURE-PROVISIONING 25.03, which will be published in the upcoming day Re: Unable to connect to MCXC444 through USB in ISP mode Hello, I have used the Flash_Config you provided and was able to list and connect to the CPU. nxpdevscan generate the following text: -------- Connected NXP USB Devices -------- Kinetis Bootloader - Freescale Semiconductor Inc. Vendor ID: 0x15a2 Product ID: 0x0073 Path: HID\VID_15A2&PID_0073\6&3123388D&0&0000 Path Hash: 782949de Name: mwct2016s | mimxrt1015 | mimxrt1060 | mimxrt1165 | mimxrt1182 | mimxrt1040 | mimxrt1176 | mimxrt1173 | mimxrt1181 | mimxrt1024 | mwct2014s | mwct2d16s | mimxrt1050 | mimxrt1189 | mimxrt1172 | mimxrt1166 | mimxrt1187 | mimxrt1171 | mwct2015s | mimxrt1020 | mimxrt1064 | mimxrt1010 | mwct2d17s | mimxrt1175 Serial number: -------- Connected NXP UART Devices -------- -------- Connected NXP SIO Devices -------- -------- Connected NXP UUU Devices -------- =============================================================== I think the bootloader should list the correct CPU like what I saw in MCXA153; it is not a big deal for me as my objective is to program the flash memory of MCXC444 through USB. I could erase the flash successfully but I could not reprogram it; I used the following command: blhost -u "0x15a2:0x0073" -j -- write-memory 0x0 C:\Works\firmware.bin and I got the following response: { "command": "write-memory", "response": [], "status": { "description": "10001 (0x2711) Security Violation.", "value": 10001 } } Could you please write what should be the correct steps for programming an unsecured flash memory. Thanks Re: Unable to connect to MCXC444 through USB in ISP mode Hello Alireza, On MCXC, peripherals are controlled by BCA (0x3C0) and boot options by FCF (0x400) setting. In the BCA peripherals can be disabled and in the FCF it is possible to disable ISP mode. Can you connect the board via UART?  - If not, load a new demo application via debugger to enable ISP. This can be done by loading new demo app sample from SDK 24.12 or newer. If you have older version, edit Flash_Config in startup_mcxc444.c, set it to the {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFF3DFE}; to enable ISP. - If yes, ISP is enabled and USB is probably disabled in the BCA. Edit register Enabled_peripherals and set USB to enabled. Or you can erase the device by blhost -p COMxxx flash-erase-all-unsecure. Now, the device is set to the default state and a USB connection should be available.
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MPC5748G CAN Hello, I would like to ask some questions about can0 receiving interrupt, I implemented is to receive all can id messages: Question 1: My program does not know why it can only enter the interrupt if MB[5] interrupt is enabled, and why reading MB[0] can read the correct message at this time. If I enable MB[0] interrupt, I cannot enter the receive interrupt, why? I read the message content of MB[0] and should also enter the MB[0] interrupt, here is my code. 回复: MPC5748G CAN Hi, A1) as I wrote MB flags change meaning when RXFIFO is used. So if there is new message in RXFIFO MB5 flag is set, if corresponding IMASK1 bit is set, interrupt is generated. 2) RFFN specifies how many filter elements will be used in RXFIFO. This will determine which MBs will be used by RXFIFO engine and ID Filter table, which MBs remains to be used for general TX or RX operation. Also specified how many filter elements will use individual masking registers, rest will FIFO global mask register.  3) the CPU can read the message from RXFIFO by accessing the output of the FIFO  (MB0) as a Message Buffer and the CAN_RXFIR register and then clear the interrupt (MB5 flag). If there are more messages in the FIFO the act of clearing the interrupt (MB5 flag) updates the output of the FIFO with the next message and update the CAN_RXFIR with the attributes of that message, reissuing the interrupt to the CPU. Otherwise, the flag remains negated. BR, Petr Re: MPC5748G CAN Sorry, there is an error in the project. The if judgment in can0_isr should be CAN0 回复: MPC5748G CAN Thank you for your reply. Yes, I enabled RX FIFO, but I still have the following problems: Question 1: According to the manual, if RX FIFO is enabled, MB[0~5] is occupied by RX FIFO (and I did not set the RFFN bit), but why MB[5] can enter the interrupt when sending data to CAN?MB[5] Isn't it occupied? Is there some kind of drinking relationship here? Question 2: I don't quite understand the meaning of the RFFN figure, can you answer it for me? Question 3: Why does this project need to read MB[0] of data after using MB[5] to enter the interrupt? Data projects that read MB[5] will go wrong, why? Looking forward to your reply! This is my project source code.Thank you! Re: MPC5748G CAN Hi, your code only shows you enabled interrupt for MB[4] (IMASK1=0x10). It does not indicate, how MBs are configured and used. Commented code  and last MCR writing indicates RXFIFO is enabled. When RFEN is set, MBs 0 to 5 cannot be used for normal reception and transmission because the corresponding memory region (0x80-0xDC) is used by the FIFO engine as well as additional MBs (up to 32, depending on CAN_CTRL2[RFFN] setting) which are used as Rx FIFO ID Filter Table elements. Low mask bits in IMASK1 also change its meaning, see more in 44.5.8 Rx FIFO chapter of the device RM. BR, Petr
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Re: How can i configure IEEE802.1CB Frame Replication and Elimination for Redundancy (FRER) in SJA11 Hello @PavelL, @alejandro_e  I am Trying to Implement VLAN for Sending Two different Streams such as stream1, stream 2 so for that on top of Existing Configuration I am trying to include VLAN for that General Parameters Table  TPID = 34984 TPID2 = 33024 L2 Lookup Table  I changed the MASK to  0x1FFFFFFFFFFFFFFFF for including VLAN, IOTAG MACADDR = 0x4C4C36454143 SRCPORT = 3 DSTPORT = 1,2,5 CB Sequence Generation and Individual Recovery Table REPLACE_PORT = 1,2 TAG_PORT = 1,2 CB Tag Replacement Table  REPLACEVLANID - ENABLE VLANID = 1 RTAG_RESERVED = ENABLE Second VLAN Integration  L2 Lookup Table  I changed the MASK to  0x1FFFFFFFFFFFFFFFF for including VLAN, IOTAG MACADDR = 0x112233445566 SRCPORT = 4 DSTPORT = 1,2,3 CB Sequence Generation and Individual Recovery Table REPLACE_PORT = 1,2 TAG_PORT = 1,2 CB Tag Replacement Table  REPLACEVLANID - ENABLE VLANID = 2 RTAG_RESERVED = ENABLE Added VLAN Lookup Table for both stream  VMEMB_PORT = 1,2,3,5 BC_DOMAIN = 1,2,3,5 TYPE_ENTRY[0]  = ENABLE TYPE_ENTRY[1] = ENABLE This was the change I was planning to have a Separate VLAN ID for this Two Different MAC Address Computation for that I am trying to Implement VLAN? whether this configuration Satisfy the configuration of VLAN or what are the other changes need to be made for Configuring VLAN ? Re: How can I configure IEEE802.1CB Frame Replication and Elimination for Redundancy (FRER) in SJA11 Hello @PavelL  SWITCH - 1 Initially Created a Default VLANID  VLANID = 0 VING_MIRR = Disable all Ports VEGR_MIRR = Disable all Ports VMEMB_PORT = Disable all Ports BC_DOMAIN = Disable all Ports TAG_PORT = Disable all Ports TYPE_ENTRY[1] = ENABLE TYPE_ENTRY[0] = ENABLE VLANID = 0 VLANID = 1 VING_MIRR = Disable all Ports VEGR_MIRR = Disable all Ports VMEMB_PORT = Port 1,2,3,4 -- ENABLE BC_DOMAIN = Port 1,2,3,4 -- ENABLE TAG_PORT = Port 1,2 TYPE_ENTRY[1] = ENABLE TYPE_ENTRY[0] = ENABLE VLANID = 1 VLANID = 2 VING_MIRR = Disable all Ports VEGR_MIRR = Disable all Ports VMEMB_PORT = Port 1,2,3,4,5 -- ENABLE BC_DOMAIN = Port 1,2,3,4,5 -- ENABLE TAG_PORT = Port 1,2 TYPE_ENTRY[1] = ENABLE TYPE_ENTRY[0] = ENABLE VLANID = 2 MAC Configuration Table  Port 1 --> VLANPRIO = 7 VLANID = 1 Port 2 --> VLANPRIO = 7 VLANID = 2 Port 3 --> VLANPRIO = 7 VLANID = 3 Port 4 --> VLANPRIO = 7 VLANID = 4 Port 7 --> VLANPRIO = 3 VLANID = 2 SWITCH - 2 VLANID = 0 VING_MIRR = Disable all Ports VEGR_MIRR = Disable all Ports VMEMB_PORT = Disable all Ports BC_DOMAIN = Disable all Ports TAG_PORT = Disable all Ports TYPE_ENTRY[1] = ENABLE TYPE_ENTRY[0] = ENABLE VLANID = 0 VLANID = 1 VING_MIRR = Disable all Ports VEGR_MIRR = Disable all Ports VMEMB_PORT = Port 1,2,3,4 -- ENABLE BC_DOMAIN = Port 1,2,3,4 -- ENABLE TAG_PORT = Port 1,2 TYPE_ENTRY[1] = ENABLE TYPE_ENTRY[0] = ENABLE VLANID = 1 VLANID = 2 VING_MIRR = Disable all Ports VEGR_MIRR = Disable all Ports VMEMB_PORT = Port 1,2,3,4,7 -- ENABLE BC_DOMAIN = Port 1,2,3,4,7 -- ENABLE TAG_PORT = Port 1,2 TYPE_ENTRY[1] = ENABLE TYPE_ENTRY[0] = ENABLE VLANID = 2 MAC Configuration Table  Port 1 --> VLANPRIO = 7 VLANID = 1 Port 2 --> VLANPRIO = 7 VLANID = 2 Port 3 --> VLANPRIO = 7 VLANID = 3 Port 4 --> VLANPRIO = 7 VLANID = 4 Port 5 --> VLANPRIO = 3 VLANID = 2 I made the configuration changes above  my CAN packets are getting Lost and CAMERA packets are getting streamed  so what would be the root cause for packet loss even after configuring VLANID  So what would be the ideal scenario to overcome the issue of Packet loss i understand CAMERA packets are flooding How to overcome this issue  Regards Abrar Re: How can I configure IEEE802.1CB Frame Replication and Elimination for Redundancy (FRER) in SJA11 Hello @Abrar_23 , UDP is fine for traffic testing. 30Mbps is also fine. Up to ~90% of max traffic load (in this case - egress queue) there should be no traffic drop. I apologize for late responses, I have to prioritize my tasks. Due to limited resources, customers which are using generic email accounts such as gmail.com or qq.com or similar have lower priorities. Please ensure that you use your company email address when communicating with NXP so that we can prioritize your question accordingly. Thank you for your understanding. Best regards, Pavel Re: How can I configure IEEE802.1CB Frame Replication and Elimination for Redundancy (FRER) in SJA11 Hello @PavelL  SWITCH - 1 Initially Created a Default VLANID  VLANID = 0 VING_MIRR = Disable all Ports VEGR_MIRR = Disable all Ports VMEMB_PORT = Disable all Ports BC_DOMAIN = Disable all Ports TAG_PORT = Disable all Ports TYPE_ENTRY[1] = ENABLE TYPE_ENTRY[0] = ENABLE VLANID = 0 VLANID = 1 VING_MIRR = Disable all Ports VEGR_MIRR = Disable all Ports VMEMB_PORT = Port 1,2,3,4 -- ENABLE BC_DOMAIN = Port 1,2,3,4 -- ENABLE TAG_PORT = Port 1,2 TYPE_ENTRY[1] = ENABLE TYPE_ENTRY[0] = ENABLE VLANID = 1 VLANID = 2 VING_MIRR = Disable all Ports VEGR_MIRR = Disable all Ports VMEMB_PORT = Port 1,2,3,4,5 -- ENABLE BC_DOMAIN = Port 1,2,3,4,5 -- ENABLE TAG_PORT = Port 1,2 TYPE_ENTRY[1] = ENABLE TYPE_ENTRY[0] = ENABLE VLANID = 2 MAC Configuration Table  Port 1 --> VLANPRIO = 7 VLANID = 1 Port 2 --> VLANPRIO = 7 VLANID = 2 Port 3 --> VLANPRIO = 7 VLANID = 3 Port 4 --> VLANPRIO = 7 VLANID = 4 Port 7 --> VLANPRIO = 3 VLANID = 2 SWITCH - 2 VLANID = 0 VING_MIRR = Disable all Ports VEGR_MIRR = Disable all Ports VMEMB_PORT = Disable all Ports BC_DOMAIN = Disable all Ports TAG_PORT = Disable all Ports TYPE_ENTRY[1] = ENABLE TYPE_ENTRY[0] = ENABLE VLANID = 0 VLANID = 1 VING_MIRR = Disable all Ports VEGR_MIRR = Disable all Ports VMEMB_PORT = Port 1,2,3,4 -- ENABLE BC_DOMAIN = Port 1,2,3,4 -- ENABLE TAG_PORT = Port 1,2 TYPE_ENTRY[1] = ENABLE TYPE_ENTRY[0] = ENABLE VLANID = 1 VLANID = 2 VING_MIRR = Disable all Ports VEGR_MIRR = Disable all Ports VMEMB_PORT = Port 1,2,3,4,7 -- ENABLE BC_DOMAIN = Port 1,2,3,4,7 -- ENABLE TAG_PORT = Port 1,2 TYPE_ENTRY[1] = ENABLE TYPE_ENTRY[0] = ENABLE VLANID = 2 MAC Configuration Table  Port 1 --> VLANPRIO = 7 VLANID = 1 Port 2 --> VLANPRIO = 7 VLANID = 2 Port 3 --> VLANPRIO = 7 VLANID = 3 Port 4 --> VLANPRIO = 7 VLANID = 4 Port 5 --> VLANPRIO = 3 VLANID = 2 can you give me a right way for the above one what are the VLANID need to be configured in MAC Configuration table and VLAN Lookup table  Same VLANID can be mentioned in MAC Configuration Table and the VLANID also need to be configured in L2 Lookup table   These VLANID are used in L2 lookup table were for some MAC Address we utilized VLANID = 1 and for other MAC Addresses used VLANID = 2 in this configuration with respect to stream of VLANID = 1 is working fine able to Transmit and receive Message whatever the VLANID getting mentioned in Port 3 & Port 4 is configured that Configuration of Message is working fine  Say suppose when i configure VLANID = 1 in Port 3 at the time the configuration with respect to that is working but the configuration with respect to VLANID = 2 is not working when i do vice versa its working fine  The stream 2 is an UDP stream, which is coming around 30Mbps speed what is the root cause of the issue ? Re: How can I configure IEEE802.1CB Frame Replication and Elimination for Redundancy (FRER) in SJA11 Hello @Abrar_23 , let's start with the CB.  If you want to isolate the CB traffic from the other traffic by adding a VLAN tag to it, you have to do the following: Add VLAN entry to VLAN Lookup Table  // no mirroring VING_MIRR = 0x0 VEGR_MIRR = 0x0 // vlan port membership, add ports used for CB // for switch 1 this would be e.g. port 2, 3 and 4 VMEMB_PORT = 0x1C VLAN_BC = 0x1C // keep the VLAN tag at egress TAG_PORT = 0x1C // VLAN type this entry is eligible for TYPE_ENTRY[1] = 1 TYPE_ENTRY[0] = 1 // VLAN ID VLANID = 100 Edit the respective L2 Lookup Table entry // add VLAN ID 100 to the lookup VLANID = 100 VLANIDMASK = 0xfff where VLANIDMASK is a part of MASK, you already have set up. If you want to keep VLAN tag on egress, select port in TAG_PORT (VLAN lookup table). If you want to add VLAN tag on ingress, VLANID shall be set on MAC configuration table for the requested port. I think that L2 policing table shall be also set - please check AN12925, chapter 5.3.1 L2 policing. Your idea with VLAID priority as the flow shaper might work. BTW, how do you generate your streams? How much traffic (Mbps) do you generate? Bets regards, Pavel Re: How can I configure IEEE802.1CB Frame Replication and Elimination for Redundancy (FRER) in SJA11 Hello @PavelL  So, for my setup I am having two Stream say stream 1 & stream 2 when i enable both the stream same time i am losing the stream 1 Packets  so, in order to overcome this issue i am planning to add VLAN to overcome this issue by the reference from document i read when VLAN is added we will have a Separate queue for Processing each stream since separate VLANID is assigned  I want to add tag on the Egress  Yes, I want to Isolate the CB Stream Traffic from other traffic by adding VLAN tag to it   I tried the above implementation i checked the ethernet Frame where the VLAN ID is tagged but its unable to overcome the issue of Packet loss of Stream 1 when both the stream is append running  assigned different VLANID and VLAN(Priority) different but the still packet loss is happening  How to overcome this issue  Regards Abrar  Re: How can i configure IEEE802.1CB Frame Replication and Elimination for Redundancy (FRER) in SJA11 Hello @Abrar_23 , I went through your setup. I apologize but I'm not sure what do you want. Could you please be more specific? Do you want to tag ingress? Keep tag on egress? Do you want to isolate the CB traffic from the other traffic by adding a VLAN tag to it? Thank you. Best regards, Pavel Re: How can i configure IEEE802.1CB Frame Replication and Elimination for Redundancy (FRER) in SJA11 Hello @Abrar_23 , I moved the post to the thread. I hope I will come with answer this week. Thank you for your understanding. Best regards, Pavel
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i.MX93 Linux How to set MDIO speed We are using a custom board with the i.MX93 which uses the ENET-QOS ethernet interface running on kernel 6.6.52. In principle it works well but now we want to reduce the clock for the MDIO communication. The entry in the devicetree is the following: &eqos {    pinctrl-names = "default";    pinctrl-0 = <&pinctrl_eqos>;    phy-mode = "rmii";    phy-handle = <&ethphy1>;    assigned-clock-rates = <100000000>, <50000000>;    snps,rmii_refclk_ext;    status = "okay";    mdio {      compatible = "snps,dwmac-mdio";      #address-cells = <1>;      #size-cells = <0>;      clock-frequency = <1000000>;      ethphy1: ethernet-phy@6 {         compatible = "ethernet-phy-ieee802.3-c22";         reg = <6>;         eee-broken-1000t;         reset-gpios = <&ioexpander_2 6 GPIO_ACTIVE_LOW>;         reset-assert-us = <10000>;         reset-deassert-us = <80000>;      };    }; }; Is there any possibility to configure the MDIO speed via the devicetree? I haven't found any hint for it. In some devicetree documentation it's stated that it can be done via clock-frequency, but none of the involved drivers is checking and using this entry. It looks a little bit like the speed is not modified at all and therefor  set to a maximum speed in relation to the system clock. If it can't be done via the devicetree, which driver should set the MDIO speed? I havent't found any related code in the involved dwmac drivers. Linux Re: i.MX93 Linux How to set MDIO speed Hi, Thank you for your interest in NXP Semiconductor products, MDIO speed cannot be programmed into the EQOS interface, the IP misses the register for setting the MDIO SPEED, HOLDTIME, etc. So in EQOS is not configurable, the register is mapped in FEC though, the speed can be configured when using FEC MDIO. Regards
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Generate a single PWM cycle in eFlexPWM without using reload interrupt Hi, In eFlexPWM peripheral, is it possible to generate a single PWM cycle, but without using the reload interrupt to finish the cycle? Thanks in advance Re: Generate a single PWM cycle in eFlexPWM without using reload interrupt Hi @zorrotz, Thanks for the clarifications. After looking into it, I have arrived at the conclusion that the only way of doing single PWM pulses is indeed by using the reload interruption. BR, Edwin. Re: Generate a single PWM cycle in eFlexPWM without using reload interrupt Hi @EdwinHz , My part number is MKV46F128VLL16. The IDE version is MCUXpresso IDE v11.9.0 [Build 2144] and the SDK is 2.8.0. Regards Re: Generate a single PWM cycle in eFlexPWM without using reload interrupt Hi @zorrotz, Could you please share what your part number is, as well as the SDK and IDE versions that you are using? BR, Edwin.
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S32DS 3.5 のインストールに関する問題 ライセンスを入力してからオンラインを選択すると、これが発生します Re: S32DS 3.5 のインストールに関する問題 ありがとうございます
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Which kind of memory gets high performance?OCRAM or SDRAM I attach a sdram( W9825G6KH-5i) to rt1176 via semc port by 16 pins. And I'd like to know which kind of memory gets high performance. The on-chip RAM or SDRAM on board. Re: Which kind of memory gets high performance?OCRAM or SDRAM In terms of memories, the ITCM and DTCM will be the fastest, because they run at the same speed the core does and don't use a cache.  OCRAM is slower (3-4x slower for memcpys, IIRC) since it has to go through the AXI bus and the cache.  SEMC probably cannot go faster than OCRAM (since it is using the same AXI bus and cache), but the exact speed will depend on the setup.
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Issues installing S32DS 3.5 When I enter lisence and then select Online, this happens Re: Issues installing S32DS 3.5 Thanks Re: Issues installing S32DS 3.5 Hi,  the number of available licenses has been increased. 
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S32K144 PORT Hi:     I want to configure the PORTB pins of S32K144 in EB project, but I find that some of the PCR values of the pins are wrong after configuration, such as PORTB0-14, is there anything special about these pins? My MCU package is LQFP_100, thank you for your help! 回复: S32K144 PORT Hi @Embedded_novice  Section 3.6 (Driver usage and configuration tips) of the User Manual for S32K1_S32M24X PORT Driver provides a formula to obtain the PortPinPcr value. For easy reference, I am adding it to my response, but you can find the document for example C:\NXP\SW32K1_S32M24x_RTD_4.4_R21-11_2.0.0\eclipse\plugins\Port_TS_T40D2M20I0R0\doc. The value of actual PortPin Pcr is identified by the formula: PortPinPcr = PinId + PortId∗32. Where PortId is the numeric identifier of the port. For example, the PortPinPcr value of PTC7 will be 7 + (2∗32) = 71. B.R. VaneB 回复: S32K144 PORT I see. It's my understanding. I think PORTA has 18 pins, so the PCR of PORTB_0 should be 19, but in fact, the PCR value is calculated according to the maximum 32 per PORT group, PORTA occupies 0-32, PORTB_0 should start from 33. However, when I checked the section on the number of PORT pins in the RM manual, there seemed to be no clear mark indicating that I should calculate according to the absence of 32 pins in the PORT group. Could you tell me where in the manual to get this information?
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どの種類のメモリが高性能になりますか?OCRAMまたはSDRAM rt1176にsdram( W9825G6KH-5i)をsemcポート経由で16ピン取り付けます。 そして、どのようなメモリが高性能になるのか知りたいです。 オンボードのオンチップRAMまたはSDRAM。 Re:どのような種類のメモリが高性能になりますか?OCRAMまたはSDRAM メモリに関しては、ITCMとDTCMは、コアと同じ速度で動作し、キャッシュを使用しないため、最も高速になります。OCRAMは、AXIバスとキャッシュを経由する必要があるため、低速です(memcpys、IIRCの場合は3〜4倍遅くなります)。SEMC はおそらく OCRAM よりも高速には走れません (同じ AXI バスとキャッシュを使用しているため) が、正確な速度はセットアップによって異なります。
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哪种内存性能高?OCRAM 还是 SDRAM 我通过 16 个引脚的 semc 端口将 sdram( W9825G6KH-5i )连接到 rt1176。 我想知道哪种内存性能较高。 板上的片上 RAM 或 SDRAM。 回复:哪种内存性能高?OCRAM 还是 SDRAM 在内存方面,ITCM 和 DTCM 将是最快的,因为它们以与核心相同的速度运行并且不使用缓存。OCRAM 速度较慢(对于 memcpys 来说慢 3-4 倍,IIRC),因为它必须经过 AXI 总线和缓存。SEMC 可能无法比 OCRAM 更快(因为它使用相同的 AXI 总线和缓存),但确切的速度取决于设置。
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Where can I find MCX comparator SAMPLE/WINDOW input Hi NXP, I am currently trying to use the comparator module in the MCX series. However, I have noticed that the documentation does not provide detailed instructions on how to configure the SAMPLE/WINDOW signal. Although the manual (MCXN 44.3.1, MCXA 41.3.1) note mentions "See the chip configuration section for the source of SAMPLE/WINDOW input." I have not been able to find the relevant description. https://www.nxp.com/webapp/Download?colCode=MCXNX4XRM&location=null https://www.nxp.com/webapp/Download?colCode=MCXAP64M96FS3RM&location=null Could you please assist me in confirming how to proceed with the configuration? If possible, I would greatly appreciate it if you could provide me with some examples. Thank you very much! Analog(ADC|CMP|DAC|OpAmps) MCXA MCXN Re: Where can I find MCX comparator SAMPLE/WINDOW input Hi @Harry_Zhang: Thank you very much! Re: Where can I find MCX comparator SAMPLE/WINDOW input Hi @onejoeluo  About "See the chip configuration section for the source of SAMPLE/WINDOW input." Please check the MCX Nx4x Reference Manual 26  chapter Input Multiplexing (INPUTMUX). Hope this will help you. BR Hang
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Reset led toggling while deploying the project from mbdt Hello NXP team, We are working in dio configuration using mbdt with S32K344 EVB Rev B1. while deploying the code using matlab we are able to see the functionality working but after some time like 3 to 5 sec the board reset LED starts blinking continuously. Unable to find the solution. Can anyone give me some solutions! Attached the project folder with this, kindly do some needful. Thanks & Regards Esakki MBDT @VaneB @Irina_Costachescu @Robin_Shen @Ganapathi_NASH_INDIA @Kavin_raj_mbd  Re: Reset led toggling while deploying the project from mbdt Hi, @Vijay98, Thank you for your interest into Model-Based Design Toolbox for S32K3. It looks like your evaluation board enters into a sequential reset state. Please review the following thread  S32K3X4EVB-T172 with MBD which addresses the same issue. Let us know if your problem persists. Best regards, Dragos Re: Reset led toggling while deploying the project from mbdt Hi esakki, I am also facing the same issue... In s32k344 evb rev A it's working fine but in s32k344 evb rev B1 after flashing for 5 to 10 sec it's working fine after that reset led starts blinking continuously  If you find any solution kindly let me know... then any one resolved this issue let us know Thanks & Regards  KR MBDT S32K3X4EVB-T172  @VaneB @Irina_Costachescu @Robin_Shen 
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安装S32DS 3.5的问题 当我输入许可证并选择在线时,发生了这种情况 回复:安装S32DS 3.5的问题 谢谢!
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S32M LIN スタックのコンパイル エラー S32DS 3.5 と S32M24 RTD 2.0.0 を使用しており、S32K1_S32M24X_LINSTACK_RTM_1_0_2_D2308_updatesite.zipをインストールしています。 マスターとスレーブの例をインポートし、mexファイルのバックスラッシュの問題を修正しました( )、そして、設定コードを生成しました。 どちらのプロジェクトもビルドされません。 スレーブコードに次のエラーがあります。 説明 Resource Path Location Type 'LinIf_Channel_State' undeclared (この関数で最初に使用) lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 520 行目 C/C++ の問題 'LINIF_IDLE' 未宣言 (この関数で最初に使用)。「LINIF_CODE」のことだったの?lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 520 行目 C/C++ の問題 フィールド 'lin_baudrate_adjusted_flg' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 199 行目 セマンティックエラー フィールド 'lin_max_frame_res_timeout_val' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 193 行目 セマンティックエラー フィールド 'lin_protocol_state' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 172 行目 セマンティックエラー フィールド 'lin_protocol_state' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 438 行目 セマンティックエラー フィールド 'lin_protocol_state' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 443 行目 セマンティックエラー フィールド 'lin_protocol_state' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 488 行目 セマンティックエラー フィールド 'lin_virtual_interface' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 128 行目 セマンティックエラー フィールド 'lin_virtual_interface' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 146 行目 セマンティックエラー フィールド 'lin_virtual_interface' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 176 行目 セマンティックエラー フィールド 'lin_virtual_interface' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 181 行目 セマンティックエラー フィールド 'lin_virtual_interface' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 302 行目 セマンティックエラー フィールド 'lin_virtual_interface' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 411 行目 セマンティックエラー フィールド 'lin_virtual_interface' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 489 行目 セマンティックエラー フィールド 'max_idle_timeout_cnt' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 528 行目 セマンティックエラー フィールド 'response_buffer_ptr' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 443 行目 セマンティックエラー フィールド 'response_length' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 438 行目 セマンティックエラー 関数 'OsIf_ResumeAllInterrupts' の暗黙宣言 [-Werror=暗黙の関数宣言] lin_commontl_proto.c/Lin_Master_S32M244_Example_DS/stacks/lin/src 1241 行目 C/C++ の問題 関数 'OsIf_ResumeAllInterrupts' の暗黙宣言 [-Werror=暗黙の関数宣言] lin_commontl_proto.c/Lin_Slave_S32M244_Example_DS/stacks/lin/src 1241 行目 C/C++ の問題 関数 'OsIf_SuspendAllInterrupts' の暗黙宣言 [-Werror=暗黙の関数宣言] lin_commontl_proto.c/Lin_Master_S32M244_Example_DS/stacks/lin/src 1172 行目 C/C++ の問題 関数 'OsIf_SuspendAllInterrupts' の暗黙宣言 [-Werror=暗黙の関数宣言] lin_commontl_proto.c/Lin_Slave_S32M244_Example_DS/stacks/lin/src 1172 行目 C/C++ の問題 make: *** [stacks/lin/lin_dal/src/subdir.mk:20:stacks/lin/lin_dal/src/lin_dal.o]エラー 1 Lin_Slave_S32M244_Example_DS C/C++ の問題 make: *** [stacks/lin/src/subdir.mk:36: stacks/lin/src/lin_commontl_proto.o]エラー 1 Lin_Master_S32M244_Example_DS C/C++ の問題 make: *** [stacks/lin/src/subdir.mk:36: stacks/lin/src/lin_commontl_proto.o]エラー 1 Lin_Slave_S32M244_Example_DS C/C++ の問題 make: *** 未完成の仕事を待っています...。Lin_Master_S32M244_Example_DS C/C++ の問題 make: *** 未完成の仕事を待っています...。Lin_Slave_S32M244_Example_DS C/C++ の問題 シンボル 'LinIf_Channel_State' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 520 行目 セマンティックエラー シンボル 'LINIF_IDLE' を解決できませんでした lin_dal.c/Lin_Slave_S32M244_Example_DS/stacks/lin/lin_dal/src 520 行目 セマンティックエラー マスター・コードのエラーは少なくなります。 説明 Resource Path Location Type 関数 'OsIf_ResumeAllInterrupts' の暗黙宣言 [-Werror=暗黙の関数宣言] lin_commontl_proto.c/Lin_Master_S32M244_Example_DS/stacks/lin/src 1241 行目 C/C++ の問題 関数 'OsIf_SuspendAllInterrupts' の暗黙宣言 [-Werror=暗黙の関数宣言] lin_commontl_proto.c/Lin_Master_S32M244_Example_DS/stacks/lin/src 1172 行目 C/C++ の問題 これらのエラーはどのように解決できますか? Re: S32M LIN スタックのコンパイル エラー ワークスペースから両方のプロジェクトを完全に削除してから、Lin_SlaveプロジェクトとLin_Masterプロジェクトを再インポートしました。コンフィギュレーターを開く前に、元の投稿で説明したLDFソース行のバックスラッシュの問題を修正しました。 その後、コンフィギュレーターを開き、コードを更新して、無事にビルドすることができました。 コンフィギュレーターのこの行が、このコードのすべてのバージョンで一貫して壊れているのはなぜですか?S32K118の実装でも同じ問題があります。 Re: S32M LIN スタックのコンパイル エラー マスターコードとスレーブコードのためにlin_commontl_proto.cにインクルードを追加する必要がありました。 #include 「OsIf_Internal.h」 マスターコードはビルドされますが、スレーブコードにはまだエラーがあります。 1. LINIF_IDLEが定義されていない 2. stacks/lin/lin_dal/src/lin_dal.c:520:23:エラー: 'LinIf_Channel_State' 未宣言
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