Detailed Description:                      This config tool simplifies DCF records calculation for S32R274 device.                 Look at HowToUse sheet for simple guideline, then work with DCF sheet                 Notes: - Macros have to be enabled!         BR, Petr

******************************************************************************** * Detailed Description: * DRUN with PLL 160MHz active. * Example of INTC configuration. PIT timer is triggering an * interrupt which is served in PIT ISR. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N06M * Target :  Internal Flash * Fsys:     160 MHz PLL * ******************************************************************************** Revision History: 1.0     Oct-29-2014     b21190(Vlna Peter)  Initial Version 1.1    Nov-20-2014    b21190(Vlna Peter)  Modified for Cut2.0 1.2    Apr-23-2015    b21190(Vlna Peter)  Added INTC driver and PIT ISR 1.3    May-14-2015    b21190(Vlna Peter)  Dissabling SWT in Startup code 1.4     Jun-06-2017    b21190(Vlna Peter)  ported for MPC5746C *******************************************************************************/

This document describes, how to create another configuration to existing ones (RAM, FLASH) and how to use your own linker file for the new configuration. As soon as you have created project, right click the project and select Properties. Click Tool Chain Editor. In upper right corner, select Manage Configurations. New window will appear, then click new. As soon as you choose new, another window will appear and here you can insert name of the configuration, description and last, you must choose, which configuration will be settings copied from. So, for example, you can choose existing FLASH configuration. Click OK and new configuration will be created. Now, you can choose the new configuration as the active configuration, also this new configuration is added to configurations, and it is accessible via "hammer" icon in upper left corner. Now, it is necessary to set linker file you want to use with this configuration. Because this new configuration is inherited from FLASH configuration, it also uses default flash linker file. Set your configuration as active at first. After this step, in project properties select Settings->PowerPC Linker input tab. Into line Link Command File, choose path to required linker file you want to use with the new configuration. Click OK. You can verify the new configuration is chosen using arrow new to the hammer icon. How to use new configuration in debug configuration As soon as you have new configuration created, it is highly probable, you would like to download created elf into microcontroller and eventually debug it. Open debug configuration window. Now you can create new debug configuration or you can duplicate existing one. I will describe easier option and I will duplicate Flash configuration. Choose the flash configuration and click the duplicate icon. New configuration will appear. Now choose the new configuration, change the name and select elf file, which is created by new configuration. Click Apply and Debug button.

Detailed Description:                      This config tool simplifies DCF records calculation for MPC5777M device.                 Look at HowToUse sheet for simple guideline, then work with DCF sheet                 Notes: - Macros have to be enabled!         BR, Petr

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * setup clock for peripherals, * * Initializes the MCU including the FlexCAN peripherals. * Configures the FlexCAN to transmit and receive a CAN message. * * In this config, CAN_0 transmits a message. CAN_2 receives the message. * CAN_0 MB0 is configured to send data. * * CAN_2 MB0 is configured to receive a message, interrupt is used. * * * ------------------------------------------------------------------------------ * Test HW:         MPC5746R-176LQFP, MPC57xx Motherboard * MCU:             PPC5743R 1N83M * Fsys:            PLL0 200MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, debug_ram mode) * EVB connection: * * Jumpers j37 and j38 on motherboard must be in position 2-3 * * Connect CAN P5.2 to CAN2 P4.2 on motherboard * Connect CAN P5.1 to CAN2 P4.1 on motherboard * * ******************************************************************************** Revision History: Version  Date         Author              Description of Changes 1.0      Jun-07-2017  Martin Kovar      Initial version

******************************************************************************** * Detailed Description: * * Simple LINFlex UART mode transmit and receive without interrupts (polled UART) * TXFIFO and RXFIFO macro is used to select between buffer and FIFO mode * * PIT channel 0 is also used to generate 1sec interrupt where PA0 pin is toggled. * * EVB connection: * *   Motherboard *   J14 - SCI_RX OFF *   J13 - SCI_TX OFF *   J25 - SCI_PWR ON * * See results on PC terminal (19200, 8N1, None). * ------------------------------------------------------------------------------ * Test HW:  MPC5777M, MPC57xx Motherboard + MPC5777M_512DS minimodule * Maskset:  0N78H * Target :  RAM, internal_FLASH * Fsys:     600 MHz PLL1 with 40 MHz crystal reference, *        core2 at 200MHz generated from PPL1 * Terminal: 19200, 8N1 ********************************************************************************

******************************************************************************** * Detailed Description: * This example demonstrates PMC Single VD self-test configuration and execution * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N15P and 0N15P * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference *            ******************************************************************************** Revision History: 1.0     Apr-04-2016     b21190(Vlna Peter)  Initial Version 1.1     Apr-20-2017     b21190(Vlna Peter)  added software PMC self-test 1.2     Aug-31-2017    b21190(Vlna Peter)  added PMC self-test configuration fix *******************************************************************************/

Detailed Description: Demo application performs I2C communication with externally connected external real time clock/calendar PCA8565. Obtained values and processed and displayed on MPC5606S-DEMO-V2 board’s TFT panel. Date and time may be set up by demo board’s buttons (SW2-SW6). Application uses standard Graphics Libraries for MPC5606S for simple graphic output that is managed in mc_base.c module only. I2C communication is managed with using of own two layer driver where low-level driver consisting of I2C_0.c and I2C_0.h - these can be used for any device connected to I2C_0 module. Middle-level driver layer consist of I2C_PCA8565.c and I2C_PCA8565.h and it is specific to PCA8565 device. ------------------------------------------------------------------------------ Test HW:            MPC5606S-DEMO-V2 + LM75BD + HIH-5030 + PCA8565 sensors MCU:             PPC5606SEF OMLU 0M25V DD68391 XOTAC1003 Fsys:            64MHz Debugger:        Lauterbach Trace32 Target:          internal_FLASH Terminal:        none EVB connection:   For complete project you may see following link: Demo application MPC5606S-DEMO + LM75B + HIH-5030 + PCA8565 + GUI

******************************************************************************** * Detailed Description: * This example content a basic PMPLL initialization and *  configuration of Mode Entry module and Clock Generation *  module for core1 and start of core0 and core0s from Core_Init function. * Also containts Lauterbach multicore multi-Trace32 view script for multicore * debugging puproses ******************************************************************************** * Test HW:  Test HW:  MPC57xx Motherboard + MPC5777M_512DS minimodule, MPC5777M, * Test HW:  MPC57xx * Maskset:  1N83M (cut 2.0B) * Target :  internal_FLASH * Fsys:     200MHz PLL0 as system clock ******************************************************************************** Revision History: 1.0     Jun-09-2015     b21190(Vlna Peter)  Initial Version 1.1     Sep-20-2016     b21190(Vlna Peter)  core0+core0s boot function added *******************************************************************************

Detailed Description:                      This config tool simplifies DCF records calculation for MPC5744P device.                 Look at HowToUse sheet for simple guideline, then work with DCF sheet                 Notes: - Macros have to be enabled!         BR, Petr

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * setup clock for peripherals, setup access right for Masters and Peripherals * on AIPS_0 * * DMA transfers block of data from variable TransmitBuffer to the variable * ReceiveBuffer. Both variables are placed in SRAM. * * ICache and DCache are both disabled in startup file using CACHE_ENABLE macro. * You can change the value of the macro at the following path: * project Properties/C/C++ General/Paths and Symbols/Symbols * If you change the value to 1, ICahce and DCache will be enabled in startup. * * * ------------------------------------------------------------------------------ * Test HW:         MPC5775K-356DS, MPC57xx Motherboard * MCU:             PPC5775KMMY3A 0N38M * Fsys:            PLL0 266MHz *                    Z4 Core 133MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  default * ********************************************************************************

******************************************************************************** * Detailed Description: * Preparation, configuration and execution of ONLINE(SHUTDOWN) build-in self-test. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * ******************************************************************************** Revision History: 1.0     Apr-04-2016     b21190(Vlna Peter)  Initial Version 1.1    Apr-28-2017     b21190(Vlna Peter)  Added cut 1N65H (2.1) *******************************************************************************/

******************************************************************************** * Detailed Description: * This example demonstrates how to configure (CGM) clock generation module * and supply by clock all main peripherals. * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5746R_176DC minimodule, MPC5746R * Maskset:  1N83M (cut 2.0B) * Target :  internal_FLASH * Fsys:     200MHz PLL0 as system clock ******************************************************************************** Revision History: 1.0     Oct-19-2015     b21190(Vlna Peter)  Initial Version 1.1    Nov-11-2015    b21190(Vlna Peter)  Added PPL0 200MHz as system clock 1.2    Dec-02-2015    b21190(Vlna Peter)  Added Flash controller init 1.3    Dec-02-2015    b21190(Vlna Peter)  Fixed system clock init 1.4    Feb-07-2017    b21190(Vlna Peter)  SWT0 and SWT1 disabled in startup *******************************************************************************/

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * setup clock for peripherals. * * This example shows, how to use some of ETimer modes. Channel 0 is set to * Fixed-Frequency PWM Mode and generates PWM signal with approximate frequency * 507Hz. This signal is routed to the UserLED1. * * Channel 1 is set to Count mode and generates 0,25 second interrupt. * In the interrupt service routine, duty cycle is increased from 0% to 100% * with step 6.25%. This shows for example, how can be controlled the brightness * of the LED. * * Channel 2 is set to Variable-Frequency PWM Mode and generates PWM signal with * frequency 10KHz. This signal is routed to the UserLED2. * * ------------------------------------------------------------------------------ * Test HW:         MPC5775K-356DS, MPC57xx Motherboard * MCU:             PPC5775KMMY3A 0N76P * Terminal: * Fsys:            PLL0 266MHz *                    Z4 Core 133MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  UserLED1 connected to P19.0 *                     UserLED2 connected to P19.2 * * ********************************************************************************

This document shows, how to use CodeWarrior 10.6 to program QSPI flash for Power Architecture microcontrollers.   1) Create new project for appropriate microcontroller. 2) Open Debug configuration and duplicate one of the target.   3) Rename duplicated target (optional) 4) Choose the duplicated (renamed) target and click Edit button in Target settings tab.   5) In new screen, click Advanced Programming Options.   6) Check Use Alternative Algorithm and choose the algorithm you want to use. Algorithms are place in CodeWarrior installation folder. Full path is CodeWarrior_installation_folder\MCU\bin\plugins\support\EPPC\gdi\P&E\   7) On the screen Debug configuration, choose the file you want to program to QSPI flash.   Click Apply and Debug.

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, * initializes and display notice via UART terminal and then terminal ECHO. * ------------------------------------------------------------------------------ * Test HW:        XPC5607B 176LQFP, XPC56XX EVB MOTHEBOARD Rev.C * MCU:             PPC5607BMLUAM03Y * Fsys:             64/48 MHz * Debugger:      Lauterbach Trace32 *                      PeMicro USB-ML-PPCNEXUS * Target:           RAM, internal_FLASH * Terminal:       19200-8-no parity-1 stop bit-no flow control on LINFLEX_0 * EVB connection: default * ********************************************************************************

******************************************************************************** * Detailed Description: * * * This example demonstrate functionality of XBIC_0 error injection *  capability on XBAR_0. The fault is generated on Core access to SRAM. *  After fault generation it is propagated to FCCU unit as NCF[38]. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     16MHz IRC * ********************************************************************************

******************************************************************************** * Detailed Description: * Example demostrates MCU behaviour when single bit RAM ECC error occurs by * intentional ECC error injection. * * ------------------------------------------------------------------------------ * Test HW:         xPC564xLKIT, PPC5643L Cut3 silicon * Target :         internal_FLASH * Fsys:            120 MHz PLL0 * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Terminal:        19200-8-no parity-1 stop bit-no flow control via LINFlex0 * EVB connection:  default * ********************************************************************************

******************************************************************************** * Detailed Description: * This example demostrates how to configure CGM )clock generation module) * and supply by clock all main peripherals. * * ------------------------------------------------------------------------------ * Test HW:  Test HW:  MPC57xx Motherboard + MPC5777M_512DS minimodule, MPC5777M, * Maskset:  0N75H * Target :  internal_FLASH * Fsys:     200 MHz PLL * ******************************************************************************** Revision History: 1.0     Nov-04-2014     b21190(Vlna Peter)  Initial Version 1.1     Feb-04-2016     b21190(Vlna Peter)  Fixed Clock configuration *******************************************************************************

******************************************************************************** * Detailed Description: * * PIT channel 0 is used to generate 1sec interrupt where PA0 pin is toggled. * * ------------------------------------------------------------------------------ * Test HW:  MPC5777M, MPC57xx Motherboard + MPC5777M_512DS minimodule * Maskset:  0N78H * Target :  RAM, internal_FLASH * Fsys:     600 MHz PLL1 with 40 MHz crystal reference *               core2 at 200MHz generated from PPL1 * Terminal: None ********************************************************************************