********************************************************************************
* Detailed Description:
* DRUN with PLL 160MHz active.
* Example of INTC configuration. PIT timer is triggering an
* interrupt which is served in PIT ISR.
*
* ------------------------------------------------------------------------------
* Test HW: MPC57xx
* Maskset: 1N06M
* Target : Internal Flash
* Fsys: 160 MHz PLL
*
********************************************************************************
Revision History:
1.0 Oct-29-2014 b21190(Vlna Peter) Initial Version
1.1 Nov-20-2014 b21190(Vlna Peter) Modified for Cut2.0
1.2 Apr-23-2015 b21190(Vlna Peter) Added INTC driver and PIT ISR
1.3 May-14-2015 b21190(Vlna Peter) Dissabling SWT in Startup code
1.4 Jun-06-2017 b21190(Vlna Peter) ported for MPC5746C
*******************************************************************************/
