******************************************************************************** * Detailed Description: * Example show simple flash programming routine. During runtime it changes * content of field of constants 'test' (thus located in internal flash). * Also it shows how to relocate code into RAM a data into FLASH (used linker * command file is MPC5643L_my_sections.lcf and MPC5643L_DEBUG_my_sections.lcf). * * Note: For complex tasks use SSD driver (Freescale site for particular device, * Software&Tools/Run-Time Software/Middleware-Device Drivers * * ------------------------------------------------------------------------------ * Test HW:         xPC564xLKIT, PPC5643L Cut3 silicon * Target :         internal_FLASH, RAM * Fsys:            120 MHz PLL0 * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Terminal:        19200-8-no parity-1 stop bit-no flow control via LINFlex0 * EVB connection:  default * ********************************************************************************

With author's permission I am publishing presentation comparing e200 cores to each other and describing them in detail.   Document was created in year 2010, thus it does not deal with cores subsequently used with MPC57xx devices.   Thanks to Robert Moran for his great job.

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * setup clock for peripherals, * * Initializes the MCU including the FlexCAN peripherals. * Configures the FlexCAN to transmit and receive a CAN message. * * Individual RX masking was added to the last version of this example. * Three messages with different ID's are sent via FlexCAN_0 MB0 MB1 and MB2. * These messages are received by FlexCAN_1 MB0, MB1 and MB2 according to masking * register settings. * * For MB0 data receive is used interrupt. * * * ------------------------------------------------------------------------------ * Test HW:         MPC5775K-356DS, MPC57xx Motherboard * MCU:             PPC5775KMMY3A 0N38M * Fsys:            PLL0 266MHz *                    Z4 Core 133MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection: * * It is necessary to remove both J32 jumpers and also both J35 jumpers. * * Connect J32.2 to PC9 (CAN_0 TX) * Connect J32.4 to PC8 (CAN_0 RX) * * Connect J35.2 to PE5 (CAN_1 TX) * Connect J35.4 to PG14 (CAN_1 RX) * * Connect CAN P5.2 to CAN2 P4.2 (CAN_0 and CAN_1 CANL) * Connect CAN P5.1 to CAN2 P4.1 (CAN_0 and CAN_1 CANH) * * This connection has to be observed, otherwise correct communication between * CAN modules is not guaranteed. * * ********************************************************************************

Detailed Description: * This example shows, how to configure Mode entry module and enable required * peripherals only. RTC module is configured to create interrupt every 50ms. * Microcontroller is in in STOP mode most of the time and it is waken-up using RTC * interrupt. * * ------------------------------------------------------------------------------ * Test HW:         XPC560S 144LQFP, XPC56XX EVB MOTHEBOARD Rev.C * MCU:             PPC5606S 0M25V * Terminal:         * Fsys:            16MHz IRC * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          RAM, internal_FLASH * EVB connection:  Default * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, initializes and display notice via UART terminal and then terminal ECHO. * The example configures the device for maximum performance (OPTIMIZATIONS_ON) * by initialization of instruction/data cache and enabling of branch prediction. * Example suppose MCU is configured for DPM (Decoupled-parallel mode). * Its intention is to offer advanced startup code additional to CW stationery. * * ------------------------------------------------------------------------------ * Test HW:        MPC5675KEVB * MCU:            PPC5675KFMMSJ in Decoupled-parallel mode * Fsys:           180/150 MHz CORE_CLK * Debugger:       Lauterbach Trace32 *                 PeMicro USB-ML-PPCNEXUS * Target:         RAM, internal_FLASH * Terminal:       19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ********************************************************************************

This example enters the MCU into STANDBY0 low power mode and wakes up to backup SRAM. The WKPU6 (PE[0]pin) is used to wake up the MCU.   Regards, Petr   ******************************************************************************** * Detailed Description: * * On the EVB use KEY2 to enter Standby. * Use KEY1 to wake up from Standby to a code in backup SRAM. * * In RUN mode the LED1 blinks very fast, second core toggels LED3 * In STANDBY all LEDs are off. * The wakeup code blinks LED1 and LED2 slowly. * * The macro WKP_CORE is used to select which core is used after MCU wakes up. * When z4 core is selected, it is also necessary to set the MMU otherwise exception * is generated when uncovered memory area is accessed. * This is not needed for z0 core due to lack of the MMU.  * * * ------------------------------------------------------------------------------ * Test HW:  XPC56xxMB2 + XPC564xB/C, SPC5646C 0N32E silicon * Target :  internal_FLASH * Fsys:     120 MHz PLL0 ********************************************************************************

******************************************************************************** * Detailed Description: * Preparation, configuration and execution of ONLINE(SHUTDOWN) build-in self-test. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * ******************************************************************************** Revision History: 1.0     Apr-04-2016     b21190(Vlna Peter)  Initial Version 1.1    Apr-28-2017     b21190(Vlna Peter)  Added cut 1N65H (2.1) *******************************************************************************/

* Owner:            b21190(Vlna Peter) * Version:          1.6 * Date:               Nov-11-2015 * Classification: General Business Information * Brief:               Example contains startup with PLL0 200MHz as system clock *                        ADC self-test demonstration                       ******************************************************************************** * Test HW:  MPC57xx * Maskset:  1N83M (cut 2.0B) * Target :  internal_FLASH * Fsys:     200MHz PLL0 as system clock ******************************************************************************** Revision History: 1.0     Oct-19-2015          b21190(Vlna Peter)  Initial Version 1.1        Nov-11-2015        b21190(Vlna Peter)  Added PPL0 200MHz as system clock 1.2        Dec-02-2015        b21190(Vlna Peter)  Added Flash controller init 1.3        Dec-02-2015        b21190(Vlna Peter)  Fixed system clock init 1.4        Feb-07-2017        b21190(Vlna Peter)  SWT0 and SWT1 disabled in startup 1.5       May-31-2017        b21190(Vlna Peter)  Fixed comments in AC6 (CLKOUT) 1.6        Jul-10-2018        nxa13250(Vlna Peter) Added ADC self-tests *******************************************************************************/

******************************************************************************** * Detailed Description: * 200 MHz PLL with 40 MHz crystal reference + FCCU fault clearing *           example code + FCCU ALARM state configuration * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 1N65H * Target :  internal_FLASH* ********************************************************************************

******************************************************************************** * Detailed Description: * * CAN0 module is configured to transmit one message with ID 0x555 to CAN1 * module. CAN1 module is configured to use DMA to receive the message. * Once the DMA module reads the received frame, interrupt is triggered. * Follow application note AN4830 regarding the CAN settings. * http://www.freescale.com/files/microcontrollers/doc/app_note/AN4830.pdf * http://www.freescale.com/files/microcontrollers/doc/app_note/AN4830SW.zip * The example from AN4830 is modified to use DMA and RXFIFO on CAN1 module. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N81M * Target :  SRAM * Fsys:     160 MHz PLL * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, * initializes and display notice via UART terminal and then terminal ECHO. * ------------------------------------------------------------------------------ * Test HW:        XPC5604B 100LQFP, XPC56XX EVB MOTHEBOARD Rev.C * MCU:             PPC5604BE MLL 1M27V * Fsys:             64/48 MHz * Debugger:      Lauterbach Trace32 *                      PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH, (not enough memory for RAM target) * Terminal:       19200-8-no parity-1 stop bit-no flow control on LINFLEX_0 * EVB connection: default * ********************************************************************************

Hi     Migrate the code from MPC5775K to S32R274.     Tested on S32R274 EVB with S32 Design Studio for Power Architecture Version 2.1.     Unzip password: nxp Cheers Oliver

* Detailed Description: * This example shows, how to use interrupt hardware vector mode. In the example * PIT3 and PIT2 interrupts are implemented. PIT interrupt toggle LED every second. * * * This example also shows, how to implement IVOR exceptions for core 0. * IVOR1 handler with while(1) loop is ready to use. * * * For correct HW vector mode setup, following files was added to the project: * *  - exceptions.s *  - handlers_vle.s *  - HW_vector.c * * * Following files has been modified (all changes are marked by comment): * *  - 56xx_flash.ld *  - Vector.c *  - MPC57xx__Interrupt_Init.c * *  Following file was removed from project (files are still place in project, but *  not compiled and linked) * *  - intc_sw_handlers.S *  - intc_SW_mode_isr_vectors_MPC5744P.c * * * * Test HW:         MPC567XADAT516, MPC567XEVBFXMB * MCU:             PPC5676RDMVY1 3N23A * Fsys:            180 MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  User LED 1 connected to J241, *                    User LED 1 connected to J242. *

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * setup clock for peripherals, * * Initializes the MCU including the FlexCAN peripherals. * Configures the FlexCAN to transmit and receive a CAN message. * * In this config, CAN_0 transmits a message. CAN_2 receives the message. * CAN_0 MB0 is configured to send data. * * CAN_2 MB0 is configured to receive a message, interrupt is used. * * * ------------------------------------------------------------------------------ * Test HW:         MPC5746R-176LQFP, MPC57xx Motherboard * MCU:             PPC5743R 1N83M * Fsys:            PLL0 200MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, debug_ram mode) * EVB connection: * * Jumpers j37 and j38 on motherboard must be in position 2-3 * * Connect CAN P5.2 to CAN2 P4.2 on motherboard * Connect CAN P5.1 to CAN2 P4.1 on motherboard * * ******************************************************************************** Revision History: Version  Date         Author              Description of Changes 1.0      Jun-07-2017  Martin Kovar      Initial version

The device can be secured by adding a Non-Volatile System Censorship Information (NVSCI) record to the DCF record list in the UTEST Flash block. A value of 55AAh in the censorship control word of the NVSCI record determines that the device is unsecured, any other value determines that the device is secured.   Censoring the device (example for lauterbach script) 1. Program NVSCI DCF record to first available space in UTEST memory.    data.set 0x00400308 %QUAD 0x55AA12340100000C ;NVSCI - Censorship Control enabled 2. Program Censorship password (0x1234567812345678)    data.set 0x00400310 %QUAD 0x1234567801000004 ;NVPWDL                                                            data.set 0x00400318 %QUAD 0x1234567801000008 ;NVPWDH    3. Perform reset   Now the device is censored and JTAG PASSWORD must be inserted in order to work with JTAG. Lauterbach ->   sys.option.keycode 0x1234567812345678 sys.attach sys.break The device is now accessible trough JTAG.   " After every reset the JTAG PASSWORD key must be reentered on censored device "   Uncensoring device: data.set 0x004003018 %QUAD 0x55AA55AA0100000C ;NVSCI - Censorship Control disabled   NOTE:   Peter Original Attachment has been moved to: MPC5744P_DCF_Censorship.cmm.zip

******************************************************************************** * Detailed Description: * This example shows, how to communicate with RTC module PCA8565TS/1 via I2C bus. * For this purpose is used I2C driver created by Petr Stancik. Information from * RTC are sent using DMA via UART. The whole example consists from two parts. * Second part is PC application called GraphicalTerminalExample. This application * handles data from RTC and displays them. RTC also can be set using PC application. * Microcontroller receives data from PC application using DMA via UART. * Received data are written to RTC module. * * UART connection parameters: * Baud rate 19200b/s * 8 data bits * 1 stop bit * none parity * * For correct function of java application, it is required Java 1.8.0_40 * * ------------------------------------------------------------------------------ * Test HW:         MPC5775K-356DS, MPC57xx Motherboard * MCU:             PPC5775KMMY3B 0N76P * Fsys:            PLL0 266MHz *                    Z4 Core 133MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection: *                     UART connection *                     J14.1 connected to P12.6 (RX) *                     J13.1 connected to P12.7 (TX) * *                     RTC connection *                     RTC pin 4 - connected to any GROUND pin *                     RTC pin 8 - connected to any 3.3V pin *                     RTC pin 6 - connected to P8.10 (SCL - I2C clock) *                     RTC pin 5 - connected to P8.11 (SDA - I2C data) * ********************************************************************************

******************************************************************************** * Detailed Description: * * Simple LINFlex UART mode transmit and receive without interrupts (polled UART) * TXFIFO and RXFIFO macro is used to select between buffer and FIFO mode * * PIT channel 0 is also used to generate 1sec interrupt where PA0 pin is toggled. * * EVB connection: * *   Motherboard *   J14 - SCI_RX OFF *   J13 - SCI_TX OFF *   J25 - SCI_PWR ON * * See results on PC terminal (19200, 8N1, None). * ------------------------------------------------------------------------------ * Test HW:  MPC5777M, MPC57xx Motherboard + MPC5777M_512DS minimodule * Maskset:  0N78H * Target :  RAM, internal_FLASH * Fsys:     600 MHz PLL1 with 40 MHz crystal reference, *        core2 at 200MHz generated from PPL1 * Terminal: 19200, 8N1 ********************************************************************************

******************************************************************************** * Detailed Description: * Example shows MCU's temperature measurement using internal temperature sensor. * After basic initialization, the code initializes and calibrates eQADC, reads * test flash content and performs all necessary ADC measurement to calculate die * temperature. Results are then displayed in the terminal window. * ------------------------------------------------------------------------------ * Test HW:         XPC567XKIT516 - MPC5674ADAT516 Rev.C, MPC567XEVBFXMB Rev.B * MCU:             PPC5674FMVYA264 * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * Fsys:            264/200/150/60 MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          RAM, internal_FLASH * EVB connection:  default * ********************************************************************************

******************************************************************************** * Detailed Description: * Purpose of the example is to show how to generate Multi-bit or Single-bit * ECC error in internal FLASH (user must choose it in the option at the end of * main function). * Flash over-programming is used to generate a non-correctable (or single-bit) * ECC error in FLASH. The bad data is accessed then, so the IVOR1 exception (or * ERM combined interrupt service routine) is generated and handled. * Example also offers useful macros for EIM and ERM modules. * The example displays notices in the terminal window (USBtoUART bridge J21) * (19200-8-no parity-1 stop bit-no flow control on eSCI_A). * No other external connection is required. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection:  eSCI_A is USBtoUART bridge (connector J21) * ********************************************************************************

Detailed Description:                      This config tool simplifies DCF records calculation for MPC5744P device.                 Look at HowToUse sheet for simple guideline, then work with DCF sheet                 Notes: - Macros have to be enabled!         BR, Petr