Example MPC5775K FlexCAN_with_interrupts_v1.1 S32DS_1.1

[#1]

********************************************************************************

* Detailed Description:

* Application performs basic initialization, setup PLL to maximum allowed freq.,

* setup clock for peripherals,

*

* Initializes the MCU including the FlexCAN peripherals.

* Configures the FlexCAN to transmit and receive a CAN message.

*

* Individual RX masking was added to the last version of this example.

* Three messages with different ID's are sent via FlexCAN_0 MB0 MB1 and MB2.

* These messages are received by FlexCAN_1 MB0, MB1 and MB2 according to masking

* register settings.

*

* For MB0 data receive is used interrupt.

*

*

* ------------------------------------------------------------------------------

* Test HW:         MPC5775K-356DS, MPC57xx Motherboard

* MCU:             PPC5775KMMY3A 0N38M

* Fsys:            PLL0 266MHz

*                    Z4 Core 133MHz

* Debugger:        Lauterbach Trace32

*                  PeMicro USB-ML-PPCNEXUS

* Target:          internal_FLASH (debug mode, release mode)

* EVB connection:

*

* It is necessary to remove both J32 jumpers and also both J35 jumpers.

*

* Connect J32.2 to PC9 (CAN_0 TX)

* Connect J32.4 to PC8 (CAN_0 RX)

*

* Connect J35.2 to PE5 (CAN_1 TX)

* Connect J35.4 to PG14 (CAN_1 RX)

*

* Connect CAN P5.2 to CAN2 P4.2 (CAN_0 and CAN_1 CANL)

* Connect CAN P5.1 to CAN2 P4.1 (CAN_0 and CAN_1 CANH)

*

* This connection has to be observed, otherwise correct communication between

* CAN modules is not guaranteed.

*

*

********************************************************************************

[tamas_putz]

Dear Martin!

Need some help. Based on the example above, I tried to write a test program that uses only the CAN_0 port for transmitting / receiving.
The transmission direction is working properly, but the reception part is not. Even though I send a CAN message of the correct format to the VCANRX input (PAD17), the interrupt routine (CAN_0_Receive_InterruptHandler) does not run (isr vectors defined. Work well if transmit CAN_0 MB = 0).

void CAN_0_Receive_InterruptHandler(void)
{

CAN_0.IFLAG1.R = 0x1;

ReceiveBuffer[0] = CAN_0.MB[0].DATA.W[0];
ReceiveBuffer[1] = CAN_0.MB[0].DATA.W[1];

}

int main(void)
{

INTC.PSR[281].R = 0x8001; /*Set Core and interrupt priority*/
INTC.PSR[263].R = 0x8001; /*Set Core and interrupt priority*/
INTC.PSR[226].R = 0x8001; //set priority and core for PIT interrupt
INTC.PSR[522].R = 0x8001; //set priority and core for CAN0 RX interrupt

HW_Init();

FlexCAN_0_Init();
Configure_RX_MessageBuffer();

//Transmit_Message(1,102);         // -> OK

.

.

.

.

.

}

static void GPIO_Init(void)
{
SIUL2.MSCR[36].R = 0x32840001; //DSPI0_CS0
SIUL2.MSCR[37].R = 0x32840001; //DSPI0_SCK
SIUL2.MSCR[38].R = 0x32840001; //DSPI0_SOUT
SIUL2.MSCR[39].R = 0x308C0000; //DSPI0_SIN

SIUL2.MSCR[10].R = 0x308C0001; //DSPI2_CS0
SIUL2.IMCR[10].B.SSS = 2;

SIUL2.MSCR[11].R = 0x308C0001; //DSPI2_SCK
SIUL2.IMCR[8].B.SSS = 2;

SIUL2.MSCR[13].R = 0x308C0000; //DSPI2_SIN
SIUL2.IMCR[9].B.SSS = 2;

SIUL2.MSCR[12].R = 0x32840001; //DSPI2_SOUT

SIUL2.MSCR[146].R = 0x32840001; //DSPI3_CS0
SIUL2.MSCR[143].R = 0x32840001; //DSPI3_SCK
SIUL2.MSCR[144].R = 0x32840001; //DSPI3_SOUT
SIUL2.MSCR[145].R = 0x308C0000; //DSPI3_SIN

SIUL2.MSCR[16].B.SSS = 1; /* Pad n17: Source signal is CAN0_TX */
SIUL2.MSCR[16].B.OBE = 1; /* Pad n17: Output Buffer Enable */
SIUL2.MSCR[16].B.SRC = 3; /* Pad n17: Maximum slew rate */

SIUL2.MSCR[17].B.IBE = 1; /* Pad n18: Enable pad for input - CAN0_RXD */
SIUL2.IMCR[0].B.SSS = 0; /* CAN_0_RXD: connected to pad n18 */

SIUL2.MSCR[9].R = 0x32000000; //CANSTB
SIUL2.GPDO[9].R = 0; //CANSTB 0 ON
}

static void FlexCAN_0_Init()
{
int j = 0;

/*Module enable*/
CAN_0.MCR.B.MDIS = 0;

/*Source clk is oscillator clock (40MHz)*/
CAN_0.CTRL1.B.CLKSRC = 0;

/*Error correction configuration register enable*/
CAN_0.CTRL2.B.ECRWRE = 1;

/*Enable unrestricted write access to FlexCAN memory*/
CAN_0.CTRL2.B.WRMFRZ = 1;

/*Error configuration register write enable*/
CAN_0.MECR.B.ECRWRDIS = 0;

/*Disable memory error correction*/
CAN_0.MECR.B.ECCDIS = 1;

/*Keep normal operation*/
CAN_0.MECR.B.NCEFAFRZ = 0;

/*Error configuration register write disable*/
CAN_0.MECR.B.ECRWRDIS = 1;

/*Disable unrestricted write access to FlexCAN memory*/
CAN_0.CTRL2.B.WRMFRZ = 0;

/*Error correction configuration register disable*/
CAN_0.CTRL2.B.ECRWRE = 0;

//CAN_0.MCR.B.FRZ = 1; // freeze mode enabled
//CAN_0.MCR.B.HALT = 1; // enters freeze mode

/*Disable individual RX masking*/
CAN_0.MCR.B.IRMQ = 1;

//CAN_0.MCR.B.FRZ = 0; // freeze mode enabled
//AN_0.MCR.B.HALT = 0; // enters freeze mode

/*CAN bit timing - 40MHz oscillator, 100kbps bitrate,*/
CAN_0.CTRL1.B.PRESDIV = 39;
CAN_0.CTRL1.B.RJW = 3;
CAN_0.CTRL1.B.PSEG1 = 3;
CAN_0.CTRL1.B.PSEG2 = 3;
CAN_0.CTRL1.B.PROPSEG = 0;

/*enable interrupt for MB0*/
CAN_0.IMASK1.R = 0x00000001;

/*Clear all RX individual Mask Registers The corresponding bit in the
* filter is checked"*/
for(j = 0; j < 64; j++)
{
CAN_0.RXIMR[j].R = 0xFFFFFFFF;
}

/*Set all message buffers RX inactive*/
for(j = 0; j <64; j++)
{
CAN_0.MB[j].CS.R = 0x0000;
}

/*Last two bits in MB0 are do not care*/
CAN_0.RXIMR[0].R = 0xFFFFFFFC;

/*Last three bits in MB1 are do not care*/
//CAN_0.RXIMR[1].R = 0xFFFFFFF8;

/*Last four bits in MB2 are do not care*/
//CAN_0.RXIMR[2].R = 0xFFFFFFF0;

/*No freeze mode request*/

CAN_0.MCR.B.HALT = 0;

}

static void Configure_RX_MessageBuffer(void)
{
CAN_0.MB[0].CS.B.CODE = 0x0; //MB inactive
CAN_0.MB[0].CS.B.IDE = 1;
CAN_0.MB[0].ID.R = 0; //set standard ID
CAN_0.MB[0].DATA.W[1] = 0x00000000; //data1 set (optional)
CAN_0.MB[0].DATA.W[0] = 0x00000000; //data0 set (optional)
CAN_0.MB[0].CS.B.CODE = 0x4; //MB empty - ready for receive

}

[tamas_putz]

There is a problem:

In the example (MPC5775K FlexCAN_with_interrupts_v1.1 S32DS_1.1):

static void Transmit_Message(int MB, int ID)
{
CAN_0.MB[MB].CS.B.CODE = 0x8; //MB TX inactive
CAN_0.MB[MB].CS.B.IDE = 1; //extended bit disable                      ------>>>>>>>>>>>    1 = extended ID enable ??  0 or 1 ?  (0 disable , 1 enable)
CAN_0.MB[MB].ID.R = ID; //set message STD ID
CAN_0.MB[MB].DATA.W[1] = 0x90ABCDEF; //data1 set
CAN_0.MB[MB].DATA.W[0] = 0x12345678; //data0 set
CAN_0.MB[MB].CS.B.DLC = 8; //message length 8 bytes
CAN_0.MB[MB].CS.B.RTR = 0; //remote frame disable
CAN_0.MB[MB].CS.B.SRR = 0; //not used with STD_ID
CAN_0.MB[MB].CS.B.CODE = 0xC; //MB once transmit data
}