MPC5xxx Knowledge Base

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WARNING 1: Use censorship feature very carefully, because an inappropriate usage can lead in making the device useless!!! Thoroughly read all instructions before use!!! WARNING 2: Version of ICDPPCNEXUS debugger that is included with CodeWarrior 2.10 is not capable to enable debug on certain devices including MPC5604B. Workaround is either using of Codewarrior 10.6 or using of PKGPPCNEXUS debugger - can be downloaded from P&E Microcomputer Systems WARNING 3: In case TRACE32 debugger is being used (Lauterbach), it is needed to have updated TRACE32 software. TRACE32 releases 02/2015 and 09/2016..02/2018 may not be able to access to censored device. LAUTERBACH DEVELOPMENT TOOLS The example consists of 2 parts and document describing how to access censored device via JTAG with using of PeMicro or Lauterbach debugger: 1) MPC5604B-Censor_device-CW210: ******************************************************************************** * Detailed Description: * The example code reprogram content of shadow flash to enable censorship. * After succesful operation LED1 is lighting. After power-on-reset the device * is censored with private 0xFEED_FACE_CAFE_BEEF. Subsequently the access can be * allowed by enabling debug of censored device as decipted in attached pdf * document. On this device password must be entered in reverse order i.e. * 0xCAFE_BEEF_FEED_FACE. Shadow flash re-programming code must be executed from * internal RAM. * ------------------------------------------------------------------------------ 2) MPC5604B-Uncensor_device-CW210: ******************************************************************************** * Detailed Description: * Supposing the device is censored by example MPC5604B-Censor_device-CW210 * Firstly it is needed to enabled debug of censored device as decipted in * attached pdf document. On this device password must be entered in reverse * order i.e.0xCAFE_BEEF_FEED_FACE. MPC5604B_run_from_ram.cmm script does it by * command SYStem.option.keycode 0xCAFEBEEFFEEDFACE. * Then run this code to uncensor the device. After succesful operation LED1 is * lighting. After power-on-reset the device is uncensored and subsequent access * will be without password. Shadow flash re-programming code must be executed * from internal RAM. * ------------------------------------------------------------------------------

******************************************************************************** * Detailed Description: * This example content a basic PMPLL initialization and * configuration of Mode Entry module and Clock Generation * module. By default active is core 2 -> e200z4 * Configure PIT timer to trigger interrupt and service it * ------------------------------------------------------------------------------ * Test HW: MPC57xx * Maskset: 0N76P * Target : internal_FLASH * Fsys: 265 MHz PLL with 40 MHz crystal reference ******************************************************************************** Revision History: 1.0 Sep-07-2017 b21190(Vlna Peter) Initial Version *******************************************************************************/

MPC5744P FlexPWM offers possibility to synchronize the FlexPWM modules via external synchronization. Attached is example application how to properly synchronize 2 FlexPWMs modules: FlexPWMs run with motor control clock (MOT_CLK) with 100MHz frequency: PWM period is 20MHz with 50% duty cycle: Below is figure representing External synchronization of 2 PWM (on this frequency I have 2 clocks delay between synchronization) With adjusted FlexPWM0 channel A0 init value by 2 clocks I have reached following results:

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * setup clock for peripherals, GPIO pins. * DSPI1 module is configured as a master, DSPI2 module is configured as a slave. * First, response of slave is initialized by writing to PUSHR register of DSPI2. * Second, we write PUSHR register of DSPI1 to send data from master. * Once data are received on both master and slave, data are read from POPR. * ------------------------------------------------------------------------------ * Test HW: MPC5746R-176DC, MPC57xx Motherboard * MCU: PPC5746R 1N83M * Fsys: PLL 200MHz * Debugger: Lauterbach Trace32 * IDE: S32DS for Power 2017.R1 * Target: internal_FLASH (debug mode, debug_ram mode) * EVB connection: * Connect PA13 (P8.14) to PS11 (P27.12) * Connect PA10 (P8.11) to PS10 (P27.11) * Connect PG12 (P14.13) to PS13 (P27.14) * Connect PG13 (P14.14) to PS7 (P27.8) * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * setup clock for peripherals, Setup access right for Masters and Peripherals * on AIPS_0 * * LINFlex UART mode with FIFO transmit using DMA * LINFlex UART mode with FIFO receive using DMA * * ICache and DCache are both disabled in startup file using CACHE_ENABLE macro. * You can change the value of the macro at the following path: * project Properties/C/C++ General/Paths and Symbols/Symbols * If you change the value to 1, ICahce and DCache will be enabled in startup. * * * ------------------------------------------------------------------------------ * Test HW: MPC5775K-356DS, MPC57xx Motherboard * MCU: PPC5775KMMY3A 0N38M * Terminal: 19200-8-no parity-1 stop bit-no flow control on LINFlexD_0 * Fsys: PLL0 266MHz * Z4 Core 133MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: internal_FLASH (debug mode, release mode) * EVB connection: J14.2 to P12.6 Connect LINFlexD_0 RXD to main RS232 * J13.2 to P12.7 Connect LINFlexD_0 TXD to main RS232 * ********************************************************************************

******************************************************************************** * Detailed Description: * This example content a driver for ADC module. * Basic ADC functionality is demonstrated via ADC_0 normal conversion for ADC_0 AN0 channel. * * For closer details on how ADC works I suggest you to check reference manual. * This example sets system clock for 200MHz running from PLL0 module. * Example contains basic ADC functionality demonstration. Software is starting normal ADC conversion * on ADC_0 channel AN0. * To demonstrate the measurement functionality on Freescale MPC57xx motherboard connect jumper to J53. * By doing this the potentiometer is connected to AN0 ADC input. For further details see MPC57xx EVB schematics. * * ------------------------------------------------------------------------------ * Test HW: MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 1N65H * Target : internal_FLASH* ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, third LED by second core, initializes and display notice via UART * terminal and then terminal ECHO. * * ------------------------------------------------------------------------------ * Test HW: XPC56xxMB2 + XPC564xB/C, PPC5646C 0M87Y silicon * Target : internal_FLASH, RAM * Fsys: 120 MHz PLL0 * Debugger: Lauterbach Trace32. script for internal_FALSH run_from_flash.cmm * script for RAM: run_from_ram_vle.cmm * ********************************************************************************

******************************************************************************** * Detailed Description: * A simple example configures eTPU engine B channels 0/1 for QOM and FPM. * Connect these pins by wire. Output wave is generated on chnl ETPUB0 (QOM0) * and its frequency is measured on the chnl ETPUB1 (FPM0). * TCR counter frequency is 64MHz, output wave configured as 1MHz ( expected * frequency measured by FPM. Window size is 28us (0x400) thus number of * measured pulses is 28 (27 initally). * * Note: It is needed to configure IGF module, otherwise inputs does not pass * to eTPU module. * * ------------------------------------------------------------------------------ * Test HW: MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU: PPC5777CMM03 2N45H CTZZS1521A * Fsys: PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger: Lauterbach Trace32 * Target: internal_FLASH * EVB connection: ETPUB0 (PortR P25-1) --> ETPUB1 (PortR P25-0) by wire * ********************************************************************************

******************************************************************************** * Detailed Description: * Initializes eQADC module, converts specified command queue and displays * results into terminal window when EOQ is reached. Used analog inputs ANA_0 and * ANA_1 requires external connection to converted voltage (potentiometer) to * see some valid numbers. For simplicity, ADC module is not calibrated. * ------------------------------------------------------------------------------ * Test HW: XPC567XKIT516 - MPC5674ADAT516 Rev.C, MPC567XEVBFXMB Rev.B * MCU: PPC5674FMVYA264 * Terminal: 19200-8-no parity-1 stop bit-no flow control on eSCI_A * Fsys: 264/200/150/60 MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: RAM, internal_FLASH * EVB connection: Potentiometers --> ADC inputs * USER_DEV_RV2(J4-7) --> ANA_0 (J18-3) * USER_DEV_RV3(J4-8) --> ANA_1 (J18-4) * ********************************************************************************

******************************************************************************** * Detailed Description: * * Unlock, erase and program of flash mid block 0x00FB_8000 - 0x00FB_FFFF. * ------------------------------------------------------------------------------ * Test HW: X - PC5748G - MB (rev C) * MCU: PPC5748GMMN6A * Maskset: 1N81M * Fsys: 160 MHz * Debugger: Lauterbach Trace32 * * Target: Internal_FLASH * ********************************************************************************

******************************************************************************** * Detailed Description: * * Example shows MCU's temperature measurement with the help of TSENS. * Calibartion constants for TSENS0 and TSENS1 are read from Test Flash and * ADC0/ADC1 is set to measure Vbg and TSENS outputs. * Calculated internal temperature can be desplayed on the Terminal. * * EVB connection: * * Route LINFlexD_0 TXD/RXD (PB2/PB3) signals to the main board RS-232 transceiver * Daughtercard: * J17.11–12 ON .. Connect LINFlexD_0 TXD (PB2) to main board. * J17.8–9 ON .. Connect LINFlexD_0 RXD (PB3) to main board. * * Motherboard * J14 - SCI_RX ON * J13 - SCI_TX ON * J25 - SCI_PWR ON * * See results on PC terminal (19200, 8N1, None). You should get following text * (with different values for sure) * * TSENS0/TSENS1 temperature measurement * press any key to continue... * * Calibration constants read from Test Flash * * TSENS0 TSENS1 * * K1 = 429 K1 = -220 * K2 = -5785 K2 = -5767 * K3 = -12800 K3 = -12736 * K4 = 45 K4 = 45 * * K1 * Vbg_code * 2^-1 + K2 * TSENS_code * 2^3 * T = ------------------------------------------------------------------------- / 4 - 273.15 [degC] * [K3 * Vbg_code * 2^2 + K4 * TSENS_code] * 2^-10 * * Vbg0_code = 1502 Vbg1_code = 1502 * TSENS0_code = 2002 TSENS1_code = 1988 * * TSENS0 temp = 34.57 degC TSENS1 temp = 36.78 degC * * ------------------------------------------------------------------------------ * Test HW: MPC57xx * Maskset: 1N65H * Target : RAM, internal_FLASH * Fsys: 200 MHz PLL with 40 MHz crystal reference * Terminal: 19200, 8N1, None ********************************************************************************

MPC5xxx Documents Links to source codes for eTPU functions eQADC - avoiding unintended result swap External Bus Interface FAQs FlexCAN bit timing calculation Excel configurators MPC5xxx/S32Kxx: CAN / CAN FD bit timing calculation SW Drivers MPC5xxx I2C communication driver MPC55xx/56xx Documents e200 Core Training relevant to MPC55xx and MPC56xx device family Error Correcting Codes Implemented on MPC55xx and MPC56xx Excel configurators Excel MPC55xx/MPC56xx PLL Calculator MMU Assist Register CONFIGURATOR Debugger Scripts Example JTAG access – Addendum to application notes AN3283 and AN4365 MPC57xx Excel configurators Core MPU configurator MPC57xx - DCF records Debugger Scripts MPC57xx FCCU Utility scripts for Lauterbach debugger MPC5643L Documents MPC5643L PWM_ADC measurement concept GSH614 MPC5744P Documents MPC5744P_System_IO_Definition Using the Built-in Self-Test (BIST) on the MPC5744P Error Correcting Codes Implemented on MPC5744P MPC574xP - FCCU configuration guide Excel configurators Excel MPC5744P Clock Configurator MPC5744P DCF Configurator MPC5746R Documents MPC5746R STCU2 BIST configuration guide Excel configurators MPC5746R DCF Configurator MPC574xG/C Documents MPC5646C to MPC574xG Migration - Rev. 0, 09/2013 Draft only Excel configurators MPC5746C DCF Configurator MPC5748G DCF Configurator MPC5775K Excel configurators MPC5775K DCF Configurator MPC5777C Documents MPC5777C - Online BISTs Error Correction Codes Implemented on MPC5777C Excel configurators Excel MPC5777C clock configurator MPC5777C DCF Configurator MPC5777M Excel configurators MP5777M DCF Configurator S32R274 Excel configurators S32R274 DCF Configurator IDEs (CodeWarrior, S32 Design Studio) Documents How to program QSPI flash using CodeWarrior 10.x How to use CRCgen in CodeWarrior for MCU How to download separate elf/srec/hex file to microcontroller using S32 Design Studio How to use printf function in S32DS for Power Architecture using EWL library How to debug code using CodeWarrior 10.5 How to flash two .elf files using CodeWarrior 10.6 How to create FreeRTOS project in S32 Design Studio How to create new configuration in CodeWarrior for MCU For more HOWTOs related to S32 Design Studio, visit S32DS for Power - list of HOWTOs

This document describes, how to create another configuration to existing ones (RAM, FLASH) and how to use your own linker file for the new configuration. As soon as you have created project, right click the project and select Properties. Click Tool Chain Editor. In upper right corner, select Manage Configurations. New window will appear, then click new. As soon as you choose new, another window will appear and here you can insert name of the configuration, description and last, you must choose, which configuration will be settings copied from. So, for example, you can choose existing FLASH configuration. Click OK and new configuration will be created. Now, you can choose the new configuration as the active configuration, also this new configuration is added to configurations, and it is accessible via "hammer" icon in upper left corner. Now, it is necessary to set linker file you want to use with this configuration. Because this new configuration is inherited from FLASH configuration, it also uses default flash linker file. Set your configuration as active at first. After this step, in project properties select Settings->PowerPC Linker input tab. Into line Link Command File, choose path to required linker file you want to use with the new configuration. Click OK. You can verify the new configuration is chosen using arrow new to the hammer icon. How to use new configuration in debug configuration As soon as you have new configuration created, it is highly probable, you would like to download created elf into microcontroller and eventually debug it. Open debug configuration window. Now you can create new debug configuration or you can duplicate existing one. I will describe easier option and I will duplicate Flash configuration. Choose the flash configuration and click the duplicate icon. New configuration will appear. Now choose the new configuration, change the name and select elf file, which is created by new configuration. Click Apply and Debug button.

******************************************************************************** * Detailed Description: * Inject and handles HVD and LVD faults. Application also configures FCCU_F pins * to see possible faults externally - normally these two pins toggles antiphase, * in case error these pins toggles inphase. If you step the code not allowing * alarm interrupt to be handled on time, device goes to safe mode and FCCU_F * pins toggles in phase. * ------------------------------------------------------------------------------ * Test HW: xPC564xLKIT, PPC5643L Cut3 silicon * Target : internal_FLASH, RAM * Fsys: 120 MHz PLL0 * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Terminal: 19200-8-no parity-1 stop bit-no flow control via LINFlex0 * EVB connection: FCCU_F0 and FCCU_F1 connected to the scope - pay attention to * J16 and J18 jumpers on mini-module (FCCU_F0 and FCCU_F1). * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, initializes and display notice via UART terminal and then terminal ECHO. * The example configures the device for maximum performance (OPTIMIZATIONS_ON). * Its intention is to offer advanced startup code additional to CW stationery. * ------------------------------------------------------------------------------ * Test HW: MPC5566EVB * MCU: PPC5566MVR132 * Fsys: 144/132/112/80/12 MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: RAM, internal_FLASH * Terminal: 19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: TPU_PORT_37 -> USER_LED_8 * TPU_PORT_38 -> USER_LED_7 (to see blinking LEDs) * ********************************************************************************

******************************************************************************** * Detailed Description: * * Simple LINFlex UART mode transmit and receive without interrupts (polled UART) * TXFIFO and RXFIFO macro is used to select between buffer and FIFO mode * * EVB connection: * * Route LINFlexD_0 TXD/RXD (PB2/PB3) signals to the main board RS-232 transceiver * Daughtercard: * J17.11–12 ON .. Connect LINFlexD_0 TXD (PB2) to main board. * J17.8–9 ON .. Connect LINFlexD_0 RXD (PB3) to main board. * * Motherboard * J14 - SCI_RX ON * J13 - SCI_TX ON * J25 - SCI_PWR ON * * See results on PC terminal (19200, 8N1, None). * * ------------------------------------------------------------------------------ * Test HW: MPC57xx * Maskset: 1N65H * Target : RAM, internal_FLASH * Fsys: 200 MHz PLL with 40 MHz crystal reference * Terminal: 19200, 8N1, None ********************************************************************************

******************************************************************************** * Owner: b21190(Vlna Peter) * Version: 1.0 * Date: May-09-2018 * Classification: General Business Information * Brief: BIST demonstration ******************************************************************************** * Test HW: MPC57xx * Maskset: 3N23A * Target : internal_FLASH * Fsys: 200 MHz PLL with 40 MHz crystal reference ******************************************************************************** Revision History: 1.0 Oct-22-2014 b21190(Vlna Peter) Initial Version 1.1 Sep-25-2018 b21190(Vlna Peter) STCU2 BIST Multicore *******************************************************************************/