Clone an Example Project from MCUXpresso IDE The following steps will guide you through the manipulation of the general-purpose outputs. The example sets up a CTimer to generate a PWM signal and change between two LEDs. Find the Quickstart Panel in the lower left-hand corner and click on Import SDK example(s) Click on the FRDM-MCXN947 board to select that you want to import an example that can run on that board, and then click on Next Use the arrow button to expand the  driver_examples  category, then expand the ctimer examples, click on the check box next to  ctimer_match_interrupt_example  to select it. To use the UART for printing (instead of the default semihosting), Select UART as the SDK Debug Console checkbox under the project options. Then, click on Finish Click on the  “frdmmcxn947_ctimer_match_interrupt_example”  project in the Project Explorer View and build, compile, and run the demo as described in the previous section You should see the BLUE and RED LED changing back and forth Terminate the debug session Use MCUXpresso IDE Pins Tools to Modify Example   Note: Previously, you had to clone an SDK project like in the previous step. Open the pins tool by selecting “ConfigTools” on the top right hand of the file explorer window and then select “ Open Pins”     The pins tool should now display the pin configuration for the ctimer project     In the Pins view deselect “Show dedicated pins” and “Show no routed pins” checkboxes to see only the routed pins. Routed pins have a check in a green box next to the pin name. The functions selected for each routed pin are highlighted in green   In the current configuration, PIO3_2 and PIO3_3 are routed as the outputs of the CTimer. Let’s add a third Ctimer Match output and enable the Green LED Select “Show no routed pins” to see the other options. To enable the third Ctimer Match Output, browse the column for Ctimer and select and output. In this example, we will select, Ctimer4 Match 2 on PIO3_6. Select the item in the Ctimer column to enable   Now, let’s route the Green LED. In the search box type “green” so that the routed pin for this LED is shown. Finally, click the box under the GPIO column. The box will highlight in green, and a check will appear next to the pin   Next configure the GPIO pin as an output in the “Routing Details” window   Now it’s time to implement these changes into the project by exporting the new updated pin_mux.c and pin_mux.h files that are generated by the Pins tool. Click on Update Project in the menu bar   The screen that pops up will show the files that are changing and you can click on “diff” to see the difference between the current file and the new file generated by the Pins tool. Click on “OK” to overwrite the new files into your project   Let’s add some additional code to the example. Open  simple_match_interrupt.c  file and add the following macros for the third ctimer output.   Add the Green LED functions as well.   Some additional code to be implemented will be the third ctimer’s callback, this can be copied from  ctimer_match1_callback  and modify the content to match2. To be able to visually identify the new ctimer, we will remove one of the previous ctimers as shown     The main function will need to include the initialization of both the Green LED and the Ctimer   Build and download the project as done in the previous section Run the application. You should now see the Green and Blue LED blinking back and forth Terminate the debug session

Clone an Example Project Using MCUXpresso Config Tool    The following steps will guide you through the manipulation of the general-purpose outputs. The example sets up a SCTimer to generate a PWM signal and change a LED brightness. Open the MCUXpresso Config Tool In the wizard that comes up, select the “Create a new configuration based on an SDK example or hello word project” radio button and click on Next On the next screen, select the location of the MCUXpresso SDK . The SDK package must be unzipped beforehand. Then select the IDE that is being used. Note that only IDEs that were selected in the online SDK builder when the SDK was built will be available and click on clone select example. Then select the project to clone. For this example, we want to use the gpio led output project. You can filter for this by typing “ctimer” in the filter box and then selecting the  “ctimer_match_interrupt_example”  example project. You can then also specify where to clone the project and the name. Then click on Finish After cloning go to the directory you selected and open the project for your IDE. Import, compile, and run the project as done in previous sections You should see the BLUE and RED LED changing back and forth Terminate the debug session Use MCUXpresso IDE Pins Tools to Modify Example   Note: Previously, you had to clone an SDK project like in the previous step. Open the pins tool by selecting “ConfigTools” on the top right hand of the file explorer window and then select “ Open Pins”   The pins tool should now display the pin configuration for the ctimer project   In the Pins view deselect “Show dedicated pins” and “Show no routed pins” checkboxes to see only the routed pins. Routed pins have a check in a green box next to the pin name. The functions selected for each routed pin are highlighted in green In the current configuration, PIO3_2 and PIO3_3 are routed as the outputs of the CTimer. Let’s add a third Ctimer Match output and enable the Green LED Select “Show no routed pins” to see the other options. To enable the third Ctimer Match Output, browse the column for Ctimer and select and output. In this example, we will select, Ctimer4 Match 2 on PIO3_6. Select the item in the Ctimer column to enable Now, let’s route the Green LED. In the search box type “green” so that the routed pin for this LED is shown. Finally, click the box under the GPIO column. The box will highlight in green, and a check will appear next to the pin Next configure the GPIO pin as an output in the “Routing Details” window Now it’s time to implement these changes into the project by exporting the new updated pin_mux.c and pin_mux.h files that are generated by the Pins tool. Click on Update Project in the menu bar The screen that pops up will show the files that are changing and you can click on “diff” to see the difference between the current file and the new file generated by the Pins tool. Click on “OK” to overwrite the new files into your project Let’s add some additional code to the example. Open  simple_match_interrupt.c  file and add the following macros for the third ctimer output. Add the Green LED functions as well. Some additional code to be implemented will be the third ctimer’s callback, this can be copied from  ctimer_match1_callback  and modify the content to match2. To be able to visually identify the new ctimer, we will remove one of the previous ctimers as shown   The main function will need to include the initialization of both the Green LED and the Ctimer Build and download the project as done in the previous section Run the application. You should now see the Green and Blue LED blinking back and forth Terminate the debug session  

The following steps will guide you through the hello_world demo application using MCUXpresso IDE for the Cortex-M33 application. The MCUXpresso IDE installation and the SDK for the MCXN-Series can be found at the section Get Software of this Getting Started guide. Find the Quickstart Panel in the lower left-hand corner.   Then click on Import SDK example(s). Click on the board you are using to select an example that can run on that board, and then click on Next.   Use the arrow button to expand the demo_apps category, and then click the checkbox next to hello_world to select that project. To use the UART for printing (instead of the default semihosting), select UART as the SDK Debug Console checkbox under the project options. Then, click on Finish Select the project and build it by either clicking on the “build icon” in the shortcuts provided above or by clicking “Build” in the Quickstart Panel   The project should build without presenting any errors or warnings in the console   Connect the board to your computer with the type-C USB cable to ‘MCU-LINK’ port. Check your board's user manual for instructions.   Download the application to your board by either clicking on the “debug” icon above or clicking on “Debug” in the Quickstart Panel   Select the MCU-Link CMSIS-DAP debug probe  Open up a serial terminal to be able to see the application’s output. Select the “Terminal” window and press the “new terminal” icon   Choose a “Serial Terminal” and then set the UART settings to 115200 baudrate, 8 bit data size, no parity and 1 stop bit. Press OK   Run the application by pressing the “run” icon. See the output printed on the terminal  

The following steps will guide you through opening the  hello_world  application. The instructions for compiling and debugging the Cortex M33 core are covered in the instructions below. Build an Example Application Please use IAR Embedded Workbench for Arm version 9.50.1 or above. First, unzip the previously downloaded FRDM-MCXW71 SDK package Open the desired example application workspace. Most example application workspace files can be located using the following path: <install_dir>/boards/<sdk_board_name>/<example_type>/<application_name>/iar Select the desired build target from the drop-down. For this example, select the "hello_world - debug" target Open the project properties by doing a right-click on the project and selecting "Options" Now, go to the "Debugger" section and change the debugger driver to CMSIS DAP. Press the OK button To build the application, click the "Make" button, highlighted in red below The build will complete without errors   Note: In case of building errors, make sure that the correct board is selected, right-click in Project → Options → General Options → Target → Device. Select the NXP MCU you are using and is supported by the IAR version you have installed.   Run an Example Application Connect the development platform to your PC via USB cable to 'MCU-Link' port Click the "Download and Debug" button to download the application to the target The application is then downloaded to the target and automatically runs to the main() function Run the code by clicking the "Go" button to start the application The  hello_world  application is now running on the MCU.

The most recent versions of MCUXpresso IDE count with a terminal emulation application. This tool can be used to display information sent from your NXP development platform's virtual serial port 1. Open the MCUXpresso IDE   2. Launch the MCUXpresso IDE terminal by clicking on the "Open a Terminal" button on the top of the IDE or press "Ctrl + Alt + Shift + T" 3. Select Serial Terminal   4. Configure the serial port settings (using the LPC-Link2 COM port number) to 115200 baud rate, 8 data bits, no parity and 1 stop bit, then press the "OK" button     5. Verify that the connection is open. If connected, MCUXpresso IDE will look like the figure below at the Terminal view     6. You're ready to go  

Porting an ST Application   This section outlines the process of migrating an application developed in the STM32Cube IDE to the NXP MCUXpresso VSCode extension, using a compatible SDK for the target NXP MCU.   For users familiar with STM32Cube IDE, maintaining a similar development environment can ease the transition and reduce the learning curve. In this example, an I2C-based application originally developed for an STM32 device will be recreated and adapted for an NXP MCU.   The migration begins by creating a minimal project in MCUXpresso that includes the necessary I2C drivers. The original ST application utilizes two I2C instances for communication between components on the same board. To replicate this functionality, two sets of I2C pins must be initialized. Additionally, the application uses a push-button input and an LED output to demonstrate behavior changes, requiring the configuration of corresponding GPIOs using the MCUXpresso pin configuration tools.   MCUXpresso for Visual Studio Code MCUXpresso Installer In addition to the MCUXpresso extension, some extra tools and software are required for the full development flow within VS Code. All these dependencies are managed by the MCUXpresso Installer from QUICKSTART PANEL view. This launches the Installer UI, where an intuitive interface allows users to select from Software Kits, Debug Probes, Standalone Tools, or ARM components.   Using the MCUXpresso Installer, select MCUXpresso SDK Developer, LinkServer, SEGGGER J-Link, PEmicro, and MCUXpresso Configuration Tools then Click Install. Once all dependencies have finished installing, you can safely close the MCUXpresso Installer. Import Repository The first step in the MCUXpresso for VS Code development flow is to import an SDK software repository. Go to the MCUXpresso for VS Code extension Click Import Repository in the QUICKSTART PANEL Select MCUXpresso SDK, main revision, choose your SDK destination folder. When finished, click Import NOTE this import step takes a long time to clone. VS Code shows a progress bar pop-up with the status of the west tool as it clones all the repos. The repository should be added to the IMPORTED REPOSITORY view one the import is successful   Importing Example from Repository In the QUICKSTART PANEL click Import Example from Repository. Choose the following board settings to import a Freestanding application To select the board, type MCXA15 to find FRDM-MCXA156 Type hello to find the demo_apps/hello_world For application type, select Freestanding application Change the Name to frdmmcxa156_i2c Click Import and the example should be added to the PROJECTS view   In the PROJECTS window open Project Files --> prj.conf and add CONFIG_MCUX_COMPONENT_driver.lpi2c=y to add I2C driver support to your project.   To begin the migration, the main source file from the original ST project—as well as any custom source files not part of the standard ST driver set—should be incorporated into the new NXP project.   The following steps outline the initial project setup in MCUXpresso for VS Code: Upon creation, the project includes a basic "hello_world" example. This template can be used as a starting point. All content within the main source file—except for the initial macro definitions—can be replaced incrementally to integrate the application logic, allowing for a modular and controlled migration process.   Functions quick summary from ST project The next step involves transferring the main source file from the original ST project into the newly created MCUXpresso project. During this process, standard ST includes, and driver references are excluded, unless custom header files are required. In this case, no custom headers are used, so only the core application logic is migrated.   Many of the function calls within the ST source file rely on STM32-specific HAL APIs. These will be reviewed and systematically replaced with equivalent functions from the NXP SDK. The approach involves analyzing each function within the main() routine to understand its purpose and then substituting it with the corresponding implementation in the NXP environment.   Interrupt Priority Configuration Configures the microcontroller’s interrupt system to manage priority levels when multiple interrupts occur simultaneously. Power Peripheral Clock Enablement Activates the clock for the Power (PWR) peripheral, a prerequisite for configuring power management settings. Power Management Setup Initializes power management features of the STM32U5xx microcontroller to optimize energy efficiency and performance across internal components. System Clock Configuration Sets up the timing system of the microcontroller, configuring it to operate at a frequency of 160 MHz. Peripheral Initialization Establishes pin configurations and functional settings for peripherals. In this application, I2C1 is configured as the follower and I2C3 as the leader. LED Initialization Configures the LED to start in a low-active state, turning it on to indicate initial status or communication feedback. GPIO Polling for Button Press Continuously monitors the status of a GPIO input pin. If the button is not pressed, the LED blinks rapidly. Once pressed, the loop exits, and the LED remains on. I2C Communication Start Initiates the I2C communication process from the master side, triggering data transfer between the two I2C interfaces.   How is this handled in the NXP SDK? 1. Interrupt Priority Configuration This functionality is supported through CMSIS core NVIC functions and can be reused directly. It requires defining macros to establish the desired pre-emption priority levels. 2–4. Clock and Power Configuration These aspects are consolidated within the BOARD_InitBootClocks function, located in clock_config.c under the board folder. This function initializes both the system clock and power settings for the NXP MCU. 5. Peripheral and Pin Initialization Peripheral setup is divided across two functions: BOARD_InitBootPins (in pin_mux.c) handles pin configuration for I2C and GPIO. BOARD_InitBootPeripherals (in peripherals.c) manages I2C peripheral initialization and GPIO interrupt setup. 6. LED Initialization GPIO pins can be configured as output high or low depending on the desired initial state. The LED can be toggled or set using GPIO_PinWrite. 7. GPIO Polling for Button Press This behavior can be replicated using a custom polling function that utilizes GPIO_PinRead to monitor the button state. 8. I2C Communication Start The I2C master communication is initiated using LPI2C_MasterStart, which begins the data transfer process with the designated slave device.   Generate Initialization Code with MCUXpresso Config Tools Clocks VS Code extension works with Config Tools standalone. To access and use MCUXpresso Config Tools from the MCUXpresso extension in VS Code. In the PROJECTS view, right click on the project folder then select Open with MCUXpresso Config Tools   Config Tools will be open in a new window, because this is the first time the project is being open a config tools overview window will appear. Make sure the project has Pins, Clocks and Peripherals enabled; then click Close.   To configure the system clocks, open the Clocks tool through the menu Tools --> Clocks.   The clock diagram displays the supported configurations for the selected MCU. In this example, the device has a maximum core clock frequency of 96 MHz. As this meets the application's requirements, no modifications to the default clock settings are necessary.   To enable the peripheral clocks for the I2C instances, navigate to the clock configuration diagram within the MCUXpresso Config Tools. Scroll through the diagram to locate the available peripherals and activate the I2C modules by selecting the appropriate clock sources.   To configure the clock source for the I2C0 and I2C3 peripherals, double-click on the CLKSEL field associated with each instance in the clock configuration diagram. For this setup, select FRO_HF_DIV as the clock source for both I2C0 and I2C3.   Next, configure the clock divider by selecting the corresponding CLKDIV field in the clock configuration diagram. The details will appear in the top-right panel of the interface. To enable the clock path to the I2C peripheral, ensure the option divider /2 and Divider clock is running are selected.   At this stage, the I2C peripheral clocks have been successfully enabled.   Pins In the standalone MCUXpresso Config Tools go to Tools menu and choose Pins.   Using the filter functionality, search for available pins compatible with I2C instance 0. After reviewing the board schematic, pins P0_16 and P0_17 were selected, as they are accessible via a header. Assign the appropriate I2C functionality to these pins by selecting LPI2C0:SDA and LPI2C0:SCL from the configuration options.   Repeat the configuration process for I2C instance 3. Based on the board schematic, pins P3_27 and P3_28 are selected for this instance. Assign the appropriate functionality by selecting LPI2C3:SDA and LPI2C3:SCL within the pin configuration tool.   Once the pin selections are made, a configuration table is generated displaying the routing and settings for each pin. Within this table, use the routing details to configure the pins as required. For the I2C pins, enable internal pull-up resistors to ensure proper signal integrity during communication.   In addition to configuring the I2C pins, it is necessary to set up two GPIO pins—one for input and one for output. On this board, SW2 (P1_7) is designated for button input functionality, while P3_0 is assigned for LED output.   Within the routing details of the pin configuration table, define the behavior for both input and output GPIOs. Based on the application requirements, the output pin should be initialized to a logical low state (select Logical 0) to activate the LED. For the input pin, enable interrupt detection on a falling edge to register button presses accurately. Peripherals In the standalone MCUXpresso Config Tools go to Tools menu and choose Peripherals.   Select “Peripheral Drivers” to access the list of supported drivers available for the target device   GPIO1 Configuration To filter the available peripheral options, enter “GPIO” in the search field within the Peripheral Drivers view. Once the relevant options are displayed, click “OK” to proceed with the GPIO configuration.   To enable the interrupt functionality for P1_7, which is assigned to the button input, begin by selecting a new peripheral driver. Use the filter to search for GPIO, then choose the appropriate driver to activate the GPIO1 interrupt handler.   SYSTICK Select “Peripheral Drivers” to access the list of supported drivers available for the target device.   To filter the available peripheral options, enter “SYSTICK” in the search field within the Peripheral Drivers view. Once the relevant options are displayed, click “OK” to proceed with the 1ms periodic timer configuration.   Change the Clock source frequence to 24MHz and the interrupt period to 1ms   I2C Master and Slave Inside the peripheral configuration panel, look for Functional Group then click on Functional Group Properties In the Functional group properties window, look for Functional groups or Instances. Click Add a new functional group.   Change the new peripheral function group name to BOARD_InitLPI2Cs then click OK   Double check that BOARD_InitLPI2Cs function group is selected   I2C3 Leader/Master To configure the I2C peripheral, filter the available options by entering “I2C” in the search field within the Peripheral Drivers view. Once the relevant driver is displayed, select the appropriate one for your application and click “OK” to proceed.   Configure I2C3 as the master (leader) device and enable interrupt-driven data transfer. This setup allows the I2C3 instance to initiate communication and handle data transmission using interrupt mechanisms for improved responsiveness and efficiency.   Additionally, enable the interrupt handler for the I2C3 peripheral. Configure the appropriate priority level and activate the Transmit Data Ready flag to support interrupt-driven data transmission.   I2C0 Follower/Slave Configuration To configure the I2C0 follower peripheral, filter the available drivers by entering “I2C” in the search field within the Peripheral Drivers view. Once the relevant driver is displayed, select the appropriate one and click “OK” to proceed with the configuration.   Configure I2C0 as the slave (follower) device. Enable the interrupt-driven transfer method and specify the slave address to be used for communication. This setup allows the I2C0 instance to respond to master requests and handle data reception via interrupts.   Additionally, enable the interrupt handler for the I2C0 peripheral. Configure the appropriate priority level, validate the assigned follower address, and activate the Address valid, Receive data flag to support interrupt-driven data reception.   Apply Changes To apply and integrate the configuration changes into the project, click “Update Code.”   A new window will open to approve all the changes to the corresponding source files and ensure the new settings are reflected in the project structure. Click OK and go back to VS Code   File Structure The MCUXpresso configuration tools automatically generate source code based on the selected settings, streamlining integration into the main application. This generated code includes initialization routines for clocks, pins, and peripherals configured in previous steps. All generated files are under board directory within the project structure.   To add the all the source files under the board folder and make the directory path only visible to this target. Modify CMakeList.txt   1. peripherals.c This file includes initialization code for peripherals configured via the Config Tools. In this example, it contains setup routines for both I2C instances and the GPIO interrupt. While the BOARD_InitPeripherals function can be used, it is often more effective to selectively integrate the generated code into specific locations within the application to align with the required execution sequence.   2. board.c When creating a project using an NXP development board, the default configuration includes initialization of debug UART pins for serial terminal communication. In this case, the UART functionality is not required, and the corresponding function in board.c will not be used.   3. clock_config.c This file contains all system clock configurations. Use the BOARD_InitBootClocks function to initialize the clock frequency and power mode settings. For this application, the system is configured to operate at 96 MHz.   4. pin_mux.c This file defines all pin configurations selected for the application, including I2C and GPIO assignments. Although UART pins are included by default, they are not utilized in this project. Use the BOARD_InitBootPins function to apply the pin settings.   Additionally, the original ST application includes a cache initialization function (MX_ICACHE_Init). In the NXP SDK, cache configuration is handled within the startup code. This can be reviewed in the SystemInit function located in system_MCU.c under the device folder. Replace Initialization Functions   1. Clock and Pin Initialization In the main function of the NXP-based project, system clocks and pin configurations are initialized in the BOARD_InitHardware using the functions generated by the configuration tools: BOARD_InitBootClocks BOARD_InitBootPins   2. Peripheral Initialization Initialization code for peripherals is sourced from the peripherals.c file generated by the Config Tools. BOARD_InitBootPeripherals sets up the GPIO interrupt handler, including its priority level and NVIC configuration. And setups a 1ms SYSTICK periodic timer.   3. I2C Initialization Following this, the I2C master and slave instances are initialized along with their respective interrupt handlers and priority levels. At this stage, interrupt flags are not yet enabled; they will be activated later within the data transfer function to ensure proper sequencing and avoid premature interrupt triggering.   Source file peripherals.c includes a code snippet specifically for initializing the LPI2C0 peripheral for slave operations. This code can be selectively integrated into the main function or other appropriate locations within the application to align with the desired execution flow.   While the standalone configuration tools effectively generate the necessary initialization code, it remains the developer’s responsibility to determine the most appropriate placement of this code within the application. This decision should be guided by the operational sequence required by the specific protocol or peripheral being implemented.   For example, in I2C communication, data transfer is managed through interrupts. If the LPI2C0_Init function is used without consideration for timing, interrupts may trigger prematurely, resulting in incomplete or mismanaged transactions.   To ensure proper execution, the recommended sequence is: Initialize the peripheral and its associated interrupt handler. Start the I2C transaction. Enable interrupts for both master and slave operations.   In this application, the initialization is performed within the main() function, while the interrupt flags are selectively enabled later to maintain correct timing and control.   Initialize LPI2C To add LPI2C project settings like the slave address and data transfer length open the Kconfig file and add the following config menu   Add I2C prototypes and variables, that will be used in the I2C interrupt handlers and action functions   Replace Action Functions   4. SYSTICK Initialization The SYSTICK timer is configured to support delay operations within the application, such as controlling the LED blinking rate. Detailed instructions for initializing SYSTICK are provided in the following sections. 5. Button Polling and LED Control This functionality is implemented through a custom function that continuously polls the button input. While waiting for user interaction, the LED toggles to indicate readiness. Once the button is pressed, the LED remains steadily lit, signaling progression to the I2C data transfer phase. 6. I2C Master Handling The Handle_I2C_Master function is implemented using the driver APIs provided for the I2C peripheral in the NXP SDK. This function initiates the I2C transaction and manages the communication sequence. Interrupt handlers for both master and slave I2C instances are derived from the peripheral initialization code. At this stage, relevant interrupt flags are selectively enabled to support the specific behaviors required by the application.   WaitForUserButtonPress To begin customizing the GPIO interrupt handler, open the Peripherals Config Tool. From there, you can copy the auto-generated IRQ handler for GPIO, which serves as a reliable starting point. This code can then be modified to suit the specific requirements of your application.   In the VS Code development environment, paste the copied IRQ handler code into the main source file—ideally near the top—for easier access and organization.   Modifications were made to include a control variable within a while loop, allowing the application to pause execution until a button press is detected. This ensures that the program proceeds only after user interaction, aligning with the intended flow of the application.   The WaitForUserButtonPress function utilizes GPIO toggle and write operations to control the LED state, along with a delay mechanism to manage the blinking interval during the polling loop. To implement the delay, the SYSTICK timer is initialized and configured accordingly.   Additionally, a global counter variable is introduced, along with the corresponding SYSTICK interrupt handler, to support time-based operations within the application.     Within the BOARD_InitBootPeripherals() function, the SysTick_init() timer initialization was added prior to the button polling logic. This ensures that the delay mechanism is fully operational before entering the loop that waits for user input.   The finalized WaitForUserButtonPress function will include: GPIO operations to toggle and control the LED state. A while loop that continuously checks the button state and proceeds only upon detection of a press event.   The GPIO_* APIs are part of the NXP GPIO driver library and are used for various operations such as initialization, pin control, and interrupt handling. The macros highlighted in the code—typically shown in pink within the IDE—are generated by the Config Tools and defined in the pin_mux.h header file.   The delay functionality used in the application is implemented through a custom SYSTICK-based function, as previously described.   To explore the full set of available GPIO APIs, refer to the fsl_gpio.h header file. This file provides comprehensive support for GPIO operations, including port and pin-level control, configuration, and interrupt management.   Customizing the I2C Interrupt Handlers To customize the I2C interrupt handlers in a manner similar to the GPIO handler, begin by opening the Peripherals Config Tool in MCUXpresso IDE. From there, locate and copy the auto-generated IRQ handler for I2C0. This serves as a foundational template that can be modified to meet the specific requirements of the application.   Repeat the same process for I2C3 by copying its auto-generated interrupt handler from the Peripherals Config Tool. This handler can then be used as a base for customization, like the approach taken with I2C0.   Consolidating I2C Interrupt Handlers In the original ST-based project, each I2C instance utilized two separate interrupt handlers: one for standard operations and another for error handling. However, the NXP MCU used in this migration provides a single interrupt vector per I2C instance, which handles both standard and error conditions.   As a result, the functionality of the original four handlers must be consolidated into two—one for each I2C instance. This requires a careful review of the original interrupt logic to ensure that all relevant flags and behaviors are preserved in the merged implementation.   For example, the slave handler in the original project checks for an address match flag and, upon detection, verifies readiness to receive data. The equivalent behavior in the NXP environment is implemented by monitoring the appropriate status flags within the unified interrupt handler, ensuring that both address recognition and data reception are handled correctly.   Slave Handler   The I2C slave interrupt handler is triggered when the master device addresses the slave at 0x7E. Upon detecting this address match, the slave acknowledges the request and prepares to receive incoming data.   The second part of the handler manages the data reception process. It handles each byte transmitted by the master, monitors for a NACK (Not Acknowledge) condition to signal the end of transmission, and stores the received data into a designated buffer. This ensures that the slave processes the communication sequence correctly and terminates the transfer gracefully once all data has been received.   Master Handler   The I2C master interrupt handler monitors the Master Transfer Ready flag, which indicates that the peripheral is prepared to transmit the next byte of data. Upon detecting this condition, the handler checks the transmit buffer to determine if additional data remains to be sent. A counter is used to track the progress of the transmission.   Using the appropriate Master Send operation, the handler transmits the next byte and advances the buffer pointer. When the final byte is sent, the handler issues a STOP condition to signal the completion of the data transfer sequence.   Error Callback When something goes wrong during the I2C communication, the Error_Callback function serves as an error handler doing two main actions. First, it shuts down the communication system by disabling the interrupts for both I2C instances. Second, it provides a clear visual indication to the user that an error has occur.   Handle_I2C_Master Function   The Handle_I2C_Master function is responsible for initiating and managing the I2C communication process. It begins by issuing a MasterStart command to initiate communication with the slave device at the specified address. Upon successful acknowledgment from the slave, the data transfer is handled through the corresponding interrupt routines.   This function also initializes the interrupt handlers for both the master and slave I2C instances. As previously noted, it is essential to enable interrupts after the master initiates communication to prevent premature interrupt triggering, which could disrupt the transaction sequence.   Once the data transfer is complete and the slave has received all expected bytes, the function concludes by setting the LED to a steady state—indicating successful execution and the end of the application flow.   Conclusion Migrating an application from the STM32 development environment to the NXP MCX platform using MCUXpresso involves a structured and methodical approach. By leveraging the integrated configuration tools and understanding the functional equivalence between STM32 and NXP SDK components, developers can effectively transition their applications while maintaining performance and functionality.   This guide has outlined the key steps involved in replicating an I2C-based application, including project setup, peripheral configuration, pin and clock initialization, and interrupt handling. While the tools provide a strong foundation through auto-generated code, careful consideration must be given to the sequencing and integration of initialization and runtime logic to ensure reliable operation.   With a clear understanding of both environments and thoughtful adaptation of application logic, developers can streamline the migration process and take full advantage of the capabilities offered by the NXP MCX platform.

Porting an ST Application   This section outlines the process of migrating an application developed in the STM32Cube IDE to the NXP MCUXpresso IDE, using a compatible SDK for the target NXP MCU. For users familiar with STM32Cube IDE, maintaining a similar development environment can ease the transition and reduce the learning curve. In this example, an I2C-based application originally developed for an STM32 device will be recreated and adapted for an NXP MCU.   The migration begins by creating a minimal project in MCUXpresso IDE that includes the necessary I2C drivers. The original ST application utilizes two I2C instances for communication between components on the same board. To replicate this functionality, two sets of I2C pins must be initialized. Additionally, the application uses a push-button input and an LED output to demonstrate behavior changes, requiring the configuration of corresponding GPIOs using the MCUXpresso pin configuration tools.   To begin the migration, the main source file from the original ST project—as well as any custom source files not part of the standard ST driver set—should be incorporated into the new NXP project.   The following steps outline the initial project setup in MCUXpresso IDE: Select Create a new C/C++ project. Choose the target MCU (e.g., MCXA156). Click Next. Expand the Drivers section. Select I2C. Click Next. Click Finish.   Upon creation, the project includes a basic "Hello World" example. This template can be used as a starting point. All content within the main source file—except for the initial macro definitions—can be replaced incrementally to integrate the application logic, allowing for a modular and controlled migration process. The next step involves transferring the main source file from the original ST project into the newly created MCUXpresso project. During this process, standard ST includes, and driver references are excluded, unless custom header files are required. In this case, no custom headers are used, so only the core application logic is migrated.   Many of the function calls within the ST source file rely on STM32-specific HAL APIs. These will be reviewed and systematically replaced with equivalent functions from the NXP SDK. The approach involves analyzing each function within the main() routine to understand its purpose and then substituting it with the corresponding implementation in the NXP environment.   Functions quick summary from ST project: Interrupt Priority Configuration Configures the microcontroller’s interrupt system to manage priority levels when multiple interrupts occur simultaneously. Power Peripheral Clock Enablement Activates the clock for the Power (PWR) peripheral, a prerequisite for configuring power management settings. Power Management Setup Initializes power management features of the STM32U5xx microcontroller to optimize energy efficiency and performance across internal components. System Clock Configuration Sets up the timing system of the microcontroller, configuring it to operate at a frequency of 160 MHz. Peripheral Initialization Establishes pin configurations and functional settings for peripherals. In this application, I2C1 is configured as the follower and I2C3 as the leader. LED Initialization Configures the LED to start in a low-active state, turning it on to indicate initial status or communication feedback. GPIO Polling for Button Press Continuously monitors the status of a GPIO input pin. If the button is not pressed, the LED blinks rapidly. Once pressed, the loop exits, and the LED remains on. I2C Communication Start Initiates the I2C communication process from the master side, triggering data transfer between the two I2C interfaces.   How is this handled in the NXP SDK? Interrupt Priority Configuration This functionality is supported through CMSIS core NVIC functions and can be reused directly. It requires defining macros to establish the desired pre-emption priority levels. Clock and Power Configuration These aspects are consolidated within the BOARD_InitBootClocks function, located in clock_config.c under the board folder. This function initializes both the system clock and power settings for the NXP MCU. Peripheral and Pin Initialization Peripheral setup is divided across two functions: BOARD_InitBootPins (in pin_mux.c) handles pin configuration for I2C and GPIO. BOARD_InitBootPeripherals (in peripherals.c) manages I2C peripheral initialization and GPIO interrupt setup. LED Initialization GPIO pins can be configured as output high or low depending on the desired initial state. The LED can be toggled or set using GPIO_PinWrite. GPIO Polling for Button Press This behavior can be replicated using a custom polling function that utilizes GPIO_PinRead to monitor the button state. I2C Communication Start The I2C master communication is initiated using LPI2C_MasterStart, which begins the data transfer process with the designated slave device.     Tackling Clock Initialization using Clock Config Tool The MCUXpresso IDE includes integrated configuration tools, which can be accessed via the Project Explorer by selecting the appropriate option from the drop-down menu located in the upper-right corner of the interface. To configure the system clocks, open the Clocks tool within MCUXpresso IDE. The clock diagram displays the supported configurations for the selected MCU. In this example, the device has a maximum core clock frequency of 96 MHz. As this meets the application's requirements, no modifications to the default clock settings are necessary. To enable the peripheral clocks for the I2C instances, navigate to the clock configuration diagram within the MCUXpresso Config Tools. Scroll through the diagram to locate the available peripherals and activate the I2C modules by selecting the appropriate clock sources. To configure the clock source for the I2C0 and I2C3 peripherals, double-click on the CLKSEL field associated with each instance in the clock configuration diagram. For this setup, select FRO_HF_DIV as the clock source for both I2C0 and I2C3. Next, configure the clock divider by selecting the corresponding field in the clock configuration diagram. The details will appear in the top-right panel of the interface. To enable the clock path to the I2C peripheral, ensure the option “Divider clock is running” is selected. At this stage, the I2C peripheral clocks have been successfully enabled.     To apply and integrate the configuration changes into the project, click “Update Code.” This action will generate the corresponding source files and ensure the new settings are reflected in the project structure.   Tackling Pin Initialization using Pins Config Tool The MCUXpresso IDE includes integrated configuration tools, which can be accessed from the Project Explorer by selecting the appropriate option from the drop-down menu located in the upper-right corner of the interface. To begin configuring the I2C pins, select “Open Pins” from the configuration tool menu within MCUXpresso IDE. Using the filter functionality, search for available pins compatible with I2C instance 0. After reviewing the board schematic, pins P0_16 and P0_17 were selected, as they are accessible via a header. Assign the appropriate I2C functionality to these pins by selecting LPI2C0:SDA and LPI2C0:SCL from the configuration options. Repeat the configuration process for I2C instance 3. Based on the board schematic, pins P3_27 and P3_28 are selected for this instance. Assign the appropriate functionality by selecting LPI2C3:SDA and LPI2C3:SCL within the pin configuration tool. Once the pin selections are made, a configuration table is generated displaying the routing and settings for each pin. Within this table, use the routing details to configure the pins as required. For the I2C pins, enable internal pull-up resistors to ensure proper signal integrity during communication. In addition to configuring the I2C pins, it is necessary to set up two GPIO pins—one for input and one for output. On this board, SW2 (P1_7) is designated for button input functionality, while P3_0 is assigned for LED output. Within the routing details of the pin configuration table, define the behavior for both input and output GPIOs. Based on the application requirements, the output pin should be initialized to a logical low state (select Logical 0) to activate the LED. For the input pin, enable interrupt detection on a falling edge to register button presses accurately. To finalize the configuration and integrate the changes into your project, click “Update Code.” This will generate the necessary source files and apply the selected settings to the project structure. Tackling Peripheral Initialization using Peripheral Config Tool The MCUXpresso IDE features integrated configuration tools, accessible via the Project Explorer. To launch these tools, use the drop-down menu located in the upper-right corner of the interface.   To begin peripheral configuration, select “Open Peripherals” from the configuration tool menu within MCUXpresso IDE. In this view, focus on initializing the GPIO and I2C settings for each instance. To proceed, select “Peripheral Drivers” to access the list of supported drivers available for the target device   GPIO1 Configuration To filter the available peripheral options, enter “GPIO” in the search field within the Peripheral Drivers view. Once the relevant options are displayed, click “OK” to proceed with the GPIO configuration. To enable the interrupt functionality for P1_7, which is assigned to the button input, begin by selecting a new peripheral driver. Use the filter to search for GPIO, then choose the appropriate driver to activate the GPIO1 interrupt handler. I2C3 Leader/Master Configuration To configure the I2C peripheral, filter the available options by entering “I2C” in the search field within the Peripheral Drivers view. Once the relevant driver is displayed, select the appropriate one for your application and click “OK” to proceed. Configure I2C3 as the master (leader) device and enable interrupt-driven data transfer. This setup allows the I2C3 instance to initiate communication and handle data transmission using interrupt mechanisms for improved responsiveness and efficiency. Additionally, enable the interrupt handler for the I2C3 peripheral. Configure the appropriate priority level and activate the Transmit Data Ready flag to support interrupt-driven data transmission. I2C0 Follower/Slave Configuration To configure the I2C0 follower peripheral, filter the available drivers by entering “I2C” in the search field within the Peripheral Drivers view. Once the relevant driver is displayed, select the appropriate one and click “OK” to proceed with the configuration. Configure I2C0 as the slave (follower) device. Enable the interrupt-driven transfer method and specify the slave address to be used for communication. This setup allows the I2C0 instance to respond to master requests and handle data reception via interrupts. Additionally, enable the interrupt handler for the I2C0 peripheral. Configure the appropriate priority level, validate the assigned follower address, and activate the Receive Data Ready flag to support interrupt-driven data reception. To apply the configured settings and integrate them into the project, click “Update Code.” This action will generate the necessary source files and ensure that all peripheral and pin configurations are reflected in the project structure. Config Tools Generated Files The MCUXpresso configuration tools automatically generate source code based on the selected settings, streamlining integration into the main application. This generated code includes initialization routines for clocks, pins, and peripherals configured in previous steps. All generated files are organized under the board directory within the project structure. board.c When creating a project using an NXP development board, the default configuration includes initialization of debug UART pins for serial terminal communication. In this case, the UART functionality is not required, and the corresponding function in board.c will not be used. clock_config.c This file contains all system clock configurations. Use the BOARD_InitBootClocks function to initialize the clock frequency and power mode settings. For this application, the system is configured to operate at 96 MHz. peripherals.c This file includes initialization code for peripherals configured via the Config Tools. In this example, it contains setup routines for both I2C instances and the GPIO interrupt. While the BOARD_InitPeripherals function can be used, it is often more effective to selectively integrate the generated code into specific locations within the application to align with the required execution sequence. pin_mux.c This file defines all pin configurations selected for the application, including I2C and GPIO assignments. Although UART pins are included by default, they are not utilized in this project. Use the BOARD_InitBootPins function to apply the pin settings. Additionally, the original ST application includes a cache initialization function (MX_ICACHE_Init). In the NXP SDK, cache configuration is handled within the startup code. This can be reviewed in the SystemInit function located in system_MCU.c under the device folder. Replacing the Initialization Functions Clock and Pin Initialization In the main function of the NXP-based project, system clocks and pin configurations are initialized using the functions generated by the configuration tools: BOARD_InitBootClocks BOARD_InitBootPins Peripheral Initialization Initialization code for peripherals is sourced from the peripherals.c file generated by the Config Tools. The first block of code sets up the GPIO interrupt handler, including its priority level and NVIC configuration. Following this, the I2C master and slave instances are initialized along with their respective interrupt handlers and priority levels. At this stage, interrupt flags are not yet enabled; they will be activated later within the data transfer function to ensure proper sequencing and avoid premature interrupt triggering. The peripherals.c file includes a code snippet specifically for initializing the LPI2C0 peripheral for slave operations. This code can be selectively integrated into the main function or other appropriate locations within the application to align with the desired execution flow. While the configuration tools in MCUXpresso IDE effectively generate the necessary initialization code, it remains the developer’s responsibility to determine the most appropriate placement of this code within the application. This decision should be guided by the operational sequence required by the specific protocol or peripheral being implemented. For example, in I2C communication, data transfer is managed through interrupts. If the LPI2C0_Init function is used without consideration for timing, interrupts may trigger prematurely, resulting in incomplete or mismanaged transactions. To ensure proper execution, the recommended sequence is: Initialize the peripheral and its associated interrupt handler. Start the I2C transaction. Enable interrupts for both master and slave operations. In this application, the initialization is performed within the main() function, while the interrupt flags are selectively enabled later within the Handle_I2C_Master function to maintain correct timing and control. Replacing the Action Functions   SYSTICK Initialization The SYSTICK timer is configured to support delay operations within the application, such as controlling the LED blinking rate. Detailed instructions for initializing SYSTICK are provided in the following sections. Button Polling and LED Control This functionality is implemented through a custom function that continuously polls the button input. While waiting for user interaction, the LED toggles to indicate readiness. Once the button is pressed, the LED remains steadily lit, signaling progression to the I2C data transfer phase. I2C Master Handling The Handle_I2C_Master function is implemented using the driver APIs provided for the I2C peripheral in the NXP SDK. This function initiates the I2C transaction and manages the communication sequence. Interrupt handlers for both master and slave I2C instances are derived from the peripheral initialization code. At this stage, relevant interrupt flags are selectively enabled to support the specific behaviors required by the application. WaitForUserButtonPress Function To begin customizing the GPIO interrupt handler, open the Peripherals Config Tool within MCUXpresso IDE. From there, you can copy the auto-generated IRQ handler for GPIO, which serves as a reliable starting point. This code can then be modified to suit the specific requirements of your application. To return to the code editor after configuring peripherals, click the “Develop” button located in the upper-right corner of the MCUXpresso IDE. Once in the development environment, paste the copied IRQ handler code into the main source file—ideally near the top—for easier access and organization. Modifications were made to include a control variable within a while loop, allowing the application to pause execution until a button press is detected. This ensures that the program proceeds only after user interaction, aligning with the intended flow of the application. The WaitForUserButtonPress function utilizes GPIO toggle and write operations to control the LED state, along with a delay mechanism to manage the blinking interval during the polling loop. To implement the delay, the SYSTICK timer is initialized and configured accordingly. Additionally, a global counter variable is introduced, along with the corresponding SYSTICK interrupt handler, to support time-based operations within the application. Within the main() function, the SYSTICK timer initialization should be added prior to the button polling logic. This ensures that the delay mechanism is fully operational before entering the loop that waits for user input. The finalized WaitForUserButtonPress function will include: GPIO operations to toggle and control the LED state. A while loop that continuously checks the button state and proceeds only upon detection of a press event. The GPIO_* APIs are part of the NXP GPIO driver library and are used for various operations such as initialization, pin control, and interrupt handling. The macros highlighted in the code—typically shown in pink within the IDE—are generated by the Config Tools and defined in the pin_mux.h header file. The delay functionality used in the application is implemented through a custom SYSTICK-based function, as previously described. To explore the full set of available GPIO APIs, refer to the fsl_gpio.h header file. This file provides comprehensive support for GPIO operations, including port and pin-level control, configuration, and interrupt management. Customizing the I2C Interrupt Handlers To customize the I2C interrupt handlers in a manner similar to the GPIO handler, begin by opening the Peripherals Config Tool in MCUXpresso IDE. From there, locate and copy the auto-generated IRQ handler for I2C0. This serves as a foundational template that can be modified to meet the specific requirements of the application. To return to the code editor, click the “Develop” button located in the upper-right corner of the MCUXpresso IDE. Once in the development environment, paste the copied I2C interrupt handler code into the main source file—preferably near the top—for better organization and accessibility. Repeat the same process for I2C3 by copying its auto-generated interrupt handler from the Peripherals Config Tool. This handler can then be used as a base for customization, similar to the approach taken with I2C0. Consolidating I2C Interrupt Handlers In the original ST-based project, each I2C instance utilized two separate interrupt handlers: one for standard operations and another for error handling. However, the NXP MCU used in this migration provides a single interrupt vector per I2C instance, which handles both standard and error conditions. As a result, the functionality of the original four handlers must be consolidated into two—one for each I2C instance. This requires a careful review of the original interrupt logic to ensure that all relevant flags and behaviors are preserved in the merged implementation. For example, the slave handler in the original project checks for an address match flag and, upon detection, verifies readiness to receive data. The equivalent behavior in the NXP environment is implemented by monitoring the appropriate status flags within the unified interrupt handler, ensuring that both address recognition and data reception are handled correctly. Slave Handler The I2C slave interrupt handler is triggered when the master device addresses the slave at 0x7E. Upon detecting this address match, the slave acknowledges the request and prepares to receive incoming data. The second part of the handler manages the data reception process. It handles each byte transmitted by the master, monitors for a NACK (Not Acknowledge) condition to signal the end of transmission, and stores the received data into a designated buffer. This ensures that the slave processes the communication sequence correctly and terminates the transfer gracefully once all data has been received. Master Handler The I2C master interrupt handler monitors the Master Transfer Ready flag, which indicates that the peripheral is prepared to transmit the next byte of data. Upon detecting this condition, the handler checks the transmit buffer to determine if additional data remains to be sent. A counter is used to track the progress of the transmission. Using the appropriate Master Send operation, the handler transmits the next byte and advances the buffer pointer. When the final byte is sent, the handler issues a STOP condition to signal the completion of the data transfer sequence. Handle_I2C_Master Function The Handle_I2C_Master function is responsible for initiating and managing the I2C communication process. It begins by issuing a MasterStart command to initiate communication with the slave device at the specified address. Upon successful acknowledgment from the slave, the data transfer is handled through the corresponding interrupt routines. This function also initializes the interrupt handlers for both the master and slave I2C instances. As previously noted, it is essential to enable interrupts after the master initiates communication to prevent premature interrupt triggering, which could disrupt the transaction sequence. Once the data transfer is complete and the slave has received all expected bytes, the function concludes by setting the LED to a steady state—indicating successful execution and the end of the application flow. Conclusion Migrating an application from the STM32 development environment to the NXP MCX platform using MCUXpresso IDE involves a structured and methodical approach. By leveraging the integrated configuration tools and understanding the functional equivalence between STM32 and NXP SDK components, developers can effectively transition their applications while maintaining performance and functionality. This guide has outlined the key steps involved in replicating an I2C-based application, including project setup, peripheral configuration, pin and clock initialization, and interrupt handling. While the tools provide a strong foundation through auto-generated code, careful consideration must be given to the sequencing and integration of initialization and runtime logic to ensure reliable operation. With a clear understanding of both environments and thoughtful adaptation of application logic, developers can streamline the migration process and take full advantage of the capabilities offered by the NXP MCX platform.    

In order to recover your board, you need to accomplish the following: Ensure that your PC successfully enumerates the LinkServer debugger under the COM ports. Confirm that you can attach to the running code on the board. When attempting to program the board, the following error appears:   The device stops during initialization because the value of SIM_CHIPCTL is not set to its default after reset. This happens because SRAMU and SRAML are retained across resets, which causes a flash initialization error. To resolve this issue, modify the debug script to override the SIM_CHIPCTL register with its default value: 0x0030_0000. Locate the file MCXE24x_connect.scp. If you are using the default installation path, it should be located at: C:\NXP\LinkServer_YourVersion\binaries\Scripts   Open the file and add the line "Poke32 this 0x40048004 0x00300000" I recommend do it after the "Release NRESET" message.     Note: You need to add a number to each line of code    After making this change, you should be able to program your MCX E24x board as usual.

Overview NXP FRDM-MCXN947 board is a low-cost design and evaluation board based on the MCXN947 device. NXP provides tools and software support for the MCXN947 device, including hardware evaluation boards, software development integrated development environment (IDE), sample applications, and drivers. The board is equipped with Ethernet PHY, and also supports camera modules and NXP's low-cost LCD module PAR-LCD-S035.   In this article, we will explore how to simultaneously implement Ethernet connection transmission and image acquisition using a camera on the MCXN947 board. Hardware Environment Development Board: FRDM-MCXN947 Display: 3.5" TFT LCD (P/N PAR-LCD-S035) Camera: OV7670 Network Cable: RJ45 Software Environment IDE: MCUXpresso IDE v11.9.0 SDK: MCUXpresso SDK Builder (nxp.com) Pin Configuration and Multiplexing When designing circuits, attention must be paid to avoiding pin conflicts, that is, ensuring that the same pin is not configured to perform conflicting functions at different times. When configuring pin functions, it is necessary to consider whether their electrical characteristics (such as voltage range, current drive capability, etc.) meet the requirements of the peripherals. When writing software, it is necessary to consider the support for pin multiplexing in different versions of MCU firmware or library files to ensure software compatibility and stability. Import the " lwip_examples " -> " lwip_ping_bm " project from the FDRM-MCXN947 SDK, open the board -> pin_mux.c file, and you can see the pin configuration for Ethernet connection as shown in the table below: Pin Name Pinmux Assignment P1_4 ALT9 - ENET0_TX_CLK P1_5 ALT9 - ENET0_TXEN P1_6 ALT9 - ENET0_TXD0 P1_7 ALT9 - ENET0_TXD1 P1_8 ALT9 - ENET0_TXD2 P1_9 ALT9 - ENET0_TXD3 P1_13 ALT9 - ENET0_RXDV P1_14 ALT9 - ENET0_RXD0 P1_15 ALT9 - ENET0_RXD1 P1_20 ALT9 - ENET0_MDC P1_21 ALT9 - ENET0_MDIO   Download the schematic of the MCXN947 board from NXP's official website, and find the modules corresponding to Camera and FlexIO LCD, as shown below:   FlexIO is a flexible input/output (I/O) technology developed by NXP, used to provide high-speed, programmable communication capabilities between microcontrollers (MCU) and external devices. It allows developers to configure the FlexIO module inside the microcontroller to simulate various communication protocols and develop custom protocols. Note: This LCD only supports 3V I/O voltage, so when configuring all pins on this connector, you must ensure they are all set to 3V3 operation mode. The following diagram shows the working principle of the SDK example, where the camera collects images and transmits them to the LCD display: It can be seen that the LCD module does not have any pin conflicts with the pins required for Ethernet and Camera functions, while the pins required for configuring the Camera module are duplicated with Ethernet. The pin reuse can be found in the datasheet provided on the NXP official website as shown in the following table: Pin Name Pinmux Assignment P0_4 ALT0 - P0_4 P0_5 ALT0 - P0_5 P1_4 ALT7 - SmartDMA_PIO0 P1_5 ALT7 - SmartDMA_PIO1 P1_6 ALT7 - SmartDMA_PIO2 P1_7 ALT7 - SmartDMA_PIO3 P1_10 ALT7 - SmartDMA_PIO6 P1_11 ALT7 - SmartDMA_PIO7 P1_18 Default-PIO-Low P1_19 Default-PIO-High P2_2 ALT1 - CLKOUT P3_2 ALT2 - FC7_P0 P3_3 ALT2 - FC7_P1 P3_4 ALT7 - SmartDMA_PIO4 P3_5 ALT7 - SmartDMA_PIO5 As seen above, pins P1_4, P1_5, P1_6, and P1_7 conflict directly with Ethernet pins. Since Ethernet pins are fixed to the RJ45 PHY, the Camera interface must be reassigned to alternate pins. From the datasheet, P3_0, P3_1, P3_2, and P3_3 can serve as alternatives. However, P3_2 and P3_3 are already used for I²C. To resolve this, they are reassigned to P3_8 and P3_7 respectively (using kPORT_MuxAlt3). The updated pin mapping is shown below: Previous Pin Current Pin Pinmux Assignment P1_4 P3_0 ALT7 - SmartDMA_PIO0 P1_5 P3_1 ALT7 - SmartDMA_PIO1 P1_6 P3_2 ALT7 - SmartDMA_PIO2 P1_7 P3_3 ALT7 - SmartDMA_PIO3 P3_2 P3_8 ALT3 - FC7_P0 P3_3 P3_7 ALT3 - FC7_P1   Implementation The reassigned pins (P3_0, P3_1, P3_7, P3_8) are not exposed on the board’s headers, but the schematic shows that they are connected to test pads TP12, TP31, TP18, and TP16. The camera can be wired to these pads directly.   Pin Name Solder Pad P3_0 TP12 P3_1 TP31 P3_7 TP18 P3_8 TP16     Integrate the smartdma_camera_flexio_mculcd example from display_examples into the lwip_ping_bm project. Merge .c and .h files from board , drivers , component , and source folders. Add these folders to the include path under Project -> Properties -> C/C++ Build -> Settings -> Includes .   After integration, compile and flash the project to the board. The output is shown in the images.   Conclusion The Ethernet and Camera functions can be simultaneously implemented on the MCX N947 board. The lwip_ping_bm demo showcases ICMP-based Ping functionality using the lwIP TCP/IP stack. It periodically sends ICMP echo requests to a PC and processes the replies. The smartdma_camera_flexio_mculcd demo demonstrates how to use SmartDMA to capture image data frame-by-frame from the OV7670 camera and display it on the ST7796S LCD panel via FlexIO. By reconfiguring and multiplexing pins, simultaneous use of Ethernet and Camera on the MCX N947 is achievable.  

1. Introduction During recent customer technical support, we have find that power supply design issues frequently occur when using MCXN94X/MCXN54X products with HLQFP 100-pin packaging. To address this, we have developed this design guide specifically for 100-pin packaged chips, based on the power supply design diagrams provided in the MCX Nx4x Power Management User Guide (UG10101). Description of Package Types The MCXNx4x series currently includes three package types: VFBGA 184-pin HDQFP 172-pin HLQFP 100-pin The power supply design solutions in the User Guide(UG10101) primarily target the 172-pin and 184-pin packages. 2. Special Design Requirements for HLQFP 100-Pin Packages 2.1 Power Supply Design Solution for HLQFP 100-Pin Packages (LDO_CORE Mode) When using a 100-pin MCXNx4x chip and selecting the LDO_CORE mode (with DCDC_CORE disabled), the power supply design shall comply with the following specifications: Key Design Differences 1)Shared Power Pin Characteristics In the 100-pin package, VDD_DCDC and VDD_LDO_SYS share the same pin. When DCDC_CORE is turned off, DCDC_LX must be left floating, and the DCDC function must be disabled through software configuration. 2) Port Power Supply Design The power supply pin Vdd_p2 for PORT2 shares a single pin with VDD. The 100-pin packaged chip cannot provide independent power supply to PORT2; instead, it must be uniformly powered by VDD, consistent with the power supply configuration for PORT0/PORT1. 2.2 Power Supply Design Solution for 100-Pin Packages (DCDC_CORE Mode) If the DCDC_CORE mode is used (with LDO_CORE turned off), the 100-pin chip can directly refer to the MCX Nx4x Power Management User Guide (UG10101). However, special attention must be paid to the following: PORT2 still cannot be supplied with independent power and must adhere to the port power supply design requirements specified above. 3.Technical Support If you have any issues during the power supply design of MCXNx4x series chips, please feel free to leave a message for communication at any time.   Thanks for Yang Zhang's help with the review.  

1.Overview The NXP MCXN947 is a high-performance microcontroller that supports booting from either internal or external Flash memory. For most embedded applications, the on-chip Flash provides sufficient capacity to host both code and resources. However, in domains such as AI, image processing, or speech recognition—especially when deploying large neural network models with the eIQ toolchain—the size of the models can easily exceed the available internal Flash space. Although the MCXN947 supports executing directly from external Flash (XIP), the system typically boots from a fixed entry point in either internal or external Flash. This raises the question: can we combine the best of both worlds by booting from internal Flash while placing large resources or code segments in external Flash for direct execution? This article presents a demo implementation of exactly such a hybrid “internal boot + external XIP execution” scheme. The approach preserves fast and flexible system startup, while significantly expanding available storage capacity—ideal for hosting large AI models. Hardware Environment: Development Board: FRDM-MCXN947 Software Environment: IDE: MCUXpresso IDE v11.9.0 SDK: SDK Builder | MCUXpresso SDK Builder (nxp.com) Base Project: frdmmcxn947_tflm_cifar10 2. External Flash Hardware Configuration and Pin Assignment The FRDM-MCXN947 board integrates an external 8-line Octal Flash, connected to the MCU’s FlexSPI interface. The key pin assignments are as follows: Octal Flash Pin Function MCXN947 Connection HyperRAM Chip Pin Function Connected to MCXN947 CS SPI communication chip select signal P3_0 / FLEXSPI0_A_SS0_b SCK SPI communication clock signal P3_7 / FLEXSPI0_A_SCLK DQS SPI communication data strobe signal P3_6 / FLEXSPI0_A_DQS DQ0 OSPI data signal D0 P3_8 / FLEXSPI0_A_DATA0 DQ1 OSPI data signal D1 P3_9 / FLEXSPI0_A_DATA1 DQ2 OSPI data signal D2 P3_10 / FLEXSPI0_A_DATA2 DQ3 OSPI data signal D3 P3_11 / FLEXSPI0_A_DATA3 DQ4 OSPI data signal D4 P3_12 / FLEXSPI0_A_DATA4 DQ5 OSPI data signal D5 P3_13 / FLEXSPI0_A_DATA5 DQ6 OSPI data signal D6 P3_14 / FLEXSPI0_A_DATA6 DQ7 OSPI data signal D7 P3_15 / FLEXSPI0_A_DATA7 The configuration code begins with  /* Enables the clock for PORT3: Enables clock */ CLOCK_EnableClock(kCLOCK_Port3); const port_pin_config_t port3_0_pinB17_config = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Low internal pull resistor value is selected. */ kPORT_LowPullResistor, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Passive input filter is disabled */ kPORT_PassiveFilterDisable, /* Open drain output is disabled */ kPORT_OpenDrainDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as FLEXSPI0_A_SS0_b */ kPORT_MuxAlt8, /* Digital input enabled */ kPORT_InputBufferEnable, /* Digital input is not inverted */ kPORT_InputNormal, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORT3_0 (pin B17) is configured as FLEXSPI0_A_SS0_b */ PORT_SetPinConfig(PORT3, 0U, &port3_0_pinB17_config);   The same procedure is repeated for all FlexSPI pins. 3. FlexSPI Module Initialization To enable XIP from external Flash, the FlexSPI peripheral must be properly initialized.   3.1. Configure the FlexSPI clock /* Flexspi frequency 150MHz / 2 = 75MHz */ CLOCK_SetClkDiv(kCLOCK_DivFlexspiClk, 2U); CLOCK_AttachClk(kPLL0_to_FLEXSPI); /*!< Switch FLEXSPI to PLL0 */ 3.2 Initialize the FlexSPI driver Integrate the FlexSPI driver, which is provided in the SDK, into the project, /*Get FLEXSPI default settings and configure the flexspi. */ FLEXSPI_GetDefaultConfig(&config); /*Set AHB buffer size for reading data through AHB bus. */ config.ahbConfig.enableAHBPrefetch = true; config.rxSampleClock = EXAMPLE_FLEXSPI_RX_SAMPLE_CLOCK; config.ahbConfig.enableAHBBufferable = true; config.ahbConfig.enableAHBCachable = true; FLEXSPI_Init(base, &config); /* Configure flash settings according to serial flash feature. */ FLEXSPI_SetFlashConfig(base, &deviceconfig, FLASH_PORT); #if defined(EXAMPLE_FLASH_RESET_CONFIG) uint32_t TempFastReadSDRLUTCommandSeq[4]; memcpy(TempFastReadSDRLUTCommandSeq, FastReadSDRLUTCommandSeq, sizeof(FastReadSDRLUTCommandSeq)); #endif   4. Configure MCUXpresso Project to Support Octal Flash In MCUXpresso IDE, go to MCU Settings > Memory, and add a new memory region: Name: OSPI_FLASH (or OCTAL_FLASH) Start Address: Set according to the external flash address connected to your chip. According to the user manual, the FLEXSPI start address is 0x80000000. Size: For example, 128MB Next, select the corresponding external flash driver provided by NXP. The FRDM_MCXN947 board is connected to the mt35xu512aba flash, which supports SFDP, so we can choose MCXN9xx_SFDP_FlexSPI.cfx. After adding it, you will see the memory details displayed. 5. Add Linker Script and Migrate Model Data 5.1 Create Linker Script Fragments Add two files to the linkscripts/ folder in your project: text.ldt (for code sections) rodata.ldt (for model read-only data) Contents: <#if memory.name=="OSPI_FLASH"> KEEP (*(.model_data*)) KEEP (*(model.o*)) KEEP(*(.text.OSPI_FLASH*)) *(.text.QSPI_FLASH*) *(.text.${memory.alias}*) *(.text.${memory.name}*) </#if> This ensures that model data (e.g., the .model_data section) is properly retained and placed in the XIP (Execute In Place) region. 5.2 Place Model Data in XIP Region Use the following method to place the model into the .model_data section (in C code): __attribute__((section(".model_data"))) const unsigned char model_data[] = { #include "model_data.inc" }; 6. Build and Verify After building the project, the Image Memory Map Report in MCUXpresso IDE will show that parts of the .text and .rodata sections have been successfully placed into the Octal Flash (OSPI_FLASH) region. For example: OSPI_FLASH:      100144 B    262140 KB      0.04% After downloading and running the program, the system boots from internal Flash and successfully reads model data directly from external Flash, completing the AI inference task.   Conclusion Through the configuration steps introduced in this article, the MCXN947 successfully implements a hybrid storage solution combining internal boot with external XIP execution. This approach retains the advantage of fast boot speed while significantly expanding the available storage capacity for programs and models, providing strong support for deploying complex AI models. For resource-constrained MCU platforms, this architecture is not only a practical and feasible choice, but also represents an optimized strategy that is likely to be widely adopted in future embedded AI applications.

NXP officially launched the MCX C series chips in July 2024. As a Cortex-M0+ MCU with high cost-effectiveness, energy efficiency, and security, it strongly supports the upgrade of traditional 8-bit and 16-bit designs. Since its release, the chip has gained rapid favor among customers, with many projects now entering mass production. In practical applications, more and more customers have inquired about how to enter the ISP mode of MCX C series chips and complete firmware updates. We have previously introduced the method using the blhost tool (see MCX C: How to Enter the ROM Bootloader to Update the Firmware - NXP Community). It is worth noting that the MCUXpresso Secure Provisioning (SEC) tool now supports MCX C series chips starting from version 25.03. The operation process is described in detail below. Refer to the attached PDF file for details.

Introduction This article describes the method to update the Boot ROM patch on MCX N23x devices to patch version T1.0.7 Before beginning, note that this process can only be performed via ISP mode of the device and can only be performed using a command line method.  The NXP Secure Provisioning tool uses command line operations in its backend and does make these available to the user.  For directions on how to access the command line interface through the Secure Provisioning tool, consult your Secure Provisioning Tool documentation.    Note: If in development lifecycle, perform a mass erase prior to updating ROM. Mass erase can be done by nxpdebugmbox -i pyocd cmd -f mcxn236 erase command from SPSDK.  Command line blhost method ISP Pin Method 1) With the device powered off, assert the ISP pin (GPIO P0_6) by pulling this pin low. 2) With ISP pin still asserted, power on the device.   3) After the device has fully powered on (at least as long as the t_POR time quoted in the Power mode transition operating behaviors table of the MCX N23x datasheet), release the ISP pin.  4) Open a command prompt and set the working directory to your blhost installation. 5) Verify that the current version of ROM patch is not T1.0.7 using this command: blhost <interface> <parameters> -- get-property 24.  a) Where <interface> should be replaced with the code for the interface type and <parameters> should be replaced with the parameters of that interface.  For more information on this syntax, refer to the blhost User's Guide.   6) Execute this command:  blhost <interface> <parameters> receive-sb-file <path_to_file_location>/mcx_n11_a0_prov_fw_rp_v7.0.sb3.  7) Repeat steps 1 - 5 to verify that the ROM version is T1.0.7.  ISP Pin Unavailable - SWD Method 1) Connect to target via SWD 2) Open the secure provisioning tool 3) Select the serial interface window and select the command line button 4) Send the following command: nxpdebugmbox -i pyocd ispmode -m 0 5) Verify that the current version of ROM patch is not T1.0.7 using this command: blhost <interface> <parameters> -- get-property 24.  a) Where <interface> should be replaced with the code for the interface type and <parameters> should be replaced with the parameters of that interface.  For more information on this syntax, refer to the blhost User's Guide.   6) Execute this command:  blhost <interface> <parameters> receive-sb-file <path_to_file_location>/mcx_n11_a0_prov_fw_rp_v7.0.sb3 7) Repeat steps 1 - 5 to verify that the ROM version is T1.0.7. 

Introduction This article describes the method to update the Boot ROM patch on MCX N94x / N54x devices to patch version T1.1.5.   Before beginning, note that this process can only be performed via ISP mode of the device and can only be performed using a command line method.  The NXP Secure Provisioning tool uses command line operations in its backend and does make these available to the user.  For directions on how to access the command line interface through the Secure Provisioning tool, consult your Secure Provisioning Tool documentation.  Command line blhost method ISP Pin Method 1) With the device powered off, assert the ISP pin (GPIO P0_6) by pulling this pin low. 2) With ISP pin still asserted, power on the device.   3) After the device has fully powered on (at least as long as the t_POR time quoted in the Power mode transition operating behaviors table of the MCX N94x / N54x datasheet), release the ISP pin.  4) Open a command prompt and set the working directory to your blhost installation. 5) Verify that the current version of ROM patch is not T1.1.5 using this command: blhost <interface> <parameters> -- get-property 24.  a) Where <interface> should be replaced with the code for the interface type and <parameters> should be replaced with the parameters of that interface.  For more information on this syntax, refer to the blhost User's Guide.   6) Execute this command:  blhost <interface> <parameters> receive-sb-file <path_to_file_location>/mcx_n10_a1_prov_fw_rp_v5.0.sb3.  7) Repeat steps 1 - 5 to verify that the ROM version is T1.1.5.  ISP Pin Unavailable - SWD Method 1) Connect to target via SWD 2) Open the secure provisioning tool 3) Select the serial interface window and select the command line button 4) Send the following command: nxpdebugmbox -i pyocd ispmode -m 0 5) Verify that the current version of ROM patch is not T1.1.5 using this command: blhost <interface> <parameters> -- get-property 24.  a) Where <interface> should be replaced with the code for the interface type and <parameters> should be replaced with the parameters of that interface.  For more information on this syntax, refer to the blhost User's Guide.   6) Execute this command:  blhost <interface> <parameters> receive-sb-file <path_to_file_location>/mcx_n10_a1_prov_fw_rp_v5.0.sb3 7) Repeat steps 1 - 5 to verify that the ROM version is T1.1.5.         

1. Overview The MCX N947 chip is a highly integrated microcontroller with robust processing capabilities, extensive peripheral support, and advanced security features, making it suitable for various complex applications. One of its critical peripherals is FlexSPI. FlexSPI is an expandable serial peripheral interface mainly used to connect solid-state storage devices such as QuadSPI NOR Flash, QuadSPI NAND Flash, and HyperRAM. FlexSPI is a comprehensive, flexible, high-performance solution that can be configured in different modes to support various storage devices. The NXP FRDM-MCXN947 board is a low-cost design and evaluation board based on the MCXN947 device. NXP provides tools and software support for the MCXN947 device, including hardware evaluation boards, integrated development environment (IDE) software, sample applications, and drivers. By default, the FlexSPI interface on this board connects to an MT35XU512 NOR Flash. In this article, we will explore how to connect HyperRAM to the FlexSPI interface of the MCXN947 board. Hardware environment:   Development Board: FRDM-MCXN947   HyperRAM：W956A8MBYA Software environment:   IDE：MCUXpresso IDE v11.9.0   SDK：SDK Builder | MCUXpresso SDK Builder (nxp.com) 2. HyperRAM Schematic Below is the official eight-line Flash schematic from the FRDM-MCXN947. Since the HyperRAM W956D8MBYA package is a TFBGA 24-Ball 5 x 5 Array, it can be directly replaced. Based on the above schematic, the signal connections for the HyperRAM memory are summarized in Table. HyperRAM Signal Connection Table HyperRAM Chip Pin Function Connected to MCXN947 CS CS Chip Select Signal P3_0/FLEXSPI0_A_SS0_b SCK SCK Clock Signal P3_7/FLEXSPI0_A_SCLK DQS DQS Signal P3_6/FLEXSPI0_A_DQS DQ0 OSPI Data Signal D0 P3_8/FLEXSPI0_A_DATA0 DQ1 OSPI Data Signal D1 P3_9/FLEXSPI0_A_DATA1 DQ2 OSPI Data Signal D2 P3_10/FLEXSPI0_A_DATA2 DQ3 OSPI Data Signal D3 P3_11/FLEXSPI0_A_DATA3 DQ4 OSPI Data Signal D4 P3_12/FLEXSPI0_A_DATA4 DQ5 OSPI Data Signal D5 P3_13/FLEXSPI0_A_DATA5 DQ6 OSPI Data Signal D6 P3_14/FLEXSPI0_A_DATA6 DQ7 OSPI Data Signal D7 P3_15/FLEXSPI0_A_DATA7 3. HyperRAM Configuration Process 3.1 Clock configuration The clock for FlexSPI needs to be correctly configured.   During the programming phase, it is safer to choose a lower frequency; here, we select 75MHz. 3.2 FlexSPI Initialization Configuration Structure Next, we configure the FlexSPI-related settings. We can call FLEXSPI_GetDefaultConfig to obtain some default configurations for the FlexSPI feature structure flexspi_config_t, which has a certain degree of universality and is compatible with most FlexSPI devices. For the W956D8MBYA HyperRAM, on the basis of the default configuration, add the following parameters: config.ahbConfig.enableAHBPrefetch = true; config.ahbConfig.enableAHBBufferable = true; config.ahbConfig.enableReadAddressOpt = true; config.ahbConfig.enableAHBCachable = true; config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackFromDqsPad; (1) enableAHBPrefetch: Whether to enable AHB prefetching. When enabled, FlexSPI reads more data than the current AHB burst read. (2) enableAHBBufferable: Whether to enable AHB write buffer access. After executing a write command, it returns without waiting for its completion, allowing subsequent instructions to continue executing, enhancing system concurrency. (3) enableReadAddressOpt: Controls whether to remove the AHB read burst start address alignment restriction. If enabled, burst read addresses are not restricted by byte alignment. (4) enableAHBCachable: Enables AHB bus cacheable reads. If a hit occurs, data is read from the cache, but data consistency must be ensured. (5) rxSampleClock: The clock source used for reading data. For HyperRAM, HyperRAM provides a read strobe pulse and inputs it through the DQS pin. 3.3 Detailed Explanation of FlexSPI External Device Configuration Structure When FlexSPI communicates with external devices, it often needs to coordinate communication timing with the device, such as clock frequency and data validity duration. NXP's software library provides the flexspi_device_config_t structure specifically for configuring these parameters. typedef struct _flexspi_device_config { uint32_t flexspiRootClk; bool isSck2Enabled; uint32_t flashSize; flexspi_cs_interval_cycle_unit_t CSIntervalUnit; uint16_t CSInterval; uint8_t CSHoldTime; uint8_t CSSetupTime; uint8_t dataValidTime; uint8_t columnspace; bool enableWordAddress; uint8_t AWRSeqIndex; uint8_t AWRSeqNumber; uint8_t ARDSeqIndex; uint8_t ARDSeqNumber; flexspi_ahb_write_wait_unit_t AHBWriteWaitUnit; uint16_t AHBWriteWaitInterval; bool enableWriteMask; } flexspi_device_config_t; (1) flexspiRootClk = 75000000, this parameter matches the previously set FlexSPI clock frequency. (2) flashSize = 0x2000, the size of the Flash in kilobytes. For W956D8MBYA, 64Mb = 8MB = 8 * 1024KB. (3) CSIntervalUnit = kFLEXSPI_CsIntervalUnit1SckCycle, this parameter configures the time unit for the interval between CS signal lines. (4) CSInterval = 2, this parameter configures the minimum time interval for switching between valid and invalid states of the CS signal line, measured in the units defined by the above CSIntervalUnit member. (5) CSHoldTime = 3, this parameter sets the hold time for the CS signal line, measured in FlexSPI root clock cycles. (6) CSSetupTime = 3, this parameter sets the setup time for the CS signal line, measured in FlexSPI root clock cycles. According to the MCXNx4x datasheet,T_CK = 6ns，the minimum T_CSS = 8.3ns，and the minimumT_CSH = 9.8ns。The clock period for 75MHz is approximately 13.3 nanoseconds. Therefore, both CSHoldTime and CSSetupTime should be greater than or equal to 1, So they can be configured to 3 (1) dataValidTime=2，Registers DLLACR and DLLBCR are used to configure the valid data time in communication, with the unit being nanoseconds. (2) columnspace = 3，which is the width of the low-order column address. For this HyperRAM, it uses row and column addresses for access, with a column address width of 3 bits. (3) enableWordAddress = true，this parameter is configured whether the 2-byte addressable function is enabled. Once enabled, HyperRAM will be accessed using a 16-bit data format. (4) AWRSeqIndex = 1，this parameter is the index of the write timing sequence in the LUT. (5) AWRSeqNumber =1，this parameter configures the number of sequences for AHB write commands. (6) ARDSeqIndex = 0，this parameter is the index of the read timing sequence in the LUT. (7) ARDSeqNumber =1，this parameter configures the number of sequences for AHB write commands. (8) enableWriteMask = true，this parameter is used to set whether to drive the DQS bit as a mask when writing to external devices via FlexSPI. This feature is used for address alignment when accessing data widths of 16 bits. 3.4 LUT table configuration Below is a code example of the LUT table configuration for HyperRAM read and write timing. const uint32_t customLUT[CUSTOM_LUT_LENGTH] = { /* Read Data */ [4 * PSRAM_CMD_LUT_SEQ_IDX_READDATA] = FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DDR, kFLEXSPI_8PAD, 0xA0, kFLEXSPI_Command_RADDR_DDR, kFLEXSPI_8PAD, 0x18), [4 * PSRAM_CMD_LUT_SEQ_IDX_READDATA + 1] = FLEXSPI_LUT_SEQ(kFLEXSPI_Command_CADDR_DDR, kFLEXSPI_8PAD, 0x10, kFLEXSPI_Command_DUMMY_RWDS_DDR, kFLEXSPI_8PAD, 0x07), [4 * PSRAM_CMD_LUT_SEQ_IDX_READDATA + 2] = FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_DDR, kFLEXSPI_8PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0x00), /* Write data */ [4 * PSRAM_CMD_LUT_SEQ_IDX_WRITEDATA] = FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DDR, kFLEXSPI_8PAD, 0x20, kFLEXSPI_Command_RADDR_DDR, kFLEXSPI_8PAD, 0x18), [4 * PSRAM_CMD_LUT_SEQ_IDX_WRITEDATA + 1] = FLEXSPI_LUT_SEQ(kFLEXSPI_Command_CADDR_DDR, kFLEXSPI_8PAD, 0x10, kFLEXSPI_Command_DUMMY_RWDS_DDR, kFLEXSPI_8PAD, 0x07), [4 * PSRAM_CMD_LUT_SEQ_IDX_WRITEDATA + 2] = FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_DDR, kFLEXSPI_8PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0x00), }; (1) We are using an 8-line differential HyperRAM, which is utilized on both edges of the clock, hence the number of data lines used for communication with external memory is kFLEXSPI_8PAD. (2) HyperRAM and HyperFlash are memory products designed based on the HyperBus&#8482; interface specification by Cypress Semiconductor. This operand is defined in the specification, therefore the read operation operand is fixed at 0xA0, and the write data operand is fixed at 0x20. (3) CADDR_DDR column address: Since the number of bytes transferred in one transmission must be a multiple of 8, if the row and column addresses you provide exceed the maximum rows and columns of a specific size HyperRAM, FlexSPI will automatically set the higher bits to 0. The table above shows that the lower 16 bits are the column address, with 3 valid bits, and the upper 13 bits are reserved for compatibility and need to be set to 0. Therefore, the timing parameter for the column address here needs to be filled with 16, i.e., 0x10. (4) RADDR_DDR row address: As shown in the figure, if the FLSHxxCR1[CAS] bit is not zero, then the FlexSPI peripheral will split the actual mapped Flash Address (i.e., the memory's own offset address) into a row address FA[31:CAS+1] and a column address [CAS:1] for transmission during transfer timing. For word-addressable flash devices, the last bit of the address is not needed because the flash is read and programmed in two-byte units. FlexSPI considers one word as two bytes; thus, if alignment to two bytes is required, one less bit address is needed. The sum of row and column addresses should be one bit less. W956D8MBYA has 64Mbit, which is 2^26; with 3 bits for the column address, theoretically, 26-1-3=22 bits are needed for the row address to access the entire HyperRAM. Then, align it to 8 bits; otherwise, FlexSPI will pad zeros at the lower bits, which would not be the address we want to access. Therefore, the parameter is 0x18, i.e., 24 bits. 4. Experimental Verification We can use simple AHB read and write operations to verify whether this HyperRAM is functional. The code is as follows. for (i = 0; i < sizeof(s_psram_write_buffer); i++) { s_psram_write_buffer[i] = i; } memcpy((uint32_t*)(EXAMPLE_FLEXSPI_AMBA_BASE), s_psram_write_buffer, sizeof(s_psram_write_buffer)); memcpy(s_psram_read_buffer,(uint32_t*)(EXAMPLE_FLEXSPI_AMBA_BASE) , sizeof(s_psram_read_buffer)); if (memcmp(s_psram_read_buffer, s_psram_write_buffer, sizeof(s_psram_write_buffer)) == 0) { PRINTF("AHB Command Read/Write data successfully !\r\n"); }   When your serial port prints "AHB Command Read/Write data successfully!", it indicates that your FlexSPI connection to the HyperRAM is functioning properly.

1. RS485 hardware connection RS-485 is a multiple drop communication protocol in which the LPUART transceiver's driver is three-stated unless LPUART is driving. The transmitter can uses the RTS_B signal to enable the driver of a transceiver. The polarity of RTS_B can be configured by firmware to match with the polarity of the transceiver's driver enabling signal. The following figure shows the receiver enabling signal asserted. This connection can also connect RTS_B to both DE and RE_B. The transceiver's receiver is disabled when the uart transmitter is sending char. A pullup can pull RXD to a non-floating value during this time. You can refine this option further by operating LPUART in Single-Wire mode, freeing the RXD pin for other uses.     When the uart transmits character via TXD pin, the RTS_b signal is asserted automatically, after the RS-485 transceiver, the urat transmitter can drive the differential signals Y/Z. When the uart dose not transmit character, the RTS_b signal is unasserted, so the RS-485 transceiver is in tr-state, the differential signal Y/Z is NOT driven by this RS-485 transceiver. For receiver part of the RS-485 transceiver, if the RTS_b sigbal is connected to the RE_b pin of receiver of RS-485 transceiver directly or via an inverter depending on the required logic of the RS-485 transceiver , when the uart transmits character, the receiver of  RS-485 transceiver is disabled, the RO pin of the RS485 is in tri-state, so a pull-up resistor is required on the RO pin and the RXD pin of LPUart can not receive any character from it’s own transmitter.  The RTS_B signal can function as hardware flow control, but note the application uses RTS_b signal to control RS485 enabling instead of hardware flow control. )   2. RTS_b pin assigmnet.   For the uart module of MCXN family, the FCx_P0 is RXD pin of UARTx module, the FCx_P1 is TXD pin of UARTx module, the FCx_P2 is RTS_b of UARTx module. For MCXN94x family, the P1_8 pin can function as FC4_P0 or RXD pin of UART4; the P1_9 pin can function as FC4_P1 or TXD pin of UART4; the P1_22 pin can function as FC4_P2 or RTS_b pin of UART4 with setting up PORT1_PCR22[MUX] bits as decimal 3;   3)software 3.1 pin assignment void BOARD_InitPins(void) {     /* Enables the clock for PORT1: Enables clock */     CLOCK_EnableClock(kCLOCK_Port1);       const port_pin_config_t port1_8_pinA1_config = {/* Internal pull-up/down resistor is disabled */                                                     kPORT_PullDisable,                                                     /* Low internal pull resistor value is selected. */                                                     kPORT_LowPullResistor,                                                     /* Fast slew rate is configured */                                                     kPORT_FastSlewRate,                                                     /* Passive input filter is disabled */                                                     kPORT_PassiveFilterDisable,                                                     /* Open drain output is disabled */                                                     kPORT_OpenDrainDisable,                                                     /* Low drive strength is configured */                                                     kPORT_LowDriveStrength,                                                     /* Pin is configured as FC4_P0 */                                                     kPORT_MuxAlt2,                                                     /* Digital input enabled */                                                     kPORT_InputBufferEnable,                                                     /* Digital input is not inverted */                                                     kPORT_InputNormal,                                                     /* Pin Control Register fields [15:0] are not locked */                                                     kPORT_UnlockRegister};     /* PORT1_8 (pin A1) is configured as FC4_P0 */     PORT_SetPinConfig(PORT1, 8U, &port1_8_pinA1_config);       const port_pin_config_t port1_9_pinB1_config = {/* Internal pull-up/down resistor is disabled */                                                     kPORT_PullDisable,                                                     /* Low internal pull resistor value is selected. */                                                     kPORT_LowPullResistor,                                                     /* Fast slew rate is configured */                                                     kPORT_FastSlewRate,                                                     /* Passive input filter is disabled */                                                     kPORT_PassiveFilterDisable,                                                     /* Open drain output is disabled */                                                     kPORT_OpenDrainDisable,                                                     /* Low drive strength is configured */                                                     kPORT_LowDriveStrength,                                                     /* Pin is configured as FC4_P1 */                                                     kPORT_MuxAlt2,                                                     /* Digital input enabled */                                                     kPORT_InputBufferEnable,                                                     /* Digital input is not inverted */                                                     kPORT_InputNormal,                                                     /* Pin Control Register fields [15:0] are not locked */                                                     kPORT_UnlockRegister};     /* PORT1_9 (pin B1) is configured as FC4_P1 */     PORT_SetPinConfig(PORT1, 9U, &port1_9_pinB1_config);       //* PORT1_22 (pin L4) is configured as FC4_P2 with ALT3*/       const port_pin_config_t port1_22_pinC3_config = {/* Internal pull-up/down resistor is disabled */                                                        kPORT_PullDisable,                                                        /* Low internal pull resistor value is selected. */                                                        kPORT_LowPullResistor,                                                        /* Fast slew rate is configured */                                                        kPORT_FastSlewRate,                                                        /* Passive input filter is disabled */                                                        kPORT_PassiveFilterDisable,                                                        /* Open drain output is disabled */                                                        kPORT_OpenDrainDisable,                                                        /* Low drive strength is configured */                                                        kPORT_LowDriveStrength,                                                        /* Pin is configured as FC4_P1 */                                                        kPORT_MuxAlt3,                                                        /* Digital input enabled */                                                        kPORT_InputBufferEnable,                                                        /* Digital input is not inverted */                                                        kPORT_InputNormal,                                                        /* Pin Control Register fields [15:0] are not locked */                                                        kPORT_UnlockRegister};        /* PORT1_9 (pin B1) is configured as FC4_P1 */        PORT_SetPinConfig(PORT1, 22U, &port1_22_pinC3_config); }   The   //P1_22 function as RTS_b signal void RTS_b_init(LPUART_Type *base) {  base->MODIR |=LPUART_MODIR_TXRTSE(1); //                   (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSE_SHIFT)) & LPUART_MODIR_TXRTSE_MASK)   }   4)uart timing tested by scope   Conclusion: From the above scope screen shot, you can see that when the uart transmitter sends char, the RTS_b signal becomes low, so it can function as RS485 transceiver enabling signal.  

MCUXN947 Security Configuration (Secure Boot + Lifecycle)   1. Introduction This application note aims to guide developers on configuring Secure Boot and Lifecycle on the MCXN947 microcontroller. The goal is to ensure security during mass production, prevent code theft and tampering, and allow for secure firmware updates. By following this document, developers can better understand and implement best practices for secure boot and firmware updates. 2. Implementation Overview 2.1 Secure Boot (SB) Introduction The Secure Binary (SB) container brings secure and easy way to upload or update firmware in embedded device during either the manufacturing process or end-customer's device lifecycle. An SB file is a command-based firmware update image. The SB file can be considered a script (commands and data), with the ROM acting as the interpreter. The ROM supports version 3.1 of the SB image format. The SB container in version 3.1 (SB3.1) uses the latest cryptographic algorithms to ensure the authenticity and confidentiality of the carried firmware. The boot time and security level, which fit the best for the required use case, control the various available security configurations. The digital signature based on Elliptic Curve Cryptography (ECC) ensures the authenticity of the SB3.1 container. The use of the Advanced Encryption Standard (AES) in Cipher Block Chaining (CBC) mode ensures the confidentiality of the SB3.1 container. 2.2 Lifecycle Introduction The lifecycle state of a chip reflects its actual state and is used to guide how the chip protects its hosted assets at specific times. For example, when a project is completed, during mass production, or when the device is in use by the end customer, the chip's access permissions are much more restricted compared to the development stage. The MCXN947 microcontroller supports multiple secure lifecycle states. For detailed information, refer to the "Lifecycle States" chapter in the MCX Nx4x Security Reference Manual. Note that the lifecycle state is monotonic, meaning it can only increase, and access permissions become more restrictive. This document focuses on field configuration (In-field) to ensure security after deployment. 2.3 MCUXpresso Tool Introduction The MCUXpresso Security Configuration Tool is a GUI-based application that simplifies the generation and configuration of bootable executable files on NXP MCUs. This tool can be used to generate SB3.1 files and deploy MCU security configurations. 3. Implementation Steps 3.1 Preparation Software Two image files: frdmmcxn947_led_blinky_red.s19 and frdmmcxn947_led_blinky_green.s19 MCUXpresso Secure Provisioning Tool v9.0 (SPT Tool) Blhost Hardware FRDM-MCXN947 Development Board 2 USB Type-C Cables Computer 3.2 Steps 3.2.1 Restore MCU to Default Configuration Power on MCU with ISP Mode Hold the ISP key and power on the MCU (POR). This document uses the ISP-USB interface, so connect the USB cable to J11 (HS-USB) port. Configure CMPA and CFPA to Default State Open the SPT Tool, create a new workspace, and select the corresponding chip. Configure as follows:   Program CMPA and CFPA OK -> Build image, Write image, to burn the configured default CMPA and CFPA into the MCU. Erase Entire Flash Connect the board's debugging interface MCU-link via USB. Select the debug probe in the SPT Tool. After a successful connection, use Erase to erase the entire flash. The chip is restored to its default state with no enabled security configurations. 3.2.2 Configure Secure Boot and Lifecycle for Field Mode (In-field)  Generate Secure Boot Keys Select the PKI management interface -> Generate Keys... -> Generate   Configure Image File Open the "Build image" interface and configure as follows: Boot: Select Encrypted (PRINCE/IPED) and signed Source executable image: Select the application image file frdmmcxn947_led_blinky_green.s19 Start address: 0x00000000 Firmware version: 1 Authentication key: Choose any one of the 4 options CUST_MK_SK: Click Random to generate a random number OEM seed: Click Random to generate a random number   Configure CMPA and CFPA Open CMPA and CFPA, and configure to enable security: Generate Configuration Files and Image File After configuration, build the image to generate CMPA, CFPA configuration files, and the SB3-formatted image file.   3.2.3 Program Application Program Configuration Files and Image File Open the "Write image" window, click "Write image" to program the configuration files and the SB image file.   Verify Application Power on the board again, and you should see the green LED flashing, indicating that the application is running normally. Then, hold the ISP key and perform a software reset of the board (note that this must be a software reset for the CFPA lifecycle configuration to take effect; a power-on reset will not activate the CFPA configuration). If the development is complete and in the production stage, and OTP is used to manage the lifecycle, any reset will detect the OTP configuration. At this point, secure boot is enabled, and the lifecycle is configured for field mode. Therefore, the chip no longer supports SWD interface debugging or reading flash content via ISP. To update the flash program, only a valid SB3 file can be burned. 3.2.4 Update Application Create a New SB3 File Compile the SDK example frdmmcxn947_led_blinky to generate a .bin file or s19 file. For all supported formats by the SPT tool, refer to the SPT manual. Here, use the s19 file format frdmmcxn947_led_blinky_red.s19. Open the SPT tool and use the workspace created for the first application image file. This will import the necessary keys directly. Then, import frdmmcxn947_led_blinky_red.s19. The Image firmware version should be greater than 0. Since we have not configured Set minimal firmware version, the minimum version is 0. This involves the anti-rollback feature, which will be explained in detail later. After configuration, hold the ISP key and power on the board to restart. Then, build the image to generate frdmmcxn947_led_blinky_red.sb. Program the New SB3 File Use the blhost receive-sb-file command to burn the file: blhost.exe -u 0x1fc9 0x014f receive-sb-file frdmmcxn947_led_blinky_red.sb After burning, restart the MCU. The red LED flashing indicates that the firmware update was successful. 3.2.5 Verify Security Features After enabling secure boot and configuring the lifecycle for field mode, the MCU cannot read the flash via SWD or ISP, ensuring the security of the customer's code against theft and tampering. To test if the configuration is successful, you can use the SWD and ISP interfaces. You should find that the SWD interface cannot connect, and while the ISP interface can connect, it cannot read or write. Note that before testing, you need to hold the ISP key and perform a software reset (not a power-on reset).     4. Notes By following this document, developers can learn how to configure and manage the security lifecycle on the MCXN947 microcontroller, ensuring the security and reliability of the device at different stages. Following the steps in this document can effectively achieve secure boot and operation, as well as firmware updates.  

Part 1: Introduction The eIQ Neutron Neural Processing Unit (NPU) is a highly scalable accelerator core architecture that provides machine learning (ML) acceleration. Compared to traditional MCUs like the Kinetis series and LPC series, the MCX N series marks the first integration of NXP's eIQ® Neutron NPU for ML acceleration. The eIQ Neutron NPU offers up to 38 times faster machine learning inference performance compared to a standalone CPU core. Specifically, the MCX N94 can execute 4.8G (150MHz * 4 * 4 * 2) INT8 operations per second.   Hardware Environment: Development Board: FRDM-MCXN947 Display: 3.5" TFT LCD (PAR-LCD-S035) Camera: OV7670 Instructions for putting together demo   Software Environment: eIQ Neutron SDK MCUXpresso IDE Label CIFAR10 Image Demo on NXP App Code Hub   Part 2: Basic Model Classification Training and Deployment The main content is divided into three steps: model training, model converting, and model deployment. 1. Dataset Preparation A fruit dataset is prepared for a simple demonstration of binary classification between apples and bananas. The training set and test set are split in an 8:2 ratio.  2. Use a model generation tool like eIQ Model Creator or TensorFlow to train a model based on the image dataset.  3. Convert to TensorFlow Lite for Neutron (.tflite) Unzip the eIQ Neutron SDK and use the neutron-converter command line tool to convert the trained TensorFlow Lite model to an eIQ Neutron enabled TFLite model: neutron-converter --target mcxn94x --input fruit_model.tflite --output fruit_model_npu.tflite    4. Deploy the Model to the Label CIFAR10 Image Project This example is based on a machine learning algorithm supported by the MCXN947, which can label images captured from a camera and display the type of object at the bottom of the LCD. The model is trained on the CIFAR10 dataset, which supports 10 categories of images: "Airplane", "Automobile", "Bird", "Cat", "Deer", "Dog", "Frog", "Horse", "Ship", "Truck". a. Open MCUXpresso IDE and import the Label CIFAR10 Image project from the Application Code Hub, as follows:   b. Select the project, click on "GitHub link" -> "Next", as shown below:   c. Set the save path, click "Next" -> "Next" -> "Finish", as shown below:   d. After successful import, click on the "source" folder -> "model" folder, open "model_data.s", and copy the model file converted using eIQ Neutron SDK into the "model" folder. Modify the name of the imported model (the name of the converted model) in "model_data.s", as shown below:     e. Click on the "source" folder -> "model" folder -> open the "labels.h" file. Modify the "labels[]" array to match the order of labels model output as shown below:   f. The eIQ middleware in the project needs to be updated to be compatible with the version of the eIQ Neutron SDK used to convert the TFLite model. Update the eIQ middleware folder in the project, including the eIQ Neutron libraries, as described in this Community post or in this lab.   f. Compile the project and download it to the development board.   Part 3: Results     Part 4: Summary By efficiently utilizing the powerful performance of the eIQ Neutron NPU and the eIQ enablement tools like eIQ Neutron SDK, developers can significantly streamline the entire process from model training to deployment. This not only accelerates the development cycle of machine learning applications but also enhances their performance and reliability. Therefore, for developers looking to implement efficient machine learning applications on MCX N-series edge devices, mastering these technologies and tools is crucial.   We can also refer to the video for detailed steps using the deprecated eIQ Toolkit to generate a model. https://www.bilibili.com/video/BV1SS411N7Hv?t=12.9  For more vision examples on MCX N see this Community Post.

An open-source PCB template for creating a custom shield for the FRDM-MCXN947  

The open source hardware community is please to offer ECAD schematic symbols for the new MCX A153 and MCX N947 microcontrollers.     The MCX A153 schematic library has the QFP32, QFN48 and LQFP64 variants. The MCX N947 schematic library has the BGA184 and LQFP100 variants. The symbols were generated using data from the MCUXpresso Pin Config tool to ensure accuracy. The pin names include all pin mux options to make it easy to see all available peripheral functions and further simplify the symbol for your own design purpose The symbol data is provided in the open source KiCad V7 format and is attached to this post. The symbols can be imported into commercial tools such as Altium Designer. Enjoy!