Overview          Ping-pong is a special case of a linked transfer which typically used more frequently than more complicated versions of linked transfers. A ping-pong transfer usually uses at least two buffers. At any one time, one buffer is being loaded or unloaded by DMA operations. The other buffers have the opposite operation being handled by software, readying the buffer for use when the buffer currently being used by the DMA controller is full or empty. The Fig 1 illustrates an example of descriptors for ping-pong from a peripheral to two buffers in memory. Fig 1 Implementation detail         To continuous transfer the converted result of the ADC to RAM, I’m going to use four 4 DMA descriptors to work in Ping-Pong mode to achieve this goal as the Fig 2 shows. Fig 2 Data flow via Ping-Pong mode Hardware introduction         LPCXpressor54114 Board（OM13089） Fig 3 LPCXpressor54114 Board        Demo code: LPCOpen Library Example code        The code is based on the periph_adc demo, using the SCTimer output as the hardware trigger of ADC, meanwhile, the ADC converted value is transferred to the appointed area of RAM automatically. #include "board.h" #define SCT_PWM            LPC_SCT #define NUM_BUFFERS 4 #define DMA_TRANSFER_SIZE 8 #define ADC_INPUT_CHANNEL 1 #define SCT_PWM_RATE   10000          /* PWM frequency 10 KHz */ #define SCT_PWM_PIN_OUT    7          /* COUT7 Generate square wave */ #define SCT_PWM_OUT        1          /* Index of OUT PWM */ uint16_t adcOut; ALIGN(512) DMA_CHDESC_T ADC_TransferDescriptors[NUM_BUFFERS]; uint16_t CapturedData[32]; uint16_t DMA_Sum=0; /** * * ADC IRQ not Used right now... Only for testing */ void ADC_SEQA_IRQHandler(void) {             /* If SeqA flags is set i.e. data in global register is valid then read it */         Chip_GPIO_SetPinState(LPC_GPIO, 0, 6, true);         //DEBUGOUT("ADC Output = %d\r\n", adcOut);         Chip_GPIO_SetPinState(LPC_GPIO, 0, 6, false);         Chip_ADC_ClearFlags(LPC_ADC,0xFFFFFFFF); } void DMA_IRQHandler(void) {         static uint16_t DMA_Sum=0;                 DMA_Sum++;                  if(DMA_Sum ==8)          {            DMA_Sum=4;          }             Chip_GPIO_SetPinState(LPC_GPIO, 0, 7,true);      /* Rrror interrupt on channel 0? */      if ((Chip_DMA_GetIntStatus(LPC_DMA) & DMA_INTSTAT_ACTIVEERRINT) != 0)      {           /* This shouldn't happen for this simple DMA example, so set the LED              to indicate an error occurred. This is the correct method to clear              an abort. */           Chip_DMA_DisableChannel(LPC_DMA, DMA_CH0);           while ((Chip_DMA_GetBusyChannels(LPC_DMA) & (1 << DMA_CH0)) != 0) {}           Chip_DMA_AbortChannel(LPC_DMA, DMA_CH0);           Chip_DMA_ClearErrorIntChannel(LPC_DMA, DMA_CH0);           Chip_DMA_EnableChannel(LPC_DMA, DMA_CH0);           Board_LED_Set(0, true);      }      Chip_GPIO_SetPinState(LPC_GPIO, 0,7,false);      /* Clear DMA interrupt for the channel */      LPC_DMA->DMACOMMON[0].INTA = 1; }      /***       *      ____  __  __    _       *     |  _ \|  \/  |  / \       *     | | | | |\/| | / _ \       *     | |_| | |  | |/ ___ \       *     |____/|_|  |_/_/   \_\       *     / ___|  ___| |_ _   _ _ __       *     \___ \ / _ \ __| | | | '_ \       *      ___) |  __/ |_| |_| | |_) |       *     |____/ \___|\__|\__,_| .__/       *                          |_|       */ void DMA_Steup(void) {         DMA_CHDESC_T Initial_DMA_Descriptor;                 ADC_TransferDescriptors[0].source = (uint32_t)&LPC_ADC->SEQ_GDAT[0];      ADC_TransferDescriptors[1].source = (uint32_t)&LPC_ADC->SEQ_GDAT[0];      ADC_TransferDescriptors[2].source = (uint32_t)&LPC_ADC->SEQ_GDAT[0];      ADC_TransferDescriptors[3].source = (uint32_t)&LPC_ADC->SEQ_GDAT[0];      ADC_TransferDescriptors[0].dest = (uint32_t)&CapturedData[(0+1)*DMA_TRANSFER_SIZE-1];      ADC_TransferDescriptors[1].dest = (uint32_t)&CapturedData[(1+1)*DMA_TRANSFER_SIZE-1];      ADC_TransferDescriptors[2].dest = (uint32_t)&CapturedData[(2+1)*DMA_TRANSFER_SIZE-1];      ADC_TransferDescriptors[3].dest = (uint32_t)&CapturedData[(3+1)*DMA_TRANSFER_SIZE-1];      //The initial DMA desciptor is the same as the 1st transfer descriptor.   It      //Will link into the 2nd of the main descriptors.      ADC_TransferDescriptors[0].next = (uint32_t)&ADC_TransferDescriptors[1];      ADC_TransferDescriptors[1].next = (uint32_t)&ADC_TransferDescriptors[2];      ADC_TransferDescriptors[2].next = (uint32_t)&ADC_TransferDescriptors[3];      //Link back to the 1st descriptor      ADC_TransferDescriptors[3].next = (uint32_t)&ADC_TransferDescriptors[0];      //For a test,  stop the transfers here.   The sine wave will look fine.      //ADC_TransferDescriptors[3].next = 0;      ADC_TransferDescriptors[0].xfercfg = (DMA_XFERCFG_CFGVALID |                                DMA_XFERCFG_RELOAD  |                                DMA_XFERCFG_SETINTA |                                DMA_XFERCFG_WIDTH_16 |                                DMA_XFERCFG_SRCINC_0 |                                DMA_XFERCFG_DSTINC_1 |                                DMA_XFERCFG_XFERCOUNT(DMA_TRANSFER_SIZE));      ADC_TransferDescriptors[1].xfercfg = ADC_TransferDescriptors[0].xfercfg;      ADC_TransferDescriptors[2].xfercfg = ADC_TransferDescriptors[0].xfercfg;      ADC_TransferDescriptors[3].xfercfg = (DMA_XFERCFG_CFGVALID |                                DMA_XFERCFG_RELOAD  |                                DMA_XFERCFG_SETINTA |                               DMA_XFERCFG_WIDTH_16 |                               DMA_XFERCFG_SRCINC_0 |                               DMA_XFERCFG_DSTINC_1 |                               DMA_XFERCFG_XFERCOUNT(DMA_TRANSFER_SIZE));      Initial_DMA_Descriptor.source = ADC_TransferDescriptors[0].source;      Initial_DMA_Descriptor.dest =   ADC_TransferDescriptors[0].dest;      Initial_DMA_Descriptor.next =  (uint32_t)&ADC_TransferDescriptors[1];      Initial_DMA_Descriptor.xfercfg = ADC_TransferDescriptors[0].xfercfg;      /* DMA initialization - enable DMA clocking and reset DMA if needed */      Chip_DMA_Init(LPC_DMA);      /* Enable DMA controller and use driver provided DMA table for current descriptors */      Chip_DMA_Enable(LPC_DMA);      Chip_DMA_SetSRAMBase(LPC_DMA, DMA_ADDR(Chip_DMA_Table));      /* Setup channel 0 for the following configuration:         - High channel priority         - Interrupt A fires on descriptor completion */      Chip_DMA_EnableChannel(LPC_DMA, DMA_CH0);      Chip_DMA_EnableIntChannel(LPC_DMA, DMA_CH0);      Chip_DMA_SetupChannelConfig(LPC_DMA, DMA_CH0,     //(DMA_CFG_PERIPHREQEN     |                                    (DMA_CFG_HWTRIGEN        |                                     DMA_CFG_TRIGBURST_BURST |                                                          DMA_CFG_TRIGTYPE_EDGE   |                                        DMA_CFG_TRIGPOL_LOW    |    //DMA_CFG_TRIGPOL_HIGH                                        DMA_CFG_BURSTPOWER_1    |                                     DMA_CFG_CHPRIORITY(0)                                          )                                        );      //make sure ADC Sequence A interrupts is selected for for a DMA trigger      LPC_INMUX->DMA_ITRIG_INMUX[0] = 0;      /* Enable DMA interrupt */      NVIC_EnableIRQ(DMA_IRQn);      // The 1st descriptor is set up through the registers.      /* Setup transfer descriptor and validate it */      Chip_DMA_SetupTranChannel(LPC_DMA, DMA_CH0, &Initial_DMA_Descriptor);      //Use the transfer configuration for our 4 main descriptors      Chip_DMA_SetupChannelTransfer(LPC_DMA, DMA_CH0,     ADC_TransferDescriptors[0].xfercfg);      Chip_DMA_SetValidChannel(LPC_DMA, DMA_CH0);      } void SCT_PWM_Generate(void) {          /* Initialize the SCT as PWM and set frequency */      Chip_SCTPWM_Init(SCT_PWM);      Chip_SCTPWM_SetRate(SCT_PWM, SCT_PWM_RATE);      /* Setup Board specific output pin */      Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 14, IOCON_FUNC3 | IOCON_MODE_INACT | IOCON_DIGITAL_EN | IOCON_INPFILT_OFF);      /* Use SCT0_OUT7 pin */      Chip_SCTPWM_SetOutPin(SCT_PWM, SCT_PWM_OUT, SCT_PWM_PIN_OUT);              /* Start with 50% duty cycle */      Chip_SCTPWM_SetDutyCycle(SCT_PWM, SCT_PWM_OUT, Chip_SCTPWM_PercentageToTicks(SCT_PWM, 10));      Chip_SCTPWM_Start(SCT_PWM);    }      /***            *         _    ____   ____            *        / \  |  _ \ / ___|            *       / _ \ | | | | |            *      / ___ \| |_| | |___            *     /_/__ \_\____/ \____|            *     / ___|  ___| |_ _   _ _ __            *     \___ \ / _ \ __| | | | '_ \            *      ___) |  __/ |_| |_| | |_) |            *     |____/ \___|\__|\__,_| .__/            *                          |_|            */ void ADC_Steup(void) {     /*Set Asynch Clock to the Main clock*/     LPC_SYSCON->ADCCLKSEL = 0;     //Set the divider to 1 and enable.  note,  the HALT bit (30) and RESET (29) are not in the manual     LPC_SYSCON->ADCCLKDIV = 0;      /* Initialization ADC to 12 bit and set clock divide to 1 to operate synchronously at System clock */     Chip_ADC_Init(LPC_ADC, ADC_CR_RESOL(3) | ADC_CR_CLKDIV(0)| ADC_CR_ASYNC_MODE);       //select ADC Channel 1 as input     Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 30, IOCON_FUNC0 | IOCON_ANALOG_EN| IOCON_INPFILT_OFF);       LPC_ADC->INSEL = 0x01;     Chip_ADC_SetupSequencer(LPC_ADC,ADC_SEQA_IDX,                                                                          ADC_SEQ_CTRL_SEQ_ENA |                               ADC_SEQ_CTRL_CHANNEL_EN(ADC_INPUT_CHANNEL) |                                                 ADC_SEQ_CTRL_TRIGGER(2) |                               ADC_SEQ_CTRL_HWTRIG_POLPOS |                                                 ADC_SEQ_CTRL_HWTRIG_SYNCBYPASS |                               ADC_SEQ_CTRL_MODE_EOS |                                                 ADC_SEQ_CTRL_SEQ_ENA);     /* Enable Sequence A interrupt */     Chip_ADC_EnableInt(LPC_ADC, ADC_INTEN_SEQA_ENABLE);         /* Calibrate ADC */     if(Chip_ADC_Calibration(LPC_ADC) == LPC_OK) {         /* Enable ADC SeqA Interrupt */         NVIC_EnableIRQ(ADC_SEQA_IRQn);     }     else {         DEBUGSTR("ADC Calibration Failed \r\n");         return ;     } } int main(void) {       SystemCoreClockUpdate();     Board_Init();         DMA_Steup();     ADC_Steup();     SCT_PWM_Generate();         while(1)     {}     } ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍  Verification      Building the project, then click the   to debug;        Generate the sine wave: 1 KHz, 幅度：0~2 V，feed the wave the ADC via the J9_1（P0_30-ADC1）;         Setting the breakpoint (Fig 4) to observe the ADC converted value CapturedData[32]； Fig 4                        4. To verifying the result, I collect several group of data and use the Excel to make these data graphical for checking. Fig 6 is an example. Fig 5 Fig 6 Fig 7 Fig 8

Hi: Since LPC series ADC has sequence function, so implement multi-channel ADC transfer is easy. But use DMA is also meaning, so there are two demos to show how to use such applications 1.lpc_multi-channels_adc_dma_sw_trg Use SW trigger multi channels ADC transfer, but use DMA to transfer result to result array. use don't need to care the channel result register, but fetch data from global data register; 2.lpc_multi-channels_adc_dma_hw_trg for many cases, user need to trigger ADC multi channels transfer periodly, and collect enough data for processing. so this demo use SCT_OUT7 to trigger ADC Sequence A for 6 channels, then after 1024 rounds, generate DMA interrupt to process all 6*1024 data array. all demos are implemented on SDK2.6.0 

NXP’s Arm® Cortex®-M33 based LPC551x MCU Family Enhanced Security & Performance Efficiency

The MCUXpresso IDE SWO trace function is a special feature which enables user to observe variable update, interrupt entry/exit timing, interrupt event statistic, to print information in SWO ITM Console while the MCU is running. The MCUXpresso IDE SWO trace function is a supplement to the debugger of the MCUXpresso IDE. The main advantage is to display variable, print information, list interrupt entrying/exitting/returing while the MCU is running.  The documentation describes the hardware connection to implement the SWO function, MCUXpresso configuration and source code to implement the function. 

This content was originally contributed to lpcware.com by George Romaniuk     This project included testing the performance of the SPIFI interface on LPC4350. Example files were modified to run the M4 core at 200MHz and read and write to SPIFI attached FLASH. Timer was added to measure the execution and data transfer time. Reads were at an amazing 44.9MByte/s; writes were much slower due to FLASH. In addition to SPIFI, some DSP routines were timed and performance was documented.

1 Abstract       In the previous time, I have shared one post about the kinetis L series LIN slave basic usage. Now, because the LPC54608 still don’t have any sample code about the LIN, so this post, I will share a simple code about the LPC54608 LIN master usage, and use the LPCXpresso 54608 board associated with the LIN analyzer to test the result.       This document will realize the LIN master and LIN slave communication, LIN master will send the specific publisher frame and the subscriber frame, the LIN slave will detect the master data’s correction, and feedback the according data. 2 LPC54608 LIN master example      Now use the LPCXpresso54608 board as the LIN master, the LIN analyzer tool as the LIN slave, test the LIN send and receive function between the LIN master and LIN slave. 2.1 Hardware requirement      Hardware：LPCXpresso54608，KIT33662LEFEVB，PCAN-USB Pro FD       LIN bus voltage is 12V, but the LPCXpresso54608 board don’t have the on board LIN transceiver, so we need to find the external LIN transceiver, then connect the LPC54608 UART port to the LIN transceiver. About the external LIN transceiver, we use the NXP official LIN driver board KIT33662LEFEVB, this board schematic can be found from this link: https://www.nxp.com/docs/en/user-guide/KT33662UG.pdf          Fig 2-1. LIN transceiver schematic    If you don’t have the KIT33662LEFEVB board, don’t worry, you also can use the TRK-KEA8, just like the kinetis LIN post which I have shared. TRK-KEA8 have the on board transceiver chip. 2.1.1 LPCXpresso5460 and IT33662LEF EVB connections No. LPCXpresso54608 KIT33662LEFEVB note 1 P4_RX J4-2 UART0_RX 2 P4_TX J4-1 UART0_TX 3 P4_GND J5-1 GND 4 JP2_3 J5_2 3.3V power supply   2.1.2 KIT33662LEFEVB 12V power supply and LIN slave connection KIT33662LEFEVB board J2_1: 12V power supply, also connect to LIN analyzer VBAT pin J2_3: 12V ground, also connect to LIN analyzer GND pin J2_2: LIN bus, connect to the LIN analyzer LIN pin   2.1.3 Use TRK-KEA8 on board LIN transceiver       This chapter just for those don’t have KIT33662LEFEVB board, but have the TRK-KEA8 board. 1）LPCXpresso54608 and TRK-KEA8 connections      LPCXpresso54608 need to connect the UART pin to the LIN transceiver, the connections like this: No. LPCXpresso54608 TRK-KEA8 note 1 P4_RX J10-5 UART0_RX 2 P4_TX J10-6 UART0_TX 3 P4_GND J14-1 GND 2） TRK-KEA8  and LIN analyzer connections         LIN bus is the single wire, connect to LIN analyzer LIN pin, GND also need to connect together.        TRK-KEA8 need to use the P1 powered by 12V DC power supply, LIN analyzer also need to connect to the 12V DC.        Because the LPC54608 board is powered by the 3.3V, then also need to power the LPC54608 board with a 3.3V DC power supply. 2.1.4 Physical connections                Fig 2-2. Physcial connections 2.2 Software code       Now, talk about the LIN master send the LIN publisher data and the subscriber ID data, the software code is modified from the SDK_2.3.0_LPCXpresso54608 usart interrupt project, the detail code just as follows: void DEMO_USART_IRQHandler(void) {   if(DEMO_USART->STAT & USART_INTENSET_DELTARXBRKEN_MASK) // detect LIN break      {        DEMO_USART->STAT |= USART_INTENSET_DELTARXBRKEN_MASK;// clear the bit        Lin_BKflag = 1;        cnt = 0;        state = RECV_SYN;        DisableLinBreak;       }     if((kUSART_RxFifoNotEmptyFlag | kUSART_RxError) & USART_GetStatusFlags(DEMO_USART))      {        USART_ClearStatusFlags(DEMO_USART,kUSART_TxError | kUSART_RxError);           rxbuff[cnt] = USART_ReadByte(DEMO_USART);                 switch(state)          {             case RECV_SYN:                           if(0x55 == rxbuff[cnt])                           {                               state = RECV_PID;                           }                           else                           {                               state = IDLE;                               DisableLinBreak;                           }                           break;             case RECV_PID:                           if(0xAD == rxbuff[cnt])                           {                               state = SEND_DATA;                           }                           else if(0XEC == rxbuff[cnt])                           {                               state = RECV_DATA;                           }                           else                           {                               state = IDLE;                               DisableLinBreak;                           }                           break;             case RECV_DATA:                          Sub_rxbuff[recdatacnt++]= rxbuff[cnt];                           if(recdatacnt >= 3) // 2 Bytes data + 1 Bytes checksum                           {                               recdatacnt=0;                               state = RECV_SYN;                               EnableLinBreak;                           }                           break;             case SEND_DATA:                           recdatacnt++;                           if(recdatacnt >= 4) // 2 Bytes data + 1 Bytes checksum                           {                               recdatacnt=0;                               state = RECV_SYN;                               EnableLinBreak;                           }                           break;                                   default:break;                                 }              cnt++;      }     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping       exception return operation might vector to incorrect interrupt */ #if defined __CORTEX_M && (__CORTEX_M == 4U)     __DSB(); #endif } /********************************************************************************************/ /*Publisher LIN frame /*13bit break+0x55 sync+0xad(0x2D's protected ID)+0x01+0x02+0x03+0x4C(check sum) //All the above byte is sent by the LIN master /********************************************************************************************/ void Lin_Master_Publisher(void) {     unsigned int i=0; //===============================LIN master send=====================        DEMO_USART->CTL |= USART_CTL_TXBRKEN_MASK;//enable TX break;        while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))         {             USART_WriteByte(DEMO_USART, 0Xff);//dummy byte, no means             break;  //just send one byte, otherwise, will send 16 bytes         }         for(i=0;i<10000;i++); // delay for the break generation.        DEMO_USART->CTL &= ~(USART_CTL_TXBRKEN_MASK); //disable TX break        // Send the syncy byte 0x55.         while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))         {             USART_WriteByte(DEMO_USART, 0X55);             break;  //just send one byte, otherwise, will send 16 bytes         }         //protected ID         while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))         {             USART_WriteByte(DEMO_USART, 0Xad);             break;  //just send one byte, otherwise, will send 16 bytes         }         //Data1        while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))         {             USART_WriteByte(DEMO_USART, 0X01);             break;  //just send one byte, otherwise, will send 16 bytes         }           //Data2         while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))         {             USART_WriteByte(DEMO_USART, 0X02);             break;  //just send one byte, otherwise, will send 16 bytes         }         //Data3         while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))         {             USART_WriteByte(DEMO_USART, 0X03);             break;  //just send one byte, otherwise, will send 16 bytes         }              // checksum byte         while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))         {             USART_WriteByte(DEMO_USART, 0X4c);//0X4c             break;  //just send one byte, otherwise, will send 16 bytes         }     } void Lin_Master_Subscribe(void) {   unsigned int i=0;        DEMO_USART->CTL |= USART_CTL_TXBRKEN_MASK;//enable TX break;        while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))         {             USART_WriteByte(DEMO_USART, 0Xff);//dummy byte, no means             break;  //just send one byte, otherwise, will send 16 bytes         }         for(i=0;i<10000;i++); // delay for the break generation.       // for(i=0;i<5000;i++);        DEMO_USART->CTL &= ~(USART_CTL_TXBRKEN_MASK); //disable TX break        // Send the syncy byte 0x55.         while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))         {             USART_WriteByte(DEMO_USART, 0X55);             break;  //just send one byte, otherwise, will send 16 bytes         }         //protected ID         while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))         {             USART_WriteByte(DEMO_USART, 0XEC);//0XEC             break;  //just send one byte, otherwise, will send 16 bytes         } } /*! * @brief Main function */ int main(void) {     unsigned int i=0;     usart_config_t config;     /* attach 12 MHz clock to FLEXCOMM0 (debug console) */     CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);     BOARD_InitPins();     BOARD_BootClockFROHF48M();     BOARD_InitDebugConsole();     /*      * config.baudRate_Bps = 19200U;      * config.parityMode = kUSART_ParityDisabled;      * config.stopBitCount = kUSART_OneStopBit;      * config.loopback = false;      * config.enableTxFifo = false;      * config.enableRxFifo = false;      */     USART_GetDefaultConfig(&config);     config.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE;     config.enableTx = true;     config.enableRx = true;     USART_Init(DEMO_USART, &config, DEMO_USART_CLK_FREQ);     /* Enable RX interrupt. */     DEMO_USART->INTENSET |= USART_INTENSET_DELTARXBRKEN_MASK; //USART_INTENSET_STARTEN_MASK |        //enable USART interrupt     cnt=0;            USART_EnableInterrupts(DEMO_USART, kUSART_RxLevelInterruptEnable | kUSART_RxErrorInterruptEnable);     EnableIRQ(DEMO_USART_IRQn);//All ID datas will be received in the interrupt         Lin_Master_Publisher(); //LIN master send publisher ID 0x2D     for(i=0;i<65535;i++);//delay     Lin_Master_Subscribe();//LIN master send subscriber ID 0x2c     while (1)     {     } } ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍     In USART_Init function，add the LIN function enable code：     /* setup configuration and enable USART */     base->CFG = USART_CFG_PARITYSEL(config->parityMode) | USART_CFG_STOPLEN(config->stopBitCount) |                 USART_CFG_DATALEN(config->bitCountPerChar) | USART_CFG_LOOP(config->loopback) | USART_CFG_ENABLE_MASK | USART_CFG_LINMODE_MASK;// 3 LPC54608 LIN master test result   Master side define two ID frame： Unconditional ID Protected ID Direction Data checksum 0X2C 0XEC subscriber 0x01,0x02 0x10 0X2D 0XAD Publisher 0x01,0x02,0x03 0x4c   Now, LIN master will send the above two ID frame to the slave, then give the test result about the feedback from the slave and the LIN bus wave. 3.1 LIN slave configuration The LIN baud rate is defined as 9600bps. The following picture is from the LIN analyzer (PEAK LIN tool) software: To get the data from the LIN slave, the master need to send the 0x2C frame at first, then the slave will send back the according data. The master subscriber frame is the slave’s publisher frame; the master publisher frame is the slave’s subscriber. Master send, slave receive. Master receive, then the slave is the send side.       In the slave software side, need to configure the 0X2C ID according data, then press the space key, the slave will wait for the master’s according frame. 3.2 Send 0X2C and 0X2D frame From the slave side, we can find 0X2D is received successfully from the master, 0X2C can send the correct data to the master. 3.2.1 0X2D frame data LIN bus wave and debug result Yellow wave is the LPC54608 UART TX pin wave. Blue wave is the LIN bus wave. From the LIN bus wave, we can find that the LIN master can send out the correct LIN data, and the checksum also correct from the slave received side. 3.2.2 0X2C data LIN bus wave and debug result Yellow wave is the LPC54608 UART TX pin wave. Blue wave is the LIN bus wave. From the wave, we can find that after the LIN master send the 0X2C data, the slave will send back the according data to the master, now check the LPC54608 debug data from IAR: From the received data and the checksum data,  we can find the slave feedback is correct. So, the above modified code can realize the LPC54608 LIN master frame basic send and receive function.  Next time, I will also share a post about the LPC54608 LIN slave code. Wish it helps you!  

To help you get started with the LPC800 Mini-Kit, we've put together a few basic resources for you here. LPC800 Mini-Kit Code Base The LPC800 comes populated with an LPC810 MCU in a DIP8 package. The LPC810 package a lot of peripheral punch into a small, extremely affordable package, but as with any deeply embedded device, it's always a challenge to fit the most code and functionality possible into the smallest device available. The LPC810 with 4KB flash and 1KB SRAM is no exception. To help you get started writing light-weight, but easy to understand code in C, we've put together a basic code base for the LPC810 Mini-Kit based around NXP's free LPCXpresso IDE, which uses the free GNU toolchain beneath the surface. The latest version of the code can be viewed and downloaded online on github (LPC810 Code Base), or you can download the latest version directly. Board Schematic The schematics for the LPC800 Mini-Kit are available for download here. See what the LPCWare community did with it! In 2013, NXP ran the LPC800 Simplicity Challenge, and the LPCWare community showed amazing inventiveness in what they created. Check out what they did on our LPC800 campaign pages. Further LPC800 Resources In addition to the LPC800 Mini-Kit Code Base above, you may find some of the following links useful working with the LPC810: LPC810 Product Page on NXP.com LPC800 Switch Matrix Configuration Tool Introducing the LPC800 Videos on YouTube LPC800 Switch Matrix: Making life easier one pin at a time (LPCNow.com) LPC800 LPCXpresso Board Schematics LPCXpresso Forum (for LPCXpresso related support) Tutorial: Getting Started with the LPC810 (Adafruit.com) Programming the LPC800 Mini-Kit with Flash Magic The LPC800 mini board can be programmed using any SWD debugger and your favorite IDE -- NXP's own LPCXpresso, as well as IAR, Keil uVision, and Crossworks for ARM all support the LPC800 out of the box! -- but you can also use an inexpensive UART/USB adapter and ISP mode to program the flash memory on the LPC810. What You'll Need A USB to UART cable or adapter, such as FTDI's popular 'TTL-232R-3V3' cables or a breakout based on the FT232RL chipset The latest version of the free Flash Magic tool​ Configuring the LPC800 Mini Board The first step you will need to do is connect you UART to USB adapter cable to the 'FTDI' header on the top of the LPC800 Mini Board. The pin layout is setup to match FTDI's popular cables by default, specifically the 'TTL-232R-3V3'. Other adapters can of course be used, but you will need to connect the GND, VCC, TXD and RXD pins in the right location yourself. FTDI's TTL-232R-3V3 cable is shown connected here as a reference: LPC800-mini-board The next step is placing the LPC810 in 'ISP' mode. This is accomplished by pulling PIO0_1 'low' during reset, which causes the bootloader to enter ISP mode. The LPC800 mini board conveniently has an 'ISP' switch – the white button in the bottom left-hand side of the board – which we can hold down to pull the ISP pin low. While continuing to press the ISP button, press and then release the 'RESET' button (the red button on the opposite side of the board). This will cause the board to reset, the internal bootloader will see that the ISP pin is low, and it will enter ISP mode where we can program the flash in Flash Magic using the on-chip UART0 peripheral. Configuring Flash Magic for the LPC810 The next step requires you to download and install the latest version of Flash Magic if you haven't already done so. It's available for free at http://www.flashmagictool.com/. Once installed, open the tool, and the run through the following steps: Setup the 'Communications' options: Select LPC810M021FN8 as your target device Set your COM port to whatever port your USB to UART adapter enumerated as (you can find this in the device manager in Windows) Set the Baud Rate to 115200, or whatever matches your USB to UART adapter Make sure that the 'Interface' is set to 'None (ISP)' Set the Oscillator to '12', which matches the speed of the IRC used by the bootloader You can double-check all of your communications settings and connection by selecting the 'ISP > Read Device Signature …' menu item. If you are in ISP mode and properly connected, with the right 'Communications' settings, you should see something similar to the following screen:FlashMagic Device IDIf you get an error message, double check your connections and your settings in Flash Magic, making sure you are actually in ISP mode on the LPC810, and that you've selected the right COM port. Check the 'Erase blocks used by Hex File' checkbox in the 'Erase' section. Select your hex file in the 'Hex File' section: Use the 'Browse' button to point to the Intel Hex file generated by your toolchain or IDE (for example, LPCXpresso). You can also use one of the sample .hex files available here if you don't have a .hex file ready yet. You should end up with Flash Magic configuration as follows ('Verify after programming' is optional): Flash magic settings: Now click the 'Start' button to program the flash … … and finally, once the device has been programmed, reset your board (via the red 'Reset' button). If at some point you want to change your firmware, simply repeat the process of re-entering ISP mode by holding the ISP pin low, resetting the LPC810, releasing the ISP pin, and the programming the device via Flash Magic again. Known issues There is an issue with some of the LPC810 DIP8 parts that are populated on the mini board that prevents the analog comparator from functioning. To see if the part on your board is affected, locate the date code on the top of the DIP8 package (the last line of text on top of the chip). If this line end with either "2X" or "2A", your part is affected. LPC800 mini board schematics Rev AR2.pdf - Attached

This document introduces how to debug TrustZone project on MCUXpresso IDE.   Use the latest version of MCUXpresso IDE v10.3.1. Project is from SDK_2.5.0_LPCXpresso55S69. Board is LPCXpresso55s69, use the LinkServer debug probe(on board debugger).   Every TrustZone based application consists of two independent parts - secure part/project and non-secure part/project. The secure project is stored in SDK_2.5.0_LPCXpresso55S69\boards\lpcxpresso55s69\trustzone_examples\<application_name>\ cm33_core0 \<application_name>_s directory. The non-secure project is stored in SDK_2.5.0_LPCXpresso55S69\boards\lpcxpresso55s69\ trustzone_examples\<application_name>\ cm33_core0 \<application_name>_ns directory. The secure projects always contains TrustZone configuration and it is executed after device RESET. The secure project usually ends by jump to non-secure application/project. In this document, we use “hello_world” as example, this project contains both “hello_world_s” and “hello_world_ns” projects. Unlike Keil or IAR IDE, MCUXpresso IDE can’t debug jump directly from secure project to no-secure project, so we need add the no-secure executable file to secure project debug configuration manually(For this version of MCUXpresso IDE v10.3.1, we need do this step, while for  the later new versions, maybe they support jump directly from secure project to no-secure project ). Steps outline: Import “hello_world_s” and “hello_world_ns” project. Build “hello_world_s” and “hello_world_ns”, without any error. Erase flash. Program no-secure project “hello_world_ns ”. Kill active debug. Add the location of file “lpcxpresso55s69_hello_world_ns.axf” to Debugger commands of “hello_world_s” project, and download “hello_world_s” project. After finish download, it stop at “hello_world_s” project, set a breakpoint at “hello_world_ns” project: Debug project Detailed steps please refer to DOC in attachment. Hope it helps, BR Alice

This document is an introduction to the Programmable Logic Unit (PLU) provided for the LPC804 MCU device. PLU is used to create small combinatorial and/or sequential logic networks including simple state machines. This allows to replace external components like the 74xx series, which are used for the glue logic with the microcontroller and external devices, making simple the PCB and saving design costs. Figure 1. LPC80x MCU families The PLU is comprised of an array of 26 inter-connectable, 5-input Look-up Table (LUT) elements, and 4 flip-flops.  Each LUT element contains a 32-bit truth table (look-up table) register and a 32:1 multiplexer. During operation, the five LUT inputs control the select lines of the multiplexer. This structure allows any desired logical combination of the five LUT inputs. Figure 2. PLU Features The PLU is used to create small combinatorial and/or sequential logic networks including simple state machines. The PLU is comprised of an array of 26 inter-connectable, 5-input Look-up Table (LUT) elements, and 4 flip-flops. Eight primary outputs can be selected using a multiplexer from among all of the LUT outputs and the 4 flip-flops. An external clock to drive the 4 flip-flops must be applied to the PLU_CLKIN pin if a sequential network is implemented. Programmable logic can be used to drive on-chip inputs/triggers through external pin-to-pin connections. A tool suite is provided to facilitate programming of the PLU to implement the logic network described in a Verilog RTL design.   Advantages Some advantages of the PLU are: Replace the combinational logic of the 7400 series. State machine design using Flip-flop. Address decoder. Pattern match. Low-power application. PLU works in deep-sleep and power-down mode. Programmable so PLU can be reprogrammed and reused. Seamless connection using SWM and PLU. Pin description There are up to six primary inputs into the PLU module, one clock input, and eight primary outputs. All the inputs are connected directly to the package pins via chip-level I/O multiplexing.  All these pins can be enabled by configuring the relevant SWM register (PINASSIGN_FIXED0). A particular logic network may not require all of the available inputs or outputs. The user can specify which inputs and outputs to use, and which package pins those inputs and outputs will connect to as part of the overall top-level IO configuration. Registers Programming the PLU to implement a particular logic network involves writing to the various Truth Table registers to specify the logic functions to be performed by each of the LUT elements, programming the Input multiplexer registers to select the five inputs presented to each LUT, and programming the Output multiplexer register to select the eight primary outputs from the PLU module. Programming of all of these registers is performed only during initialization. Table 1. PLU registers PLU Shield board with LPCXpresso804 The OM40001 package includes a shield board for use with the LPCXpresso804 board when prototyping programmable logic unit (PLU) designs. The PLU shield provides the following features to assist with this type of development: 5 slide switches to enable 5 possible PLU inputs to be connected to VDD (marked as VCC on the Shield) or GND through a resistor (to set those inputs to a logic 1 or zero). 8 LEDs with jumpers to connect/disconnect possible PLU outputs for visual status indication. Push button option for momentary / edge signal inputs. Low-frequency oscillator with 1024Hz and 8Hz outputs. The PLU shield also includes a test circuit that can be used to implement a simple continuity tester. Several signals from the LPC804 used on the PLU Shield are shared with other functions on the main LPCXpresso804 board. Please review jumper settings on the LPCXpresso804 board carefully before installing the PLU Shield. https://www.nxp.com/docs/en/user-guide/UM11083.pdf  Figure 3. LPCXpresso804 + PLU Shield = PLU demo board   PLU input options On/off switches S1 through S5 connect possible PLU inputs to VDD or GND via a resistor, enabling those inputs to be driven to a known, fixed state. PIO0_8 is connected to a push button (S6) and a 100kohm pull up to VDD; PIO0_8 will be grounded when the button is pressed. Table below shows these connections. Table 2. PLU input on/off switches. A digital oscillator circuit is also included on the Shield, with 1.024kHz and 8Hz outputs available. LPC804 signal PIO0_1 can be connected to these oscillator signals in order to provide a low-speed clock to the flip-flops in the PLU block. The center pin (2) of JP12 connects to PIO0_1, so a jumper can be placed onto JP12 to connect this signal to the required clock (see markings on the Shield silk screen.) An external clock can be provided to the PLU by connecting it to the center pin of JP12. PLU output options LEDs are used to monitor the PLU outputs. Due to the limited number of pins on the chip/board, some of the inputs and outputs are shared. Table 3. PLU shield LEDs. PLU examples You have two options to find a PLU example: Using the SDK for the LPCXpresso804. You can download the SDK for the LPCXpresso804 from Welcome | MCUXpresso SDK Builder The PLU project is a simple demonstration program of the SDK PLU driver. In this example, a number of switches are used act as PLU inputs and LEDs are used to monitor the PLU outputs to demonstrate the configuration and use of the Programmable Logic Unit (PLU). Using the LPC804 Example Code Bundle. Code Bundle, containing source code for drivers, example code and project files. You can download it from LPCXpresso804 board for LPC804 Microcontroller (MCU)|NXP  It is recommended to use the PLU configuration tool. Please check the following links for more details. PLU Tool Direct, LUT-based design: https://www.nxp.com/video/part-2-plu-tool-direct-lut-based-design:Part2-PLU-config-tool-verilog PLU Tool Schematic design: https://www.nxp.com/video/part-3-plu-tool-schematic-design:Part3-PLU-config-tool-schematic PLU Tool Importing Verilog files: https://www.nxp.com/video/part-4-plu-tool-importing-verilog-files:Part4-PLU-config-tool-directlut

At the time of the latest update to this article, the latest silicon revision of the LPC55S6x is revision 1B. Since Nov,2019, all the LPCXpresso55S69 EVK boards marked as Revision A2 or A3 are equipped with revision 1B silicon. Initial production boards that have 0A silicon installed are marked Revision A1.                                     NXP introduced its new debug session request functionality on silicon revision 1B. For some IDE versions, the method of initiating a debug session is designed for current 1B silicon revisions and will result in an endless loop when used on older revision 0A parts due to the older revision not implementing some aspects of the handshake protocol. The protocol for this debug connection method, including handling of both 0A and later silicon revisions correctly, is included in the latest LPC55S6x/S2x/2x User Manual, section Debug session protocol.   IDE Considerations MCUXpresso IDE MCUXpresso IDE v11.0.1, incorrectly only supports silicon revision 1B debug session requests and cannot silicon to revision 0A parts in some situations. When connecting LPCXpresso55S69 Revision A1 board, you may have connection error like this: NXP released an MCUXpresso IDE v11.0.1 LPC55xx Debug Hotfix1 for this issue. Please follow the steps to fix the issue below if you have to use IDE v11.0.1 with silicon revision 0A; however it is recommended to update to the latest version of the IDE instead of taking this approach: https://community.nxp.com/community/mcuxpresso/mcuxpresso-ide/blog/2019/10/30/mcuxpresso-ide-v1101-lpc55xx-debug-hotfix IAR According to our test: IAR Embedded Workbench for ARM v8.42 and later can support both silicon revision 1B and 0A production without issue, which can be downloaded from https://www.iar.com/iar-embedded-workbench/tools-for-arm/arm-cortex-m-edition/ Note: The IAR 8.50.5 changed the CMSIS-DAP debug support for trustzone feature. There is known debug issue with the combination of IAR 8.50.5+SDK2.8.0. Thus our recommendation is:        Use IAR 8.50.5 with SDK2.8.0       Use IAR 8.40.2 with SDK 2.7.1   Keil MDK Both Keil MDK v5.28 and v5.29+ latest LPC55S69 pack v12.01 can support silicon revision 1B without problem but cannot support silicon revision 0A. LPC55S69 Revision 0A vs. 1B differences summary Silicon Revision 0A production 1B production Board Revision A1 A2 Deliver Date Before Nov,2019 After Nov,2019 Debug Access handshake Supported but not required. Handshake signaling partially supported Required Secure Boot Revision SB2.0 SB2.1 Maximum CPU Frequency 100MHz 150MHz IDE revision required 1.      MCUXpresso IDE v11.0.0 and older 2.      MCUXpresso IDE v11.0.1 + hotfix1 3.      MCUXpresso IDE 11.1 and later MCUXpresso IDE v11.0.0 and newer SDK version SDK2.5 and newer are supported; SDK2.6.3 and newer are recommended SDK2.6.3 and newer     LPC55S69 Defect Fix: 0A vs. 1B 0A Production 1B Production Defect: For PRINCE encrypted region, partial erase cannot be performed Fixed Defect: For PUF based key provisioning, a reset must be performed Fixed Defect: Unprotected sub regions in PRINCE defined regions cannot be used. Fixed Defect: Last page of image is erased when simultaneously programming the signed image and CFPA region Fixed Defect: PHY does not auto-power down in suspend mode Fixed For more detail, see Errata sheet LPC55S6x which can be downloaded  from NXP web site.   Pre-production Silicon: Note that NO BOARDS WERE EVER SOLD THROUGH DISTRIBUTION WITH PRE-PRODUCTION SILICON. In case you have board marked with Revision 1, 2 ,A, or A1 board with 1B silicon, contact NXP to ask for production replacement.   Get Silicon Revision: The silicon revision info is marked on the chip and board revision is marked on the board silkscreen. For silicon revision marking information, please consult LPC55S6x Data Sheet section 4. Marking . Below is an example of silicon revision marking information where revision is highlighted in red: The user application can also get the silicon revision through chip revision ID and number: SYSCON->DIEID:     The English and Chinese version documents are attached.  

For the CM33 of LPC55S6x family, the trust zone module is integrated, the memory space and peripherals are classified as security and non-security space. In order to generate interrupt in non-security mode, the NVIC module including the NVIC_ITNSx register must be initialized in security mode so that interrupt module can generate interrupt in non-security mode. The example demos that MRT0 module generates interrupt in non-security mode, the NVIC module is initialized at security mode, MRT0 is initialized at non-security mode. The project is based on MCUXpresso IDE ver11.1 tools, LPC55S69-EVK board and SDK_2.x_LPCXpresso55S69 SDK package version 2.11.1.

For LPC55(S)1x/2x/6x users, please update your fsl_power_lib to SDK2.8.2. The previous SDK(2.6.x and 2.7.x)'s power library have two known function bugs,  1. FRO trim value can not be recovery correctly after wakeup from deep-sleep / power-down / deep power-down.    -- this means the 12MHz FRO frequency is different for after boot-process(11.99 MHz for example) and wakeup from low-power modes(11.89MHz for example).     -- The reason is the FRO trim value not recovery after wakeup.  2. Cap-bank value can not be set correctly by use power lib capbank trim API.    -- This is a software bug which fixed in SDK2.8.2 already. Just replacement the power_lib library file should be workable for most of customers. the API should be compatible. Thank you! Magicoe

Test Elapsed time based on CTimer module   Sometimes, It is required to test the time which an api function takes when the function is executed, for example, some users want to test the flash erasing time and flash programming time. User can use GPIO to set/clear and use scope to test the GPIO timing to measure the time an api function takes, the method is very simple and straightforward but inaccurate. The document describes to configure CTimer as a 32bits  free-running counter, user can read the counter value before and after an api function and compute the counter value difference to get the time the api function takes. The CTimer of LPC54xxx family counts the APB bus clock, the APB bus clock Is driven by 12 MHz FRO, user can use the following code to measure the elapsed time. For example, we test the elaped time of  delayTimer(10000); function, we get the variable tPoint1, tPoint2. The actual time is (tPoint2- tPoint1)*(1/12000000). In the example, the tPoint2=110127, the tPoint1=53, the elapsed time is (110127-53)*(1/12000000)=9.172us. //the souce code focuses on LPC54xxx family uint32_t tPoint1,tPoint2,tPoint3,tDiff; void test(void) {     tPoint1=CTIMER_GetTimerCountValue(CTIMER2);     //simulate elapsed time     delayTimer(10000);     tPoint2=CTIMER_GetTimerCountValue(CTIMER2);     tDiff=tPoint2-tPoint1;       //simulate elapsed time     delayTimer(20000);     tPoint3=CTIMER_GetTimerCountValue(CTIMER2);     tDiff=tPoint3-tPoint2;      PRINTF("Time instand:tPoint1=%d, tPoint2=%d, tPoint3=%d \r\n",tPoint1,tPoint2,tPoint3); } Snippet of simple source code based on MCUXpresso tools and LPC54618 board developed by XiangJun Rong #include "fsl_ctimer.h" void test(void); void CTimerInit(void); void delayTimer(uint32_t elapsedTimer); uint32_t tPoint1,tPoint2,tPoint3,tDiff; void CTimerInit(void) {     ctimer_config_t config;     ctimer_match_config_t matchConfig;     /*CTimer use APB bus clock as Timer tick, set the APB bus clock as 12MHz internal FRO */      CLOCK_AttachClk(kFRO12M_to_ASYNC_APB);     CTIMER_GetDefaultConfig(&config);       CTIMER_Init(CTIMER2, &config);       matchConfig.enableCounterReset = true;     matchConfig.enableCounterStop = false;     matchConfig.matchValue = 0xFFFFFFFF;     matchConfig.outControl = kCTIMER_Output_NoAction;     matchConfig.outPinInitState = true;     matchConfig.enableInterrupt = false;     CTIMER_SetupMatch(CTIMER2, kCTIMER_Match_3, &matchConfig);     CTIMER_StartTimer(CTIMER2); }   void test(void) {     tPoint1=CTIMER_GetTimerCountValue(CTIMER2);     //simulate elapsed time     delayTimer(10000);     tPoint2=CTIMER_GetTimerCountValue(CTIMER2);     tDiff=tPoint2-tPoint1;       //simulate elapsed time     delayTimer(20000);     tPoint3=CTIMER_GetTimerCountValue(CTIMER2);     tDiff=tPoint3-tPoint2;      PRINTF("Time instand:tPoint1=%d, tPoint2=%d, tPoint3=%d \r\n",tPoint1,tPoint2,tPoint3); }   void delayTimer(uint32_t elapsedTimer) {     uint32_t i;     for(i=0; i<elapsedTimer; i++)     {         __asm("nop");     } }   int main(void) {    …………………………………………………………………………………………………..     PRINTF("Elapse time test start: \r\n");     CTimerInit();     test();     for(;;) {} ………………………………………… }  

This content was originally contributed to lpcware.com by Massimo Manca Example application for the "LPC4300 Getting started Kit" to learn and to use the multi processor communication and the newest peripherals of LPC43xx MCU family. System resources used and assignment to the cores: The Cortex-M4 core handles the application logic, manages the 4 touch keys and 4 leds (via the PCA9502 I2C 8 bit I7O expander), the lcd display and the real time clock. The Cortex-M0 core is dedicated to the printer management using the RS232 on board interface (in near future SCT and SGPIO will be used to interface a thermal printing head). The cores communicates using inter processor communication mechanisms minimizing the data passed from M4 to M0 and providing a simple security mechanism.

LPC4300 10-bit ADC module Introduction        LPC4300 Series microcontrollers combine the high performance and flexibility of an asymmetric dual-core architecture (ARM Cortex-M4F and Cortex-M0 coprocessor) with multiple high-speed connectivity options, advanced timers, analog, and optional security features to secure code and data communications. DSP capabilities enable all LPC43xx families to support complex algorithms in data-intensive application. Flash and Flashless options support large, flexible internal and external memory configurations.         LPC4370/LPC43S70 products provide 12-bit high-speed ADC module with up to 80MSamples/s. This document does not test 12-bit high-speed ADC performance. LPC43xx/LPC43Sxx series products provide two 10-bit SAR ADC module with below features: *   Measurement range 0 to 3.3 V *   10-bit conversion time = 2.45 us (up to 400K Samples/s) *   Burst conversion mode for single or multiple inputs *   Support hardware/software trigger *   Support Interrupt/DMA mode Test hardware platform introduction         This test hardware platform uses Keil MCB4357 evaluation board (OM13040), which enables customer to create and test working programs based on the LPC4300 family of Dual Core ARM Cortex™-M4/M0 devices. Keil MCB4357 with below features:  204 MHz LPC4357 device with ARM Cortex-M4 processor and Cortex-M0 coprocessor 136 KB On-Chip SRAM 1 MB dual bank On-Chip Flash On-Board Memory: 16 MB NOR Flash, 4 MB Quad-SPI Flash, 16 MB SDRAM & 16 KB EEPROM (I²C) Color QVGA TFT LCD with touchscreen High-speed USB 2.0 Host/Device/OTG interface (USB host + Micro USB Device/OTG connectors) Full-speed USB 2.0 Host/Device interface (USB host + micro USB Device connectors) MicroSD Card Interface Analog Voltage Control for ACD Input Audio CODEC with Line-In/Out and Microphone/headphone connector + Speaker Debug Interface Connectors 20-pin JTAG (0.1 inch) 10-pin Cortex debug (0.05 inch) 20-pin Cortex debug + ETM Trace (0.05 inch connector Test software introduction       This test software uses LPCOpen software ADC demo, the software version is V2.20.       ADC demo default path is:       ..\lpcopen_2_19_keil_iar_keil_mcb_4357\applications\lpc18xx_43xx\iar\keil_mcb_4357\periph_example.eww      LPCOpen software [periph_example.eww] project provides LPC4357 most modules driver application demos. The ADC demo need precompile MCB4357 board support package (lib_lpc_board_keil_mcb_4357) and LPC43xx chip driver (lib_lpc_chip_43xx). MCB4357 board support package provides MCB4357 board related pins configuration, clock configuration, on-board external memory configuration, Ethernet PHY driver configuration and board hardware resource configuration; LPC43xx chip driver provides LPC43xx modules driver API function.       ADC demo provides three modes to get ADC conversion value: polling mode, interrupt mode and DMA mode. The demo config 10-bit ADC module with 400K Samples/s and ARM Cortex-M4 core clock frequency with 204MHz. The test uses Timer0 module as time-base and counter reference clock is same with ARM Cortex-M4 core clock frequency (204MHz).       Timer0 initialization code comments: ADC module initialization code comments: ADC polling mode code comments: ADC interrupt mode code comments: ADC DMA mode code comments: Test result     The test will use TIMER0 counter to calculate each test item time interval.      The test includes below test items:      Single/no burst: ADC convert one time with burst mode disabled      100K/no burst: ADC convert 100K times with burst mode disabled      Single/burst: ADC convert one time with burst mode enabled      100K/burst: ADC convert 100K times with burst mode enabled

LPC4088 Closed Payment Loop Demo - Connecting the boards together In order to use the demo, the three boards (Embedded Artists Base Board, LPC4088 OEM module, CLRC663 Blueboard) must be connected together. Please follow below steps to accomplish this. 1) Place the LPC4088 OEM module in the baseboard. 2) Secure the 7" LCD board ontop of the baseboard using the supplied plastic spacers. Connect the two boards electrically together by using the supplied flatcable. 3) Connect the Blueboard to the base board. This is done by 8 wires and a USB-A to USB Mini-B cable. The USB connecting is only used for +5V and GND, not for data. For the 8 wire conenctions, please refer to the table below. EA Baseboard Blueboard Function USB UBS 5V supply / GND +3V3, [J4] 2 3V3 3.3V supply GPIO37, [J5] 23 P2.4 CLRC663 Interface Select0 GPIO40, [J3] 28 P2.5 CLRC663 Interface Select1 GPIO38, [J3] 27 P0.3 CLRC663 Reset I2C-SDA, [J5] 25 SDA SDA I2C-SCL, [J5] 26 SCL SCL - P2.0 CLRC663 I 2 C address, connect to GND - P2.1 CLRC663 I 2 C address, connect to GND Proceed to "Compiling the software & flashing the board".

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lpc‌ feature‌ sct‌ Attached doc is the LPC MCU Serial SCT feature introduction and application Contents Timer/State machine basics SCT introduction SCT availability SCT tools & resources SCT application analysis