[S32K3 tool part]：How to use IAR compiler or IAR project to compile MCAL project   1.    Abstract      Through regular observation, it has been found that there are still many customers using platforms such as MCAL+IAR, including those using IAR compilers and those directly using IAR IDEs. In fact, when I was working on industrial MCUs in the past, I also particularly liked IAR IDE for its fast compilation speed, high compilation efficiency, and small code generation. However, when I came to auto MCU, I found that its popularity was not very high, and I also noticed that some customers encountered various problems when importing MCAL into IAR. Therefore, I will directly write a tool article on how to use IAR compiler or IAR IDE project to compile NXP S32K MCAL in combination with EB tresos MCAL. This article uses S32K344 combined with RTD600 to illustrate the compilation of MCAL projects using IAR compiler and the direct import of MCAL into IAR IDE projects 2. IAR Complier with S32K3 RTD MCAL project 2.1 S32K3 HW and SW SW32K3_S32M27x_RTD_R21-11_6.0.0 S32K3X4-EVB Based on Dio_TS_T40D34M60I0R0 IAR：IAR EW for Arm 9.70.1 EB tresos29.0.0 2.2 Compile MCAL project steps using IAR compiler CMD method 2.2.1 Copy one RTD MCAL new project Open path C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins Copy Dio_TS_T40D34M60I0R0 , rename it as Dio_TS_T40D34M60I0R0_IAR kerryzhou_0-1759479138916.png Fig 1 2.2.2 Complie EB tresos project Use EB tresos tool open the following EB tresos project ： C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Dio_TS_T40D34M60I0R0_IAR\examples\EBT\S32K3XX\Dio_Example_S32K344\TresosProject Generate code: kerryzhou_1-1759479139017.png Fig 2 2.2.3 Vscode open Dio_TS_T40D34M60I0R0_IAR project Use VS code open the following path folder: C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Dio_TS_T40D34M60I0R0_IAR\examples\EBT\S32K3XX\Dio_Example_S32K344 Of course, you can also directly open this folder path using the command line, as long as you ensure that it is in the same layer path as the. mk and makefile scr kerryzhou_2-1759479139074.png Fig 3 2.2.4   Project_parameters.mk modification Mainly modify the following points: TOOLCHAIN = iar IAR_DIR = C:/IAR/ewarm-9.70.1 TRESOS_DIR = C:/EB/tresos_29_0_0 PLUGINS_DIR = C:/NXP/SW32K3_S32M27x_RTD_R21-11_6.0.0/eclipse/plugins The path of IAR must be consistent with the version of IAR software used to ensure that the corresponding IAR compiler can be found. kerryzhou_3-1759479139116.png Fig 4 2.2.5   Check_build_params.mk modification Add the following content to check_build_params.mk： else ifeq ($(TOOLCHAIN),iar) ifeq ("$(wildcard $(IAR_DIR)/arm/bin/iccarm.exe)","") $(error Invalid path set to the IAR compiler. \ The provided path: from project_parameters.mk IAR_DIR=$(IAR_DIR) is invalid!) Endif kerryzhou_4-1759479139165.png Fig 5 2.2.6        Makefile modification   Makefile need the following 5 points modification: （1）Compilier change ifeq (${TOOLCHAIN},iar) CC := $(IAR_DIR)/arm/bin/iccarm.exe LD := $(IAR_DIR)/arm/bin/ilinkarm.exe AS := $(IAR_DIR)/arm/bin/iasmarm.exe # Intel Hexadecimal Flash image tool GENHEX := $(IAR_DIR)/arm/bin/ielftool.exe HEX_OPTS := --ihex OUT_OPTS := -o endif kerryzhou_5-1759479139311.png Fig 6 (2) SRC_DIRS  add TOOLCHAIN SRC_DIRS += $(foreach mod,$(MCAL_MODULE_LIST),$(PLUGINS_DIR)/$(mod)_$(AR_PKG_NAME)/src) \ $(foreach mod,$(MCAL_MODULE_LIST_ADDON),$(PLUGINS_DIR_ADDON)/$(mod)_$(AR_PKG_NAME_ADDON)/src) \ $(PLUGINS_DIR)/Platform_$(AR_PKG_NAME)/startup/src \ $(PLUGINS_DIR)/Platform_$(AR_PKG_NAME)/startup/src/m7 \ $(PLUGINS_DIR)/Platform_$(AR_PKG_NAME)/startup/src/m7/$(TOOLCHAIN) kerryzhou_6-1759479139439.png Fig 7 (3) Linker file  modification ifeq ($(LOAD_TO),flash) ifeq (${TOOLCHAIN},iar) LINKER_DEF:= $(PLUGINS_DIR)/Platform_$(AR_PKG_NAME)/build_files/${TOOLCHAIN}/linker_flash_$(DERIVATIVE_LOWER).icf else LINKER_DEF:= $(PLUGINS_DIR)/Platform_$(AR_PKG_NAME)/build_files/$(TOOLCHAIN)/linker_flash_$(DERIVATIVE_LOWER).ld endif else ifeq (${TOOLCHAIN},iar) LINKER_DEF:= $(PLUGINS_DIR)/Platform_$(AR_PKG_NAME)/build_files/$(TOOLCHAIN)/linker_ram_$(DERIVATIVE_LOWER).icf else LINKER_DEF:= $(PLUGINS_DIR)/Platform_$(AR_PKG_NAME)/build_files/$(TOOLCHAIN)/linker_ram_$(DERIVATIVE_LOWER).ld endif endif kerryzhou_0-1759486694885.png Fig 8 (4) Complier options change ifeq (${TOOLCHAIN},iar) ################################################################################ # iar Compiler options ################################################################################     clib        := $(IAR_DIR)/arm/lib     CCOPT           +=  --cpu=Cortex-M7 \                         -DAUTOSAR_OS_NOT_USED \                         -DUSE_MCAL_DRIVERS \                         --fpu=FPv5-SP \                         --cpu_mode=thumb \                         --endian=little \                         -e \                         -Ohz \                         --debug \                         --no_clustering \                         --no_mem_idioms \                         --do_explicit_zero_opt_in_named_sections \                         --require_prototypes \                         --no_wrap_diagnostics \                         --diag_suppress=Pa050 \                         $(MISRA) \                         -D$(PLATFORM) \                         -D$(DERIVATIVE) \                         -DIAR \                         -DUSE_SW_VECTOR_MODE  \                         -DENABLE_FPU \                         -DD_CACHE_ENABLE \                         -DI_CACHE_ENABLE                             LDOPT           :=  --entry _start \                         --enable_stack_usage \                         --skip_dynamic_initialization \                         --no_wrap_diagnostics \                         --cpu=Cortex-M7 \                         --fpu=FPv5-SP                             ASOPT           :=  $(ASOPT) \                         --cpu Cortex-M7 \                         --cpu_mode thumb \                         -g \                         -r \                         -DMULTIPLE_CORE   endif   kerryzhou_8-1759479139911.png Fig 9 kerryzhou_9-1759479140195.png Fig  10 So how did these IAR compilation options come about? You can refer to the release note of RTD600, which contains corresponding descriptions kerryzhou_10-1759479140292.png Fig 11 (5) Elf related change ifeq (${TOOLCHAIN},iar) %.elf: %.o $(LINKER_DEF)               @echo "Linking $@"               @$(LD) $(ODIR)/*.o $(LDOPT) --config $(LINKER_DEF) --map $(ODIR)/ -o $(ODIR)/$@@               @$(GENHEX) $(HEX_OPTS) "$(ODIR)/$(ELFNAME).elf" "$(ODIR)/$(ELFNAME).hex" else %.elf: %.o $(LINKER_DEF)               @echo "Linking $@"               @$(LD) -Wl,-Map,"$(MAPFILE)" $(LDOPT) -T $(LINKER_DEF) $(ODIR)/*.o -o $(ODIR)/$@@               @$(GENHEX) $(HEX_OPTS) "$(ODIR)/$(ELFNAME).elf" $(OUT_OPTS) "$(ODIR)/$(ELFNAME).hex" endif   kerryzhou_11-1759479140481.png Fig 12 2.2.7   Build to generate elf Commander: make clean make build to generate the elf files： kerryzhou_12-1759479140695.png Fig 13 After generation, the elf can be burned onto the S32K344 EVB board for testing. The test results show that the onboard red light is flashing, indicating that the IAR compiler can work in command-line mode. 3. Import RTD MCAL to IAR IDE project This chapter explains how to create an IAR IDE project and import MCAL drivers to implement S32K3 MCAL combined with EB tresos for running. 3.1 MCAL IAR IDE project 2 methods Difference between two methods and how to import MCAL drivers: (1) Directly copy the RTD MCAL driver to the IAR IDE project directory (2) Connect the IAR IDE project driver to the original RTD driver path kerryzhou_13-1759479140899.png Fig 14 3.2 MCAL IAR IDE project import steps 3.2.1 create the new RTD MCAL IAR project folder    Create a new folder, named as：S32K344_DIO_MCAL_RTD600_IAR 3.2.2 create the sub folder for IAR project       Generate：EB tresos project code       Include：app related include file       Mcal： mcal driver copy from RTD       src： project main file       Tresos_Project：EB tresos project kerryzhou_14-1759479140922.png Fig 15 3.2.3 create EB tresos project (1) Create the EB tresos project in the followign path：  S32K344_DIO_MCAL_RTD600_IAR\Tresos_Project\Mcal_Dio_S32K344_RTD600_IAR   (2)Add modules: BaseNXP, Dem, Dio, EcuC, Mcu, Platform, Port, Resource   (3)Copy RTD xdm files in the following path: C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Dio_TS_T40D34M60I0R0\examples\EBT\S32K3XX\Dio_Example_S32K344\TresosProject\Dio_Example_S32K344\config to： S32K344_DIO_MCAL_RTD600_IAR\Tresos_Project\Mcal_Dio_S32K344_RTD600_IAR\config   (4)EB tresos Generate project EB tresos code will be generated to folder: S32K344_DIO_MCAL_RTD600_IAR\Generate kerryzhou_15-1759479141010.png Fig 16 3.2.4 Copy RTD related drivers to IAR project folder (1) BaseNXP: header, include, src (2)Det:  include, src (3)Dio:  include, src (4)Mcu:  include, src (5)Platform: build_files, include, src, startup (6)Port: include, src (7)Rte: include, src Copy RTD folder to IAR project is one method, if don’t want to copy the file, also can use the linker to add the RTD install path drivers directly. kerryzhou_16-1759479141081.png Fig 17 3.2.5 IAR IDE create IAR project   (1) Project->Create new project   (2) In the IAR project, add group   The related folder in project can be structured like the fig 18, which contains:   Generate: Include and src->EB tresos project generate code   Mcal:  Base, Det, Dio, Mcu, Platform, Port, Rte->Mcal driver   Src: Main.c->project main code      (3) Add RTD mcal related drivers to IAR project The RTD MCAL related driver files can be directly downloaded from the RTD installation path or copied to a folder in the IAR project, and both methods yield the same result. kerryzhou_17-1759479141217.png Fig 18 （4）IAR project platform folder added result: kerryzhou_18-1759479141232.png Fig 19 （5）main code add Main.c can copy from path: C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Dio_TS_T40D34M60I0R0\examples\EBT\S32K3XX\Dio_Example_S32K344\src to S32K344_DIO_MCAL_RTD600_IAR\src Comment:  //#include "check_example.h"  // Exit_Example(TRUE);   3.2.6 IAR project options configuration (1)General options->Target->Device->NXP S32K344 (2)C/C++ Complier->Preprocessor Addional include directories: Use IAR project folder drivers which copied from RTD install path, the directories are： $PROJ_DIR$\Generate\include $PROJ_DIR$\mcal\BaseNXP_TS_T40D34M60I0R0\header $PROJ_DIR$\mcal\BaseNXP_TS_T40D34M60I0R0\include $PROJ_DIR$\mcal\Mcu_TS_T40D34M60I0R0\include $PROJ_DIR$\mcal\Platform_TS_T40D34M60I0R0\include $PROJ_DIR$\mcal\Rte_TS_T40D34M60I0R0\include $PROJ_DIR$\mcal\Platform_TS_T40D34M60I0R0\startup\include $PROJ_DIR$\mcal\Det_TS_T40D34M60I0R0\include $PROJ_DIR$\mcal\Dio_TS_T40D34M60I0R0\include $PROJ_DIR$\mcal\Port_TS_T40D34M60I0R0\include $PROJ_DIR$\include If use the RTD install path drivers, use the following directories： $PROJ_DIR$\Generate\include C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\BaseNXP_TS_T40D34M60I0R0\header C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\BaseNXP_TS_T40D34M60I0R0\include C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Mcu_TS_T40D34M60I0R0\include C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Platform_TS_T40D34M60I0R0\include C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Rte_TS_T40D34M60I0R0\include C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Platform_TS_T40D34M60I0R0\startup\include C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Dio_TS_T40D34M60I0R0\include C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Port_TS_T40D34M60I0R0\include C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Det_TS_T40D34M60I0R0\include $PROJ_DIR$\include   Defined symbols: S32K3XX S32K344 IAR USE_SW_VECTOR_MODE D_CACHE_ENABLE I_CACHE_ENABLE ENABLE_FPU   Extra options: --no_clustering --no_mem_idioms --do_explicit_zero_opt_in_named_sections --require_prototypes --no_wrap_diagnostics   Languate 1:   Check Require prototypes   Diagnostics Suppress these disgnostics: Pa050 kerryzhou_19-1759479141564.png Fig 20 (3)Linker: Two points need to be added： $PROJ_DIR$\mcal\Platform_TS_T40D34M60I0R0\build_files\iar\linker_flash_s32k344.icf Library->Entry symbols: _start kerryzhou_20-1759479141785.png Fig 21 (4)Debugger Setup: PE micro, run to main Extra Options: Use command line options: --drv_vector_table_base=__ENTRY_VTABLE kerryzhou_21-1759479141872.png Fig 22 3.2.7  Build IAR project Project->Rebuild All kerryzhou_22-1759479141894.png Fig 23 3.2.8  Test result Download and debug result: kerryzhou_23-1759479142011.png Fig 24 After downloading and running, the red led is blinking on the board, indicating that the IAR IDE MCAL import method project has been successfully run.  

* ================================================================================================== * Detailed Description: * * This example shows how to implement ADC continuous scan with DMA read. * ADC1 is set to perform continuous scan of 4 channels (S10/S11/S12,S13) with DMA request enabled * for last channel S13. DMA reads respective sequential ADC data registers in one major loop. * * ADC1 channel S10 is connected to board's potentiometer, converted value is used to dim board's LED. * * ================================================================================================== * Test HW: S32K312EVB-Q172 * MCU: S32K312_172LQFP * Compiler: S32DS 3.6.3 * RTD release: S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0 * Debugger: On-Board Debugger (J40), Lauterbach * Target: Internal_FLASH * ==================================================================================================   Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.  

Abstract This example presents an use case for complementary PWM outputs with dead-time insertion and hardware ADC triggering using eFlexPWM, TRGMUX, BCTU, SAR-ADC and DMA modules on S32K39-37-36 series based on the RTD low level API to support diverse application needs. Connections: S32K396-BGA-DC1 -> Pin -> Signal -> Label J62-1 -> PTC30 -> siul2_gpio_94 -> GPIO1_GPT J62-5 -> PTD2 -> pwm_0_a, 2 -> PWM1 J62-6 -> PTD3 -> pwm_0_b, 2 -> PWM2 J62-30 -> PTD24 -> pwm_0_a, 0 -> PWMT J62-2 -> PTC31 -> siul2_gpio_95 -> GPIO3_BTCU_Trigger J62-4 -> PTD6 -> siul2_gpio_102 -> GPIO4_BTCU_Watermark J62-24 -> PTB14 -> adc1_s21 -> ADC1 *To use the potentiometer of S32X-MB connect: J62-24 (in S32K396-BGA-DC1) to P26-1 (in S32X-MB)   Note: Following line should be added in project/generate/src/Bctu_Ip_PBcfg.c every time the code is updated in Config Tools: #define DMA_LOGIC_CH_0 ((uint8)0U)   Detailed Description: The Compare Value of GPT eMIOS 0 channel 0 generates a time-out period. Once time-out is reached its eMIOS notification toggles GPIO1. This allows us to observe in scope 2 events, which describe the start and the end of the signal sequence. The eFlexPWM0 module is used for generating PWMs and hardware ADC triggering. The eFlexPWM0 Submodule 2 is employed to generate center-aligned complementary PWM outputs (PWM1 and PWM2) with dead-time insertion. The eFlexPWM0 Submodule 0 generates another independent PWM output (PWMT) and is utilized to generate the trigger signal for analog data capturing within the same PWM period —happens at half the time high in this case—using VAL0 register. The BCTU implements a list for parallel conversions using ADC0 and ADC1. Which is triggered by the eMIOS channel, and the resulting data is stored in FIFO1, as follows: • ADC0: VREFH_ChanNum51 -> BANDGAP_ChanNum48 • ADC1: VREFL_ChanNum50 -> S21_ChanNum45 For debugging purposed the GPIO3 is toggled every BCTU Trigger Notification. Additionally, the GPIO4 is toggled in BCTU Watermark Notification, which happens every time the number of active entries in FIFO exceeds the watermark level, and therefore the data is available for reading. See full signal sequence in Figure 1: _Leo__0-1757704142905.png Figure 1. Signals of example project When you suspend debug session, in Expressions tab (Figure 2) you can observe results: g_fifo1Result, which corresponds to the BCTU list measurements, meanwhile g_fifo1Volts corresponds to the conversion in volts. _Leo__1-1757633126890.png Figure 2. Expressions tab of example project   References S32 Design Studio for S32 Platform Real-Time Drivers (RTD) S32K39, S32K37 and S32K36 Data Sheet [S32K39-S32K37-DS] S32K39, S32K37, and S32K36 Reference Manual [S32K396RM] S32K344 to S32K39/S32K37 Migration Guide [AN14301] S32K39/37/36 Electrification Microcontrollers Evaluation Board [S32K396-BGA-DC1] S32X-MB I/O Extension Evaluation Board for Real-Time Domain Control and Actuation [S32X-MB] S32K39-37-36 – eMIOS/BTCU/SAR-ADC/DMA – [RTD600] [S32K Knowledge Base]   Application Software: - S32K396_RTD600_eFlexPWM_TRGMUX_BCTU_SARADC_DMA Example was built and tested using the following IDE and Driver versions: - S32 Design Studio for S32 Platform Version 3.6.3 - S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0

Abstract This example presents an use case for analogue data capturing using eMIOS, BCTU, SAR-ADC and DMA modules on S32K39-37-36 series based on the RTD low level API to support diverse application needs.   Connections: S32K396-BGA-DC1 -> Pin -> Signal -> Label J62-1 -> PTC30 -> siul2_gpio_xx -> GPIO1_GPT (D0) J58-1 -> PTE14 -> emios_0_ch_19_z -> PWM1 J58-2 -> PTG9 -> siul2_gpio_xx -> GPIO2_eMIOS_Trigger J62-2 -> PTC31 -> siul2_gpio_xx -> GPIO3_BTCU_Trigger J62-4 -> PTD6 -> siul2_gpio_xx -> GPIO4_BTCU_Watermark J62-24 -> PTB14 -> adc1_s21 -> ADC1 *To use the potentiometer of S32X-MB connect: J62-24 (in S32K396-BGA-DC1) to P26-1 (in S32X-MB) Note: Following line should be added in project/generate/src/Bctu_Ip_PBcfg.c every time the code is updated in Config Tools: #define DMA_LOGIC_CH_0 ((uint8)0U)   Detailed Description: The Compare Value of GPT eMIOS_0_ch_0 generates a time-out period. Once time-out is reached its Emios Notification toggles GPIO1. This allows us to observe in scope 2 events, which describe the start and the end of the signal sequence. The eMIOS_0_ch_23 channel is configured as global counter bus A. In this setup, it can act as the time base for other eMIOS_0 channels, enabling synchronization between other them—there is just one PWM in this case. This synchronization ensures that channels share the same time base, thereby defining a common period for their operation. The emios_0_ch_19_g channel is configured as OPWMT mode, which offer more flexibility for triggering. An interrupt is requested on every flag event, during which GPIO2 is toggled—happens at half the time high in this case. This flag event, can be configured using Trigger parameter. For more details about eMIOS, please refer to S32M27x/S32K3 – eMIOS Usage, considering differences for porting from S32K3 to S32K39-37-36 in AN14301. The BCTU implements a list for parallel conversions using ADC0 and ADC1. Which is triggered by the eMIOS channel, and the resulting data is stored in FIFO1, as follows: ADC0: VREFH_ChanNum51 -> BANDGAP_ChanNum48 ADC1: VREFL_ChanNum50 -> S21_ChanNum45 For debugging purposed the GPIO3 is toggled every BCTU Trigger Notification. Additionally, the GPIO4 is toggled in BCTU Watermark Notification, which happens every time the number of active entries in FIFO exceeds the watermark level, and therefore the data is available for reading. See full signal sequence in Figure 1: _Leo__0-1757444081948.png Figure 1. Signals of example project When you suspend debug session, in Expressions tab (Figure 2) you can observe results: g_fifo1Result, which corresponds to the BCTU list measurements, meanwhile g_fifo1Volts corresponds to the conversion in volts. _Leo__1-1757444095709.png Figure 2. Expressions tab of example project   References S32 Design Studio for S32 Platform Real-Time Drivers (RTD) S32K39, S32K37 and S32K36 Data Sheet [S32K39-S32K37-DS] S32K39, S32K37, and S32K36 Reference Manual [S32K396RM] S32K344 to S32K39/S32K37 Migration Guide [AN14301] S32K39/37/36 Electrification Microcontrollers Evaluation Board [S32K396-BGA-DC1] S32X-MB I/O Extension Evaluation Board for Real-Time Domain Control and Actuation [S32X-MB] S32M27x/S32K3 – eMIOS Usage [S32M Knowledge Base] S32M27x/S32K3 – eMIOS/BTCU/ADC/DMA – [RTD600] [S32M Knowledge Base] S32K39-37-36 – eFlexPWM/TRGMUX/BCTU/SAR-ADC/DMA – [RTD600] [S32M Knowledge Base] Application Software: - S32K396_RTD600_eMIOS_BCTU_SARADC_DMA_Ip_example Example was built and tested using the following IDE and Driver versions: - S32 Design Studio for S32 Platform Version 3.6.3 - S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0

*******************************************************************************  The purpose of this demo application is to present a usage of the  FS26 watchdog timer refresh using the SBC_FS26 CDD  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * FS26 : CDD 2.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Please Modify attached code, and add this line of code, in this function Sbc_Wdg_Refresh_Notification  :-- Gpt_StopTimer(GptConf_GptChannelConfiguration_GptChannelConfiguration_0);   Dinesh_Guleria_0-1758195360264.png   This change will make the example work for even starting FS26, driver at 6 msec and above. Dinesh_Guleria_0-1758195859088.png   Watchdog type :-- NXP eval boards has ASIL-D FS26 part with challenger watchdog. The OTP of FS26 on the board uses challenger watchdog. Dinesh_Guleria_0-1756718067313.png Change watchdog in code :-- FS26 watchdog is started in disabled mode (means infinite period). Later on we change the watchdog time in the code :-- Dinesh_Guleria_1-1756718132100.png   Dinesh_Guleria_2-1756718767003.png   Array Index for watchdog refresh timing  :-- Dinesh_Guleria_3-1756718995126.png Example will run once you press switch USER_SW0 connected on PTB26 on the Evaluation board :-- Please add this type of check in your code, during development process so that, avoid any error due to FS26 watchdog mis trigger. When you use Debug FLASH then in that case code goes to flash memory & can cause your MCU to frequent RESET, which caused issue for reprogramming the NEW firmware on the board FLASH memory. If we add this type of check then we can avoid the Faulty FS26 Software to stop misbehaving before flashing new firmware on the board.   Dinesh_Guleria_0-1756719751273.png In CDD-2.0.0, FS26 goes to INIT_FS state here  :--- Sbc_fs26_InitDevice() --> Sbc_fs26_CheckStateAndGotoInitFS() Dinesh_Guleria_0-1756801397854.png   In CDD-2.0.0, If we start the Watchdog in enabled mode, watchdog notification function to refresh watchdog is called from this function  :-- Sbc_fs26_InitDevice() --> Sbc_fs26_NormalFSSequence() -->  Dinesh_Guleria_1-1756801468887.png   Dinesh_Guleria_2-1756801505399.png   Dinesh_Guleria_4-1756801794626.png In CDD 2.0.0, Following function call will exit Debug mode & Release FS0b & FS1B pin :-- Sbc_fs26_InitDevice() --> Sbc_fs26_NormalFSSequence() :--- --> Sbc_fs26_ExitDebugMode() --> Sbc_fs26_ReleaseSequence() Dinesh_Guleria_5-1756801976481.png   In CDD 2.0.1, Following function call will exit Debug mode & Release FS0b & FS1B pin :-- Sbc_fs26_InitDevice() --> Sbc_fs26_NormalFSSequence() --> Sbc_fs26_ExitDebugMode() Dinesh_Guleria_6-1756802067148.png ===================== CDD-2.0.1 example ================= RTD used :-- S32K3XX_AASW_4_7_RTM_FS26_2_0_1_DS_updatesite_2311_signed.zip Watchdog started in the Disabled mode (i.e infinite Period) then watchdog period is changed in the code main() function :-- Dinesh_Guleria_0-1757654029498.png Dinesh_Guleria_2-1757654310161.png   Driver configuration :-- Dinesh_Guleria_1-1757654073235.png   These function get executed :--   Dinesh_Guleria_4-1757654554696.png   Dinesh_Guleria_5-1757654594171.png   Dinesh_Guleria_6-1757654613589.png One bug in RTD   ---> S32K3XX_AASW_4_7_RTM_FS26_2_0_1_DS_updatesite_2311_signed.zip :-- Dinesh_Guleria_7-1757655145135.png RTD driver Bug is corrected like this :--  Dinesh_Guleria_8-1757655226962.png  

This example project will show user how to use and configure the basic functionalities of WKPU + RTI (PIT0).  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) * MCU: S32K344 * IDE: S32DS3.5 & S32DS3.6 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU & PIT for wake-up. The PIT0 instance includes a dedicated RTI (Real Time Interrupt) timer that runs on a separate oscillator clock and can be used for system wakeup. A key feature of this is power saving with a separate input clock for the RTI timer. All other timers share a common core clock. Note: Only PIT_0 supports the RTI feature, and exists in the Standby domain. Snag_17d7ab1.png This example does not poll for a SW press to enter and configure standby; Instead, the main function directly enters the Wkpu_EnterStandby() function which: Switches core clock to FIRC. Initializes and configures WKPU instance and wake-up source 3 (RTI). Initializes and configures PIT0 and PIT0 CH0 as set in Config Tools view. If EN_RUN_ICYCL_DUTY macro is enabled, configures PIT1 for user code before going to standby. Once Pit1_Notification is entered, runFlag is set to FALSE. Turns off LED. Enables RTI channel interrupt (otherwise, MCU cannot be woken up). Finally, sets the timeout value (WKPU_ICYCL_DUTY_TIME macro) and enters standby. This showcases the basic configuration for template on a fast-scanning power saving routine (for example, wake-up, measure ADC, go back to sleep). Keep in mind that power saving depends on the frequency of wake-up events. If MCU spends more time in Run mode rather than in Standby mode, power consumption is affected. The transition time from Standby mode to Run mode is quick. If the MCU only spends 9ms in Run and 1ms in Standby, the average current of the system will be considerably higher than if the MCU was running only 1ms every 1 second. Refer to S32K3 Low Power Management AN and demos for further information. After the period defined with either WKPU_ICYCL_DUTY_TIME, MCU wakes up. After wake-up, MCU resets and the cycle repeats. This example is provided as is with no guarantees and no support.

This example project will show user how to use and configure the basic functionalities of WKPU + RTC timeout.   ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) * MCU: S32K344 * IDE: S32DS3.5 & S32DS3.6 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU & RTC units for wake-up. The RTC is present in always ON domain, hence available in RUN mode as well as in STANDBY mode. Snag_146849f.png The RTC can trigger a single wake-up event (timeout). When the RTC counter reaches a specific, pre-defined alarm time set by the user. RTC timeout is mapped as wake-up source 1. RTC0_CLK source is configured as SIRC_CLK, and SIRC_CLK must be enabled in standby mode. Snag_14e35ad.png Snag_14e5376.png Chapter 69.3.1 RTC explains the functionality of the RTC timer. RTCVAL is updated at the point where no counter match is due as per the previous RTCVAL, the RTCF flag is set when the counter matches the new value. If there is a match when in the low-power mode, then the RTC first generates a wakeup request to force a wakeup to run mode, and then the RTCF flag is set. The routine waits for SW5 to be pressed, then turns off the green LED, and enters Wkpu_EnterStandby() function which: Switches CORE_CLK to FIRC. Initializes the WKPU instance. Configures WKPU1 & WKPU42 (PTB19). Initializes and enables interrupt for RTC. Loads the RTCVAL value to 5000ms.  Starts the counter. Enters standby (or fast standby). After the period defined with RTC_TIME or RTC_PERIOD_DELAY_MS(x) macros defined in Wkpu.h, MCU wakes up. After wake-up, MCU resets and polls for SW5 to be pressed again. This example is provided as is with no guarantees and no support.

This example project will show user how to use and configure the basic functionalities of WKPU + RTC API.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) * MCU: S32K344 * IDE: S32DS3.5 & S32DS3.6 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU & RTC units for wake-up. The RTC is present in always ON domain, hence available in RUN mode as well as in STANDBY mode. Snag_120dece.png The chip contains one instance of RTC (Real Time Clock) timer and API (Autonomous Periodic Interrupt) timer, where both can perform 32-bit comparisons. Both RTC and API timers can generate interrupts as well as wake-up from low power modes. The following figure highlights the path for RTC API wake-up. Please refer to Chapter 69.3.2 API functional description from the S32K3XX reference manual (Rev. 12) for further information. Julin_AragnM_0-1768424703841.png The routine waits for SW5 to be pressed, then turns off the green LED, and enters Wkpu_EnterStandby() function which: Switches CORE_CLK to FIRC. Initializes the WKPU instance. Configures WKPU2 & WKPU42 (PTB19). Initializes and enables interrupt for RTC. Enables RTC API and loads the APIVAL to 3000ms.  Starts timer. Enters standby (or fast standby). After the period defined, RTC API generates an interruption and MCU wakes up. After wake-up, MCU resets and polls for SW5 to be pressed again. The RTC API value can be changed with RTC_PERIOD_DELAY_MS(x) macro defined in Wkpu.h. This example is provided as is with no guarantees and no support.

This example project will show user how to use and configure the basic functionalities of WKPU + LPCMP.   ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) * MCU: S32K344 * IDE: S32DS3.5 & S32DS3.6 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU & LPCMP units for wake-up. The S32K3XX's LPCMP can operate in trigger mode in both standby and run mode to continuously scan the input channels. RTC-API and LPCMP must be configured before entering into standby mode as per below shown figure: Snag_13de950.png   See chapters 61.1.5 Comparator Trigger Mode & 61.1.6 Interaction with RTC API to cause wakeup from the S32K3XXRM (Rev. 12) for further information.   The register configurations before entering Standby mode for LPCMP trigger mode operation is the following:   Configure RTC.APIVAL to set the period of the round robin operation. Execute standby mode entry. The routine waits for SW5 to be pressed, then turns off the green LED, and enters Wkpu_EnterStandby() function which: Switches CORE_CLK to FIRC. Initializes the WKPU instance. Configures WKPU2 & WKPU42 (PTB19). Initializes and enables interrupt for LPCMP. Initializes RTC and sets the timer value (in RTCC - APIVAL) to 100ms. Starts timer. Enters standby (or fast standby). While in standby, PTA0/1/2 are active; if a voltage higher than 2.5V is detected (ICU LPCMP DAC Voltage Level = 127), or SW6 is pressed MCU will wake-up.  After wake-up, MCU resets and polls for SW5 to be pressed again. The RTC timer value can be changed with RTC_PERIOD_DELAY_MS(x) macro defined in Wkpu.h. This example is provided as is with no guarantees and no support.

This example project will show user how to use and configure the basic functionalities of WKPU + SIUL2 (GPIO).  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) * MCU: S32K344 * IDE: S32DS v3.5 & S32DS v3.6.x * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU unit for a GPIO interrupt wake-up. This is the simplest WKPU example. Pin PTB19 (WKPU42) is configured for wake-up.  The routine waits for SW5 to be pressed, then turns off the green LED, and enters Wkpu_EnterStandby() function which: Switches core clock to FIRC. Initializes the WKPU instance. Configures WKPU42 (PTB19). Enters standby (or fast standby). After pressing SW6, MCU wakes up, resets and polls for SW5 to be pressed again. This example is provided as is with no guarantees and no support.

This example project will show user how to use and configure the basic functionalities of WKPU + FlexCAN.   ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) * MCU: S32K344 * IDE: S32DS3.5 & S32DS3.6 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the FlexCAN0 instance for reception. Since RevB2 of the EVB was used for development, CAN TRXCVR used is TJA1443. TJA1443 is initialized in main code (CAN0_STB = 1 & CAN0_EN = 1). FlexCAN bitrate: Bitrate: 500 Kbps Sampling point: 81.25% Individual mask is set to 0x0, meaning all IDs are accepted. Main routine: Waits for SW5 to be pressed, or for FlexCAN interrupt. If SW5 is pressed, turns off green LED, disables FlexCAN and switches CORE_CLK to FIRC. It then configures both PTB19 (SW6) and PTA6 (CAN0_RX) for interrupt wakeups. If either SW6 is pressed or a CAN message is received (edge detect on PTA6), MCU wakes up and will wait for SW5 to be pressed again. FlexCAN is configured for INTERRUPT; If a CAN frame is received, bRxFlag is set to 1 inside the callback, blue LED is toggled, and an ACK frame is sent back. CAN communication can be tested either with another EVB, or with a PCAN analyzer connected to J32. PCAN-View log for dummy and ACK messages: Julin_AragnM_0-1768422984265.png This example is provided as is with no guarantees and no support.

This post presents two complementary FlexCAN communication examples for the S32K3X4EVB-T172 evaluation board, showcasing both low-level IP layer and AUTOSAR MCAL layer implementations. These examples are basic routines for configuring the component in normal/user mode, as the RTD examples are configured for loopback mode. To test CAN communication, another board or a CAN analyzer must be used. Since Rev. B2 of S32K3X4EVB-T172 was used to test the project, TJA1043 transceiver is mounted on the board and used to test the examples. ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 * MCU: S32K344 * Compiler: S32DS 3.6.2 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH ------------------------------------------------------------------------------ Example 1: FlexCAN IP Layer (LLD) This project demonstrates a basic FlexCAN setup using the IP-level driver. It configures a standard CAN message; with transmission through POLLING and reception using INTERRUPT. If TJA1153 transceiver is used, macro TJA1153 must be uncommented at the top of the project, and it will be initialized through a custom configuration sequence. If not used and the macro is commented, normal transceiver initialization is done (only CAN0_EN_PIN & CAN0_STB_PIN set to HIGH). Rx Filter mask type is individual and set to receive STD ID 123h.  Tx MB is set to STD ID 001h. FlexCAN bitrate was calculated with MPC5xxx/S32Kxx/LPCxxxx: CAN / CAN FD bit timing calculation. FlexCAN bitrate settings are 500kbps with 81.25% sample point  FPE_CLK: 24MHz Synch seg: 1 Prop seg: 4 Phase 1 seg: 8 Phase 2 seg: 3 Prescaler: 3 RJW: 3    Example 2: FlexCAN MCAL Layer (HLD) This project configures both Can_43_FLEXCAN and CanIf modules for CAN communication. Transmission is done via POLLING, while reception is configured via INTERRUPT.  Tx MB is set to STD ID 123h. Acceptance mask is set to 0x0 (accept all IDs). CAN messages are sent using Can_43_FLEXCAN_Write() and received using the CanIf_RxIndication() callback. After CanIf_bRxFlag is set, an ACK message is sent back. The GREEN LED toggles every 10 received messages. FlexCAN bitrate was calculated with MPC5xxx/S32Kxx/LPCxxxx: CAN / CAN FD bit timing calculation. FlexCAN bitrate settings are 500kbps with 81.25% sample point  FPE_CLK: 24MHz Synch seg: 1 Prop seg: 4 Phase 1 seg: 8 Phase 2 seg: 3 Prescaler: 3 RJW: 3  If TJA1153 transceiver is used, macro TJA1153_EVB_TRCV must be used. If not, use TJA1043_EVB_TRCV for standard transceiver initialization (CAN0_STB & CAN0_EN pins set to HIGH).    PCAN-View configuration   PCAN-View message logs     These examples are provided as is with no guarantees and no support. These are basic routines meant to be used as reference only.

This simple example demonstrates how to configure and handle UART interrupts using the LPUART module on both S32K312EVB-Q172 & S32K312MINI-EVB. It sets up a UART callback function and initiates reception in single-byte mode. After each byte is received, the buffer is updated using  Lpuart_Uart_Ip_SetRxBuffer() , unless a newline character ( '\n' ) is detected, in which case a reception flag is set to signal the main loop. When the  LPUART_UART_IP_EVENT_END_TRANSFER  event occurs, reception is re-enabled using  Lpuart_Uart_Ip_AsyncReceive() . Note: Only basic event handling is implemented; other UART events are acknowledged but not processed. The example uses LPUART instance 6, enabling serial communication via the USB port (J40 on EVB & J9 on MINI EVB).  ------------------------------------------------------------------------------ * Test HW: S32K312EVB-Q172 & S32K312MINI-EVB  * MCU: S32K312 * IDE: S32DS3.6.2 * RTD release: 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ Running the example: 1. Open a Serial terminal on PC for the serial device with these settings:   115200 baud rate   No parity   One stop bit  No flow control   If using TeraTerm, ensure the transmit setting is configured to LF (Line Feed) to properly send newline characters when pressing Enter. TeraTerm_Setup.png 2. Build and run the example. Test result: TeraTerm_Result.png   Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.

* ================================================================================================== Detailed Description: * This example shows how to implement the UART RX/TX using interrupt/callback under FreeRTOS. * LPUART6 is set for 115200, 8N1 using interrupt processing. Callback is called for single byte received. * Reception is advanced until buffer is full or "\n" is received. * 2 tasks (receive/send) and 1 Queue are created. * ReceiveTask starts new UART reception, waits for completion and puts received message into Queue. * SendTask gets the message from Queue, echoes it back and toggle pin (LED_PIN <-> PTA29). * ================================================================================================== * Test HW: S32K3x4EVB-T172 Rev B * MCU: S32K344_172HDQFP * Compiler: S32DS 3.6.2 * RTD release: S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0 * Debugger: On-Board Debugger (J41) * Target: Internal_FLASH * Serial: 115200, 8N1 * ==================================================================================================   Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.

******************************************************************************** * Detailed Description: * The S32K144 MCU is configured as a LIN Slave node. * When a MasterReq frame (0x3C) is received with Go-to-sleep command, the stack goes to sleep. * The application can read: * l_flg_tst_LI0_MasterReq_flag() * l_ifc_read_status(LI0) * When a falling edge is detected on the LPUART RX pin, * LinWakeUpTimerNotification() is called. * The notification has to be enabled in MEX. * Gpt (LPIT) timer is used to calculated the length of the wake-up signal. * * ------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: S32K144 * Debugger: S32DS_ARM_3.6, S32K1_RTD_3_0_0_D2503 * Target: internal_FLASH ********************************************************************************   Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.

This post is an additional project to the S32K3 Low Power Management AN and demos.  A simple FlexCAN routine is configured for RX/TX and wakeup through the CAN0_RX pin (PTA6/WKPU19). The example is based on the S32K3X4EVB-T172, meaning that transceiver TJA1443 is used. TJA1443 only needs CAN0_EN & CAN0_STB pins in HIGH for normal configuration. In the example, the GREEN led is used to indicate that the MCU is in RUN mode. Once SW5 is pressed, MCU enters low power (STANDBY), and led is turned off. BLUE led toggles each time a CAN frame is received. MCU can be woken up with SW6 (WKPU42) or through a CAN RX. Note that CAN is not enabled in low-power, rather PTA6 (WKPU19) is configured for wake up, and once a rising edge signal is detected on the pin, MCU wakes up and reconfigures CAN module.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 * MCU: S32K344 * Compiler: S32DS3.6.2 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example is provided as is with no guarantees and no support.

******************************************************************************** The purpose of this demo application is to show you how to use the Temperature Sensor module in S32DS. It includes two methods to obtain temperature. -The first one starts a normal software conversion with one-shot mode on temp sense channel and calculates the temperature on chip from the data conversion. -The second one calculates the temperature based on given data (if read directly using ADC). Note: Please adjust the ADC reference voltage according to the board you are using * ------------------------------------------------------------------------------ * Test HW: S32K344EVB-T172 * MCU: S32K344 1P55A * Compiler: S32DS.ARM.3.5/6 * SDK release: S32K3_RTD_6.0.0/5.0.0/4.0.0_P24 * Debugger: OpenSDA/PE&Micro * Target: internal_FLASH *Jumper:J18-1:2,5V used. ********************************************************************************* Note that if you use "sprintf", you need to check the following option. Senlent_0-1753435505415.png  

MCU : S32K144 AFE : MC33771 RTD : 1.0.1 As we know BCC sample software for MC33771C which is delivered is based on SDK for S32K144 , and uses S32DS-2.2 :-- BCC_S32K144_FreeMASTER I am having a setup , for this combination, using SPI :-- FRDM33771CSPEVB evaluation board  + S32K144 + 14 cell Battery EMULATOR :    S32K144 pins used :-- MOSI :  LPSPI0  : PTB-4 MISO :  LPSPI0  : PTB-3 SCK :    LPSPI0  : PTB-2 CSB :    LPSPI0  : PTB-5 RESET line of MC33771C : PTD-4 FRDM33771CSPEVB pins used :-- https://www.nxp.com/docs/en/user-guide/UM11402.pdf SI of MC33771C : Connects to MOSI of S32K144 : K2-7 SO of MC33771C : Connects to MISO of S32K144 : K2-9 SCK of MC33771C : Connects to PTD-4 of S32K144 : K2-11 CSB :    K2 -5 RESET line of MC33771C : K4 -1 Freemaster uses UART-1 on S32K144 EVB ():-- TX : PTC7 RX : PTC6 I have ported the BCC_S32K144_FreeMASTER  sample code to S32K144 using RTD-1.0.1 & is working fine. This attached code work fine for SPI.  Two sample project i have attached, both are tested and working fine :--- 1> Chip select is controlled by LPSPI. 2> Chip select is controlled manually in user software. Fremaster project is also inside the folder, name of freemaster project is :-- 1> FreeMASTER_project.pmp TPL related part i have not ported & tested because at present i am not having MC33664ATL on S32K144 EVB board & do not have FRDM33771BTPLEVB (MC33771C board with TPL on it). Regards, Dinesh

*******************************************************************************  The purpose of this demo application is to present a usage of the  LPSPI IP Driver for the S32K3xx MCU.  The example uses LPSPI2 for transmit & receive Twelve bytes using the DMA. MOSI MISO connected on Hardware in loopback.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** DATA and Instruction CACHE is enabled by default --> in startup code :-- Dinesh_Guleria_5-1751970200614.png   Dinesh_Guleria_4-1751970159453.png Dinesh_Guleria_6-1751970233008.png   ========= This selection enable the use of CACHE driver API ========= Dinesh_Guleria_8-1751970355740.png   Dinesh_Guleria_7-1751970322758.png   ============= Use this MACRO ==================== #define USE_NON_CHACHABLE_REGION 1 This MACRO comment & uncomment will allocate the buffer in cachable & non cacable region of memory. You can allocate the SPI buffer in in cachable & non cacable region of memory. Enabling & disabling of this MACRO will adjust the example code. Dinesh_Guleria_9-1751971251496.png     ============ How this example works : Cacheable region used ============ I have connected MOSI and MISO pins of spi at hardware level. Whenever I am  sending and receiving total 10 numbers of 12 byte packet On each transmission of 12 byte packet I am incrementing the first bite of transmit buffer just to distinguish between packets at the receive side Cache_Ip_InvalidateByAddr() --> I have to call this API every time I receive 12 byte of data on receive buffer Cache_Ip_CleanByAddr() --> every time after incrementing the transmit buffer first byte ...I have to call this API then only the correct data is transmitted otherwise it will transmit the same data which was available at first time transfer ================ Cache API operation ============== Cache_Ip_InvalidateByAddr() is for the  invalidate operation. Cache_Ip_CleanByAddr() is for the clean operation or clean&invalidate operation that can be chosen by param of this api: @Param[in]  enInvalidate      Specifies to execute operation Clean&Invalidate. Clean: This operation ensures that all dirty lines—data in the cache that has been modified but not yet written back to the main memory—are written back to the main memory ->(push data from cache memory to main memory)  Invalidate: This operation marks the cache lines as invalid, ensuring that any subsequent access to these lines results in a fetch from the main memory, thus ensuring data consistency ->(push data from main memory to cache memory) Clean&invalidate : A cache clean and invalidate operation behaves as the execution of a clean operation followed immediately by an invalidate operation. Both operations are performed to the same location. ================ Pins used ====================== Dinesh_Guleria_0-1751969916564.png    

This example code brief  :-- 1> Tested without the SL of BMS, so no dependency on the BMS Safety library. 2> Its tested on 2 AFE MC33775 board connected in TPL 3> Change following macro in mc33775_cfg.h file  to change the numbers of AFE connected in TPL. Dinesh_Guleria_0-1751448691254.png     RTD : 3.0.0 P07 BMS SDK : 1.0.2 This example does this task :-- Application Measurement. SYNC measurement Periodic Measurement. Read AFE temperature. Cell balancing timer method. Reading the Cell balancing status register & fault registers. =================== Setup used ============ Attached code is tested with TWO MC33775 AFE connected in TPL mode. Dinesh_Guleria_1-1751448736809.png   =============== MCU Pins used =========== Dinesh_Guleria_2-1751448793258.png   FRDM665SPIEVB Jumper setting  :--- Dinesh_Guleria_3-1751448793501.png     Dinesh_Guleria_4-1751448793032.png   Dinesh_Guleria_5-1751448793336.png   Dinesh_Guleria_6-1751448792697.png   Dinesh_Guleria_7-1751448793330.png       Dinesh_Guleria_8-1751448793495.png   K1, K2 & K4 connector of S32J344 EVB :-- Dinesh_Guleria_9-1751448793319.png     Dinesh_Guleria_10-1751448793236.png   Dinesh_Guleria_11-1751448793280.png       K1 on MC33665 & S32K334 evb :--  Dinesh_Guleria_12-1751448793239.png   Dinesh_Guleria_13-1751448793356.png   K2 on MC33665 & S32K334 evb :--  Dinesh_Guleria_14-1751448793283.png   K4 on MC33665 & S32K334 evb :--  Dinesh_Guleria_15-1751448793320.png     Dinesh_Guleria_16-1751448793321.png   ================= EVB Link ==================   https://www.nxp.com/design/design-center/development-boards-and-designs/18-cell-battery-pack-emulator-to-supply-mc33774-bcc-evbs:BATT-18EMULATOR https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM665SPIEVB https://www.nxp.com/design/design-center/development-boards-and-designs/RD33775ADSTEVB https://www.nxp.com/design/design-center/development-boards-and-designs/automotive-development-platforms/s32k-mcu-platforms/s32k3x4evb-t172-evaluation-board-for-automotive-general-purpose:S32K3X4EVB-T172 ============= Using Debugger ============ Debugger breakpoint will cause the communication timeout at the AFE, which will RESET the AFE. To use the debugger while development you need to disable the communication timeout. In S32DS MEX file you cannot disable the timeout function ( limit the value of 0~255) Dinesh_Guleria_17-1751448981100.png   Disable Communication timeout in code :-- Dinesh_Guleria_18-1751448980612.png     ================= Results for TWO AFE =========================== Dinesh_Guleria_19-1751449011195.png   Dinesh_Guleria_20-1751449018900.png   Dinesh_Guleria_21-1751449027847.png   Dinesh_Guleria_22-1751449036447.png