Hello,      NXP does a big change on document structure.     Generally, you can find pin assignment table, interrupt mapping and memory map table in RM. But now, these information change to Excel files and attached in RM.   For example on S32K.    You will find the words in RM, like 'For reset values per port, see IO Signal Description Input Multiplexing sheet(s) attached to the Reference Manual.'    Then, please go to attachment tab of your PDF file viewer, like Adobe Acrobat Reader DC.     These steps are also fit for MPC57xx , S32R family. Cheers! Oliver

Welcome to the S32K Microcontrollers forum. Get expert advice from the NXP developer community. Our support team also monitors these forums to provide answers and take your feedback.   Anyone can read the discussions, but only registered NXP Community members can post questions and comments. Before you ask a question, please search the community to find if someone has already offered a solution. If you don’t see a solution, then ask the community your question. S32K Web page S32K Reference manual S32K Data sheet S32K Application notes and other documents S32K Evaluation Board S32 Design Studio IDE https://community.nxp.com/docs/DOC-334170 

******************************************************************************** * Detailed Description: * * This example shows how to use the back-to-back mode of the PDB to trigger * sequence of ADC channels conversion. 4 PDB channel 0 pre-triggers/triggers are * generated upon single PDB SW trigger. The first trigger is started by the PDB, * no delay is used. Next 3 triggers start after corresponding acknowledgment is * received from ADC0. * * Converted data is used to change color of the EVB led based on Trimmer position. * * ------------------------------------------------------------------------------ * Test HW:         FRDM-S32K144 * MCU:             PS32K144HFVLL 0N77P * Fsys:            default * Debugger:        S32DS * Target:          internal_FLASH * ********************************************************************************

Hi,        ARM Cortex-M have a DWT (Data Watchpoint and Trace) unit implemented, and it has a nice feature in that unit which counts the execution cycles. The DWT is usually implemented on most Cortex-M3, M4 and M7 devices, including e.g. the NXP S32K14x.      Attachment is the sample project on S32K142 to measure the running time of a function.     Password of extraction is nxp.     Enjoy the measuring!   Cheers! Oliver BTW, Measure the running time of one function on PowerPC could also be gotten through the link.

************************************************************************************************ Detailed Description: WDOG tested in SystemInit() function (system_S32K116.c) after POR. For debugging purposes: - WDOG counter reference clock is pre-scaled to slow the test (CS_PRES = 1). - During CNT_LOW test, BLUE LED (PTE8) ON. - During CNT_HIGH test, RED LED (PTD16) ON. - Once both tests have passed, GREEN LED (PTD15) ON. If either of the test fails, WDOG will stay in its default configuration and rest the MCU. ---------------------------------------------------------------------------------------------------------------- Test HW: S32K116EVB-Q048 REV.B MCU: S32K116 0N96V Debugger: S32DSR1, OpenSDA Target: internal_FLASH ************************************************************************************************

******************************************************************************** Detailed Description: The S32K144 MCU is secure if SEC bits are set to non 0b10 value in Flash Secure Register (FSEC). And can be unsecure using either Mass Erase or Verify Backdoor Access Key command provided they are enabled, again indicated by bits KEYEN and MEEM in the FSEC register. The FSEC register is a read-only register and is loaded with the content of the flash security byte in the Flash Configuration Field located in program flash memory during the reset sequence. The configuration field holds the Backdoor comparison key as well and is configurable in startup_S32K144.S file. The attached example code shows use of Verify Backdoor Access Key flash command. The MCU is secured in the Flash configuration field and therefore once the application has been loaded the debugger does not have access to the MCU which must be run stand-alone. The state of the SEC bits is indicated by LEDs. The RED LED indicates the MCU is secure (SEC != 0b10) after reset. After a delay loop, the Verify Backdoor key command is executed which will unsecure the device and the LED will turn BLUE (SEC = 0b10). NOTE: The Verify Backdoor key command is executed from RAM to avoid simultaneous access to the PFlash block. -------------------------------------------------------------------------------------------- Test HW:      S32144EVB-Q100 MCU:           S32K144 0N47T Debugger:    S32DS1.3, OpenSDA Target:          internal_FLASH ******************************************************************************** 2.0     Sep-30-2017     Daniel ********************************************************************************

/******************************************************************************** Detailed Description: Example shows possible implementation of multiple ADC conversions using SDK. Here 25 channels are sampled periodically. 2 ADC modules and 2 PDBs are used. ADC0 is configured to sample 16 channels, ADC1 9 channels. PDBs are set to back-to-back mode to perform chain conversion. Within ADC component you need to select ADC input to be measured for each item in configuration list. For ADC0 channels ADC ch12 is selected, as it is connected to trimmer on the EVB. DMA is used to read result into single buffer, and DMA callbacks are issued to indicate end of transfer for each ADC module. Within those callbacks PTE14 and PTE15 is toggled. PDB0 output pulse is generated on the PTE16 to indicate start of ADC measurement. This is done periodically at LPIT ch0 rate, which is set to 30us. The ADC0 ch0 result is used to dim LEDs. * ------------------------------------------------------------------------------ * Test HW:       S32K144EVB-Q100 * MCU:           FS32K144UAVLL 0N57U * Target:        Debug_FLASH * EVB connection: * Compiler:      S32DS.ARM.2018.R1 * SDK release:   S32SDK_S32K1xx_RTM_3.0.0 * Debugger:     Lauterbach Trace32 ******************************************************************************** Revision History: Ver Date          Author          Description of Changes 0.1 May-04-2019   Petr Stancik    Initial version *******************************************************************************/

The S32K3 family of 32-bit AEC-Q100 qualified MCUs combines a scalable family of Arm® Cortex-M7-based microcontrollers built on long-lasting features with a comprehensive suite of production-grade tools. S32K3 MCUs are included in NXP’s Product Longevity Program, guaranteeing a minimum of 15 years of assured supply. The S32K3 offers dedicated peripherals set for rapid motor control loop implementation: enhanced Modular IO Subsystem(eMIOS), Logic Control Unit (LCU), TRGMUX, BodyCross-triggering Unit (BCTU), Analog to Digital Converter(ADC), and Analog Comparator (CMP). The comprehensive motor control ecosystem based on Automotive Math and Motor Control Library(AMMCLib) set, FreeMASTER with Motor Control ApplicationTuning (MCAT) tool and Model-Based Design Toolbox (MBDT) helps to enable S32K3 MCU in wide range of motor control use cases. The table below points to the articles with more detailed description each of S32K3 motor control use cases, hardware description, links to appropriate application notes and their addendums, and software repositories.  Device HW Article S32K344       MCSPTE1AK344 12 V development kit engineered for 3-phase PMSM and BLDC motor control applications     FOC with dual shunt current measurement Article focuses on solution based Field Oriented Control (FOC) technique (typically used for 3-phase PMSM motors) with dual shunt current measurement and without any position sensor (sensorless). The Encoder sensor is supported by SW option, but missing on HW kit. The available example codes covers both ANSI-C and Matlab Simulink approaches and uses RTD drivers with high-level Autosar compliant API or low-level non-Autosar API.    FOC with single shunt current measurement Article focuses on solution based Field Oriented Control (FOC) technique (typically used for 3-phase PMSM motors) with single shunt current measurement and without any position sensor (sensorless). The Encoder sensor is supported by SW option, but missing on HW kit. The single shunt current measurement is advanced technique that allows decrese the cost of Bill of Material (BOM). The available example codes covers both ANSI-C and Matlab Simulink approaches and uses RTD drivers with high-level Autosar compliant API or low-level non-Autosar API.    FOC integrated with FreeRTOS Article focuses on integration of motor control software (based on FOC with dual shunt current measurement) and Real Time Operating System (FreeRTOS). The available example code is based ANSI-C  code and uses RTD drivers with low-level non-Autosar API.    Six-step commutation control. Article focuses on solution based Six-step commutation (6-step) technique (typically used for 3-phase BLDC motors) with Hall position sensor and without any position sensor (sensorless). The available example codes covers both ANSI-C and Matlab Simulink approaches and uses RTD drivers with low-level non-Autosar API.    Note: the list of use cases cannot cover all combinations of MCU, current measurement scenario, control technique and sensor inputs, but should work as a base reference for most common configurations. This list is not final, please follow this acticle to be notified about updates with new use cases.   

******************************************************************************** * Detailed Description: * * This example shows how to init DMA for simple memory to memory copy. * Eight 16-bit values are copied upon SW start. * * ------------------------------------------------------------------------------ * Test HW:         FRDM-S32K144 * MCU:             PS32K144HFVLL 0N77P * Fsys:            default * Debugger:        S32DS * Target:          internal_FLASH * ******************************************************************************** Original Attachment has been moved to: Example-S32K144-DMA-RAM2RAM-test-v1_0-S32DS.zip

Where can I get s32k14x data sheet or reference manual???

***************************************************************************** *Detailed Description: *This is a basic communication example for LIN transceiver module of FS23 SBC with SPI interface. *The FS23 SBC on the S32K31XEVB-Q100 board integrated a LIN transceiver. To test LIN communication, another board or a LIN analyzer must be used. *In this example, the S32K311 configures and controls the FS23 via LPSPI0. *The FS23 LinTrcv driver is initialized by calling LinTrcv_43_fs23_Init(), while LinTrcv_43_fs23_SetOpMode() is used to change the operating mode of the integrated LIN transceiver. *After initialization is complete, the S32K3 transmits a LIN frame with ID 0x1A. *At this stage, the LIN frame should be received by the LIN analyzer connected to the J9 LIN bus interface on the S32K31XEVB-Q100 board. *LED Indications: Blue LED ON: LIN frame transmission in progress Blue LED OFF: LIN frame transmission completed Red LED flashes: LIN frame transmission timed out *---------------------------------------------------------------------------- *Test HW: * S32K31XEVB-Q100 Board SCH-55131 REV A1 P32K311HVS 0P98C * PCAN-USB Pro * PCAN-USB Pro | S32K31XEVB-Q100 ------------------------|-------------------- LIN LIN2.4 | J9.1 VBAT LIN2.9 | J9.2 GND LIN2.5 | J9.4 - S32K31XEVB-Q100 Jumper Configuration: J25 1-2 https://www.nxp.com/document/guide/getting-started-with-the-s32k31xevb-q100-evaluation-board-for-general-purpose:GS-S32K31XEVB-Q100?section=plug-it-in_plug-it-in-1 Test SW: *PLIN-View Pro *SDK: * S32K3_S32M27x Real-Time Drivers ASR R23-11 Version 7.0.1 (SW32K3_S32M27x_RTD_R23-11_7.0.1_D2603_DesignStudio_updatesite.zip) * 2.0.0 SBC FS23 R23-11 2.0.0 (SBC_FS23_R23-11_2.0.0_D2604_DesignStudio_updatesite.zip) *Debugger: S32DS 3.6.11, OpenSDA/ PEmicro Multilink Universal FX *Target: internal_FLASH *Reference Documentation: * AN14041 FS23 quick start guide (Rev. 2.0 23 January 2025) * AN14129 FS23 implementation and behaviors (Rev. 2.0 13 December 2024) * FS23, Safety System Basis Chip (SBC) with Power Management, CAN FD and LIN Transceivers Data Sheet (Rev. 8.0 30 June 2025) * RTD_SBC_FS23_UM.pdf C:\NXP\S32DS.3.6.11_S32K3_RTD701\S32DS\software\common\SBC_FS23\Sbc_fs23_TS_T40DXXM20I0R0\doc * RTD_LINTRCV_43_FS23_UM.pdf C:\NXP\S32DS.3.6.11_S32K3_RTD701\S32DS\software\common\SBC_FS23\LinTrcv_43_fs23_TS_T40DXXM20I0R0\doc * AUTOSAR_CP_SWS_LINDriver.pdf https://www.autosar.org/fileadmin/standards/R23-11/CP/AUTOSAR_CP_SWS_LINDriver.pdf * This example is migrated from LinTrcv_fs23_Example_S32K312. The method of migrating refers to the video "2.S32DS CT MCAL demo porting K344 to K312 based on RTD500": https://community.nxp.com/t5/S32K-Knowledge-Base/S32K3-Tools-Part-How-to-port-RTD-s-existing-MCAL-demo-to-other/ta-p/1966315 ***************************************************************************** * Revision History: * Ver Date Author Description of Changes * 0.0 10-14-2026 Robin Shen Initial version *****************************************************************************

***************************************************************************** *Detailed Description: *This is a basic communication example for CAN transceiver module of FS23 SBC with SPI interface. *The FS23 SBC on the S32K31XEVB-Q100 board integrated a CAN transceiver. To test CAN communication, another board or a CAN analyzer must be used. *In this example, the S32K311 configures and controls the FS23 via LPSPI0. *The FS23 CanTrcv driver is initialized by calling CanTrcv_43_fs23_Init(), while CanTrcv_43_fs23_SetOpMode() is used to change the operating mode of the integrated CAN transceiver. *After initialization is complete, the S32K3 first transmits a standard CAN data frame with ID 0x123. *At this stage, the CAN frame should be received by the CAN analyzer connected to the J8 CAN bus interface on the S32K31XEVB-Q100 board. *In the main application loop, a standard CAN frame with ID 0x100 is transmitted each time a CAN frame is received. *LED Indications: Blue LED ON: CAN frame transmission in progress Blue LED OFF: CAN frame transmission completed Red LED flashes: CAN frame transmission timed out Green LED ON: CAN frame received *---------------------------------------------------------------------------- *Test HW: * S32K31XEVB-Q100 Board SCH-55131 REV A1 P32K311HVS 0P98C * PCAN-USB Pro * PCAN-USB Pro | S32K31XEVB-Q100 ------------------|-------------------- CANH CAN1.7 | J8.1 (FS23_CANH) CANL CAN1.2 | J8.2 (FS23_CANL) GND CAN1.3 | J8.3 (GND) - S32K31XEVB-Q100 Jumper Configuration: https://www.nxp.com/document/guide/getting-started-with-the-s32k31xevb-q100-evaluation-board-for-general-purpose:GS-S32K31XEVB-Q100?section=plug-it-in_plug-it-in-1 *SDK: * S32K3_S32M27x Real-Time Drivers ASR R23-11 Version 7.0.1 (SW32K3_S32M27x_RTD_R23-11_7.0.1_D2603_DesignStudio_updatesite.zip) * 2.0.0 SBC FS23 R23-11 2.0.0 (SBC_FS23_R23-11_2.0.0_D2604_DesignStudio_updatesite.zip) *Debugger: S32DS 3.6.11, OpenSDA/ PEmicro Multilink Universal FX *Target: internal_FLASH *Reference Documentation: * AN14041 FS23 quick start guide (Rev. 2.0 23 January 2025) * AN14129 FS23 implementation and behaviors (Rev. 2.0 13 December 2024) * FS23, Safety System Basis Chip (SBC) with Power Management, CAN FD and LIN Transceivers Data Sheet (Rev. 8.0 30 June 2025) * RTD_SBC_FS23_UM.pdf C:\NXP\S32DS.3.6.11_S32K3_RTD701\S32DS\software\common\SBC_FS23\Sbc_fs23_TS_T40DXXM20I0R0\doc * RTD_CANTRCV_43_FS23_UM.pdf C:\NXP\S32DS.3.6.11_S32K3_RTD701\S32DS\software\common\SBC_FS23\Cantrcv_43_fs23_TS_T40DXXM20I0R0\doc * This example is migrated from CanTrcv_fs23_Example_S32K312. The method of migrating refers to the video "2.S32DS CT MCAL demo porting K344 to K312 based on RTD500": https://community.nxp.com/t5/S32K-Knowledge-Base/S32K3-Tools-Part-How-to-port-RTD-s-existing-MCAL-demo-to-other/ta-p/1966315 * In addition, the implementation was referenced from the Application Code Hub example "Dual-Board Serial Communication with AUTOSAR CAN Driver" for the FRDM-A-S32K118 board. https://mcuxpresso.nxp.com/appcodehub?search=dm-can-p2p-s32k118 * FlexCAN bitrate is calculated with: https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/MPC5xxx-S32Kxx-LPCxxxx-CAN-CAN-FD-bit-timing-calculation/ta-p/1119319 CAN classic (non-FD) 30MHz clock 500Kbps 80.0% Sample Point ***************************************************************************** * Revision History: * Ver Date Author Description of Changes * 0.0 10-13-2026 Robin Shen Initial version *****************************************************************************

* ============================================================================ * Detailed Description: * * The purpose of this demo application is to demonstrate the usage of the * ADC High-Level Driver (HLD) on the S32K344 MCU. * * The example uses PIT timers to periodically trigger BCTU conversion lists * through the TRGMUX. Each conversion list consists of five ADC channels. * Conversion results are stored in BCTU FIFOs and automatically transferred * by eDMA into result arrays. * * Trigger paths: * PIT0_CH0 -> TRGMUX -> BCTU Trigger 23 -> ADC0 (5 channels) * -> BCTU FIFO1 -> eDMA (ch0) * * PIT1_CH1 -> TRGMUX -> BCTU Trigger 47 -> ADC1 (5 channels) * -> BCTU FIFO2 -> eDMA (ch16) * * Converted results from the BCTU FIFOs are moved by eDMA into dedicated * ADC result buffers. * * ADC0 channel P7 is connected to the on-board potentiometer. The converted * value is used to adjust the brightness of the BLUE LED * * ============================================================================ * Test HW: FRDM-A-S32K344 (SCH-94921 / SPF-94921 Rev. C) * MCU: S32K344 * Compiler: S32DS 3.5.x * RTD release: S32K3_RTD_3_0_0_P01_D2303_ASR_REL_4_7_REV_0000_20230331 * Debugger: On-Board Debugger * Target: Internal_FLASH * ============================================================================

********************************************************************************************** * Detailed Description: * This example uses RTD 7.0.0 and SPD 1.0.6. It initializes the internal * flash and executes the selected C40 UTEST diagnostic through the * Mem_43_INFLS driver. * The available tests are * ECC Logic Check (ECC_LOGIC_CHECK), * EDC-after-ECC Logic Check (EDC_AFTER_ECC_LOGIC_CHECK), * and Address Encode Logic Check (ADDRESS_ENCODE_LOGIC_CHECK). * The test-selection macros enable or disable each diagnostic, and more than one * test may be enabled at the same time. * * ProgramBlock3() is optional and is not required for the UTESTs. * It erases * and programs one data-flash sector only to provide a known, readable test * address. The UTESTs can also run without it, provided that AddressCheck is * a valid, aligned flash address. The ECC and EDC tests use synthetic * data/check-bit values, while the address is used to select the flash block * and trigger the hardware check. * * EMCEM_MODULE_ENABLED enables eMCEM support. WAIT_MAIN pauses execution * before eMcem initialization, while WAIT_AFTER_EMCEM_INIT pauses execution * after eMcem initialization to allow debugger attachment at the required * execution point. eMcem_Init() requires a reset without an attached debugger. * * Mem driver job results and handled eMCEM alarms are stored in g_MemTestResults. * The user alarm handler clears the configured FCCU/eMCEM * faults and records the corresponding alarm result. If a UTEST causes a * HardFault, the handler resumes interrupts and disables C40 UTEST mode * before returning so that pending FCCU alarm interrupts can be serviced. * ------------------------------------------------------------------------------------- * MCU: S32K3x4EVB-Q257 * Fsys: 160 MHz PLL with 16 MHz crystal reference * Debugger: Lauterbach Trace32, S32DS IDE 3.6.5 * Target: internal_FLASH **********************************************************************************************

* ================================================================================================= * Detailed Description: * * This example demonstrates Classical CAN and CAN FD reception and transmission using * interrupt-driven Message Buffers and FreeRTOS. * * FlexCAN0 is configured in Normal mode. MB0 receives standard-ID frames and MB1 receives * extended-ID frames. The FlexCAN callback copies every received frame into a FreeRTOS queue * and immediately rearms the corresponding RX Message Buffer. * * A dedicated FreeRTOS task waits for frames in the queue and echoes them through CAN TX MB2. * The transmitted frame preserves the received identifier type, identifier, payload length, * payload, CAN FD EDL state, and BRS state. The user LED is toggled after a transmit request * is accepted by the driver. * * Note: * FreeRTOS API functions such as xQueueSendFromISR() are used from the FlexCAN callback. * Therefore, the FlexCAN interrupt priority must comply with the FreeRTOS interrupt-priority * requirements defined by configMAX_SYSCALL_INTERRUPT_PRIORITY. * * ================================================================================================= * Test HW: FRDM-A-S32K344 (SCH-94921 / SPF-94921 Rev. C) * MCU: S32K344 * Compiler: S32DS 3.6.x * RTD release: S32K3_RTD_6_0_0_D2506_ASR_REL_4_7_REV_0000_20250610 * Debugger: On-Board Debugger * Target: Internal_FLASH * Communication: Classical CAN / CAN FD, STD and EXT ID, optional BRS * =================================================================================================    

* Detailed Description: * * This project provides a minimal bring-up and reference example for the LCD-PAR-S035 * display and GT911 capacitive touchscreen on the S32K344. It includes standalone LCD * and touchscreen diagnostic modes, together with an LVGL demonstration mode. * * The display is controlled through the LPSPI interface using the ST7796S * display controller driver. The touchscreen is controlled through the LPI2C * interface and uses GPIO signals for interrupt and reset control. * * The original LCD, DBI and touchscreen drivers were obtained from an NXP * App Code Hub MCUXpresso SDK example and adapted to the S32K3 RTD * environment. The project also integrates LVGL 9.4 as the graphical user * interface library. * * The application mode is selected at compile time using the APP_MODE macro * defined in this file. It allows the user to select a standalone display * test, a standalone touchscreen test or the complete LVGL demonstration. * Only one application mode shall be selected for each build. * * A graphical application can be designed using NXP GUI Guider 2.0.1. * GUI Guider is configured for LVGL 9.4.0. The contents of the GUI Guider * "generated" and "custom" output directories can be copied directly into * the corresponding gui_guider directories in this project. After replacing * the generated output, the project shall be rebuilt to include the updated * screens, widgets, events and custom callbacks. * * Installed packages for S32 Design Studio 3.6.6: * * SW32K3_S32M27x_RTD_R23-11_7.0.1_D2603_DesignStudio_updatesite.zip * * Software Sources: * * NXP App Code Hub demo: * https://github.com/nxp-appcodehub/dm-https-lcd-led-demo * * LVGL release/v9.4: * https://github.com/lvgl/lvgl/tree/release/v9.4 * * NXP GUI Guider 2.0.1: * https://www.nxp.com/webapp/Download?colCode=GUI-GUIDER-INSTALLER-2.0.1-WIN&appType=license * * Hardware: * * FRDM-A-S32K344: * Remove jumper JP11 when using an external debugger. * * LCD-PAR-S035: * Set SW1 to 111. * * Board Connections: * * +------------------+----------------------+-----------------+-------------------+------------------------------+ * | FRDM-A-S32K344 | MCU Signal | LCD-PAR-S035 | LCD-PAR-S035 | Function | * | Connector | | Signal | Connector | | * +------------------+----------------------+-----------------+-------------------+------------------------------+ * | J2-20 | PTC27 / GPIO | TP_INT | J5-12 | Touch interrupt, active low | * | J2-19 | PTC7 / LPI2C1_SCL | TP_SCL | J5-8 | Touchscreen I2C clock | * | J2-17 | PTC6 / LPI2C1_SDA | TP_SDA | J5-6 | Touchscreen I2C data | * | J2-13 | GND | GND | J5-4 | Signal ground | * | J2-11 | PTB14 / LPSPI1_SCK | LCD_WR | J5-5 | LCD SPI clock | * | J2-9 | PTB15 / LPSPI1_SIN | LCD_RD | Not connected | SPI data from LCD | * | J2-7 | PTB16 / LPSPI1_SOUT | LCD_MOSI | J5-9 | SPI data to LCD | * | J2-5 | PTB17 / GPIO | LCD_CS | J5-11 | LCD chip select, active low | * | J2-3 | PTC10 / GPIO | LCD_D_C | J5-7 | Command low, data high | * | J2-1 | PTC11 / GPIO | LCD_RST | J5-10 | LCD reset, active low | * | JA3-3 | VDD_HV_A | VCC | J5-1 or J5-2 | 3.3 V supply | * | JA3-13 or JA3-15 | GND | GND | J5-3 | Power ground | * +------------------+----------------------+-----------------+-------------------+------------------------------+ * * Project Files: * * Format: * File or directory - Description - Source - License * * | lvgl_app.c/.h * | LVGL application layer * | Created for this project * | NXP proprietary license * | * | lv_conf.h * | Project-specific LVGL configuration * | Derived from the LVGL v9.4.0 configuration template * | MIT License * | * | lv_port.c/.h * | LVGL initialization and S32K3 port layer * | Created for this project * | NXP proprietary license * | * | main.c * | Application entry point and compile-time mode selection * | Created for this project * | NXP proprietary license * | * +---gui_guider * | +---custom * | | User callbacks and custom GUI logic * | | GUI Guider 2.0.1 output * | | NXP proprietary license * | | * | \---generated * | Generated screens, widgets and events * | GUI Guider 2.0.1 output * | NXP proprietary license * | * +---lcdc * | fsl_st7796s.c/.h * | ST7796S LCD controller driver * | NXP App Code Hub demo * | BSD-3-Clause License * | * +---lcd_par_s035 * | lcd_par_s035.c/.h * | LCD-PAR-S035 board and display integration * | Created for this project * | NXP proprietary license * | * | lcd_par_s035_config.h * | LCD-PAR-S035 project configuration * | Created for this project * | NXP proprietary license * | * +---lvgl * | \---src * | LVGL 9.4 graphics library * | LVGL release/v9.4 * | MIT License * | * +---platform * | display_compat.h * | MCUXpresso SDK and S32K3 RTD compatibility definitions * | Created for this project * | NXP proprietary license * | * | fsl_dbi.c/.h * | Generic display bus interface implementation * | NXP App Code Hub demo * | BSD-3-Clause License * | * | lcd_dbi_s32k3.c/.h * | S32K3 DBI transport implementation using LPSPI * | Created for this project * | NXP proprietary license * | * | lcd_platform.c/.h * | S32K344 board and platform abstraction * | Created for this project * | NXP proprietary license * | * \---touchpanel * fsl_gt911.c/.h * GT911 touchscreen controller driver * NXP App Code Hub demo * BSD-3-Clause License * * gt911_s32k3.c/.h * S32K3 adaptation using LPI2C and GPIO * Created for this project * NXP proprietary license * * ---------------------------------------------------------------------------- * Test Hardware: FRDM-A-S32K344, schematic revision B * MCU: S32K344 * Display: LCD-PAR-S035 with ST7796S controller * Touchscreen: GT911 capacitive touchscreen controller * Debugger: Lauterbach TRACE32 * Build Target: internal_FLASH

**************************************************************************** * Detailed Description: * * CAN <-> Ethernet gateway demo for FRDM-A-S32K344. * * CAN FD frames are encapsulated into raw Ethernet frames and * transmitted over the 100BASE-TX link. Received Ethernet frames * are decapsulated and forwarded to the CAN FD bus. * * Key Functionality: * - Interrupt-driven CAN FD reception via CanIf_RxIndication callback. * - Interrupt-driven Ethernet reception via EthIf_RxIndication callback * (EthCtrlEnableIngressQueueInterrupt, GMAC0_CH_RX_IRQHandler). * - GMAC TX confirmation interrupt processing (GMAC0_CH_TX_IRQHandler). * - Custom gateway format for CAN ID, DLC, flags and * payload (up to 64 bytes CAN FD) in a fixed 72-byte Ethernet payload. * - PHY CAN transceiver initialization. * - Ethernet PHY auto-detection and MDIO configuration via EthPhy driver. * - PHY initialization selectable at compile time: * PHY_INIT_BY_PIN_STRAPPING (default) * PHY_INIT_BY_SOFTWARE (MDIO register write) * * Main Loop Flow: * - CAN -> ETH : CanIf_bRxFlag set by ISR -> App_EthTransmit() * - ETH -> CAN : ethReceiveFlag set by ISR -> App_CanTransmit() * * Notes: * - Red LED set if Gateway_Init returns E_NOT_OK. * - Green LED toggles upon CAN reception. * - Blue LED toggles upon ETH reception. * - EthIf.c contains the custom EthIf_RxIndication gateway implementation. * - During S32 Configuration Tool code generation select "Keep Existing" * for EthIf.c to avoid overwriting the custom callback. * - Eth_43_GMAC_ReleaseRxBuffer() must be called unconditionally inside * EthIf_RxIndication. * * ------------------------------------------------------------------------- * Test HW : FRDM-A-S32K344 Rev A * MCU : S32K344_257BGA * IDE : S32DS 3.6.10 * RTD : S32K3_RTD_7_0_1_D2602_ASR_REL_4_9_REV_0000_20260206 * AUTOSAR : 4.9.0 * Debugger : P&E Micro * Target : Internal_FLASH * CAN : CAN FD, 500 Kbps nominal / 2 Mbps data, TJA1043 transceiver * Ethernet : RMII 100BASE-TX, DP83848 PHY **************************************************************************** ETH Reception with Wireshark: CAN Reception with PCAN-USB. Note 1: Inside project you can comment NODE_1 and define NODE_2 as 1 to enable simple routine which sends out a CAN frame if SW3 is pressed, and an ETH frame if SW2 is pressed. Note 2: For a real gateway application, use a queue or ring buffer instead of one global frame; otherwise, a second CAN frame can overwrite the first before Ethernet transmission completes. This example is for demostration purposes only.

********************************************************************************* * Detailed Description: * * ADC hardware trigger demonstration using BCTU Trigger Mode on S32K358. * * An eMIOS1 Channel 23 reload event is used as a trigger source for the BCTU). * The BCTU initiates a hardware-triggered conversion of an ADC1 group containing * three channels. * * The result of the third ADC channel, connected to the on-board potentiometer * (ADCPOT0), is used to dynamically update the duty cycle of an * eMIOS Channel 5 PWM output. * * The PWM output drives the on-board LED, allowing the potentiometer position * to control LED brightness. * * Key Functionality: * - eMIOS-triggered BCTU operation. * - BCTU Trigger Mode configuration. * - ADC1 hardware-triggered group conversion. * - ADC notification callback processing. * - PWM duty-cycle update based on ADC result. * - LED brightness control using the potentiometer. * * ------------------------------------------------------------------------------ * Test HW: S32K3x8EVB-Q289 * MCU: S32K358 * IDE: EB Tresos 29.0.0 * RTD Release: S32K3_RTD_6_0_0_D2506_ASR_REL_4_7_REV_0000_20250610 * Debugger: Lauterbach * Target: Internal_FLASH ******************************************************************************** * Revision History: * Ver Date Author Description of Changes * 1.0 02-10-2026 Petr Stancik Initial version ********************************************************************************

If your FRDM-A-S32K144 or FRDM-A-S32K144N is not detected during its first USB-C connection, this article explains the cause, how to verify OpenSDA/K20 status, and the steps to quickly enable normal operation.