This is set of S32K389EVB-Q437 demo projects. S32K389_GPIO_RTD6d0_S32DS3d6d2 S32K389_LPUART_RTD6d0_S32DS3d6d2 S32K389_FlexCAN_RTD6d0_S32DS3d6d2 S32K389_PFLASH_RTD6d0_S32DS3d6d2 S32K389_ADC_RTD6d0_S32DS3d6d2 S32K389_eMIOS_GPT_RTD6d0_S32DS3d6d2 S32K389_LowPower_RTD6d0_S32DS3d6d2 Examples are based on S32K3 RTD version 6.0 and created in S32DS version 3.6.2

S32K1 vdd falling low voltage POR clear situation 1. Abstract This document primarily aims to explain the situation where the POR flag in the RCM_SSRS of the S32K1 chip is cleared, and to explain the setting status of the reset pin and the POR and LVD bits when VDD is powered down. This article is written because some customers, when using the RCM_SSRS reset flag to determine the corresponding RAM initialization conditions, have made incomplete considerations, leading to component failures in actual projects. They mistakenly believe that as long as the SSRS POR flag is not cleared by software writing a 1 after power-on, the POR bit will remain indefinitely. In reality, even after power-on, if subsequent power fluctuations cause VDD to drop to LVD/LVR and trigger a reset, the POR flag may still be automatically cleared by the chip.   2. Document content This article mainly categorizes VDD power-down scenarios into three main types: (1) VDD drops below the minimum LVR value but above VPOR, and then power is  back to normal VDD. In this case, reset flag POR=0 and LVD=1 in RCM_SSRS. (2) VDD drops below LVD, above LVR, and LVDRE=0. In this case, reset flag POR=1 and LVD=1 in RCM_SSRS. (3) VDD drops below LVD, above LVR, and LVDRE=1. In this case, reset flag POR=0 and LVD=1 in RCM_SSRS. The schematic diagram is as follows:   3. Test result on S32K116 board        

 ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** For S32K312, please use this correct clock HSE to AIPS clock should be ½. Please make these changes in the below all example code clock setting. HSE clock to 60 MHZ.   S32K312 PIT BTCU ADC-1 BCTU_ADC_DATA_REG DMA :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-PIT-BTCU-ADC-1-BCTU-ADC-DATA-REG-DMA-DS3-5/ta-p/1787778 S32K312 UART Transmit & Receive Using DMA :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-UART-Transmit-amp-Receive-Using-DMA-DS3-5-RTD300/ta-p/1787799 S32K312 EIRQ Interrupt :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-EIRQ-Interrupt-DS3-5-RTD300/ta-p/1787860 S32K312 SPI Transmit & Receive Using DMA :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-SPI-Transmit-amp-Receive-Using-DMA-DS3-5-RTD300/ta-p/1787856 Example S32K31 SPI multiple packet Transmit & Receive : solution for DMA Cache issue :- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K31-SPI-multiple-packet-Transmit-amp-Receive-solution/ta-p/2130091 Example S32K312 SPI Transmit & Receive Using Polling DS3.5 RTD300 :-- Example S32K312 SPI Transmit & Receive Using Polling DS3.5 RTD300 - NXP Community Example S32K312 SPI Transmit & Receive Using Interrupt DS3.5 RTD300 :-- Example S32K312 SPI Transmit & Receive Using Interrupt DS3.5 RTD300 - NXP Community S32K312 CAN Transmit & Receive Using Polling mode :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-CAN-Transmit-amp-Receive-Using-Polling-mode-DS3/ta-p/1789191 S32K312 CAN Transmit & Receive Using MB & FIFO DMA :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-CAN-Transmit-amp-Receive-Using-MB-amp-FIFO-DMA/ta-p/1789196 S32K312 ADC :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-ADC-DS3-5-RTD300/ta-p/1789282 S32K312 Switch Debouncing :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Switch-Debouncing-DS3-5-RTD300/ta-p/1789290 S32K312 UART Freemaster :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-UART-Freemaster-DS3-5-RTD300/ta-p/1789306 S32K312 PIT BTCU parallel ADC FIFO DMA  :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-PIT-BTCU-parallel-ADC-FIFO-DMA-DS3-5-RTD300/ta-p/1789908 S32K312 placing variables in DTCM & code in ITCM  :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-placing-variables-in-DCTM-amp-code-in-ICTM-DS3-5/ta-p/1790101 Example S32K312 Standby mode & Standby RAM and PAD keeping DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Standby-mode-amp-Standby-RAM-and-PAD-keeping-DS3/ta-p/1797713 Example S32K312 SWT DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-SWT-DS3-5-RTD300/ta-p/1800559 Example S32K312 Printf Semihosting DS3.5 RTD300 :--- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Printf-Semihosting-DS3-5-RTD300/ta-p/1801354 Example S32K312 I2C Transmit & Receive Using DMA DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-I2C-Transmit-amp-Receive-Using-DMA-DS3-5-RTD300/ta-p/1801357 Example S32K312 HARDFAULT Handling Interrupt DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Handling-Interrupt-DS3-5-RTD300/ta-p/1806259 Example S32K312 Bootloader to Application Jump DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Bootloader-to-Application-Jump-DS3-5-RTD300/ta-p/1809810 Example S32K312 PIT timer Toggle LED DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-PIT-timer-Toggle-LED-DS3-5-RTD300/ta-p/1809932 Example S32K312 HARDFAULT Interrupt Handling using a script DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Interrupt-Handling-using-a-script-DS3/ta-p/1818507 Example S32K312 UART Transmit & Receive Using Interrupt DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-UART-Transmit-amp-Receive-Using-Interrupt-DS3-5/ta-p/1818775 Example S32K312 CAN Transmit & Receive Using MB Interrupt DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-CAN-Transmit-amp-Receive-Using-MB-Interrupt-DS3/ta-p/1818790 Example S32K312 STANDBY wake up using CAN-0-RX and GPIO Switch DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-STANDBY-wake-up-using-CAN-0-RX-and-GPIO-Switch/ta-p/1891411 Example S32K312 STANDBY wake up using RTC DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-STANDBY-wake-up-using-RTC-DS3-5-RTD300/ta-p/1930115 S32K312 : ADC Clock selection :-- https://community.nxp.com/t5/S32K-Knowledge-Base/S32K312-ADC-Clock-selection/ta-p/1997759 Example IP S32K312 PWM ICU using EMIOS Custom IRQ DS3.5 RTD300 :-- Example IP S32K312 PWM ICU using EMIOS DS3.5 RTD300 - NXP Community Example IP S32K312 EMIO PWM Generation & Duty capture using Interrupt DS3.5 RTD300 :-- Example IP S32K312 EMIO PWM Generation & Duty capture using Interrupt DS3.5 RTD300 - NXP Community Example IP S32K312 EMIO PWM Generation & Duty capture using Polling DS3.5 RTD300 :-- Example IP S32K312 EMIO PWM Generation & Duty capture using Polling DS3.5 RTD300 - NXP Community Example S32K312 Continuous SPI Transmit & Receive Using DMA DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Continuous-SPI-Transmit-amp-Receive-Using-DMA/ta-p/2024597 S32K312 : HSE Demo project :-- https://community.nxp.com/t5/S32K-Knowledge-Base/S32K312-HSE-Demo-project/ta-p/2112562 S32K312 : FS26 Watchdog trigger using the SBC_FS26 CDD :-- https://community.nxp.com/t5/S32K-Knowledge-Base/S32K312-FS26-Watchdog-trigger-using-the-SBC-FS26-CDD/ta-p/2161357

******************************************************************************* The purpose of this demo application is to place variables in DTCM memory for the S32K3xx MCU.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** ZERO table : is for bss segment variables :  contains RAM start & end address of BSS section which need to be initialized with ZER). Init_table : is for DATA segment variables : contains RAM start address of DATA section & START & end address of ROM address where the initialization values of the variables are stored.   Startup file startup_cm7.s call function init_data_bss() . Inside this function uses these section :-- Variables declared :-- Linker file changes :--   startup_cm7.s file changes :--   MAP file :--     Debug window results :--         https://www.kernel.org/doc/html/v5.9/arm/tcm.html   Due to being embedded inside the CPU, the TCM has a Harvard-architecture, so there is an ITCM (instruction TCM) and a DTCM (data TCM).  The DTCM can not contain any instructions, but the ITCM can actually contain data.   TCM is used for a few things: FIQ and other interrupt handlers that need deterministic timing and cannot wait for cache misses. Idle loops where all external RAM is set to self-refresh retention mode, so only on-chip RAM is accessible by the CPU and then we hang inside ITCM waiting for an interrupt. Other operations which implies shutting off or reconfiguring the external RAM controller.  

This post presents two complementary FlexCAN communication examples for the S32K3X4EVB-T172 evaluation board, showcasing both low-level IP layer and AUTOSAR MCAL layer implementations. These examples are basic routines for configuring the component in normal/user mode, as the RTD examples are configured for loopback mode. To test CAN communication, another board or a CAN analyzer must be used. Since Rev. B2 of S32K3X4EVB-T172 was used to test the project, TJA1043 transceiver is mounted on the board and used to test the examples. ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 * MCU: S32K344 * Compiler: S32DS 3.6.2 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH ------------------------------------------------------------------------------ Example 1: FlexCAN IP Layer (LLD) This project demonstrates a basic FlexCAN setup using the IP-level driver. It configures a standard CAN message; with transmission through POLLING and reception using INTERRUPT. If TJA1153 transceiver is used, macro TJA1153 must be uncommented at the top of the project, and it will be initialized through a custom configuration sequence. If not used and the macro is commented, normal transceiver initialization is done (only CAN0_EN_PIN & CAN0_STB_PIN set to HIGH). Rx Filter mask type is individual and set to receive STD ID 123h.  Tx MB is set to STD ID 001h. FlexCAN bitrate was calculated with MPC5xxx/S32Kxx/LPCxxxx: CAN / CAN FD bit timing calculation. FlexCAN bitrate settings are 500kbps with 81.25% sample point  FPE_CLK: 24MHz Synch seg: 1 Prop seg: 4 Phase 1 seg: 8 Phase 2 seg: 3 Prescaler: 3 RJW: 3    Example 2: FlexCAN MCAL Layer (HLD) This project configures both Can_43_FLEXCAN and CanIf modules for CAN communication. Transmission is done via POLLING, while reception is configured via INTERRUPT.  Tx MB is set to STD ID 123h. Acceptance mask is set to 0x0 (accept all IDs). CAN messages are sent using Can_43_FLEXCAN_Write() and received using the CanIf_RxIndication() callback. After CanIf_bRxFlag is set, an ACK message is sent back. The GREEN LED toggles every 10 received messages. FlexCAN bitrate was calculated with MPC5xxx/S32Kxx/LPCxxxx: CAN / CAN FD bit timing calculation. FlexCAN bitrate settings are 500kbps with 81.25% sample point  FPE_CLK: 24MHz Synch seg: 1 Prop seg: 4 Phase 1 seg: 8 Phase 2 seg: 3 Prescaler: 3 RJW: 3  If TJA1153 transceiver is used, macro TJA1153_EVB_TRCV must be used. If not, use TJA1043_EVB_TRCV for standard transceiver initialization (CAN0_STB & CAN0_EN pins set to HIGH).          These examples are provided as is with no guarantees and no support. These are basic routines meant to be used as reference only.

This example project will show user how to use and configure the basic functionalities of ICU (WKPU) + DIO (GPIO).   ------------------------------------------------------------------------------ * Test HW: S32K396-BGA-DC1 (SCH-55517 Rev B2) * MCU: S32K396 * IDE: S32DS3.5 & S32DS v3.6.x * SDK release: RTD 6.0.0 * Debugger: PEMicro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU unit for a GPIO interrupt wake-up. This is the simplest WKPU example. Pin PTB19 (WKPU42) is configured for wake-up.  The routine waits for SW8 to be pressed, then turns off LED1, and: Switches core clock to FIRC (Mode C Boot default from Table 125.). Initializes the WKPU instance. Configures WKPU42 (SW4). Enters standby (or fast standby). After pressing SW4, MCU wakes up, resets and polls for SW8 to be pressed again. If FAST_STANDBY is selected, Wkup_FastWkupBootAddress() is entered and both LED2 & LED3 blink before jumping to reset handler for full initialization. This example is provided as is with no guarantees and no support.

This example project will show user how to use and configure the basic functionalities of ICU (WKPU) + DIO (GPIO).   ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) * MCU: S32K344 * IDE: S32DS3.5 & S32DS v3.6.x * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU unit for a GPIO interrupt wake-up. This is the simplest WKPU example. Pin PTB19 (WKPU42) is configured for wake-up.  The routine waits for SW5 to be pressed, then turns off the green LED, and enters Wkpu_EnterStandby() function which: Turns off green LED Switch system clock to FIRC (Option C - Boot Standby mode @24MHz). Initialize the Icu driver. Configures WKPU42 (PTB19). Enters standby. After pressing SW6, MCU wakes up, resets and polls for SW5 to be pressed again. This example is provided as is with no guarantees and no support.

This example project will show user how to use and configure the basic functionalities of WKPU + SIUL2.  ------------------------------------------------------------------------------ * Test HW: S32K312EVB-Q172 (SCH-50892 REV B) * MCU: S32K312 * IDE: S32DS v3.5 & S32DS v3.6.x * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU unit for a GPIO interrupt wake-up and defines a section in linker file for 32KB of Standby RAM. How to use Standby RAM? Modify the linker file to separatethe 32KBstandby RAM(0x2040 0000 ~0x2040 8000) from int_sram memory region, and place standby .bss and .data or .text sections into the new region as well as adjust the link address symbols for customized initialization during startup. Initialize the standby RAM only if it’s Power-On Reset. Use key word attribute to define the variable/function in relevant memory section. Counter variable is placed in standby ram section: __attribute__ ((section (".sram_standby_bss"))) volatile int RunStandbyCounter0 = 0; Linker file (.ld) must be modified accordingly. Standby sections and link address symbols must be placed: MEMORY { int_pflash : ORIGIN = 0x00400000, LENGTH = 0x001D4000 /* 2048KB - 176KB (sBAF + HSE)*/ int_dflash : ORIGIN = 0x10000000, LENGTH = 0x00020000 /* 128KB */ int_itcm : ORIGIN = 0x00000000, LENGTH = 0x00008000 /* 32KB */ int_dtcm : ORIGIN = 0x20000000, LENGTH = 0x0000F000 /* 60KB */ int_stack_dtcm : ORIGIN = 0x2000F000, LENGTH = 0x00001000 /* 4KB */ int_standbysram : ORIGIN = 0x20400000, LENGTH = 0X00000100 /* standby ram 256B*/ int_sram : ORIGIN = 0x20400100, LENGTH = 0x00007E00 /* 32KB - 0x100, needs to include int_sram_fls_rsv*/ int_sram_fls_rsv : ORIGIN = 0x20407F00, LENGTH = 0x00000100 int_sram_no_cacheable : ORIGIN = 0x20408000, LENGTH = 0x00007F00 /* 32KB , needs to include int_sram_results */ int_sram_results : ORIGIN = 0x2040FF00, LENGTH = 0x00000100 int_sram_shareable : ORIGIN = 0x20410000, LENGTH = 0x00008000 /* 32KB */ ram_rsvd2 : ORIGIN = 0x20418000, LENGTH = 0 /* End of SRAM */ } ... .sram_standby (NOLOAD): { . += ALIGN(4); *(.sram_standby_bss) } > int_standbysram ... __STANDBY_SRAM_START = ORIGIN(int_standbysram); __STANDBY_SRAM_SIZE = LENGTH(int_standbysram); Note 1: RAM ECC must be initialized only if it’s Power-on Reset. Note 2: CM7 CPU D-Cache MUST be disabled to use the Standby RAM area. Or set the standby RAM(0x2040 0000 ~0x2040 8000) as non-cacheable in MPU configuration. The routine waits for SW5 to be pressed, then turns off the green LED, and enters Wkpu_EnterStandby() function which: Disables D-Cache. Initializes RAM ECC (if reset was Power-on Reset). Adds +1 to the standby counter placed in Standby RAM. Switches core clock to FIRC. Initializes the WKPU instance. Configures WKPU42 (PTB19). Enters standby. If SW6 is pressed, MCU will perform a software reset through the Power_Ip_PerformReset() API. After wake-up, MCU resets and polls for SW5 to be pressed again. In this application, LPUART6 (connected to USB OpenSDA interface) is enabled and will show previous reset reason (external reset, power-on reset, wakeup, functional reset), as well as printing standby counter between resets/standby cycles. Connect a USB cable to J40, and open a Serial terminal on PC for the serial device with these settings:   9600 baud rate   No parity   One stop bit  No flow control   After either a SW reset, or a wake-up cycle, the standby counter will increase. If a destructive reset or Power-on Reset is asserted, the counter is reset.    This example is provided as is with no guarantees and no support.

This example project will show user how to use and configure the basic functionalities of WKPU + RTI (PIT0).  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) * MCU: S32K344 * IDE: S32DS3.5 & S32DS3.6 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU & PIT for wake-up. The PIT0 instance includes a dedicated RTI (Real Time Interrupt) timer that runs on a separate oscillator clock and can be used for system wakeup. A key feature of this is power saving with a separate input clock for the RTI timer. All other timers share a common core clock. Note: Only PIT_0 supports the RTI feature, and exists in the Standby domain. This example does not poll for a SW press to enter and configure standby; Instead, the main function directly enters the Wkpu_EnterStandby() function which: Switches core clock to FIRC. Initializes and configures WKPU instance and wake-up source 3 (RTI). Initializes and configures PIT0 and PIT0 CH0 as set in Config Tools view. If EN_RUN_ICYCL_DUTY macro is enabled, configures PIT1 for user code before going to standby. Once Pit1_Notification is entered, runFlag is set to FALSE. Turns off LED. Enables RTI channel interrupt (otherwise, MCU cannot be woken up). Finally, sets the timeout value (WKPU_ICYCL_DUTY_TIME macro) and enters standby. This showcases the basic configuration for template on a fast-scanning power saving routine (for example, wake-up, measure ADC, go back to sleep). Keep in mind that power saving depends on the frequency of wake-up events. If MCU spends more time in Run mode rather than in Standby mode, power consumption is affected. The transition time from Standby mode to Run mode is quick. If the MCU only spends 9ms in Run and 1ms in Standby, the average current of the system will be considerably higher than if the MCU was running only 1ms every 1 second. Refer to S32K3 Low Power Management AN and demos for further information. After the period defined with either WKPU_ICYCL_DUTY_TIME, MCU wakes up. After wake-up, MCU resets and the cycle repeats. This example is provided as is with no guarantees and no support.

This example project will show user how to use and configure the basic functionalities of WKPU + RTC timeout.   ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) * MCU: S32K344 * IDE: S32DS3.5 & S32DS3.6 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU & RTC units for wake-up. The RTC is present in always ON domain, hence available in RUN mode as well as in STANDBY mode. The RTC can trigger a single wake-up event (timeout). When the RTC counter reaches a specific, pre-defined alarm time set by the user. RTC timeout is mapped as wake-up source 1. RTC0_CLK source is configured as SIRC_CLK, and SIRC_CLK must be enabled in standby mode. Chapter 69.3.1 RTC explains the functionality of the RTC timer. RTCVAL is updated at the point where no counter match is due as per the previous RTCVAL, the RTCF flag is set when the counter matches the new value. If there is a match when in the low-power mode, then the RTC first generates a wakeup request to force a wakeup to run mode, and then the RTCF flag is set. The routine waits for SW5 to be pressed, then turns off the green LED, and enters Wkpu_EnterStandby() function which: Switches CORE_CLK to FIRC. Initializes the WKPU instance. Configures WKPU1 & WKPU42 (PTB19). Initializes and enables interrupt for RTC. Loads the RTCVAL value to 5000ms.  Starts the counter. Enters standby (or fast standby). After the period defined with RTC_TIME or RTC_PERIOD_DELAY_MS(x) macros defined in Wkpu.h, MCU wakes up. After wake-up, MCU resets and polls for SW5 to be pressed again. This example is provided as is with no guarantees and no support.

This example project will show user how to use and configure the basic functionalities of WKPU + RTC API.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) * MCU: S32K344 * IDE: S32DS3.5 & S32DS3.6 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU & RTC units for wake-up. The RTC is present in always ON domain, hence available in RUN mode as well as in STANDBY mode. The chip contains one instance of RTC (Real Time Clock) timer and API (Autonomous Periodic Interrupt) timer, where both can perform 32-bit comparisons. Both RTC and API timers can generate interrupts as well as wake-up from low power modes. The following figure highlights the path for RTC API wake-up. Please refer to Chapter 69.3.2 API functional description from the S32K3XX reference manual (Rev. 12) for further information. The routine waits for SW5 to be pressed, then turns off the green LED, and enters Wkpu_EnterStandby() function which: Switches CORE_CLK to FIRC. Initializes the WKPU instance. Configures WKPU2 & WKPU42 (PTB19). Initializes and enables interrupt for RTC. Enables RTC API and loads the APIVAL to 3000ms.  Starts timer. Enters standby (or fast standby). After the period defined, RTC API generates an interruption and MCU wakes up. After wake-up, MCU resets and polls for SW5 to be pressed again. The RTC API value can be changed with RTC_PERIOD_DELAY_MS(x) macro defined in Wkpu.h. This example is provided as is with no guarantees and no support.

This example project will show user how to use and configure the basic functionalities of WKPU + LPCMP.   ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) * MCU: S32K344 * IDE: S32DS3.5 & S32DS3.6 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the WKPU & LPCMP units for wake-up. The S32K3XX's LPCMP can operate in trigger mode in both standby and run mode to continuously scan the input channels. RTC-API and LPCMP must be configured before entering into standby mode as per below shown figure:   See chapters 61.1.5 Comparator Trigger Mode & 61.1.6 Interaction with RTC API to cause wakeup from the S32K3XXRM (Rev. 12) for further information.   The register configurations before entering Standby mode for LPCMP trigger mode operation is the following:   Configure RTC.APIVAL to set the period of the round robin operation. Execute standby mode entry. The routine waits for SW5 to be pressed, then turns off the green LED, and enters Wkpu_EnterStandby() function which: Switches CORE_CLK to FIRC. Initializes the WKPU instance. Configures WKPU2 & WKPU42 (PTB19). Initializes and enables interrupt for LPCMP. Initializes RTC and sets the timer value (in RTCC - APIVAL) to 100ms. Starts timer. Enters standby (or fast standby). While in standby, PTA0/1/2 are active; if a voltage higher than 2.5V is detected (ICU LPCMP DAC Voltage Level = 127), or SW6 is pressed MCU will wake-up.  After wake-up, MCU resets and polls for SW5 to be pressed again. The RTC timer value can be changed with RTC_PERIOD_DELAY_MS(x) macro defined in Wkpu.h. This example is provided as is with no guarantees and no support.

This example project will show user how to use and configure the basic functionalities of WKPU + FlexCAN.   ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 (SCH-53148 REV B2) * MCU: S32K344 * IDE: S32DS3.5 & S32DS3.6 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example routine configures the FlexCAN0 instance for reception. Since RevB2 of the EVB was used for development, CAN TRXCVR used is TJA1443. TJA1443 is initialized in main code (CAN0_STB = 1 & CAN0_EN = 1). FlexCAN bitrate: Bitrate: 500 Kbps Sampling point: 81.25% Individual mask is set to 0x0, meaning all IDs are accepted. Main routine: Waits for SW5 to be pressed, or for FlexCAN interrupt. If SW5 is pressed, turns off green LED, disables FlexCAN and switches CORE_CLK to FIRC. It then configures both PTB19 (SW6) and PTA6 (CAN0_RX) for interrupt wakeups. If either SW6 is pressed or a CAN message is received (edge detect on PTA6), MCU wakes up and will wait for SW5 to be pressed again. FlexCAN is configured for INTERRUPT; If a CAN frame is received, bRxFlag is set to 1 inside the callback, blue LED is toggled, and an ACK frame is sent back. CAN communication can be tested either with another EVB, or with a PCAN analyzer connected to J32. PCAN-View log for dummy and ACK messages: This example is provided as is with no guarantees and no support.

**************************************************************************************************** * Detailed Description: * * - CMU errors cannot be injected by any means other than manipulating the CMU thresholds, * except for FXOSC_CLK, which can be physically disrupted on the PCB. * * - CMU_FC_0 (FXOSC_CLK) is configured for **synchronous interrupt** on both LFF and HFF CMU events. * - CMU_FC_3 (CORE_CLK) is configured for **asynchronous destructive reset** triggered only by the LFF event; the HFF event is ignored. * - CMU_FC_4 (CORE_CLK) is configured identically to CMU_3: **asynchronous destructive reset** on LFF only; HFF is ignored. * - CMU_FC_5 (HSE_CLK) can be configured by the HSE_B core only. * Refer to the Reference Manual rev.10, Figure 122. Frequency checking (FC) instances * * - The configuration must be identical in both the MCU MCAL driver and the Clock Configuration Tool (clock details). * - To inject a specific CMU error, define one of the following macros: `INJECT_CMU_0`, `INJECT_CMU_3`, or `INJECT_CMU_4`. * * Behavior After Destructive Reset: * - Following a destructive reset (either `MCU_CORE_CLK_FAIL_RESET` or `MCU_AIPS_PLAT_CLK_FAIL_RESET`), * execution will halt in the `while(wait)` loop. * ------------------------------------------------------------------------------------------------ * Test HW: S32K3X4EVB_Q257 * MCU: S32K344, 0P55A * SDK: RTD 6.0.0 * Debugger: PEMicro Multilink FX * Target: internal_FLASH ****************************************************************************************************

*******************************************************************************  The purpose of this demo application is to present a usage of the  UART IP Driver for the S32K3xx MCU.  The example uses LPUART0 for transmit 20 packets with each packet of 21 bytes using the Interrupt in cyclic order. Also when receiving UART packet generate Idle interrupt when variable length of data is received. I used coolterm tool to send the string of data. If Data send by cool term is less than 20 bytes which is set by API call Lpuart_Uart_Ip_AsyncReceive(), then Ideal interrupt is received RTD driver modified in RTD --> Lpuart_Uart_Ip.c. Baudrate : 921600  ------------------------------------------------------------------------------ * Test HW: S32K31XEVB-Q100 * MCU: S32K311 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Terminal Used :-- CoolTerm User can also use following terminal :-- Hercules uart terminal Idle Interrupt received :--    

Lauterbach FCCU_Utility plugin - S32K3xx MPC57xx_FCCU_Utility_rev0.pdf This Lauterbach debugger plugin alows user to use FCCU configurations directly from debugger interface. Such will speed up development and will not require to recompile and program project each time FCCU configuration is changed.   The supplied document describes how to use Lauterbach FCCU (fault collection and control unit) periphery extension for S32K3xx devices. It is expected that user has deep knowledge on FCCU mechanisms in order to effectively use this extension. In such case this debugger plugin could be of a great value for various use cases like FA or debugging in development. Best regards, Peter

***************************************************************************** *Detailed Description: *This example will show you how to configure Sbc_fs23 Driver. *It initialization of Sbc_fs23 with watchdog window disabled. The Sbc_fs23_InitDevice() must be done within the dedicated 256 ms INIT window. *It Disable regulator V2, then re-enable it again. FS0b pin is asserted due to V2 Undervoltage reaction setting configured in FailSafe Init Configuration tab. *If the example runs without errors, the D12 LED on S32K31XEVB-Q100 will light up Green; otherwise, it will light up Red. *The SPI data between FS23 and S32K311 are captured and attached to the project. *Use the analog input of a logic analyzer or an oscilloscope to monitor the signals of FS23_V2 (TP27) and FS23_FS0 (TP8) on the KITFS23SKTEVM board. *------------------------------------------------------------------------------ *Test HW: * S32K31XEVB-Q100 Board SCH-55131 REV A P32K311HV 0P98C * KITFS23SKTEVM Dev-kit SCH-53096 REV B2 MFS2320BMBB1EP * My S32K31XEVB-Q100 has an onboard PFS2320A0L1W1, but Step 13/14 of AN14041 mention that A0 devices are not supported, so S32K311 communicate with the FS23 on the KITFS23SKTEVM. *Connections: KITFS23SKTEVM | S32K31XEVB-Q100 ------------------------------|-------------------- SPI_CSB J28-2 | J12-5(PTB-17) SPI_MOSI J29-2 | J12-7(PTB-16) SPI_SCK J31-2 | J12-11(PTB-14) SPI_MISO J32-2 | J12.9(PTB-15) VCC J6-1 | J40-15 GND J6-2 | J40-13 - KITFS23SKTEVM: SW1 - position 2-3 , J30 - ON, J26 5-6 ON, J26 9-10 ON . - Connect KITFS23SKTEVM Dev-kit and S32K3 MCU via on-board Arduino headers. *SDK: * S32K3 RTD 4.0.0 (SW32K3_S32M27x_RTD_R21-11_4.0.0_D2311_DS_updatesite.zip) * FS23 RTD 1.0.0 (S32K3xx_SBC_FS23_R21-11_1.0.0_D2508_DesignStudio_updatesite.zip) *Debugger: S32DS 3.5.8, OpenSDA/ PEmicro Multilink Universal FX *Target: internal_FLASH *Reference Documentation: * AN14041 FS23 quick start guide (Rev. 2.0 — 23 January 2025) * AN14129 FS23 implementation and behaviors (Rev. 2.0 — 13 December 2024) * FS23, Safety System Basis Chip (SBC) with Power Management, CAN FD and LIN Transceivers Data Sheet (Rev. 8.0 — 30 June 2025) * RTD_SBC_FS23_UM.pdf C:\NXP\S32DS.3.5\S32DS\software\PlatformSDK_S32K3\SW32K3_FS23_R21-11_1.0.0_D2312\Sbc_fs23_TS_T40D34M10I0R0\doc * This example is migrated from Sbc_fs23_example_HLD_S32K344. The method of migrating refers to the video "2.S32DS CT MCAL demo porting K344 to K312 based on RTD500": https://community.nxp.com/t5/S32K-Knowledge-Base/S32K3-Tools-Part-How-to-port-RTD-s-existing-MCAL-demo-to-other/ta-p/1966315 ***************************************************************************** * Revision History: * Ver Date Author Description of Changes * 0.0 10-26-2025 Robin Shen Initial version * 0.1 11-21-2025 Robin Shen Upgrade FS23 RTD 1.0.0 from S32K3xx_SBC_FS23_R21-11_1.0.0_DS_updatesite_D2402_updated_D250115.zip to S32K3xx_SBC_FS23_R21-11_1.0.0_D2508_DesignStudio_updatesite.zip *****************************************************************************

     In fact, this topic has been written by many people before, and it is well written. However, in actual operation, you may encounter some pitfalls, so this article will not write the article steps in detail, but will provide a real and direct operation video process. The main reference article source link is: https://www.wpgdadatong.com.cn/blog/detail/74936 The method is very useful. I have tried the existing RTD4.0.0 MCAL code and also imported it into my own configured MCAL code. The method is reliable and effective. Platform:     SW32K3_S32M27x_RTD_R21-11_4.0.0 S32DS3.5 EB tresos Studio 29.0 S32K344-EVB Attach the video directly: The main steps are as follows: STEP 1. Create a new S32DS project STEP 2. S32DS project configuration Including folder deletion, addition, filter condition addition, include files, link files, optimization conditions, macro definitions, etc. STEP 3. Create a new EB project Configure a new RTD, or copy the existing RTD configuration to avoid unnecessary problems and errors. STEP 4. Compile and download The following are some related files that need to be copied: MCAL_Plugins->Link Source Resource Filters   Fig 1 Includes   Fig 2 "${ProjDirPath}/Generate/include" "${MCAL_PLUGIN_PATH}/Adc${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Ae${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/BaseNXP${MCAL_MODULE_NAME_SUFFIX}/header" "${MCAL_PLUGIN_PATH}/BaseNXP${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Can_43_FLEXCAN${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/CanIf${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/CanTrcv_43_AE${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Crc${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/CryIf${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Crypto_43_HSE${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Csm${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Dem${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Det${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Dio${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Dpga${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/EcuM${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Eth_43_GMAC${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/EthIf${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/EthSwt${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/EthTrcv${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Fee${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Gdu${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Gpt${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/I2c${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/I2s${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Icu${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Lin_43_LPUART_FLEXIO${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/LinIf${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/LinTrcv_43_AE${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Mcl${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Mcu${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Mem_43_EEP${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Mem_43_EXFLS${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Mem_43_INFLS${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/MemAcc${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/MemIf${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Ocotp${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Ocu${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Os${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Platform${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Platform${MCAL_MODULE_NAME_SUFFIX}/startup/include" "${MCAL_PLUGIN_PATH}/Port${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Pwm${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Rm${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Rte${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Sent${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Spi${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Uart${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Wdg${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/WdgIf${MCAL_MODULE_NAME_SUFFIX}/include" "${MCAL_PLUGIN_PATH}/Zipwire${MCAL_MODULE_NAME_SUFFIX}/include"   Preprocessor   Fig  3 S32K3XX S32K344 GCC USE_SW_VECTOR_MODE D_CACHE_ENABLE I_CACHE_ENABLE ENABLE_FPU   Linker   Fig  4 "${MCAL_PLUGIN_PATH}/Platform${MCAL_MODULE_NAME_SUFFIX}/build_files/gcc/linker_flash_s32k344.ld" optimization   Fig 5 -fno-short-enums -funsigned-char -fomit-frame-pointer -fstack-usage   main.c Comment: #include "check_example.h #Exit_Example(TRUE);   Attached code: MCAL_Dio_S32K344_S32DS363_RTD600_CP.zip: RTD MCAL copy to S32DS project MCAL_Dio_S32K312_RTD600_MCUPLL.zip: S32K312 MCU with PLL, add UART printf Others attachment all link the MCAL to RTD install path.

***************************************************************************** *Detailed Description: *This example will show you how to configure Wdg_fs23 Driver. *Sbc_fs23_InitDriver, Sbc_fs23_GoToInitState, Wdg_43_fs23_Init, Sbc_fs23_InitDevice initialize the Sbc device and external Wdg in SLOW MODE(This mode can e.g. be used during system startup/initialization phase). *Sbc_fs23_InitDevice release FS0B, according to the configuration in Sbc_fs23 WatchdogConfig tab: Release safety outputs after init *Sbc_fs23_TimeDelay delay for an amount of time, allow Gpt ISR to trigger watchdog externally. *Wdg_43_fs23_SetMode(WDGIF_FAST_MODE); switch Wdg operation mode to FAST MODE(This mode can e.g. be used during normal operations of the ECU). *Wdg_43_fs23_SetTriggerCondition(10000U); sets a new timeout value to 10 seconds, during which Wdg_fs23_Cbk_GptNotification0 continuously refresh the watchdog. *To demonstrate the watchdog timeout, Wdg_43_fs23_SetTriggerCondition was not called again to set a new timeout value, and Wdg_fs23_Cbk_GptNotification0 no longer refreshed the watchdog. *The watchdog error counter(WD_ERR_CNT) continues to increase reached its maximum value(WD_ERR_LIMIT), causing fault error counter(FLT_ERR_CNT) to increment by 1. *FS23 eventually enters fail-safe mode because FLT_ERR_CNT >= max. At this point, it was observed that LEDs V1 (D7), V2 (D8), and V3 (D9) of KITFS23SKTEVM were turned off. *The SPI data between FS23 and S32K311 are captured and attached to the project. *------------------------------------------------------------------------------ *Test HW: * S32K31XEVB-Q100 Board SCH-55131 REV A P32K311HV 0P98C * KITFS23SKTEVM Dev-kit SCH-53096 REV B2 MFS2320BMBB1EP * My S32K31XEVB-Q100 has an onboard PFS2320A0L1W1, but Step 13/14 of AN14041 mention that A0 devices are not supported, so S32K311 communicate with the FS23 on the KITFS23SKTEVM. *Connections: KITFS23SKTEVM | S32K31XEVB-Q100 ------------------------------|-------------------- SPI_CSB J28-2 | J12-5(PTB-17) SPI_MOSI J29-2 | J12-7(PTB-16) SPI_SCK J31-2 | J12-11(PTB-14) SPI_MISO J32-2 | J12.9(PTB-15) VCC J6-1 | J40-15 GND J6-2 | J40-13 - KITFS23SKTEVM: SW1 - position 2-3 , J30 - ON, J26 5-6 ON, J26 9-10 ON . - Connect KITFS23SKTEVM Dev-kit and S32K3 MCU via on-board Arduino headers. *SDK: * S32K3 RTD 4.0.0 (SW32K3_S32M27x_RTD_R21-11_4.0.0_D2311_DS_updatesite.zip) * FS23 RTD 1.0.0 (S32K3xx_SBC_FS23_R21-11_1.0.0_D2508_DesignStudio_updatesite.zip) *Debugger: S32DS 3.5.8, OpenSDA/ PEmicro Multilink Universal FX *Target: internal_FLASH *Reference: * AN14041 FS23 quick start guide (Rev. 2.0 — 23 January 2025) * AN14129 FS23 implementation and behaviors (Rev. 2.0 — 13 December 2024) * FS23, Safety System Basis Chip (SBC) with Power Management, CAN FD and LIN Transceivers Data Sheet (Rev. 8.0 — 30 June 2025) * RTD_SBC_FS23_UM.pdf C:\NXP\S32DS.3.5\S32DS\software\PlatformSDK_S32K3\SW32K3_FS23_R21-11_1.0.0_D2312\Sbc_fs23_TS_T40D34M10I0R0\doc * RTD_WDG_43_FS23_UM.pdf C:\NXP\S32DS.3.5\S32DS\software\PlatformSDK_S32K3\SW32K3_FS23_R21-11_1.0.0_D2312\Wdg_43_fs23_TS_T40D34M10I0R0\doc * AUTOSAR_SWS_WatchdogDriver.pdf https://www.autosar.org/fileadmin/standards/R21-11/CP/AUTOSAR_SWS_WatchdogDriver.pdf * This example is migrated from Wdg_fs23_example_HLD_S32K344. The method of migrating refers to the video "2.S32DS CT MCAL demo porting K344 to K312 based on RTD500": https://community.nxp.com/t5/S32K-Knowledge-Base/S32K3-Tools-Part-How-to-port-RTD-s-existing-MCAL-demo-to-other/ta-p/1966315 *****************************************************************************