This short video demonstrates a path through NXP website to the CodeWarrior v5.1 download link. On the final place other downloads are available such as service packs, updates, patches etc. Login to NXP site is required.

For debug purposes, it is possible to read and write the user data and the ECC value directly from/to the SRAM memory. For these debug accesses a register interface is available.   By the debug access and writing incorrect data + ECC values into the system memory,  the single and double bit ECC errors may be simulated for checking the software error handling.   The debug registers may be modified only in a special mode.   The tested address 0x3000 is excluded from linker use - see prm linker file.   I hope it helps you. Radek

This document is intended to show the new SM912F634xxxxx part and the differences between this new part and the MM912F634xxxxx part.

This document includes in attachment excel file calculation that might be useful for those using the S12 MagniV for motor control and proper PLL setting in their projects.   Following parameters can be set and reused for different scenarios via attached excel sheet calculation for the S12 MagniV BLDC motor control applications: #define CPMU_REFDIV // PLL setting of ref. divider #define CPMU_SYNDIV // PLL setting of multiplier #define CPMU_POSTDIV // PLL setting of the post divider #define CPMU_REFFRQ // PLL setting of ref. frequency #define CPMU_VCOFRQ // PLL setting of VCO frequency #define ADC_TIM // setting of ADC timer #define MIN_ADC_TRIGGER_FIRST // setting of ADC trigger #define MIN_ADC_TRIGGER_SECOND // setting of ADC trigger #define PWM_MODULO // PMF module config. #define PWM_DEADTIME // PMF module config. #define TIM_PRESCALER // Timer prescaler #define TIMER_1MS // Setting of timer #define SCI_BAUDRATE // setting of SCI baud rate   This is how it can look for setting either internal or external clock: // PLL settings /* /* // Internal clock 1MHz, 100/50 MHz CPU/Bus clock, 8.33 MHz ADC clock #define _INTERNAL_CLOCK                        // 1 MHz internal clock is used #define    CPMU_REFDIV        0 #define    CPMU_SYNDIV        49 #define    CPMU_POSTDIV       0 #define    CPMU_REFFRQ        0 #define    CPMU_VCOFRQ        3 #define    ADC_TIM            2 #define    MIN_ADC_TRIGGER_FIRST     24 #define    MIN_ADC_TRIGGER_SECOND    144 #define    PWM_MODULO                5000 #define    PWM_DEADTIME              50 #define    TIM_PRESCALER      6         // Timer prescaler 64; 50 MHz/64 = 1.28 us #define    TIMER_1MS          781 #define    SCI_BAUDRATE       5208 */  // External clock 4MHz, 25/12.5 MHz CPU/Bus clock, 6.25 MHz ADC clock #define _EXTERNAL_CLOCK #define    CPMU_REFDIV        3 #define    CPMU_SYNDIV        24 #define    CPMU_POSTDIV       1 #define    CPMU_REFFRQ        0 #define    CPMU_VCOFRQ        1 #define    ADC_TIM            0 #define    MIN_ADC_TRIGGER_FIRST     8 #define    MIN_ADC_TRIGGER_SECOND    48 #define    PWM_MODULO                1250 #define    PWM_DEADTIME       13 #define    TIM_PRESCALER      4         // Timer prescaler 16; 12.5MHz/16 = 1.28 us #define    TIMER_1MS          781 #define    SCI_BAUDRATE       1302     It is used in following function for Clock, Reset and Power Management Unit configuration: //Clock, Reset and Power Management Unit configuration //* //*****************************************************************************/ void initCPMU(void) {     // Wait for stable supply after power up     while (GDUF_GLVLSF)         GDUF_GLVLSF = 1;      CPMUREFDIV_REFDIV = CPMU_REFDIV;     CPMUREFDIV_REFFRQ = CPMU_REFFRQ;     CPMUSYNR_SYNDIV = CPMU_SYNDIV;     CPMUSYNR_VCOFRQ = CPMU_VCOFRQ;     CPMUPOSTDIV_POSTDIV = CPMU_POSTDIV;  #ifdef _EXTERNAL_CLOCK     CPMUOSC_OSCE = 1;     while (CPMUIFLG_UPOSC == 0) {}; // Wait for oscillator to start up (UPOSC=1) and PLL to lock (LOCK=1) #endif      while (CPMUIFLG_LOCK == 0) {};     CPMURFLG  = 0x60;     //Clear PORF and LVRF }          Or setting of ADC clock for both ADC modules in ADC module configuration function:   //ADC0CTL_1 = 0;        ADC0TIM = ADC_TIM;          // clock: clk = fbus / (2x(reg.value + 1)) [0.25 - 8MHz]        //ADC1CTL_1 = 0;        ADC1TIM = ADC_TIM;          // clock: clk = fbus / (2x(reg.value + 1)) [0.25 - 8MHz]        All the rest of the corresponding registers settings can be found in the example for the BLDC motor control of 3-pase sensorless BLDC development kit with S12 MagniV in section download: MTRCKTSBNZVM128_SW: Complete motor control application software package for MTRCKTSBNZVM128

Work with pushbuttons and 7 segment display. Write assembly (ASM) and C programs for the HCS12, as well as to work with the pushbuttons and 7-segment display on the Dragon12-JR board.  The programs find the largest and smallest numbers from an arbitrary list of eight 8-bit unsigned numbers and displays them on the 7-segment display as outlined in the following.   1. Write a program to do the following, in both ASM and C. Do not use MINA, MINM, MAXA, and MAXM instructions.            a. Load an array of eight 8-bit unsigned numbers into RAM.            b. Find the largest of these numbers and store it.            c. Find the smallest of these numbers and store it.            d. Wait for the pushbuttons (S1 or S2) to be pressed.            e. The first time S1 is pressed, display the high nibble of the largest number; the second time S1 is pressed, display the low nibble of the largest number.                For example, if the largest number is 0x3F, the 7-segment display should show “3” the first time S1 is pressed and “F” the second time it is pressed.            f. Do the same for S2, except use the smallest number.  2. Explain why debouncing is used with switches. Optional: Implement software debouncing for switch used above.   Hints: These are unsigned numbers that your program will be searching through.  Make sure you are using the unsigned branch instructions in your ASM code. Your TA will be changing the numbers in your array to make sure it works for arbitrary 8-bit values. Please make sure the array is somewhere near the top of your program file. For interfacing to LEDs, 7 segment Displays, and pushbuttons see the schematic and manual of your development board. The type of the 7-segment LED on the Dragon12-JR board is common anode. All cathodes are driven individually by an output port and all anodes are internally connected together. The Dragon12-JR board uses port H to drive 7-segment cathodes. Skeleton files are provided to help you complete the asseignment. The 7-segment display communicates with the board via Port H whose address is $0260 (PTH).  Its data direction (input or output) is controlled by writing to Data Direction H register whose address is $0262 (DDRH). In order for PTH to be output (i.e. displaying something), you must set DDRH to $FF first (all bits high, all bits output).  The skeleton code does this for you this time. Almost every I/O port on the board works similarly to PTH; that is, you must set the direction of data on a corresponding data direction register before writing to or reading from it. The two pushbuttons (S1 and S2) are connected to PM6 and PM7. S1à PM6, S2à PM7 A subroutine that displays the low nibble of register A is included with the skeleton ASM code. Just store a value in register A and issue jsr seg7_out to display the low nibble of A. You are required to understand how it works and to write a similar routine for the C version of your code.   This document was generated from the following discussion: Professional Way to solve this HCS12 Dragon12-JR,Work with pushbottons and 7 segment display

Here are the two utilities which can be used to calculate the following:   - PLL filter component values on HCS12 devices such as MC9S12DP256   - PLL register values on S12(X) devices such as S12XE, S12XF, S12XS, S12P and S12HY.   Both utilities come with appropriate user manuals in PDF.

TIC example code, v.1.1 * The SW: * demonstrates FLASH programming as a part of application * uses adjusted routines from AN2720 * writes a few words into FLASH locations Pages FE and E0~EF may be used for data storage.   Other pages are used for program storage (see PRM file)      * tested on: HCS12X STARTER KIT * OSCCLK = 16MHz, BUSCLK = 8MHz * Reference to documentation: MC9S12XDP512V2 Rev.2.17 Original Attachment has been moved to: XDP512-FLASH-E_W-CW47.ZIP

The example code shows how to invoke single or double bit RAM ECC error at S12Z devices.   Some basic overview about S12Z ECC codes may be found in thread AM/FLASH ECC Error handling .

This example: 1. write unprotected P-Flash area 2. protect target P-Flash area 3. tries to write protected P-Flash area 4. call Protection Override command for temporary modify P-Flash protection 5. write into temporary unprotected P-Flash area 6. restore original P-Flash protection scheme The part of P-Flash memory used in this example for writing tests (0xFF8000..0xFF8FFFUL) is excluded from linker using. Please look at prm linker file for more details.   The flash_array constant with Protection Override Comparison Key is not directly referenced in the code, therefore we must enter the constant name into ENTRIES section in prm linker file for avoiding stripping it out as unused. Please look at P-Flash Protection Register (FPROT) chapter in the reference manual for more details about P-Flash protection. The key for Protection Override should be rather received from external source and used as PFLASH_Protection_Override() parameter. The correct Protection Override key is here hard-coded (err = PFLASH_Protection_Override(0xCAFE, 0xF...) for example code simplifying.   I hope it helps you. Radek

AN12086 Simple Serial Bootloader for S12Z AN12086 SW     AN5330 Migration Guide for S12ZVM Devices AN5330       AN5327 Three-phase Sensorless Single-Shunt Current-Sensing PMSM Motor Control Application with MagniV MC9S12ZVM AN5327       AN5264 Emulating I2C Master Mode AN5264 SW     AN5207 Hardware Design Guidelines for S12ZVM Microcontrollers AN5207       AN5190 S12ZVM Derivatives Configuring PMF Module AN5190 SW     AN5168 Using the ADC Module in S12ZVM AN5168 SW     AN5135 3-phase Sensorless PMSM Motor Control Kit with MagniV MC9S12ZVM AN5135       AN5122 Using Freescale’s LIN Driver with the MagniV Family AN5122 SW     AN5084 Hardware Design Guidelines for S12ZVL Microcontrollers AN5084       AN5082 MagniV in 24V Applications AN5082       AN4975 Using MSCAN on the MagniV Family AN4975 SW     AN4912 Tuning 3-Phase PMSM Sensorless Control Application Using MCAT Tool AN4912       AN4867 Hardware Design Guide lines for S12ZVC AN4867       AN4852 Using the SENT Transmitter Module in S12ZVC Devices AN4852 SW     AN4842 S12ZVL LIN Enabled RGB LED Lighting Application AN4842 SW     AN4841 S12ZVL LIN Enabled Ultrasonic Distance Measurement AN4841 SW     AN4731 Understanding Injection Current on Freescale Automotive Microcontrollers AN4731       AN4723 S12Z MagniV Bootloader AN4723 SW     AN4722 Real Time Counter (RTC) on the S12ZVH Family AN4722       AN4721 S12ZVH: Hardware Design Guidelines AN4721       AN4718 3-Phase BLDC Hall Sensor Application Using S12ZVM AN4718 SW     AN4704 3-phase Sensorless BLDC Motor Control Kit with the S12 MagniV MC9S12ZVM AN4704       AN4680 PMSM Electrical Parameters Measurement AN4680       AN4643 S12VR - Hardware Design Guidelines AN4643       AN4642 Motor Control Application Tuning (MCAT) Tool for 3-Phase PMSM AN4642       AN4618 Sensorless BLDC Motor Control Using S12G240 Based on HVAC Platform AN4618       AN4617 HMI Design Using HVAC Platform AN4617       AN4616 Flap Motor Control Based On HVAC Platform AN4616       AN4558 3-phase Sensorless BLDC Motor Control Development Kit with MC9S12G128 MCU AN4558 SW     AN4540 Comparison Between the MC9S12VR and MM912_634 AN4540       AN4506 Software Analysis in CodeWarrior for MCU AN4506       AN4505 Safety Considerations S12G-Family AN4505       AN4483 Emulated EEPROM Routines for the S12P Family AN4483 SW     AN4455 MC9S12G128_A240 Demonstration Lab Training AN4455 SW     AN4448 MC9S12VR Family Demonstration Lab Training AN4448 SW     AN4418 MC9S12G64 Demonstration Lab Training AN4418 SW     AN4388 Quad Flat Package (QFP) AN4388       AN4364 Glucose Meter Fundamentals and Design AN4364 SW     AN4320 Introduction to the 16-bit Tower Boards Using the MC9S12GN32 AN4320       AN4303 Light control and diagnostics using a MC9S12GN32 MCU AN4303 SW     AN4302 Introduction to the S12G Family EEPROM AN4302 SW     AN4283 Migrating Software Applications from the S12 (XEXSP) and S08 to S12G Microcontrollers AN4283       AN4268 Three-phase Sensorless BLDC Motor Control Kit with the Qorivva MPC5604P AN4268       AN4263 Modification of the eGUI (D4D) Driver for char Displays (D4CD) AN4263 SW     AN4258 Serial Bootloader for S12(X) Microcontrollers Based on 180 nm Technology AN4258 SW     AN4236 MC9S12XHY-Family Demonstration Lab Training AN4236 SW     AN4143 Migrating from the 16-bit S12XE to 32-bit MPC5604B Family of Microcontrollers AN4143       AN4058 BLDC Motor Control with Hall Effect Sensors Using the 9S08MP AN4058       AN4024 High Speed Stall Detection on the S12HY Family AN4024 SW     AN4021 MC9S12HY-Family Demonstration Lab Training AN4021 SW     AN3961 EEPROM Emulation for the MC9S12XS and MC9S12P Families Using AN2302 as a Reference AN3961 SW     AN3937 MC9S12P-Family Demonstration Lab Training AN3937 SW     AN3936 How to install and run Classic CodeWarrior products on 64-bit Windows 7 PC AN3936       AN3832 Sensorless BLDC Motor Control Using MC9S08AC16 AN3832 SW     AN3784 Understanding the Memory Scheme in the S12(X) Architecture AN3784       AN3743 Emulated EEPROM Quick Start Guide AN3743       AN3624 S12X Temperature Sensor AN3624       AN3622 Comparison of the S12XS CRG Module with S12P CPMU Module AN3622       AN3613 Using the MC9S12XS Family as a Development Platform for MC9S12P Family AN3613       AN3589 Optically-Isolated Multilink BDM Interface for the S08-S12 Microcontrollers AN3589       AN3555 Investigating XGATE Software Errors AN3555       AN3510 S12HZ and S12XHZ Family Compatibility AN3510       AN3497 S12XS Family Compatibility Considerations AN3497       AN3493 TFT display AN3493 SW     AN3490 Overview of the MC9S12XE Emulated EEPROM AN3490       AN3469 S12 and S12XE Family Compatibility AN3469       AN3458 Debugging XGATE Code AN3458       AN3419 System Integrity Techniques for the S12XE AN3419       AN3391 LFAE Bootloader Example and Interface for use with AN2546 (CAN bootloader for S12XE) AN3391       AN3333 Implementing CAN and LIN Signal Level Gateway AN3333 SW     AN3330 Introduction to the Stepper Stall Detector Module AN3330 SW     AN3328 HCS12XD Family Compatibility Considerations AN3328       AN3327 Using the S12XE-Family as a Development Platform for the S12XS-Family AN3327       AN3300 General Soldering Temperature Process Guidelines AN3300       AN3298 Solder Joint Temperature and Package Peak Temperature AN3298       AN3292 XGATE Library SCI Emulation AN3292 SW     AN3291 How to Use IIC Module on M68HC08, HCS08, and HCS12 MCUs AN3291       AN3289 Low-Power Techniques for the S12X Family AN3289       AN3275 S12 All-Access Bootloader for the HCS12 Microcontroller Family AN3275 SW     AN3262 Designing Hardware for the HCS12X D-Family AN3262       AN3257 Meeting IEC 60730 Class B Compliance with the MC9S08AW60 AN3257       AN3253 XGATE Library Load Measurement AN3253 SW     AN3242 S12XD and S12XE Family Compatibility AN3242       AN3226 XGATE Library ATD Average AN3226 SW     AN3225 XGATE Library PWM Driver AN3225 SW     AN3224 Tutorial Introducing the XGATE Module to Consumer and Industrial Application Developers AN3224       AN3219 XGATE Library TN STN LCD Driver AN3219 SW     AN3208 Crystal guide AN3208       AN3153 USB - HID - ZSTAR AN3153 SW     AN3145 XGATE Library Using the Freescale XGATE Software Library AN3145       AN3144 Using XGATE to Implement a Simple Buffered SCI AN3144 SW     AN3034 Using MSCAN on the HCS12 Family AN3034 SW     AN3031 Temperature Sensor for the HCS08 Microcontroller Family AN3031 SW     AN3015 Using the XGATE for Manchester Decoding AN3015 SW     AN2974 Quick Start for Beginners to Drive a Stepper Motor AN2974       AN2881 Mapping Memory Resources on HCS12 Microcontrollers AN2881       AN2880 Using Backdoor Access Capability to Unsecure HCS12 MCUs AN2880 SW     AN2836 Web Server Development with MC9S12NE64 and OpenTCP AN2836 SW SW2 SW3 AN2764 Improving the Transient Immunity Performance of MCU-based Applications AN2764       AN2759 Implementing an Ethernet Interface with the MC9S12NE64 AN2759 SW     AN2734 HCS12X Family Memory Organization AN2734       AN2732 Using XGATE to Implement LIN Communication on HCS12X AN2732       AN2727 Designing Hardware for the HCS12 D-Family AN2727       AN2726 XGATE Library CAN Driver AN2726 SW     AN2724 Using the HCS12X PIT as a 24-bit Elapsed Timer AN2724       AN2720 A Utility for Programming Single FLASH Array HCS12 MCUs, with Minimum RAM Overhead AN2720 SW SW2   AN2708 An Introduction to the External Bus Interface on the HCS12X AN2708       AN2700 Basic Web Server Development with MC9S12NE64 and CMX-MicroNetT TCP-IP Stack AN2700 SW     AN2692 MC9S12NE64 Integrated Ethernet Controller AN2692       AN2685 How to Configure and Use the XGATE on S12X Devices AN2685       AN2678 Using the HCS12 NVM Standard Software Drivers with the Cosmic Compiler AN2678       AN2624 Basic Web Server Development with the CMX-MicroNet TCP-IP Stack AN2624 SW     AN2617 A Software Piority Interrupt Scheme on HCS12 Microcontrollers AN2617 SW     AN2615 HCS12 and S12X Family Compatibility AN2615       AN2612 PWM Generation Using HCS12 Timer Channels AN2612 SW     AN2597 Using the MC9S12E128 to Implement an IrDA Interface AN2597 SW     AN2573 LINkits LIN Evaluation Boards AN2573       AN2554 Clearing and Disabling Interrupt Flags AN2554       AN2552 Configuring the System and Peripheral Clocks in the MC9C12E128 AN2552 SW     AN2548 Serial Monitor Program for HCS12 MCUs AN2548 SW     AN2546 HCS12 Load RAM and Execute Bootloader User Guide AN2546 SW     AN2485 HCS12 Software Stationery AN2485 SW     AN2461 Low Power Management using HCS12 and SBC devices AN2461       AN2438 ADC Definitions and Specifications AN2438       AN2434 Input-Output Pin Drivers on HCS12 Family MCUs AN2434       AN2433 5V to 3V Design Considerations AN2433       AN2429 Interfacing to the HCS12 ATD Module AN2429       AN2428 An Overview of the HCS12 ATD Module AN2428       AN2408 Examples of HCS12 External Bus Design AN2408       AN2400 HCS12 NVM Guidelines AN2400       AN2396 Servo Motor Control Application on a LIN AN2396 SW     AN2342 Opto Isolation Circuits For In Circuit Debugging of 68HC9(S)12 and 68HC908 Microcontrollers AN2342       AN2321 Designing for Board Level Electromagnetic Compatibility AN2321       AN2318 Using the I2C Bus with HCS12 Microcontrollers AN2318 SW     AN2304 Implementation of a UDP-IP (User Datagram Protocol) Stack on HCS12 Microcontrollers AN2304 SW     AN2302 EEPROM Emulation for the MC9S12C32 AN2302 SW     AN2295 Developer's Serial Bootloader for M68HC08 abd HCS08 MCUs AN2295       AN2287 HCS12 External Bus Design AN2287       AN2283 Scalable Controller Area Network (MSCAN) Interrupts AN2283       AN2263 PC Master Software: Creation of Advanced Control Pages AN2263       AN2255 MSCAN Low-Power Applications AN2255       AN2250 Audio Reproduction on HCS12 Microcontrollers AN2250 SW SW2 SW3 AN2221 MI Bus Software Driver for the MC9S12DP256 AN2221 SW     AN2216 MC9S12DP256 Software Development Using Metrowerk's Codewarrior AN2216       AN2213 Using Cosmic Software's M68HC12 Compiler for MC9S12DP256 Software Development AN2213       AN2204 Fast NVM Programming for the MC9S12DP256 AN2204 SW     AN2201 Low Battery Cranking Pulse in Automotive Applications AN2201       AN2189 Using the Clock Generation Module on the HC12 D Family AN2189       AN2153 A Serial Bootloader for reprogramming the MC9S12DP256 FLASH Memory AN2153 SW     AN2104 Using Background Debug Mode for the M68HC12 Family AN2104       AN2103 Local Interconnect Network (LIN) Demonstration AN2103       AN2011 The MSCAN on the MC9S12DP256 compared with the MSCAN on the HC12 family AN2011       AN1954 MPXY8000 Series Tire Pressure Monitoring Sensor AN1954       AN1837 Non-Volatile Memory Technology Overview AN1837       AN1798 CAN Bit Timing Requirements AN1798       AN1783 Determining MCU Oscillator Start-up Parameters AN1783       AN1775 Expanding Digital Input with an AD converter AN1775       AN1771 Precision Sine-Wave Tone Synthesis Using 8-Bit MCUs AN1771       AN1716 Using M68HC12 Indexed Indirect Addressing AN1716       AN1705 Noise Reduction Techniques for Microcontroller-Based Systems AN1705       AN1284 Transporting M68HC11 Code to M68HC12 Devices AN1284       AN1280 Using and Extending D-Bug12 Routines AN1280       AN1263 System Design and Layout Techniques with Single-Chip Microcontrollers AN1263       AN1259 System Design and Layout Techniques for Noise Reduction in MCU-Based Systems AN1259       AN1058 Reducing A_D Errors in Microcontroller Applications AN1058       AN1051 Transmission Line Effects in PCB Applications AN1051       AN1050 Designing for Electromagnetic Compatibility (EMC) with HCMOS Microcontrollers AN1050       AN5389 S12Z MagniV LIN Bootloader AN5389 SW     AN11967 S12ZVM Family in 48 V Applications AN11967      

This example simulates ECC issue by cumulative write into the same EEPROM area without an erasing.   The EEPROM erase operation set all bits into log1. The EEPROM program operation may keep bit cells in log1 state or change it into log0 state, but not in opposite way.   The S12Z MCU EEPROM is protected by 22-Bit ECC Scheme. Every word (16bits) is protected by additional 6 bits with ECC checksum. The ECC values are not accessible for users. Every EEPROM reading triggers also ECC check by internal logic. The single bit error in user data may be corrected by ECC checksum. The double bit error cannot be corrected.   The ECC protection is implemented also at flash controller commands and results are signalling by MGSTAT bits.   The first case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b10 due to fact that just 1 bit is different during write verification (correctable error)   The second case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b11 due to fact that more than 1 bits are different during write verification (non-correctable error)   The third case simulates Double-bit ECC error during reading. The MGSTAT bits after the second write are 0b11 due to fact that more than 1 bits are different during write verification (non-correctable error)       The EEPROM patterns are selected for highlighted described behavior and they don't have any real meaning.   The cumulative write is not allowed for normal operation!!! The code from this example should be used only for design testing - not in production!!!   Please, see the prm file. Address range 0x100000-0x100001 is excluded from default EEPROM and is used as user EEPROM memory The size of EEPROM sectors is 2 bytes. The EEPROM_Program() function may program up to 4 words in single flash command.   Note: The EEPROM_Program() function was updated - erase verification is skipped     I hope it helps you. Radek

Here is a SW example demonstrating measurement of the bandgap voltage featured on a microcontroller. The bandgap voltage is routed to an internal ATD channel. ATD converter measures the input voltage and stores it to a variable located in Flash memory. The SW example project is made in CodeWarrior v5.1 for MC9S12XEP100 device.

Officially we offer two S12ZVM motor control kits: MTRCKTSBNZVM128: 3-phase Sensorless BLDC Development Kit with S12 MagniV S12ZVM MTRCKTSPNZVM128: 3-phase Sensorless PMSM Development Kit with S12 MagniV® MC9S12ZVML128 MCU     In fact, the kit contents are the same - S12ZVML12EVBLIN board and LINIX 45ZVN24-90 motor. The LINIX motor is BLDC type, but their characteristics are rather close to the PMSM type. So, the difference is just in used software and jumper settings.   Since the current web pages are slightly confused, I would like to place here links for the main 4 types of software for MTRCKTSBNZVM128 and MTRCKTSPNZVM128 kits.   3-Phase Sensorless BLDC S12ZVM Application – six step driving https://www.nxp.com/docs/en/user-guide/MTRCKTSBNZVM128QSG.pdf https://www.nxp.com/docs/en/application-note/AN4704.pdf https://www.nxp.com/webapp/Download?colCode=MTRCKTSBNZVM128_SW&appType=license    3-Phase Hall Sensor BLDC S12ZVM Application – six step driving https://www.nxp.com/docs/en/user-guide/MTRCKTSBNZVMHQSG.pdf https://www.nxp.com/docs/en/application-note/AN4718.pdf https://www.nxp.com/docs/en/application-note-software/AN4718SW.zip   3-phase Sensorless Dual-Shunt PMSM S12ZVM Application – FOC driving https://www.nxp.com/docs/en/user-guide/MTRCKTSPNZVM128QSG.pdf https://www.nxp.com/docs/en/application-note/AN5135.pdf https://www.nxp.com/webapp/Download?colCode=MTRCKTSPNZVM128-SW&appType=license    3-phase Sensorless Single-Shunt PMSM S12ZVM Application – FOC driving https://www.nxp.com/docs/en/user-guide/AN5327-QSG.pdf Note: please be aware that there is still typo error in this document (already reported) – the jumpers J57 and J60 should be in position 2-3. https://www.nxp.com/docs/en/application-note/AN5327.pdf https://www.nxp.com/docs/en/application-note-software/AN5327SW.zip   EDIT: Additionally, we may use a cost-effective S12ZVM Mini Board or Mini Kit evaluation platform. The software refers to the above mentioned, but with small modification for S12ZVML-MINBRD board.    I hope it helps you.

Dear reader,   There is extended information provided in the attached document. it contains detailed description "how-to", example design, detailed memory maps and code examples.   Also tested example projects created under CodeWarrior are attached.   I believe the document as well as SW examples will help you in the design and avoid mistakes we have met under our work in the S12(X) support team.   Yours sincerely,   Ladislav

Customers are sometimes asking for reference schematics, so here is a batch of minimal configurations for main representatives of S12(X) family. Attached is also document that should answer most common questions. Hope this will help. Lukas

S12(X) S12 MagniV DOCUMENTS CAN setup calculator for S12(X) and MagniV devices  S12(X) MCU Security  S12(X) devices reference schematics  Useful documents for building own CAN bootloader  How-to Add missing derivatives to CodeWarrior Classic HCS12(X) 5.2 (Unofficial Method)  DOCUMENTS S12Z constant, variable, code allocation in CodeWarrior   BLDC 6-step control speed scaling using S12ZVM  MagniV Power Dissipation Calculator  MTRCKTSBNZVM128 vs MTRCKTSPNZVM128 kit motor  S12ZVM configuration for the motor control applications  Software for S12ZVM motor control kits  DEVKIT-ZVL128 EVB review  S12 family devices - COP recognition consideration calculator  MagniV PLL calculator  Bus-Off Handling in MSCAN   EXAMPLES CAN Standard ID and CAN Extended ID for S12(X) and MagniV devices, memories refreshment  S12XD, S12XE - External BUS design - Addendum To AN2708  S12X Examples Pack  TIC-S12-XDP512-FLASH-E_W-CW47  S12X_Interrupt_catcher (catch all unexpected interrupts)  API example code for S12G  Read paged const in S12  EXAMPLES How to get device ID and write program once field without programming application to the S12Z device in the CodeWarrior (Eclipse)  CAN Standard ID and CAN Extended ID for S12(X) and MagniV devices, memories refreshment  S12Z Protection Override  S12ZVC IFR Program Once Field  S12Z: Simulating ECC errors at EEPROM by cumulative write  S12Z: Simulating ECC errors at RAM by debug access  S12Z: Simulating ECC errors at Flash by cumulative write  S12Z SW example of COP Watchdog Reset  S12Z Interrupt catcher for unexpected interrupts  S12Z voltage measurement  S12Z EEPROM example code  S12Z Flash example code  Autonomous Clock Trimming SW example for MagniV devices  BATS Voltage Supply Sense example code for MagniV devices  High-Voltage Input (HVI) SW examples for MagniV devices  SW examples for MagniV S12ZVC and S12ZVL devices  PWM example code for S12ZVL  S12ZVL-TIM-FrequencyMeasurement-V1_0-CW106-TIC-EXAMPLE  SW example of Security feature with Backdoor Access Key option for S12ZVL  Example S12ZVL ADC0 triggered by TIM0 OC updates PWM duty cycle  S12ZVM clock module and PLL configuration - SW examples  Low power mode example code for S12ZVC  Single / double bit RAM ECC error example code at S12ZVC  S12ZVML-MINIBRD software ported from AN5327  Example: S12ZVC192-ACMP-POT-CW107  Example codes form "Easily Develop LIN-based Actuator Applications with Mixed-signal MCUs" webinar     

Based on S12G128,  Firstly, placed some const at PAGE_0B,  Secondly, place the same data at NON_BANKED  Finally, you can check whether reading result of paged const is right. Of course, they are the same.  Cheers !

Hello Community user, This post is intended to show how to recovery from Bus-Off state using the MSCAN and CANPHY modules in the MagniV devices. This example is focused on S12ZVC due to the internal CANPHY so it makes easier to create a quick example. What is Bus-Off condition? The bus-off condition is a catastrophic condition where the node in this state does not transmit anything on the bus. How to enter in Bus-Off state? A node enters in this state if any of the two error counters, Transmit Error Counter (TEC) and Receive Error Counter (REC) raises above 255. How to recovery from Bus-Off? A note is permitted to become error-active (no longer bus-off) when its error counters both set to 0 after 128 occurrences of 11 consecutive recessive bits have been monitored on the bus. The MSCAN module implements two ways to recover from the fault, the automatic and the manual. The automatic bus-off recovery method puts the node into the error-active state after monitoring 128 occurrences of 11 consecutive bits on the bus. It's important to note that the CANPHY also reports errors on the bus so, the proper error flags must be clear to assure the correct functionality of the node if CANPHY is being used. The manual bus-off recovery method (which is used in this example) puts the note into the error-active state after both independent events have become true in any order: 128 occurrences of 11 consecutive recessive bits on the CAN bus have been monitored. (Cannot be consecutive). CANMISC[BOHOLD] bit has been cleared by the user. Implementation The project contains a header file called  "common.h" which contains three defines that are used to set the CAN nodes. Just one define must be active per node. NODE0_TX and NODE1_TX are transmitting messages on the CAN bus and the NODE_RX is receiving the messages. #define NODE0_TX #define NODE1_TX #define NODE_RX‍‍‍‍‍‍ All nodes are blinking the green led indicating the communication is stable and no errors have occurred. At this point, you should generate the bus-off condition. A way to generate a bus-off condition is grounding one of the two CAN lines (CAN_High or CAN_Low) which will cause a bus-off condition to the transmitters nodes. When the node is in the bus-off state, the yellow led is toggled. At this point, you should not be any message being transmitted on the bus due to the transmitter node is in bus-off. The bus-off condition is detected by the application in the bus-off interrupt (refers Events.c file) which triggers the yellow led toggling. void CAN0_OnBusOff(void) { /* Get CAN bus status */ CAN0_GetError(&gCANErrpr); /* If bus error is set, inform to the application*/ if(gCANErrpr.errName.BusOff){ gBusOffState = PENDING; } CAN0RFLG_CSCIF = 1; // Clear flag }‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ In the main.c file when the node transmitters are selected, there is a routine asking for a push-button event. This event triggers the bus-off recovery request by setting the CANMISC[BOHOLD]. At that point, the 128 occurrences of 11 consecutive recessive bits on the CAN bus should have passed and the green led will toggle again indicating the communication is stable again and no errors have occurred. At this point, you should see the messages on the CAN bus again. /* Read button to recovery from bus off condition*/ if(PushButton3_GetVal()){ CAN0_BusOffRecoveryRequest(); // Request get out of bus off gBusOffState = NONPENDING; /* Clear bus off LED indicator */ LED_YEL_OFF; }‍‍‍‍‍‍‍‍‍‍‍‍‍‍ ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ Note: The VLG-MC9S12ZVC was used for this example and the push button that must be pressed is SW12. Best Regards, Atzel Collazo

Interrupt catcher you can use for debugging or directly in your software. Few notes: 1. You should replace lines for expected interrupt by your interrupts routines as in example of SCI0 interrupt routine. 2. All interrupt vectors are only 16bit addresses, therefore all your interrupt routines must be placed in non banked memory (for example by #pragma commands) 3. Interrupt number 0 presents POR reset vector, 1 is CM reset, 2 is COP reset, … , 119 is Spurious Interrupt. Interrupt number = (0xFE-Vector Address)/2. See Table Interrupt Vector Locations at RM. For Example: Interrupt number of SCI0 = (0xFE-D6)/2 = 0x14 = 20.