Overview This thermostat reference design is an example of how a thermostat can be built taking advantage of the features of the NXP® MC9S08LL MCU, which has a very flexible LCD module that allows driving an 8x24 LCD and power saving modes while keeping track of the time and the LCD information and a 12-bit analog to digital converter. Features Low-power battery (2 AA) operation Small Glass (2-4 uA) Large Glass (7-9 uA) Support for two LCD displays 8x24 mode for greater flexibility 2x26 mode optimized for lowest power Standard HVAC connectivity Temperature sensors Programmable heat/cool temp Block Diagram Board Design Resources

Overview The reference design demonstrates sensorless control of the 3-Phase Switched Reluctance (SR) motor using 56F80x or 56F83XX Digital Signal Controllers. It can also be adapted to 56F81XX Digital Signal Controllers. The concept of this application is that of a sensorless speed closed loop SR drive using flux linkage position estimation. An inner current loop with PI controller is included. The change in phase resistance during motor operation due to its temperature dependency creates errors in the position estimation and significantly affects the performance of the drive. Therefore, a novel algorithm for on-the-fly estimation of the phase resistance is included. The Digital Signal Controller runs the main control algorithm. Rotor position is evaluated using the sensorless flux linkage estimation algorithm. The actual flux linkage is calculated at the rate of the PWM frequency and is compared with the reference flux linkage for a given commutation angle. When the actual flux linkage exceeds the reference, the commutation of the phases is done; the actual phase is turned off and the following phase is turned on. Flux linkage error is used for estimation of the phase resistance at low speeds (US Patent No.: 6,366,865). The actual speed of the motor is determined using the commutation instances. Based on the speed error, the speed controller generates the desired phase current. When the phase is commutated, it is turned on with a duty cycle of 100%. Then, during each PWM cycle, the actual phase current is compared with the desired current. As soon as the actual current exceeds the desired current, the current controller is turned on. The current controller controls the output duty cycle until the phase is turned off (following commutation). Finally, the 3-Phase PWM control signals are generated. The procedure is repeated for each commutation cycle of the motor. Features Sensorless control of an SR motor using a flux linkage estimation technique Targeted for 56F80X, 56F83XX, and 56F81XX Digital Signal Controllers Running on a 3-Phase SR HV Motor Control Development Platform The control technique: current control with a speed closed loop Position estimation based on flux linkage estimation Phase resistance measurement during start-up Phase resistance estimation at low speeds Motor starts from any position with rotor alignment Encoder position reference for evaluation of sensorless position estimation Manual interface FreeMASTER software control interface and monitor Fault protection Block Diagram Board Design Resources

Overview This reference design is based on 32-bit DSC MC56F82748, to demo a BPM Sensorless FOC Washing Machine. This reference design jump-starts your ability to leverage the NXP ®  DSCs' advanced feature sets via complete software, tools and hardware platform. Three-Phase BPM/PMASR drive with sensorless FOC IEC60730 certified controller Speed range 200RPM – 18000RPM (motor speed), 20RPM – 1600RPM (drum speed) Position and speed detection using extended Flux observer and DQ Back-EMF observer and tracking observer Non-recuperative braking and deceleration control Ultra low speed operation with rated torque, and ultra high speed operation with advanced field-weakening algorithm Over-current, over-temperature, over-voltage and under-voltage protection Serial RS232 control interface FreeMASTER GUI for easy debugging Features MC56F82748 BPM Sensorless FOC Washing Machine HVP-MC3PH HVP-56F82748 Block Diagram Design Resources

Overview This full digital power AC to DC Switched-Mode Power Supply (SMPS) system includes both digital power control and digital power management. The control feedback or feed-forward loop that regulates the output of the power system is directly controlled by a 56800/E DSC The DSC provides the digital power management function for configuration, tracking, monitoring, protection, guiding supply sequence, and communication capabilities This reference design is a fully digitally controlled high-frequency Switched-Mode Power Supply based on an NXP® 56F8323 device The primary side is the AC-DC converter with power factor correction (PFC) and on the secondary side is a full bridge DC-DC converter Features General: 500-Watt fully digital switched-mode power supply controlled by A 56F8323 with power factor correction A 56F8323 for secondary with phase shifting technique General Benefits: Power applications become more flexible and universal High input power factor lowers power pollution to the power grid Intelligent mode management and fault supervision Operating status is monitored and controlled in real time Lower system and maintenance cost Performance: Input voltage: 85 ~ 265VAC Input frequency: 45 ~ 65HZ Rating output voltage:48VDC Rating output power: 500W Switch frequency: > 100K Power factor > 95% Efficiency > 90% Communications: RS232 port for communication with optoisolation Visual Interface: Multi-segment LED indicators (input voltage, input current, output voltage, and output current) Block Diagram Board Design Resources

Overview This application creates a vector control PMSM drive with optional speed closed-loop using a quadrature encoder, and serves as an example of a PMSM vector control system design based on the cost-effective 32-MIPS NXP® digital signal controller MC56F80XX. Dedicated algorithms such as transformations, PI controllers and space vector modulation, are implemented using NXP’s Motor Control Library This cost-effective and highly reliable solution minimizes system cost, as the algorithm implements a single shunt current sensing, reducing 3 current sensors to one The reference manual provides a detailed description of the application, including the design of the hardware and the software Features Designed to fit into consumer and industrial applications Uses 56F8013 or 56F8023 32 MIPS Digital Signal Controller Running on a 3-phase High Voltage Power Stage Vector control of PMSM using theQuadrature Encoder as a position sensor Control technique incorporates: Vector control with speed closed-loop with position encoder Rotation in both direction Start from any motor position with rotor alignment 4-quadrant operation Reconstruction of three-phase motor currents from DC-Bus shunt resistor Wide speed range FreeMASTER Control Interface Fault protection - overcurrent, overvoltage, undervoltage Block Diagram Board Design Resources

Overview The FlexRay Brake-By-Wire reference design shows FlexRay capabilities such as high communication speed and channel fault detection. It uses the NXP® MC9S12XDP512 MCU for the pedal node and MC56F8346 DSC for the brake/wheel node; FlexRay connectivity of both nodes is based on the MFR4200 FlexRay communication controller The braking caliper is controlled by PMSM using Vector Control technique while the spinning wheel representing a real tire is powered by a BLDC motor The boards of the 2 engines are interconnected by a CAN bus Uses FlexRay baud rate of 10Mb/s per channel but both channels carry the same data, which enables demonstration of the FlexRay channel fault detection feature Features PMSM using Vector Control technique FlexRay communication speed 10Mb/s per channel Dual channel connection Channel fault detection Re-connection feature FreeMASTER tool based control pages Block Diagram Board Design Resources

Overview The Occupancy Sensor Node reference design is a compact form factor, open source design. It enables low power nodes based on IEEE 802.15.4 protocols such as Thread and ZigBee to communicate data to a wireless sensor network. NXP supplements the Kinetis KW2xD with tools and software that include hardware evaluation and development boards, software development IDE and demo applications and drivers. Features MKW24D512 802.15.4 Kinetis MCU Full IEEE 802.15.4 compliant wireless node for Thread network Integrated PCB meander horizontal antenna 2 Interrupt push button switches (LLWU) 1 FXOS87000CQ Combo sensor 1 Coin cell battery holder 1 EEPROM 1 Battery charger Block Diagram Board Design Resources

Overview Small high-speed BLDC motors have a very low inductance, which is different from conventional BLDC motors. When PWM control is applied to the phases of a small high-speed BLDC motor, the current follows the rectangular PWM voltage shape. This change of current magnetizes and demagnetizes the motor iron at a frequency equal to the PWM frequency, which can cause the motor to become hot enough to be damaged. To prevent this, special techniques are required to control this type of motor. The method used in this reference design consists of a DC/DC inverter that generates the desired voltage for the motor. The motor then uses a conventional 3-phase inverter for commutation. Features Voltage control of a BLDC motor using Hall sensors Targeted at the MC56F8013 Controller Board Running on "3-Phase Power Stage with DC/DC Inverter Lite" Control technique incorporating: BLDC motor closed-loop voltage control using a DC/DC inverter BLDC motor closed-loop speed control Both directions of rotation (however, because an impeller fan is used in the application, the FreeMASTER page is locked to one direction only) Both motor mode and generator mode Starting from any motor position without rotor alignment Minimum speed - 300 RPM Maximum speed - 38000 RPM FreeMASTER software control interface (motor start/stop, speed setup) FreeMASTER software monitor FreeMASTER software graphical control page (required speed, actual motor speed, start/stop status, DC bus voltage level, motor current, system status) FreeMASTER software speed scope (observes actual and desired speeds) FreeMASTER software Hall sensors scope (observes actual state of the Hall sensors) DC bus over- and under-voltage, over-current, and Hall sensor cable error fault protection Block Diagram Board Design Resources

Overview This reference design demonstrates a vector control technique of a 3-phase AC induction motor with a position encoder coupled to the motor shaft. The algorithm runs on Our 56F80X or 56F83XX Digital Signal Controller as the dedicated motor control device It can be adapted to NXP® 56F81XX Digital Signal Controllers The speed closed loop ACIM drive is implemented The system is targeted for applications in both industrial and appliance fields (e.g. washing machines, dishwashers, industrial drives, machine tools, variable speed drives, elevators etc.) Features Vector control technique used for ACIM control Targeted for 56F80X, 56F83XX, and 56F81XX Digital Signal Controllers Running on a 3-phase AC induction motor control development platform at variable line voltage 115/230V AC Encoder used for a speed calculation Control technique incorporates: Speed control loop with inner q axis stator current loop Rotor flux control loop with inner d axis stator current loop Field-weakening technique Stator phase currents measurement method DC-Bus ripple elimination Motor and generator mode DC-Bus brake Overvoltage, undervoltage, overcurrent and overheating fault protection FreeMASTER software control interface and monitor Block Diagram Board Design Resources

Overview The NXP Quick Charge 4+ power bank with 15-watt Qi-certified wireless power output supports all of the latest wired and wireless technologies. Equipped with Qualcomm™ Quick Charge 4+ technology, our power bank provides lightning-fast simultaneous multichannel charging of smartphones, watches, tablets, 2-in-1 products, notebooks and other devices featuring Qualcomm Snapdragon™ mobile platforms and processors. A mere 5 minutes of charging on the NXP power bank delivers 5 hours of battery life. New Power Delivery (PD 3.0) technology combines with a programmable power supply (PPS) in the NXP power bank to support Quick Charge 4+ devices and provide backward compatibility with Quick Charge 2.0 and 3.0 technologies. NXP power bank system software integration also includes wireless power and battery management, PD stacks and more programmable APIs for a fully customizable application. This new power solution leverages the many advantages and standards of USB-C with dual-way USB power delivery for input and output with Quick Charge. Anti-counterfeit and OEM-specific authentication, as well as accurate voltage, current and temperature protection deliver enhanced safety and security. Features Dual-way USB Type-C supports input & output Quick Charge for input and output, PD+PPS, QC2, QC3,QC4 2S battery supported (capability~10,000 mAh), output > 50 W Integrated wireless 15W transmitter supports fast charging for Samsung ®  and Apple ®  devices Digital control buck-boost converter One control IC controls buck-boost converter, charge, Qualcomm algorithm, PD communication and wireless power management Board

Overview This reference design shows the simplicity of a soft modem design, how few resources of the processor it takes, and how well it performs on USA average lines. This design omits the standard telecommunications Codec, instead of using PWM for output and ADC for input. Since both peripherals are readily available on one 56F8300/100 series device, along with more processing power than required from the single core, the design is a true one-chip, one-core system that includes telecommunications ability with room for even more system functionality. Ideal for advanced motion control, home appliances, medical monitoring, fire and security systems, power management, smart relays, and POS terminals. Features Hybrid architecture facilitates implementation of V.21 and V.22bis modem, control, and signal processing functions in one chip Consumes only 7.5 MIPS for the modem function - Only 15K words of Flash for the complete modem application and test harness High-performance, secured Flash memory eliminates the need for external storage devices Extended temperature range allows for operation of non-volatile memory in harsh environments Flash memory emulation of EEPROM eliminates the need for external non-volatile memory 32-bit performance with 16-bit code density On-chip voltage regulator and power management reduces overall system cost Off-chip memory expansion capabilities allow for glueless interfacing with the additional memory of external devices, without sacrificing performance Boots directly from Flash, providing additional application flexibility High-performance PWM with programmable fault capability simplifies design and promotes compliance with safety regulations PWM and ADC modules are tightly coupled to reduce processing overhead; only one of each is used by the modem General purpose input/output (GPIO) pins support application-specific needs Simple in-application Flash memory programming via Enhanced OnCE or serial communication Block Diagram Board Design Resources

Overview This reference design demonstrates speed control of the 3-Phase Switched Reluctance (SR) motor with Hall position sensor using the NXP® 56F80x or 56F83XX Digital Signal Controllers (DSCs). It helps start development of the SR drive dedicated to the targeted application The DSC runs main control algorithm; when the start command is accepted, the state of the Hall sensors position signals is sensed and the individual motor phases are powered in order to start the motor in the requested direction of rotation without rotor alignment According to the determined switching pattern and the calculated duty cycle, the on-chip PWM module generates the PWM signals for the SR motor power stage Features Speed Control of an SR motor with position Hall sensors Targeted 56F80X, 56F83XX, and 56F81XX Digital Signal Controllers Running on a 3-Phase SR HV Motor Control Development Platform (115/230VAC) Running on a 3-phase SR LV Motor Control Development Platform (12V DC) The control technique: voltage control with a speed closed loop Hall sensors position reference for commutation Start from any motor position without rotor alignment Manual interface FreeMASTER software control interface and monitor Fault protection Block Diagram Board Design Resources

Overview This reference design describes a 3-phase sensorless brushless DC (BLDC) motor control with back-EMF (electromotive force) zero-crossing detection, supporting the NXP® 56F80X and 56F83XX Digital Signal Controllers (DSCs) for motor control applications. It can also be applied to Our 56F81XX DSCs The system is designed as a motor drive system for three-phase BLDC motors and is targeted for applications in both industrial and appliance fields (e.g. compressors, air conditioning units, pumps or simple industrial drives) The reference design incorporates both hardware and software parts of the system including hardware schematics Features BLDC sensorless motor 115 or 230V AC Supply Targeted for 56F80X, 56F83XX, and 56F81XX Digital Signal Controllers Running on 3-phase BLDC Motor EVM at 12V, 3-Phase BLDC Low-Voltage Power Stage Speed control loop Motor mode in both direction of rotation Manual interface (RUN/STOP switch, UP/DOWN push buttons control, LED indication) Overvoltage, undervoltage, overcurrent and overheating fault protection Hardware autodetection FreeMASTER control interface (speed set-up) FreeMASTER software remote monitor Block Diagram Board Design Resources

  Overview NXP ® 's wireless charging reference design uses inductive charging technology to charge high-capacity, multi-cell Li-Ion battery packs. The reference design is capable of charging four battery packs simultaneously, using a single NXP digital signal controller. The reference design consists of two main components: a transmitter that sends the requested power level to the battery packs, and a receiver embedded in the battery packs. The receiver provides a controlled charge to the battery by implementing a charging algorithm. Each transmitter channel adjusts its energy transfer independently by responding to commands from the receiver embedded in the battery pack. The intelligent charging method is software-controlled and has the ability to dynamically adjust the power transfer. Archived content is no longer updated and is made available for historical reference only.   Features 80% transfer efficiency Four charging stations to charge four battery packs simultaneously Supports Qi communications protocol Overtemp, overcurrent and overvoltage protection    

Overview To improve performance in industrial drives, Field Oriented Control (FOC) is an advanced technique used for Permanent Magnetic Synchronous and other motor types. This reference design jump-starts your ability to leverage the NXP® DSCs' advanced feature sets via complete software, tools and hardware platform. Features Bi-directional rotation Application speed ranges from 0 to 100 percent of nominal speed (no field weakening) Four state machine Fault protection for driver DC-bus overcurrent, SW overcurrent, overvoltage and over speed Current control loop execution time: 17 us @ 100 MHz MCU speed PMSM vector control using the quadrature encoder Block Diagram Design Resources

  Overview The NXP ®  Smart Application Blueprint for Rapid Engineering (SABRE) series of market-focused reference designs delivers the SABRE platform for eReaders based on the i.MX508 processor. The i.MX508 is the first SoC designed specifically for eReaders with a high-performance Arm® Cortex®-A8 CPU and integrated display controller certified by E Ink® for Electronic Paper Display (EPD) panels The SABRE platform provides a reference design for EPD display, touch control, audio playback as well as the ability to add WLAN, 3G modem or Bluetooth® The platform was designed to facilitate software development with faster time to market through support of both Linux® and Android™ operating systems Archived content is no longer updated and is made available for historical reference only.   Features CPU Complex Up to 800 MHz Arm Cortex-A8 32 KB instruction and data caches Unified 256 KB L2 cache NEON SIMD media accelerator Vector floating point coprocessor Multimedia OpenVG™ 1.1 hardware accelerator 32-bit primary display support up to SXGA+ resolution 16-bit secondary display support EPD Controller supporting beyond 2048 × 1536 at 106 Hz refresh (or 4096 × 4096 at 20 Hz) Pixel Processing Pipeline (PxP) supporting CSC, Combine, Rotate, Gamma Mapping Display 6”Electronic Paper Display Panel daughter card powered by E-Ink External Memory Interface Up to 2 GB LP-DDR2, DDR2 and LP-DDR1(mDDR), 16/32-bit SLC/MLC NAND flash, 8/16-bit with 32-bit ECC Advanced Power Management Multiple independent power domains State Retention Power Gating (SRPG) Dynamic voltage and frequency scaling (DVFS) Connectivity High-Speed USB 2.0 OTG with PHY High-Speed USB 2.0 Host with PHY Controllers Wide array of serial interfaces, including SDIO, SPI, I2C and UART I2S audio interface 10/100 Ethernet controller   Design Resources  

Overview This reference design is based on 32-bit DSC MC56F84789, to demo a 3in1 Air-Conditioner Outdoor Unit. This reference design jump-starts your ability to leverage the NXP ®  DSCs' advanced feature sets via complete software, tools and hardware platform. High performance, low cost all DC VF air-conditioner outdoor unit control system Three control objectives (interleaved single-phase PFC converter, fan and compressor) with one MCU device Input voltage range of 85 – 265VAC/40 – 70H Single-phase two channels interleaved PFC converter compatible with global mains input, 99.9% power factor, 8% input current THDi Sensorless FOC algorithm for both compressor and fan Anti-typhoon startup for fan, and on-line load torque compensation control for compressor to reduce system vibration and noise Reliable startup performance under full load and input voltage range Extreme low/high speed (from 1Hz to 150Hz) performance with extended flux observer Over-/under-voltage, over-current, over-temperature, over-input power protection and lock of rotor detection FreeMASTER GUI for easy debugging Features MC56F84789 3in1 Air-Conditioner Outdoor Unit Block Diagram Board Design Resources

Overview NXP brings a broad portfolio of proven PowerQUICC ®  network communications products, firmware and reference designs that support multiple network interfaces. These reference designs have the flexibility to integrate new features and are adaptable across product lines to protect your investment and maintain an edge over the competition. The NXP ®  MPC8323E-RDB is a turnkey hardware/software reference platform designed to rapidly provide the core elements of tomorrow's multiservice gateway products. Built on Power Architecture technology, the MPC8323E-RDB leverages the processing power of the MPC8323E PowerQUICC II Pro integrated communications processor. Features MPC8323E Integrated Multiservice Gateway features: Flexible WAN interfaces RJ45 100BT Ethernet and connectors for ADSL2+/VDSL2, WiMAX IPv4 Router with VPN capability RJ45 100BT Ethernet and connectors for ADSL2+/VDSL2, WiMAX Up to 640 DMIPS e300 CPU QUICC Engine ®  technology acceleration, 200 MHz Bridging/Routing with NAP/NAPT Firewall support (ACL) QoS for IPTV, VoIP and high-speed data VPN termination and pass-through Board Interfaces: Flexible network interfaces 10/100 Ethernet ADSL2+/VDSL2 WiMAX FXS ports (2) for analog phones 4-port 10/100 Ethernet LAN Two USB 2.0 host (480 Mbps) type A MiniPCI slots (2) Development Environment Our well established vertical ecosystem provides customers with the exact development flow they desire. The MPC8323E-RDB is kitted with: Encased CPE form factor board Linux ®  2.6 (LTIB) Design Resources

Overview This reference design describes a 3-phase brushless DC motor (BLDC) drive that uses the NXP® MC56F8006 Digital Signal Controller (DSC) for dedicated motor control devices. Closed-loop speed/current-controlled BLDC drive, with no need for position or speed sensors. Low-voltage power stages used by the application are designed for 24 VDC line voltage. A reference manual provides a detailed description of the application, including hardware and software design. Hardware schematics, PCB Gerber files and full software listings are also provided. Ideal for applications such as compressors, dishwasher pump drives, washing machines, fans and industrial motor control. Features Sensorless control of BLDC Control technique incorporates: Speed closed-loop control with automatic current limitation Rotation in both directions Start from any motor position with rotor alignment 4-quadrant operation Multisampling method of back-EMF Wide speed range FreeMaster control interface Fault protection for overcurrent, overvoltage, overload and start-up fail Block Diagram Board Design Resources

Overview This reference design demonstrates the configuration of two nodes which include the NXP® 56F8300 Digital Signal Controllers (DSCs) with the FlexRay MFR4200 modules. These nodes communicate together on (over) two channels This application demonstrates a transmission in the static and dynamic part of the cycle, receive buffer and receive FIFO configuration It operates in the interrupt-driven mode and also in the poll-driven mode Features Utilizes MC56F8300 EVBs and FlexRay daughter cards Utilizes in-house developed FlexRay low-level driver Redundant data transmission on two channels Deterministic as well as dynamic data transmission Data rates at 10 Mbits/sec per channel Visual feedback of communication between two FlexRay controllers via FreeMASTER software Block Diagram Board Design Resources