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Overview This reference design describes the design of a 3-phase BLDC (Brushless DC) motor drive, which supports the NXP® 56F80X and 56F83XX Digital Signal Controllers (DSCs). The speed-closed loop BLDC drive using an encoder sensor is implemented The system is targeted for applications in both industrial and appliance fields (e.g. washing machines, compressors, air conditioning units, pumps or simple industrial drives required high reliability and efficiency) Features Voltage control of BLDC motor using Encoder sensor Targeted for 56F80X, 56F83XX, and 56F81XX Digital Signal Controllers Running on 3-phase Motor Board Control technique incorporates: Voltage BLDC motor control with speed-closed loop Current feedback loop Both directions of rotation Motoring mode Minimal speed 500 RPM Maximal speed 1000 RPM (limited by power supply) Manual interface (Start/Stop switch, Up/Down push button control, LED indication) FreeMASTER software control interface (motor start/stop, speed set-up) FreeMASTER software monitor Block Diagram Board Design Resources
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doc&project&patch&script explain to support GD qspi nor in lauterbach, flash tool,ivt,fls mcal, fls bootloader and linux/ chinese/english 目录 1    背景和参考资料... 2 1.1  背景说明... 2 1.2  参考资料... 3 1.3  硬件连接... 5 2    Lauterbach脚本驱动开发(可选) 5 2.1  准备参考脚本... 5 2.2  QuadSPI_ReadID.. 6 2.3  配置QSPI NOR为DOPI模式... 7 2.4  使用DOPI模式 READ_8DTRD.. 10 2.5  测试结果... 13 3    Flash tool算法镜像开发... 14 3.1  Flash SDK实现的算法... 15 3.2  开发新的flash源代码... 17 3.3  测试结果... 20 4    开发IVT参数头... 22 4.1  S32G QSPI控制器配置区别... 24 4.2  QSPI的配置区别... 28 4.3  测试结果... 29 5    开发MCAL Fls驱动... 30 5.1  MCAL Fls驱动工程说明... 30 5.2  FlsMem配置页... 34 5.3  MemCfg配置页... 35 5.4  测试结果... 49 6    开发Bootloader工程中Fls驱动... 51 6.1  Bootloader工程说明... 51 6.2  Bootloader与MCAL Fls驱动的不同点... 53 6.3  镜像打包... 54 6.4  测试结果... 56 7    开发Linux驱动(可选) 57 7.1  Linux GD驱动支持情况... 57 7.2  时钟相关的修改... 58 7.3  在DTS中增加GD flash的支持... 60 7.4  修改源代码增加flash信息结构体... 61 7.5  修改源代码中flash的fixup支持DTR模式... 62 7.6  Turning dummy值解决读错位的问题... 64 7.7  测试结果... 65   Content 1    Background and References. 2 1.1  Background. 2 1.2  References. 3 1.3  Hardware Link. 5 2    Lauterbach Script development(Optional) 6 2.1  Preparing the refer script 6 2.2  QuadSPI_ReadID.. 6 2.3  Configure QSPI NOR to DOPI mode. 8 2.4  Use DOPI mode  READ_8DTRD.. 11 2.5  Test report 13 3    Flash tool algorithm image development 15 3.1  Algorithms implemented by Flash SDK. 15 3.2  Develop new flash source code. 17 3.3  Test Report 21 4    Develop IVT Parameter Header 23 4.1  S32G QSPI Controllder configuration difference. 25 4.2  QSPI Configuration Difference. 30 4.3  Test Report 30 5    Develop MCAL Fls driver 31 5.1  MCAL Fls Driver Project Details. 31 5.2  FlsMem Configuration page. 35 5.3  MemCfg Configuration page. 36 5.4  Test Report 51 6    Develop Bootloader Project Fls Drivedr 52 6.1  Bootloader Project Details. 52 6.2  Difference of Bootloader and MCAL Fls Driver 54 6.3  Image Package. 56 6.4  Test Report 58 7    Develop Linux Driver(Optional) 59 7.1  Linux GD Driver Details. 59 7.2  Modification of Clock. 60 7.3  In DTS add GD flash Support 62 7.4  Modify source code and add flash information structure  63 7.5  Modify the fixup of flash in source code to support DTR mode  64 7.6  Turning Dummy Value to Solve the Misplacement Problem   66 7.7  Test Report 67
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this doc and project explain how to integrate S32G M stby demo and Linux STR demo to one demo to achieve the fast boot, chinese version: 本文说明如何在S32G2 RDB2板上搭建 一个M7 MCAL Standby Fullboot GPIO resume Demo加A53 Suspend to RAM的Demo,主要的 应用场景是电动汽车的快速启动。 G3与更新版本BSP的支持情况与此类 似,不再另外说明,客户可以自行参考开发。 请注意本文为培训和辅助文档,本文不是 官方文档的替代,请一切以官方文档为准。     目录 1 参考资料说明与声明 .................................................. 2 2 STBY+STR的硬件注意点 .......................................... 3 3 修改M7 MCAL Standby Demo代码 ............................ 5 3.1 Clock相关修改 ........................................................ 5 3.2 MCU相关修改 ......................................................... 5 3.3 UART Clock相关修改 ............................................. 7 3.4 Port相关修改 .......................................................... 7 3.5 I2C相关修改 ........................................................... 7 3.6 实现M核进入STDY状态等待功能 ........................... 8 3.7 Main函数的修改 ..................................................... 8 4 修改Bootloader工程来支持同时Boot M/A核Demo ... 10 4.1 I2C Clock相关修改 ............................................... 10 4.2 Port相关修改 ........................................................ 11 4.3 其它修改 ............................................................... 12 5 修改A53 Linux代码 .................................................. 13 6 Demo 运行测试 ........................................................ 13 6.1 硬件连接 ............................................................... 13 6.2 镜像烧写 ............................................................... 13 6.3 Demo运行 ............................................................ 14 7 工程发布包............................................................... 15 8 未来开发建议 ........................................................... 17 8.1 M/A核同步机制 ..................................................... 17 8.2 功能安全与信息安全 ............................................. 17 9 遗留问题 .................................................................. 17 9.1 IPCF STR支持 ...................................................... 18 9.2 PFE Slave STR支持 ............................................. 18 注意以下说明与声明: 说明: 汽车网关有快速启动要求,而电动车因为驻车时有更大的电池提供待机电源,所以希望是使 用Linux 的suspend to ram 的功能来实现Linux 的快速启动,而在S32G 上则需要考虑将M 核的 Standby 功能 与A 核的STR 功能 结合起来,目前可用的资源包括:  从BSP32 起支持ATF,可以支持Linux 端的STR 功能,文档《S32G_Linux_STR_V1-*.pdf》 (John.Li)说明linux STR 的原理和与M7 Standby Demo 结合时所需要的修改。  NXP 的M7 内部standby demo,可以支持M 核端的standby 功能,支持full boot 和standby ram boot。文档《S32G_Standby_Demo_V4-*.pdf》(John.Li)有详细说明,本文使用MCAL full boot+GPIO resume Demo。  本Demo 与本文主要说明如何将这两个Demo 结合起来,形成一个整体的Demo。  由于需要Boot M 核加A 核,所以也需要Bootloader 工程的支持,文档 《S32G_Bootloader_V1-*.pdf》(John.Li)说明了如何创建一个MCAL sample 加Linux 的 Bootloader 工程。 声明: 请注意:  M7 standby demo 本来为NXP 内部Demo,不保证运行质量。而Linux 本身也是reference software。  Linux STR 本身会引入比较复杂的电源管理切换,也会引起系统级的不稳定性。  本文所说的方法也是实验性质,不保证运行质量。 所以客户应该谨慎决定其产品功能并自行保证其产品质量,本文及本Demo 仅为Demo 性质。   This article explains how to build a demo of M7 MCAL Standby Fullboot GPIO resume Demo plus A53 Suspend to RAM on the S32G2 RDB2 board. The main application scenario is the quick start of electric vehicles. The support situation of G3 and the newer version of BSP is similar to this, no further explanation is given, customers can refer to it for development by themselves.  Please note that this article is a training and auxiliary document. This article is not a substitute for the official document. Please refer to the official document. Contents 1    Reference materials and statement 2 2    STBY+STR hardware checkpoints. 3 3    Modified M7 MCAL Standby Demo codes. 5 3.1  Clock modification. 5 3.2  MCU related modification. 6 3.3  UART Clock related modificaiton. 7 3.4  Port related modification. 8 3.5  I2C related modification. 8 3.6  Enable the waiting function of M core entering STDY. 9 3.7  Main function modification. 9 4    Modify the Bootloader project to support simultaneous M/A core demo  11 4.1  I2C Clock related modification. 11 4.2  Port related modifcaiton. 11 4.3  Others modificaiton. 13 5    Modify A53 Linux codes. 14 6    Demo running and testing. 14 6.1  Hardware link. 14 6.2  Image burning. 14 6.3  Demo running. 15 7    Project release package. 16 8    Suggestion for the future development 17 8.1  M/A core sync mechanism.. 17 8.2  Function safety and Information security. 17 9    Remaining issues. 18 9.1  IPCF STR support 18 9.2  PFE Slave STR support 18   as need refer:   S32G_Linux STR This doc explain S32G Linux STR details and modify to integrate with M stdy demo https://community.nxp.com/t5/NXP-Designs-Knowledge-Base/S32G-Linux-STR/ta-p/1652680 S32G Standby Demo the project build a new Mcal standby demo and explain its details https://community.nxp.com/t5/NXP-Designs-Knowledge-Base/S32G-M-kernel-Standby-demo-and-how-to-porting-to-Mcal/ta-p/1556313 S32G Boot customization doc how to run bootloader to run mcal&linux https://community.nxp.com/t5/NXP-Designs-Knowledge-Base/S32G-Bootloader-Customzition/ta-p/1519838
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  Overview Near Field Communication (NFC) is used for real-time precision marketing based on time, local inventory and the individual when embedded in product displays or the products themselves. NFC is also becoming the preferred method for payment either in smartphones or smart payment cards. In this particular deployment , the overall system consists of Backend Servers, Top Up station and Household Meter. The Backend Server roles are to activate the new installed meter, to collect meter usage data and behaviors, to implement new tariff based on user behaviors, and to allocate energy usage in effective way. Top Up Stations are NFC Reader with SAM and they are connected to local Computer, Tablet or Mobile phone. They are located at retailers near by household to ease the user to buy the credits. Besides that, Top Up Station is also help to upload and download settings or parameter from the Backend Server Household Meters are those Contctless Prepaid Meter has been installed at end user Block Diagram Products Category MCU Product URL KM3x: 50–75 MHz Precision Metrology MCUs with Segment LCDs based on Arm® Cortex®-M0+  Product Description The KM3x MCU family enables single-chip one-, two-, and three-phase electricity meters, as well as flow meters and other precision measurement applications.   Category NFC Fronted Product URL CLRC663 plus family: High-performance NFC frontends  Product Description If you need high NFC performance or the lowest power consumption, use this remarkably efficient yet highly flexible frontend family to push your design further.   Category RTC Product URL PCF8563: Real-time clock/calendar  Product Description The PCF8563 is a CMOS Real-Time Clock (RTC) and calendar optimized for low power consumption.   Category Secure Element Product URL A71CH: Plug and Trust - The fast, easy way to deploy secure IoT connections  Product Description A71CH is a ready-to-use secure element for IoT devices providing a root of trust at the IC level and delivers, chip-to-cloud security right out of the box, so you can safely connect to IoT clouds and services, including AWS, IBM Watson IoT™ Platform, and Google Cloud™ IoT Core without writing security code or exposing keys.   Category Power Management Product URL TEA1721BDB1065: TEA1721 Universal Mains White Goods Flyback SMPS Demo Board  Product Description This reference design demonstrates the TEA1721 as a -12 V and -3.3 V AC/DC SMPS converter that can provide 5 W into a load.   Category Smart Card Product URL 1 MIFARE® DESFire® EV3: High-Security IC for Contactless Smart City Services  Product Description 1 The features of the MIFARE DESFire EV3 IC reflect NXP’s continued commitment to secure, connected and convenient contactless Smart City services. Product URL 2 MIFARE Plus® EV2: Secure IC for Contactless Smart City Services  Product Description 2 As the next generation of NXP’s MIFARE Plus product family, the MIFARE Plus EV2 IC is designed to be both a gateway for new Smart City applications and a compelling upgrade, in terms of security and connectivity, for existing deployments.
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About this demo   Heads up! This article contains instruction updates due to changes in NXP's SDK and also on AWS website.   This demo will focus on the WIFI enablement and cloud connectivity through AWS by using MCUXpresso and an Amazon Alexa.   Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform, offering over 165 fully-featured services from data centers globally. Millions of customers —including the fastest-growing startups, largest enterprises, and leading government agencies—trust AWS to power their infrastructure, become more agile, and lower costs. The LPC5500 used for this demo is the LPCXpresso55S69 development board which provides the ideal platform for evaluation of and development with the LPC55S6x MCU based on the Arm® Cortex®-M33 architecture. The board includes a high performance onboard debug probe, audio subsystem and accelerometer, with several options for adding off-the-shelf add-on boards for networking, sensors, displays, and other interfaces. The Alexa Skills Kit is a collection of self-service APIs, tools, documentation, and code samples that makes it easier to start building Alexa skills. Skills are like apps for Alexa, enabling customers to perform everyday tasks or engage with your content naturally with voice.   Block Diagram List of Products LPCXpresso55S69 WiFi 10 CLICK   Alexa Echo Dot USB A-to-Micro USB cable Step by Step Guides First, we need to create an account AWS and generate the “thing” that will be linked to the platform, this information can be followed step-by-step on this manual. Import AWS remote control WiFi Demo from the SDK Builder Select the LPCXpresso Board, click on the "Add software component" button, then select "Select All". Download the SDK Open MCU Xpresso and Import SDK examples, and then select the LPCXpresso 55 board and import into the aws_exaples find the aws_remote_control_wifi and also click on the UART for debugging. On the project find the amazon-freertos example, then demos and open the aws_clientcredential.h and change: The AWS IoT broker endpoint (Under thing settings “Interact” section) Write the “Things Name” And WiFi credentials. Replace the aws_clientcredential_keys.h with the one generated by the certification configuration tool from AWS, You can drag and drop it into the folder and then click overwrite. Build and download the application into your board. Video   External Links NXP Product Link LPCXpresso55S69 https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc5500-cortex-m33/lpcxpresso55s69-development-board:LPC55S69-EVK WIFI 10 CLICK https://www.mikroe.com/wifi-10-click Amazon Web Services https://aws.amazon.com/?nc2=h_lg Alexa Skills Kit https://developer.amazon.com/en-US/alexa/alexa-skills-kit   Demo instructions update for 09/25/2020 Due to NXP's SDK updates, some file routes have changed inside the MCUXpresso project: The CertificateConfiguration Tool is located now on: SDKPackages\SDK_2.8.0_LPCXpresso55S69.zip\rtos\freertos\tools\certificate_configuration\ •Location of wifi_shield_silex2401.h \wifi_qca\port\shields\silex2401\wifi_shield_silex2401.h has changed location to wifi_qca\port\boards\lpcxpresso55s69\freertos\silex2401\wifi_shield_silex2401.h Additionally, there is now a clickboard define file available and these changes are already applied: #define BOARD_INITWIFI10CLICKSHIELD_PWRON_PIN 5U //Already done #define WIFISHIELD_WLAN_PINT_CONNECT (kINPUTMUX_GpioPort1Pin18ToPintsel) // IRQ Alexa_RC_json_skill.json.zip file changes:             AMAZON.StopIntent { "name": "AMAZON.StopIntent", "samples": [] },                
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  Overview The NXP ®  Feature Phone reference design is designed to implement the Type 2 Feature Phone core. Includes support for on-hook GR-30 services such as Calling Number Delivery, Calling Name Delivery, Dialable Directory Number, Call Qualifier, and Visual Message Waiting Indicator Additional support for off-hook GR-30 services, such as Calling Identity Delivery on Call Waiting and Call Waiting Deluxe The Feature Phone reference design also includes a full duplex echo-cancelling speakerphone with solid sound quality; the demo is able to originate and terminate a call in full duplex speakerphone mode A HyperTerminal will be used to display the GR-30 messages Archived content is no longer updated and is made available for historical reference only.   Features DSP56858EVM and 5685X Digital Signal Controllers Telephony Daughter Card (TDC1) Microphone AKG Acoustics Type Q400Mk3, Code 2846Z003 Directional Mono Electret condenser microphone Use with Radio Shack adaptor: Stereo -to-Mono Headphone adapter number 274-374 Amplified Speaker On-Hook Data Transmission Protocol (GR-30-CORE) - CID_T1.DSP software module Adaptive Line Echo Canceller (SR-3004) - ALEC.DSP software module Off-Hook Data Transmission Protocol (SR-3004) - CIDCW_T2.DSP software module Acoustic Echo Cancellation Keypad LCD     IDE and Build Tools CodeWarrior® Development Tools for 56800/E DSC | NXP  Design Resources https://www.nxp.com/downloads/en/schematics/TDC1LD.zip
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Demo Owner: Derek Snell   This demo combines several solutions from NXP and our partners. The demo is a thermostat application, using the Kinetis family as a communication gateway between a ZigBee network and connecting to the cloud. The demo runs on the MQX Real-Time Operating System (RTOS). It also uses the NXP PEG graphics library for the user interface displayed on an LCD. The ZigBee communication uses NXP’s BeeStack ZigBee stack, and connects with an NXP wireless development board programmed as a remote temperature sensor. The demo will also connect with an off-the-shelf ZigBee light bulb, and wirelessly controls it. The demo network connection is setup for Wi-Fi, using a Wi-Fi module from Qualcomm. The cloud connection allows the thermostat to be monitored and controlled remotely with mobile devices, and uses a solution provided by deviceCloud.io.     NXP Products Product Link Shield Adapter Module for the Tower System Shield Adapter Module for the Tower System | NXP  Kinetis® KW2x Tower System Modules TWR-KW2x|Tower System Board|Kinetis® MCUs | NXP  Kinetis K70 120 MHz Tower System Module TWR-K70F120M|Tower System Board|Kinetis MCUs | NXP  Serial (USB, Ethernet, CAN, RS232/485) Tower System Module Serial (USB, Ethernet, CAN, RS232/485) Tower System Module | NXP  Graphical LCD Tower System Module with RGB Interface Graphical LCD Tower Module with RGB Interface | NXP    Design Resources Getting Started Guide Development Tools Thermostat Demo Software Firmware updated to v1.0 on 9/9/14      - DCIO Cloud agent now uses SSL from WolfSSL.  This improves WebSocket connections to cloud server through some protected networks. Firmware updated to v0.8 on 7/15/14      - Updated to support latest GT202 shield hardware from Qualcomm.  Rev 1.3 and newer boards changed pinout of CHIP_PWD signal. Firmware updated to v0.7 on 6/20/14      - Updated to use new SNTP server.  Previous server stopped responding and prevented cloud connection. Getting Started guide updated to v0.4 on 7/15/14
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Overview This reference design describes the design of a 3-phase BLDC (Brushless DC) motor drive, which supports the NXP® 56F80X and 56F83XX Digital Signal Controllers (DSCs). The speed-closed loop BLDC drive using a Hall sensor is implemented The system is targeted for applications in both industrial and appliance fields (e.g. washing machines, compressors, air conditioning units, pumps or simple industrial drives required high reliability and efficiency) Features Voltage control of BLDC motor using Hall sensor Targeted for 56F80X, 56F83XX, and 56F81XX Digital Signal Controllers Running on 3-phase Motor Board Control technique incorporates: Voltage BLDC motor control with speed-closed loop Current feedback loop Both directions of rotation Motoring mode Minimal speed 500 RPM Maximal speed 1000 RPM (limited by power supply) Manual interface (Start/Stop switch, Up/Down push button control, LED indication) FreeMASTER software control interface (motor start/stop, speed set-up) FreeMASTER software monitor Block Diagram Board Design Resources
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Overview The reference design demonstrates sensorless control of the 3-Phase Switched Reluctance (SR) motor using 56F80x or 56F83XX Digital Signal Controllers. It can also be adapted to 56F81XX Digital Signal Controllers. The concept of this application is that of a sensorless speed closed loop SR drive using flux linkage position estimation. An inner current loop with PI controller is included. The change in phase resistance during motor operation due to its temperature dependency creates errors in the position estimation and significantly affects the performance of the drive. Therefore, a novel algorithm for on-the-fly estimation of the phase resistance is included. The Digital Signal Controller runs the main control algorithm. Rotor position is evaluated using the sensorless flux linkage estimation algorithm. The actual flux linkage is calculated at the rate of the PWM frequency and is compared with the reference flux linkage for a given commutation angle. When the actual flux linkage exceeds the reference, the commutation of the phases is done; the actual phase is turned off and the following phase is turned on. Flux linkage error is used for estimation of the phase resistance at low speeds (US Patent No.: 6,366,865). The actual speed of the motor is determined using the commutation instances. Based on the speed error, the speed controller generates the desired phase current. When the phase is commutated, it is turned on with a duty cycle of 100%. Then, during each PWM cycle, the actual phase current is compared with the desired current. As soon as the actual current exceeds the desired current, the current controller is turned on. The current controller controls the output duty cycle until the phase is turned off (following commutation). Finally, the 3-Phase PWM control signals are generated. The procedure is repeated for each commutation cycle of the motor. Features Sensorless control of an SR motor using a flux linkage estimation technique Targeted for 56F80X, 56F83XX, and 56F81XX Digital Signal Controllers Running on a 3-Phase SR HV Motor Control Development Platform The control technique: current control with a speed closed loop Position estimation based on flux linkage estimation Phase resistance measurement during start-up Phase resistance estimation at low speeds Motor starts from any position with rotor alignment Encoder position reference for evaluation of sensorless position estimation Manual interface FreeMASTER software control interface and monitor Fault protection Block Diagram Board Design Resources
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Demo This demo showcases a bluetooth headset using NXP’s Near Field Magnetic Induction device NxH2280, enabling truly wireless streaming of voice, audio and data. The demo is built using the NxH2280 Application Development Kit for hearables Features: very power efficient audio and data streaming from ear-to-ear: HQ audio < 2.5 mW works through human body with ultra-low absorption: SAR is 100 times lower than Bluetooth ensures reliable and private communication _______________________________________________________________________________________________________ Featured NXP Products: NxH2280: Near Field Magnetic Induction radio|NXP LPC1102: low power, space efficient microcontroller|NXP NT3H1101: Energy harvesting NFC Forum Type 2 Tag for bluetooth simple pairing|NXP _______________________________________________________________________________________________________ Picture of demo: implemented using headphone shells Picture of NxH2280 ADK C11
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NFC Tandem offers best of both worlds: An NFC reader and a passive connected tag sharing one antenna. A user can interact with the device when it is powered off (through the NTAG I²C plus); when the device is powered, it can interact with cards, P2P devices or other connected tags.                                                             NFC Tandem Uses Cases and Applications: One-touch pairing WiFi with phone, or card Bluetooth with phone, headset, speaker IoT network node commissioning User identification with badge or phone Authentication and configuration of consumable and accessory Zero-power parametrization Zero-power firmware update Zero-power diagnosis and maintenance NFC Tandem Demo: NFC Tandem concept is demonstrated using NFC Tandem reference board: The demo can run on either: UDOO Neo Download UDOO Neo demo image or Raspberry Pi Download Raspberry Pi demo image Video of the demo: <script src="https://players.brightcove.net/6153537070001/default_default/index.min.js"></script>(view in My Videos) NFC Tandem References: PN7150 High performance NFC controller, supporting all NFC Forum modes, with integrated firmware and NCI interface NTAG I²C plus NFC Forum Type 2 Tag with I²C interface NFC Tandem Documents: User Manual and reference schematics are attached to this document
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Description    NXP’s Personal Network Attached Storage (NAS) solution enables portable personal storage to be shared through an internal protocol (IP) or Wireless network allowing users to share photos, data, stream music or videos, backup and recovery of data over the local area network in a completely secure environment. In addition, the solution can support gateway features such as packet forwarding, cloud connectivity via Ethernet, Wi-Fi or LTE. This NAS solution offers significant advantages to consumer and SMB environments, including: Hardware-accelerated Raid for data parity and recovery, a reduced bill of materials (BOM) and ease-of-use associated with an IP network that most business and consumers already find familiar. Based on the QorIQ Layerscape LS1012A processor and the Network Attached Storage Application Solution Kit (ASK), the personal/consumer NAS solution offered by NXP allows developers to easily build storage applications leveraging the highly-optimized and feature rich ASK software stack along with the small form factor, low-power consumption and packet processing capabilities enabled by LS1012A processor. NXP provides an integrated platform solution (SW and HW) helping the customer to reduce his time to market, increase security and increase performance by leveraging the packet accelerators within the QorIQ® Layerscape LS1012A processor while delivering high NAS performance and IP forwarding applications with reduced load on the Arm® core. In addition, NXP LS1012ARDB supports a full set of popular interfaces such as SATA, USB 3.0, PCIe and 2.5/1Gigabit Ethernet for LAN and WAN, allowing customers and operators to securely connect storage devices with the cloud. Features Integrated Platform Solution Commercial Market Proven Software Solution Hardware Offloading Popular Connectivity Flexible and Optimized Software Architecture Use Cases Personal Storage Consumer Network Attached Storage (NAS) Consumer Direct Attached Storage (DAS) Battery Powered Portable NAS Wireless Personal Storage Media Gateway Chip on Drive Wi-Fi SSD and Small/Portable Drive Ethernet Drives Block Diagram Products Category Name MPU Product URL Layerscape LS1012A Communication Processor for the IoT | NXP  Product Description The QorIQ® LS1012A processor, optimized for battery-backed or USB-powered, space-constrained networking and IoT applications Category Name DC Regulator Product URL MC34VR500 | Multi-Output DC/DC Regulator | NXP  Product Description The NXP® MC34VR500 power management solution for network processor systems is a high-efficiency, quad buck regulator with up to 4.5 A output and five user-programmable LDOs. Tools Product URL QorIQ® LS1012A Development Board QorIQ® LS1012A Development Board | NXP  Layerscape FRWY-LS1012A board FRWY-LS1012A Development Platform | NXP 
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        S32G just support serial download a M7 image to run by internal rom codes, our S32G DS IDE have a flash tools to use this feature to burn the image to external device. So current image burn method will divide into 2 step: 1: burn a uboot into the external device by S32G DS flash tools. 2: reboot the codes with uboot and run with network to burn the linux image into external device.      which need two working place on manufacture line, and customer wish to have a one time on-line tools, which means we need use serial port to boot uboot directly but S32G rom codes do not support it.       We have a reference tools of S32V but which IP difference is big between on S32V and S32G, So we can not reuse it and have to develop a new one.       The development working include: 序号 开发工作 说明 开发者 1 开发 根据S32G的serial boot协议要求,开发PC端的串口工具来下载M7镜像 John.Li 2 开发 根据自定义协议要求,开发PC端的串口工具来下载A核Bootloader到SRAM中 John.Li 3 开发 根据自定义协议要求,开发M7镜像的串口接收与Checksum逻辑 John.Li 4 开发 修改M7镜像支持串口0 John.Li 5 开发 开发实现M7镜像的串口单字节同步收发函数 John.Li 6 开发 开发实现A53启动功能 John.Li 7 调试与Debug 调试解决串口接收乱码问题(Serial boot rom codes仍然在回送消息串口) John.Li 8 调试与Debug 提供 解决A核启动串口halt思路(Serial boot rom codes仍然占用串口) John.Li 9 调试与Debug 优化M7镜像,缩小大小 Tony.Zhang 10 调试与Debug 根据M7镜像和A核 Uboot在SRAM中的内存分配要求,重排M7镜像位置,避免冲突 Tony.Zhang 11 调试与Debug 在M7中初始化SRAM空间 Tony.Zhang 12 调试与Debug 在M7中设置SRAM可执行空间 Tony.Zhang 13 调试与Debug 调试解决由于cache没有及时回写导致的下载镜像错误的问题 Tony.Zhang 14 调试与Debug 集成,调优与文档 John.Li   Pls check the attachment for the doc/codes/binary release which include:    Release      |->M7: Linflexd_Uart_Ip_Example_S32G274A_M7: S32DS M7工程。      |->PC: s32gSerialBoot_Csharp: PC端的Visual Studio的C#的串口工具工程。      |->Test:      |    |-> 115200_bootloader.bin: S32DS M7工程编译出来的bin文件,波特率为115200      |    |-> 921600_bootloader.bin: S32DS M7工程编译出来的bin文件,波特率为921600      |    |->load_uboot.bat: 运行工具的批处理文件,运行成功后打开串口可以看到Uboot执行,默认使用的波特率是115299         |    |->readme.txt:其它测试命令 |    |->s32gSerialBoot.exe:编译出来的PC端串口工具 |    |->u-boot.bin: BSP29默认编译出来的u-boot.bin.      Product Category NXP Part Number URL Auto MPU     S32G274     https://www.nxp.com/s32g    
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Overview This reference design enables development of a vector control algorithm for a three-phase AC induction motor implemented on NXP® digital signal controllers MC56F8013/MC56F8023. Targeted mainly at consumer and industrial applications Cost-effective and highly reliable, the algorithm implements a single shunt current sensing, eliminating the need for more than one sensor High range of motor operating speeds up to 18000RPM An adaptive closed loop rotor flux estimator enhances control performance and increases the overall robustness of the system A reference manual provides a detailed description of the application, including a design of hardware and software Features 3-phase AC induction motor drive Designed to fit into consumer and industrial applications Uses 56F8013 or 56F8023 32 MIPS Digital Signal Controller Running on a 3-phase High Voltage Power Stage Control technique incorporating: Vector control of three-phase AC induction motor with position encoder Closed-loop speed control Both directions of rotation Both motor and generator modes Reconstruction of three-phase motor currents from DC-Bus shunt resistor Closed loop current control Flux and torque independent control Adaptive rotor flux space-vector estimator Field-weakening for high speeds High-speed range, max speed – 18000 RPM (2-pole motor) FreeMASTER software control interface (motor start/stop, speed setup) FreeMASTER software monitor FreeMASTER software graphical control page (required speed, actual motor speed, start/stop status, DC-Bus voltage level, motor current, system status) FreeMASTER software speed scope (observes actual and desired speeds, DC-Bus voltage and motor current) FreeMASTER software high-speed recorder (reconstructed motor currents, vector control algorithm quantities) DC-Bus overvoltage and undervoltage, overcurrent protection Block Diagram Board Design Resources
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         LittleVgl作为一款开源免费的嵌入式GUI得到越来越多工程师的厚爱,我们可以看到很多小型HMI项目或者一些开源社区都在使用它作为GUI的框架,同时也受益于用户群的不断扩大以及一些半导体原厂的青睐(通俗点就是说有赞助有钱儿了),LittleVgl本身也在快速的不断更新迭代,易用的组件和相关的辅助开发工具在不断的增加,而RT1050/1060/1170系列作为一款带有LCD控制器的平台,自然成为了LittleVgl最佳的载体之一了。         LittleVgl本身的组件已经很丰富了,但是遗憾的是一直没有加入对中文输入法Keyboard的支持(看了下它在Github上的Contributor List没有华人),这让它在我们国内的应用有了一些限制(注意在某组件上显示中文和真正的中文输入法是不同的概念),所以本项目旨在解决该问题,即把一个简单轻量的中文输入法框架嵌入到LittleVgl并跑在RT1050平台上,并把它开源开放出来,所以不要小看了我的“公益心”,哈哈。下图是该示例设计的UI界面        下面进入正题,首先把测试环境给出来,方便有兴趣有能力的朋友可以自行搭建(当然应一部分偷懒的强烈需求,我随本文档也附赠了完整的移植好的工程),然后我再一步一步地给出如何移植这套框架到用户自己的工程里,当然我已经把代码本身做了很多优化,尽量减小环境依赖,力求最少步骤的移植过程,理论上来讲不太会出现移植后编译出一堆Error的问题,咳咳。。。下面我们赶紧开整吧: 测试环境: SDK版本:SDK_v2.9.1 SDK参考例程:boards\evkbimxrt1050\littlevgl_examples\littlevgl_demo_widgets LittleVgl版本:v7.4.0 IDE工具:Keil_v5.31 开发板:MIMXRT1050-EVK + 480*272 RGB LCD屏 软件说明: 我们先看下这套中文输入法所需的几个文件,如下图所示,.c和.h文件加起来一共7个,其中nxp_logo.c只是我额外加的一个NXP的官方logo图标转成的C数组文件供littleVgl调用显示,属于锦上添花的东西,可有可无,真正跟输入法相关的是剩下的6个文件,下面我们逐一介绍下这几个文件的作用: 1. qwerty_py.c/.h:        实际上这两个文件才是这套全键盘拼音中文输入法的核心框架,实现了对输入的拼音字母进行索引匹配对应的汉字候选列表,这部分我是移植了如下链接中网友分享的代码,所以这两个文件我的角色只是一个大自然搬运工,不过说实话我是很感激该网友的无私分享的(这也是我一直推崇开源分享精神的源动力),之前对平时使用的各种输入法里面的算法原理一直充满好奇,直到看了这篇文章后才豁然开朗,“So that is what it is!”,让我获益匪浅(可能人的学习曲线和知识体系就是这样一点一滴的积累吧),而且更关键的是,如果让我继续往下开发诸如拼音联想和多汉字输入等功能的话,我更多关心的可能只是逻辑搭建的工作量问题,而不是纠结于Yes or No的问题了,因为咱已经了解了其最底层的工作原理了,所以很多复杂的事情,我们如果能抽丝剥茧的找到其最底层的本质(虽然这真的很难),那很多让人抓耳挠腮的问题很快就可以理清思路。说到这里我思维又发散了,呵呵,我想起让Linus Torvalds等一波老大神们一直头疼的Linux内核维护后继无人的问题,其实我的个人理解有很大一部分原因是如今的Linux太庞大了以至于几乎没有后辈的人对Linux的理解能赶上这些老辈大神,而这些老辈大神的最大优势是他们创建了Linux最早期的底层框架而且难能可贵的是一直在follow Linux每个版本的历史。总之,推荐大家看看如下这篇文章吧(实际上主要内容也都是代码),希望能各有所获; https://www.amobbs.com/thread-5668320-1-1.html?_dsign=0939dcbd 2. lv_chs_keyboard.c/.c文件:        这部分就是我的工作了(咱也不能啥都搬运…,这是体现咱的value的东西不是),我把它当作littleVgl的一个补充组件来写的,里面的大多数API参考官方littlevgl的lv_keyboard.c,所谓的文章开头的嵌入中文输入法到LittleVgl GUI环境中实际上就是这两个文件干的活,即将上面提到qwerty.c/.h实现的拼音输入法与LittleVgl框架结合到一块,起到一个桥梁的作用,所以如果你想把这套中文输入法嵌入到其他GUI环境中的话(比如emWin,GUIX,TouchGFX等),那主要的工作就是参考这两个文件的内容了; 3. lv_font_NotoSansCJKsc_Regular.c字体文件:        虽然littleVgl官方源码包里自带了一个中文字体文件(\lvgl\src\lv_font\lv_font_simsun_16_cjk.c),但是它只包含了1000个左右最常用的字,我实际体验了下很多我们想用的字都找不到,所以这个时候就需要自己去做一个更全一点的字体库了。这里面涉及到两个问题需要考虑,第一是很多我们常见的中文字体是收费的(咱PC机的Microsoft Office套件里的中文字体都是微软付费买的,所以咱也理解下早年正版Windows为啥辣么贵了,那你问为啥现在便宜了?因为人家现在不靠这个赚钱了呗),第二个是字体转换工具的问题,我们网上找到的字体都是TTF或者OTF格式的,但littleVgl是不认的,需要转换成它支持的字体格式。        对于第一个问题,我网上搜了好久最终选择了目前用的比较多的Google开源免费的字体,Google真乃金主也,它维护的网站里面字体各种各样啥都有且是开源免费的,如下链接,我选择的是NotoSansCJKsc字体(最后面的sc表示simplified Chinese,简体中文),然后它里面又包含了各种字形(regular, bold, light等),可以根据需要自行选择,整个包很大(100多MB),拆分成不同字形的就小了(每个14~16MB左右); https://www.google.com/get/noto/        对于第二个字体转换工具的问题,LittleVgl官方自带了一个字体转换工具(online font converter),我个人觉着不太好用(对OTF字体支持的不行),这里推荐阿里大神自己做的一个LittleVgl字体转换工具(LvglFontTool),非常方便好用,且支持加入Awesome图标; http://www.lfly.xyz/forum.php?mod=viewthread&tid=24&extra=page%3D1        关于字体这部分我需要再补充个问题,就是它占用的memory大小,毕竟我们是在嵌入式MCU平台Flash和RAM的资源是受限的,如下图所示,该字体文件占用大概1Mbytes的rodata空间(即可寻址的Flash空间,当然该大小可以通过在上图转换工具中增减一些文字来调 整),所以在移植本套输入法之前需要预留足够的Flash空间,当然对RT平台来说这部分还好,毕竟其本身就外扩至少几MB空间的QSPI Flash作为存储空间的。 4. lv_demo_chineseinput.c/.h文件:        这两个文件属于应用层实现了,主要关注该文件中下图的ta_event_cb函数(即textarea事件的callback,点击文本框的输入时回调),在里面我们需要按照1,2,3去调用即可(这三步的API均在lv_chs_keyboard.c/h文件里实现);        至此,这套全键盘拼音中文输入法框架所需的几个文件就介绍完了,用户只需要把这几个文件放到自己的工程设置好文件搜索路径,并参考随本文档附带的代码工程示例,再结合自己产品的GUI样式,把这套中文输入法嵌入到自己应用当中。
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This doc explain how to compile PFE driver into kernel to accelerate the network boot time, chinese version: 目录 1    需要的软件,工具与文档... 2 2    目前PFE驱动的情况... 2 3    将PFE Slave驱动编译进内核... 3 3.1  将PFE驱动代码加入内核... 3 3.2  开发Makefile文件... 6 3.3  编译与测试... 8 4    将PFE Master驱动编译进内核... 10 4.1  编译Master工程... 10 4.2  测试... 11 4.3  解决FW的加载问题... 11 Contents 1    Related Materials. 2 2    Current PFE Driver 2 3    Compiled PFE Slave into Kernel 3 3.1  Put the PFE driver source into kernel source. 3 3.2  Develop the Makefile. 6 3.3  Compilation and Testing. 8 4    Compiled PFE Master Driver into Kernel 10 4.1  Compiling the Master driver 10 4.2  Testing. 11 4.3  Solve the FW loading fail issue. 11    
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Overview The 3-phase PMSM Vector Control using Quadrature Encoder on based on Kinetis® K40 MCUs reference design demonstrates the ability of the Kinetis K40 Arm® Cortex®-M4 MCU to drive the advanced motor control application. Targeted at the NXP® Tower® rapid prototyping system as a hardware development platform. Together with available embedded source code, you can quickly build own industrial drive application. For the successful execution of the vector control algorithm, the information on the motor shaft position is critical. The quadrature encoder position information is known in the entire motor speed range, allowing the motor start with full torque at zero speed. Features Vector control of the PMSM using the quadrature encoder as a position sensor Targeted at the Tower ®  rapid prototyping system (K40 tower board, Tower 3-phase low voltage power stage) Vector control with a speed closed loop Rotation in both directions Application speed range from 0% to 100% of nominal speed (no field weakening) Operation via the user buttons on the Kinetis ®  K40 Tower board or via FreeMASTER software Block Diagram Design Resources
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Overview This NXP® reference design of a 3-phase sensorless PMSM vector control drive with a sliding mode observer (SMO) is targeted mainly for compressor control and other consumer and industrial applications. This cost-effective solution uses the NXP MC56F8013 device dedicated for motor control. Software written in C-code using some library algorithms Available for the MC56F8013 and MC56F8346 digital signal controllers Hardware-based on the NXP universal motor control h/w modules Features The system is designed to drive a three-phase PM synchronous motor. Application features are: 3-phase sensorless PMSM speed vector control (FOC) Sliding mode observer with adaptive velocity estimation Based on NXP ®  MC56F8013 (resp. 56F8346) controller Running on a 3-phase high voltage (230/115V) power stage FreeMASTER software control interface and monitor Block Diagrams Design Resources
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Linux kernel is not real time OS, while some applications is time sensitive tasks running in Linux environment, this request to extend the real time feature in common Linux kernel, and RT_PREEMPT is one of the methods to enable Linux kernel with real time processing requirement. But RT_PREEMPT is not accepted by kernel, so it needs extra effort to porting this patch-set to i.MX8M family products. This patch-set is based on L4.14.78 for i.MX8M products, customer need to apply patches based on this release.
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This doc explain bootloader secure boot feature and how to re-develop it to support: .FW update .OTP attribute access .IVT protect: 目录 1 参考资料 .................................................................... 2 2 S32G Secure Boot说明 ............................................. 2 2.1 IVT头格式与Secure Boot相关 ................................ 3 2.2 Secure Boot流程 .................................................... 3 2.3 Secure Boot配置 .................................................... 4 2.4 Secure Boot涉及到的HSE内容 ............................... 6 3 环境搭建 .................................................................... 7 3.1 搭建编译环境 .......................................................... 7 3.2 IVT镜像制造 ........................................................... 7 3.3 镜像烧写 ................................................................. 8 3.4 Bootloader Secure Boot测试 .................................. 8 4 Bootloader Secure Boot代码与功能说明 ................... 9 4.1 EB配置说明: ........................................................ 9 4.2 EB生成代码说明: ............................................... 15 5 定制1:HSE FW update .......................................... 22 5.1 代码开发 ............................................................... 22 5.2 测试 ...................................................................... 25 6 定制2:HSE OTP Attribute设置 ............................... 26 6.1 代码开发 ............................................................... 26 6.2 模拟测试 ............................................................... 33 7 定制3:IVT签名 ....................................................... 35 7.1 代码开发 ............................................................... 35 7.2 模拟测试 ............................................................... 40 Contents 1 Reference Materials .................................................. 2 2 S32G Secure Boot ..................................................... 3 2.1 IVT header format for the Secure Boot part .......... 3 2.2 Secure Boot Flow ................................................... 3 2.3 Secure Boot Configuration ..................................... 4 2.4 HSE background of Secure Boot ........................... 6 3 Build the Project ........................................................ 7 3.1 Build the Compiling Environment ........................... 7 3.2 Create IVT Image ................................................... 7 3.3 Burning Image ........................................................ 8 3.4 Bootloader Secure Boot Testing ............................ 9 4 Bootloader Secure Boot Codes and Function Description 9 4.1 EB Configuration .................................................... 9 4.2 EB output codes ................................................... 15 5 Customization 1:HSE FW update ......................... 22 5.1 Codes development ............................................. 23 5.2 Testing ................................................................. 26 6 Customization 2:HSE OTP Attribute Setting ......... 26 6.1 Code Development .............................................. 27 6.2 Simulation test ...................................................... 34 7 Customization 3:IVT Signature ............................. 36 7.1 Codes Development ............................................. 36 7.2 Simulation Testing ................................................ 40  
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