MHW-N1921デジタル高効率AC / DC共振電源 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 共振AC/DC電源は、高出力で優れた効率を発揮します。TEA1916は、共振LLC設計の複雑さを簡素化し、簡単なチューニングを提供するデジタルコントローラーです。これは、多くの共振スイッチモード電源で使用されている非常に一般的なTEA1716を継承します。PCやテレビですが、TEA1916は実際には75W>あらゆる電源に非常に適しています。医療、産業用、サーバー用電源。このTEA1916は、新しいデジタル・サイクル・バイ・サイクル・アーキテクチャ(Vcap制御)を使用して、低電力負荷での新しいタイプの動作を可能にします。これにより、正確に制御されたバーストモード動作を使用して、低出力電力での効率が向上します。また、このTEA1916は、スタンバイ状態またはオフ状態で非常に低い消費電力を実現します。競合他社と差別化するための主要なパフォーマンスパラメータです。最高の効率を得るために、TEA1916はNXPのTEA1995同期整流器と一緒に優れた働きをします。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 共振AC/DC電源は、高出力で優れた効率を発揮します。TEA1916は、共振LLC設計の複雑さを簡素化し、簡単なチューニングを提供するデジタルコントローラーです。これは、多くの共振スイッチモード電源で使用されている非常に一般的なTEA1716を継承します。PCやテレビですが、TEA1916は実際には75W>あらゆる電源に非常に適しています。医療、産業用、サーバー用電源。このTEA1916は、新しいデジタル・サイクル・バイ・サイクル・アーキテクチャ(Vcap制御)を使用して、低電力負荷での新しいタイプの動作を可能にします。これにより、正確に制御されたバーストモード動作を使用して、低出力電力での効率が向上します。また、このTEA1916は、スタンバイ状態またはオフ状態で非常に低い消費電力を実現します。競合他社と差別化するための主要なパフォーマンスパラメータです。最高の効率を得るために、TEA1916はNXPのTEA1995同期整流器と一緒に優れた働きをします。 セキュアモバイル |ヘルスケア&ウェアラブル

MPC5xxx I2C 通信驱动程序 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本文档总结了 MPC5xxx 设备的简单 I2C 驱动程序实现。 代码遵循参考手册的典型 I2C 中断程序流程图。 概述

示例 MPC5775K DSPI_with_interrupts S32DS_1.0 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> ******************************************************************************** * 详细说明： * * 应用程序将 SPI0 模块初始化为主机，将 SPI2 模块初始化为从机。 * 数据从主机发送到从机，从从机发送到主机。数据之后 * 收到后，处理每个模块的中断并将数据保存到全局 * 变量。 * * * ---------------------------------------------------------------------------------------------- * 测试硬件：MPC5775K-356DS，MPC57xx主板 * 微控制器: PPC5775KMMY3A 0N76P *系统频率：PLL0 266MHz * Z4 核心 133MHz * 调试器：Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * 目标：internal_FLASH（调试模式、发布模式） * EVB连接：P18.0至P18.5（CS_0） * P18.2 至 P18.7 (SCK) * P18.3 至 P18.9（SIN - SOUT） * P18.4 至 P18.8（SOUT - SIN） * * ******************************************************************************** <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> ******************************************************************************** * 详细说明： * * 应用程序将 SPI0 模块初始化为主机，将 SPI2 模块初始化为从机。 * 数据从主机发送到从机，从从机发送到主机。数据之后 * 收到后，处理每个模块的中断并将数据保存到全局 * 变量。 * * * ---------------------------------------------------------------------------------------------- * 测试硬件：MPC5775K-356DS，MPC57xx主板 * 微控制器: PPC5775KMMY3A 0N76P *系统频率：PLL0 266MHz * Z4 核心 133MHz * 调试器：Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * 目标：internal_FLASH（调试模式、发布模式） * EVB连接：P18.0至P18.5（CS_0） * P18.2 至 P18.7 (SCK) * P18.3 至 P18.9（SIN - SOUT） * P18.4 至 P18.8（SOUT - SIN） * * ******************************************************************************** 概述

DES-N1835 实践研讨会：使用 QorIQ LS 系列上的跟踪和性能工具调试和优化 Linux 应用程序的性能 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> QorIQ LS 系列的 CodeWarrior 开发套件包含各种用于分析多核 Linux 系统的操作和性能的工具。工具利用硬件跟踪和系统日志来监控操作和性能。CodeWarrior 开发套件包括使用 Hierarchical Profiler、Flat Profiler 和 CodeCoverage 进行性能分析的工具；使用 Timeline 和 CallTree 进行路径分析的工具；除了间隔分析之外，还使用 DebugPrint 和 TraceCommander 进行实时监控的工具。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> QorIQ LS 系列的 CodeWarrior 开发套件包含各种用于分析多核 Linux 系统的操作和性能的工具。工具利用硬件跟踪和系统日志来监控操作和性能。CodeWarrior 开发套件包括使用 Hierarchical Profiler、Flat Profiler 和 CodeCoverage 进行性能分析的工具；使用 Timeline 和 CallTree 进行路径分析的工具；除了间隔分析之外，还使用 DebugPrint 和 TraceCommander 进行实时监控的工具。 设计 | 软件与服务

KSDK list of documents Documentation for current KSDK 1.3 is located under C:\Freescale\KSDK_1.3.0\doc Application Notes and another documents are located under Software Development Kit for Kinetis MCUs|NXP   There are more documents, which were created:   KSDK 2.0 How to: install KSDK 2.0 Introducing Kinetis SDK v2 Using Kinetis Design Studio v3.x with Kinetis SDK v2.0   KSDK 1.3 How to add SD card support in the composite msd_cdc demo[KSDK 1.3] KSDK Clock configurations and Low Power modes with Processor Expert New Kinetis SDK Project Generator v2 is available! KSDK Project Generator - BUG workaround KSDK 1.3 Documents Plugin in KDS - is available now! KSDK 1.3.0 Documents Plugin for KDS 3.0.0   KSDK 1.2 Interrupt handling with KSDK and Kinetis Design Studio Creating a New USB project with KSDK and Processor Expert support in KDS IAR MQX TAD solution for "Unknown error" in Task error code (with KSDK) How to Add lwIP to KDS3.0 Project How to: Create a New FreeRTOS for KSDK1.2 Project in KDS3.0 How to Create a C++ Project Using MQX RTOS for KSDK1.2 How to implement a USB Device MSD demo based on KSDK PEx components and KDS 3.0 How to: execute the demo HVAC on lwIP TCP/IP Stack in KSDK Kinetis SDK FAQ Adding TAD shell in KSDK shell demo FRDM-KL43Z and KL33Z - standalone package New KSDK 1.2. is available! Getting started with KSDK: Building the demo applications   KSDK 1.1 KSDK 1.1 Release How to create copy of KSDK example in KDS UART Example with KSDK   KSDK 1.0 Create new KSDK Projects Kinetis SDK and FRDM-K64F Sharing one documentation issue in KSDK 1.0 demo user guide General

i.MX L3.14.52_1.1.0 GA & i.MX 6SoloX FreeRTOS GA Release Announcement [1] The Linux L3.14.52_1.1.0 GA and i.MX 6SoloX FreeRTOS release is now available on www.nxp.com Files available: # Name Description 1 fsl-yocto-L3.14.52_1.1.0-ga.tar.gz Linux 3.14.52_1.1.0 BSP documentation. 2 L3.14.52_1.1.0-ga_images_MX6QDLSOLO.tar.gz i.MX 6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo Linux Binary Demo Files 3 L3.14.52_1.1.0-ga_images_MX6SLEVK.tar.gz i.MX 6SololiteEVK Linux Binary Demo Files 4 L3.14.52_1.1.0-ga_images_MX6SXALL.tar.gz i.MX 6SoloX Linux Binary Demo Files 5 L3.14.52_1.1.0-ga_images_MX6UL.tar.gz i.MX 6UltraLite Linux Binary Demo Files 6 L3.14.52_1.1.0_ga-mfg-tools.tar.gz i.MX Manufacturing Toolkit for Linux L3.14.52 BSP 7 L3.14.52_1.1.0-ga_gpu-tools.tar.gz L3.14.52_1.1.0 i.MX VivanteVTK file 8 FreeRTOS_BSP_1.0.0_iMX6SX.exe FreeRTOS™ BSP for the i.MX 6SoloX ARM® Cortex®-M4 core. --- Windows installer 9 FreeRTOS_BSP_1.0.0_iMX6SX.tar.gz FreeRTOS™ BSP for the i.MX 6SoloX ARM® Cortex®-M4 core. --- Linux installer Target boards: i.MX 6Quad SABRE-SD Board and Platform i.MX 6DualLite SABRE-SD Board i.MX 6Quad SABRE-AI Board i.MX 6DualLite SABRE-AI Board i.MX 6SoloLite EVK Board i.MX 6SoloX SABRE-SD Board i.MX 6SoloX SABRE-AI Board i.MX 6UltraLite EVK Board What’s New: LinuxBSP New features added for all supported boards: Yocto Project upgraded to version 1.8 Fido. Supports the GCC 4.9.2 toolchain. The Linux kernel is upgraded to v3.14.52. The U-Boot is upgraded to 2015.04. New graphics features: GPU driver upgraded to Vivante v5.0.11p7.4. DirectFB support removed. XWayland support added. Last release to provide graphics software floating point binaries. New multimedia features and changes: Qt 5.5 support integrated, which supports hardware accelerated QML video. Qt 5 is not supported for SoC without hardware graphics. Qt 5 video is not supported on SoC without VPU. Video compositing plugins based on PXP are supported. GStreamer playback engine API is supported, providing high level APIs for media playback and operations. Video overlay composition meta (meta:GstVideoOverlayComposition) is supported in i.MX video sinks, convert and compositor. This feature accelerates the text image (such as subtitle, timestamp) blending with video in these plugins with hardwares. Supports the Broadcom/Murata BCM4339 Bluetooth/Wi-Fi module. FreeRTOS: Add Peripheral support: i.MX 6SoloX ADC, i.MX 6SoloX CCM, i.MX GPIO, i.MX I2C, i.MX MU, i.MX UART, i.MX WDOG, ECSPI, EPIT, FlexCAN, LEME, RDC, SEMA4 Add Multi-core communication support: RPMsg More details, please refer to formal Release Notes.

センサーの公開例 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> NXPテクニカルサポートが公開したソフトウェア例のリスト: NXPテクニカルサポートが公開したセンサソフトウェアの例 * NXPテクニカルサポートによって設計されたブレークアウトボードのリスト: フリースケール・センサ・ブレークアウト・ボード・デザイン – HOME ※ 上記スペースに収録されているソースコードは、すべて参考までにご利用いただくためのものです。NXPは、このコードをユーザーのアプリケーションで使用することについて責任を負いません。

1280x720.mjpg libvpuwrap 1.0.46 解码器测试的测试输入 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 抱歉，我找不到可以分享此输入文件的地方。这是为了重现我在 i.MX6Q VPU 上使用 FSL 3.10.17 BSP 的损坏的 MJPG 解码结果中报告的 VPU JPEG 解码器问题​ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 抱歉，我找不到可以分享此输入文件的地方。这是为了重现我在 i.MX6Q VPU 上使用 FSL 3.10.17 BSP 的损坏的 MJPG 解码结果中报告的 VPU JPEG 解码器问题​

如何使用 KDS 和 KSDK 将 RTCS 添加到处理器专家项目 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 大家好， 根据如何：使用来自 macl 和 dereksnell 的 Kinetis Design Studio IDE 中的处理器专家为 KSDK 项目创建 MQX RTOS， 您可以在附件文档中找到使用 KSDK1.2 和处理器专家将 RTCS 包含到 KDS3.0 项目以及最终项目的步骤。 感谢RBORB提供此流程的初稿。 有关使用 MQX 而不使用 Processor Expert 创建新 KSDK 项目的信息，请参阅以下文档。 如何：在 KDS 中为 KSDK 项目创建新的 MQX RTOS 如果您正在寻找一份简单的文档来开始使用 KSDK，请参阅以下文档。 编写我的第一个KSDK1.2KDS3.0 中的应用 - Hello World 和使用 GPIO 中断切换 LED 此致， 卡洛斯 回复：如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 我按照这个出色的教程，在基于 MK66FX1M0VLQ18 的定制硬件上开始了我的项目。 所有 KSDK 固件包（HAL 库、DRV 驱动程序和中间件）都与评估目标 FRDM-xxx 和 TWR-xxx 上提供的示例很好地集成在一起。但是（就像当我开始使用 CodeWarrior 10.1 和 MQX 3.7 处理 Kinetis CPU 时一样），移植在不同于评估板的目标上运行的 Kinetis 示例项目非常困难。此外，很难从用户位置的 KSDK 文件夹树导出自己的 Kinetis 项目。 MQX 4.0 附带 BSPCloningWizard 工具，这正是我一直想在我的定制硬件上启动新项目的工具。不幸的是，KSDK 还没有这样的工具。 所以，我认为从今天开始用 KDS 3.0.0 启动一个新的 Kinetis 项目+ PEx + KSDK 1.3.0 是定制硬件的最佳方式。Processor Expert 生成应用程序所需的 HAL、驱动程序和 MQX RTOS 的所有代码。并且该项目是在自定义文件夹中创建的，没有任何指向 KSDK 文件夹树的链接。精彩的！ 如果我的项目需要处理 TCP/IP 堆栈和/或文件系统，通过本教程我可以将 RTCS 和/或 MFS 库添加到我的项目中。不幸的是，如何在我的定制硬件上移植和构建 RTCS 和 MFS 项目？ 也许，Erich Styger 可以帮助我们...... 我在http://mcuoneclipse.com/2015/10/28/tutorial-lwip-with-the-freertos-and-the-freescale-frdm-k64f-board/上找到了他的教程，他用KDS+PEx+KSDK创建了一个项目，将lwIP源文件夹添加到他的项目中，并调整编译器设置的包含路径。 将 RTCS 和 MFS 源文件夹添加到项目中是解决在自定义硬件上移植和构建 RTCS 和 MFS 库的正确方法吗？ 回复：如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 因为我有一块 FRDM-K64F 板，就像例子中描述的那样，所以这对我来说很有用。但我不清楚如何将这个过程转移到不同的目标板。如果有人没有 FRDM-K64F、TWR-K60D100M、TWR-K64F120M 或 TWR-K65F180M（四个具有导入路径的目标），那该怎么办？我的真正目标是使用 MK64FN1M0VLQ12，它与 FRDM-K64F相似，但肯定不匹配。 那么，在按照 PowerPoint 文件中的说明进行操作之前，如何为不同的硬件目标设置 RTCS 项目？ 谢谢！ 回复：如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 非常好的例子！ 非常非常有用 - 10X。 我有时会观察到一个奇怪的现象： 即使 ETH 电缆断开，ETH phy led 仍指示链接（绿色 led）。 这可以避免 ETE 传递数据包。 仅在使用调试器时才观察到这一点' 所以我推测 PHY init 可能是原因。 我该怎么办？ 回复：如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 嗨，罗杰， 您可以在此处找到向当前 MQX-KSDK 和 PEx 项目添加 MFS 和 Shell 支持所需的步骤。如何为新的 MQX RTOS for KSDK 和 PEx 项目添加 MFS 和 Shell 支持 我希望这能对你有帮助， 顺祝商祺！ 艾萨克 回复：如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 嗨，罗杰， 是的，但是队列中还有许多其他项目，我们无法确定何时可以创建该文档。 带来不便敬请谅解。 卡洛斯 回复：如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 你好，卡洛斯 您有机会和您的团队交谈吗？ 此致敬礼 罗杰 回复：如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 谢谢罗杰， 听起来不错，我会和我的团队讨论一下。 此致， 卡洛斯 回复：如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 你好，卡洛斯 该指南非常有帮助。 如果能有一个用于通过 SDCARD 添加 MFS 的功能就好了？ 此致敬礼 罗杰 回复：如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 嗨，罗杰， 您需要构建第一个 RTCS 库。对于 FRDM-K64，您可以在这里找到： C:\Freescale\KSDK_1.2.0\中间件\tcpip\rtcs\build\kds\rtcs_frdmk64f 我忘了在指南中提到这个要求。我会更新它。 此致， 卡洛斯

APF-IND-T1642 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> キットには、FRDM-34931S-EVB、FRDM-KL25Z、電源、ブラシ付きDCモーター、およびmbed™サイトのGUIが含まれます。mbedサイトからGUIをロードして使用してモーターを駆動する方法、PExソフトウェアについて説明し、産業用アプリケーション向けのMC34931Sの強みについて説明します。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> キットには、FRDM-34931S-EVB、FRDM-KL25Z、電源、ブラシ付きDCモーター、およびmbed™サイトのGUIが含まれます。mbedサイトからGUIをロードして使用してモーターを駆動する方法、PExソフトウェアについて説明し、産業用アプリケーション向けのMC34931Sの強みについて説明します。

Example S32K312 PIT BTCU parallel ADC FIFO DMA DS3.5 RTD300 This example for S32K312 is based on this, example on S32K344 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-PIT-BTCU-parallel-ADC-FIFO-DMA-DS3-5-RTD300/ta-p/1732444 *******************************************************************************  The purpose of this demo application is to present a usage of the  ADC_SAR and BCTU IP Driver for the S32K3xx MCU.  The example uses the PIT0 trigger to trigger BCTU conversion list to  perform parallel conversions on ADC0/ADC1. Three ADC channels  are selected to be converted on each ADC:  ADC0: S8 , P0, S8  ADC1: S10, S13, S17  Converted results from BCTU FIFO are moved by DMA into result array.  ADC channel S10 is connected to board's potentiometer.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** Set PIT Freeze Enable :--- Dinesh_Guleria_0-1707202447324.png BCTU will be do the parallel conversion for channel mentioned in BCTU list :-- Dinesh_Guleria_3-1707204479195.png   Dinesh_Guleria_1-1707202600904.png "NEW DATA DMA enable mask" :-- controls These bit field in MCR register Dinesh_Guleria_0-1707203759290.png "ADC target mask" :-- It controls "ADC_SEL " bit field in "Trigger Configuration (TRGCFG_0 - TRGCFG_71)" for single conversions you can enable only one instance so the possible values for target mask: 1 (0b001) ADC0 2 (0b010) ADC1 3 (0b100) ADC2| for list of conversions we can enable also parallel con version for example 3 (0b011) parallel conversion of ADC0 and ADC1 The trigger is configured as a list of parallel conversions ADC0, ADC1 in “Adc Target Mask”. List of ADC channels is defined in “BCTU List Items” while order is given by the “Adc Target Mask”: BctuListItems_0 is ADC0, BctuListItems_1 is ADC1 etc. Dinesh_Guleria_3-1707204011310.png Dinesh_Guleria_4-1707204043898.png Dinesh_Guleria_2-1707203974137.png Result :-- I connected VDD from board on adc_0_p0 (PTD1 : J412-1)  and adc_1_p2 (PTE0 J412-13). Also POT value on S10 of ADC-1 & ADC-0-VREFH value coming correct & STABLE. Dinesh_Guleria_1-1707330412160.png Dinesh_Guleria_0-1707330375235.png =========================Using  FIFO-2 ================= Dinesh_Guleria_0-1732514437470.png FIFO-2 Trigger & LIST Index :-- Dinesh_Guleria_1-1732514506589.png Dinesh_Guleria_2-1732514539640.png ADC channel conversion :-- Dinesh_Guleria_3-1732514707504.png

无用户界面的 mx8_ddr_stress_test i.MX8/i.MX8X/i.MX8DXL 具有 DDR 压力测试工具。这是一个窗口 UI 程序。 在某些情况下，i.MX 设备处于安全锁定状态。需要已签名的镜像才能运行。 例如，对单元故障字段进行返回分析，在现有的板上切换新的 DDR 部件。 i.MX 8 系列 | i.MX 8QuadMax (8QM) | 8QuadPlus Re: mx8_ddr_stress_test 无用户界面 mx8_ddr_stress_test（无 UI）的主要目的是处理和分析现场返修的、已启用安全关闭功能的设备。它使用与产品设备相同的DDR配置。 您的问题对我来说不太清楚。我想说，如果DDR压力UI版本可以实现，那么没有UI也可以实现。但它无法动态加载不同的配置。 这里是知识库空间。我只想回答有关“mx8_ddr_stress_test without UI”的问题。我不希望其他人感到困惑。 感谢您的理解。 如果您需要针对新的 DDR 硬件配置生成新的配置参数。您可以使用RPA生成符合您设计的内容。 请向恩智浦社区提交问题工单。我的同事会帮助您。

[Zephyr ® Series] Part 4: Overview and Practical Applications of Kconfig and Device Trees (Japanese Blog) Zephyr-series-4-title.png   From this point on, we'll be moving on to the advanced topics of Zephyr. This session will cover an overview of Kconfig and device trees, followed by hands-on programming exercises to help you utilize them effectively.   One of the key features of Zephyr RTOS, as mentioned previously, is its software scalability (reusability), which makes it easy to reuse software developed once in other projects or derivative products, enabling rapid development.   Furthermore, to support a wide range of hardware platforms, Zephyr employs a powerful configuration system called "Kconfig" and "Devicetree".   This allows you to port programs to different microcontroller boards simply by changing configuration files, without having to rewrite the source code in the same C/C++ language. This article explains the basic mechanisms of Kconfig and the device tree. As a practical application, we will modify the hardware-independent LED blinking program created in Part 3 to run on two different microcontroller boards: " FRDM-MCXA153 " and " FRDM-MCXN947 ".   To run the same application on different boards (microcontrollers and processors), we will explain practical programming methods using Kconfig and the device tree.     table of contents   Preparation Kconfig Basics Device tree fundamentals Best practices for improving software reusability Kconfig and the Device Tree in Practice Create a simple program (hands-on) 1. Program Specifications 2. Directory structure 3. Create Kconfig and prj.conf 4. Creating device tree overlays and board-specific settings 5. Hardware-independent common code (main.c) Create 6. Build and run summary Preparation   Hardware preparation   This article will primarily use the following boards to create and test programs. FRDM-MCXA153 (main use) Additionally, the following boards will be used as supplementary tools to verify the portability of the program you have created. FRDM-MCXN947   SW preparation   This guide assumes that you have already set up the Zephyr development environment (Zephyr SDK, West command, etc.). If you haven't set it up yet, please refer to the second article on environment setup. [Zephyr ® Series] Part 2: First Build and Testing (Japanese Blog)   We will be using the LED blinking program created in the third installment of the Zephyr series. If you haven't created it yet, we recommend creating it by referring to the previous article. [Zephyr ® Series] Part 3: First Steps in Blinking an LED and Software Reusability (Japanese Blog)   Kconfig Basics     Kconfig is a configuration system also used in the Linux kernel. In Zephyr, it is used to manage whether to "enable or disable" software features, or "what parameters to set," such as kernel functions, device drivers, subsystems, and application-specific settings. The following two files are important for Kconfig: The "Kconfig" file defines the selectable configuration items (symbols), their default values, and dependencies. "prj.conf" file *: This file is where application developers specify the values they want to set for items defined in "Kconfig" (such as enabling them with "y" or providing specific numerical values). Using Kconfig, you can exclude unnecessary code from compilation and optimize memory usage. Furthermore, the Kconfig and prj.conf files are all written in text format. How to enable the feature The prj.conf file enables features for the entire project. For example, the ADC, DAC, and OPAMP drivers are defined in Kconfig. When using the functions defined in Kconfig, you declare them by adding "CONFIG_" to the beginning of prj.conf. Kconfig：ADCの定義Kconfig: ADC definition prj.conf例prj.conf example   Device tree fundamentals   Devicetree例Example of a device tree   The device tree is a text file that describes what hardware (CPU, memory, peripherals, pin settings, etc.) a microcontroller supports, as well as the settings and configuration of that hardware. These settings and configurations are then expanded into macros.   Instead of directly writing hardware addresses into C code (hardcoding), information described in the device tree can be read through Zephyr macros, enabling hardware-independent programming. Nodes and Properties: Each element of hardware is represented as a "node" in a hierarchical structure, and register addresses, interrupt numbers, etc., are described as "properties." ".dts" and ".dtsi": Standard hardware configurations for each microcontroller and board are predefined within the Zephyr repository in ".dts" (Devicetree Source) and ".dtsi" (Include) files. dts: Described as the device tree of the board. dtsi: Describes the device tree of an SoC/microcontroller and is provided by the device manufacturer. ".overlay" file: This file is created when you want to override application-specific wiring (e.g., connecting an LED to a specific GPIO pin) or default settings.   Best practices for improving software reusability   To enhance software reusability in Zephyr, it is important to follow the following design principles: Separation of hardware-dependent and hardware-independent parts: C code (`main.c`) For example, avoid directly writing about specific microcontroller register operations or pin numbers. Leverage device tree aliases: Instead of directly referencing actual hardware nodes (e.g., `&red_led` or `&gpioa`), applications should reference abstract names defined in the `aliases` node (e.g., `led0`). This allows you to adapt to different boards simply by changing what the alias points to. Prepare a board-specific device tree (overlay) : When there are differences in some functions, such as in derivative products, you can overwrite (overlay) only the parts with hardware differences for each board. Switching features with Kconfig : Application behavior parameters and the on/off status of specific features are controlled using Kconfig symbols instead of C language "#define".   Kconfig and the Device Tree in Practice   From here, we will learn how to use Kconfig and the device tree by creating a simple program so that we can actually use them in practice .     Create a simple program (hands-on) The program will be created by modifying the LED blinking program we created last time, and will have the following specifications.   Here, as a practical exercise, we will create a common application that runs on both "FRDM-MCXA153" and "FRDM-MCXN947". 1. Program Specifications Source code : Use the code from "Part 3: Your First LED Blinking Program" and make the following modifications. LED blinking speed: The blinking interval can be set using Kconfig. Button Function (Enable/Disable): The button function can be enabled or disabled via Kconfig settings. When enabled, pressing the button will toggle between blinking and constant illumination of the LED. Outputting board name: At startup, the "device (board) name" configured in Kconfig will be output to standard output (terminal). 2. Directory structure   The project directory structure should be as follows:   Add the Kconfig file and boards folder to the "my_hello" folder of the LED blinking program you created last time. Any method of adding the files is fine. On Windows, use the PowerShell `ni` command or a text editor to create a new file and save it in the `my_hello` folder. In Linux, you can create a new, empty file using the `touch` command.   The files under "boards/" handle hardware differences and unique settings specific to each board.     my_hello/ ├── CMakeLists.txt ├── Kconfig <- 新規追加：アプリ独自のKconfig ├── prj.conf <- アプリの共通設定 ├── src/ │ └── main.c <- ハードウェア非依存の共通コード └── boards/　<- 新規作成フォルダ 　├── frdm_mcxa153.overlay <- 新規作成：FRDM-MCXA153用のデバイスツリー設定 　├── frdm_mcxa153.conf <- 新規作成：FRDM-MCXA153用のKconfig設定 　├── frdm_mcxn947_cpu0.overlay <- 新規作成：FRDM-MCXN947用のデバイスツリー設定 　└── frdm_mcxn947_cpu0.conf <- 新規作成：FRDM-MCXN947用のKconfig設定   Note : By creating specific files within your application's directory, Zephyr's build system (West) will automatically recognize them and apply the settings. Adding Kconfig: You can add your own configuration symbols by placing a "Kconfig" file in your Applications folder. Board-specific settings ("boards/" directory): By creating a "boards" directory within your application and placing "[board name].overlay" or "[board name].conf" files there, the overlay and Kconfig overrides will be automatically applied only when building with that board as the target.   3. Create Kconfig and prj.conf First, create your own "Kconfig" in the application root directory and define application-specific parameters. my_hello/Kconfig   mainmenu "my LED blink" config CUSTOM_BLINK_RATE_MS int "LED blink rate in milliseconds" default 1000 help Set LED blink frequency. #LEDの点滅周期（ミリ秒）を設定します config ENABLE_BUTTON_TOGGLE bool "Enable button to toggle LED state" default y help Enable button to toggle LED state. # ボタン入力によるLEDの点滅/点灯状態>の切り替え機能を有効にします。 config BOARD_NAME_STRING string "Board Name String" default "Unknown Board" help Set board name for printf. # 標準出力に表示するボード名を設定します。 source "Kconfig.zephyr"     Next, as a common setting for the entire application, there is "prj.conf". This will be written. In this prj.conf file, use the Kconfig symbol you just created to configure it as follows: my_hello/prj.conf   # GPIOの有効化 CONFIG_GPIO=y # アプリケーションの共通設定 CONFIG_CUSTOM_BLINK_RATE_MS=500 CONFIG_ENABLE_BUTTON_TOGGLE=y   4. Creating device tree overlays and board-specific settings Create a directory called "boards" and prepare the necessary files for each board. Main board for FRDM-MCXA153     We map the button on the board (`sw2`) so that it can be accessed from the application using the standard alias `sw0`. `led0` is already in the board definition so it can be omitted here, but it can be explicitly overridden if needed.   my_hello/boards/frdm_mcxa153.overlay / { aliases { sw0 = &user_button_2; /* FRDM-MCXA153のユーザーボタン */ }; };   my_hello/boards/frdm_mcxa153.conf   CONFIG_BOARD_NAME_STRING="FRDM-MCXA153 Board"   By referencing the symbols in this .conf (board-specific Kconfig) within the application (main.c), it becomes possible to output the board name to standard output using the printf function. For FRDM-MCXN947 Similarly, we define "sw0" in the FRDM-MCXN947. This handles any differences in the hardware names of the buttons.   In fact, if the hardware names (which differ depending on the peripheral or instance) vary across boards, you assign the actual hardware to the alias node in the device tree. my_hello/boards/frdm_mcxn947_cpu0.overlay   / { aliases { sw0 = &user_button_3; /* FRDM-MCXN947のユーザーボタン */ }; };   my_hello/ boards/frdm_mcxn947_cpu0.conf   I'll try overriding the LED blinking speed to 250ms only when building with MCXN947.   CONFIG_BOARD_NAME_STRING="FRDM-MCXN947 Board" CONFIG_CUSTOM_BLINK_RATE_MS=250 The application code is the same for FRDM-MCXA153 and FRDM-MCXN947, but you can configure the blinking behavior of the LED separately here. 5. Hardware-independent common code (main.c) Create Write the following in "my_hello/src/main.c":   The LED control section reuses the hardware-independent code (using the "led0" alias) created in the previous article, and incorporates Kconfig and button control into it. my_hello/ src/main.c   #include #include #include /* Devicetreeのエイリアスを参照する */ /* どのボードでも、一番目のLEDは通常 "led0" と定義されています */ #define LED0_NODE DT_ALIAS(led0) #define SW0_NODE DT_ALIAS(sw0) /* エイリアスからGPIO仕様(ポート、ピン、フラグ)を取得 */ static const struct gpio_dt_spec led = GPIO_DT_SPEC_GET(LED0_NODE, gpios); /* ボタン機能がKconfigで有効化されている場合のみコンパイルされる部分 */ #ifdef CONFIG_ENABLE_BUTTON_TOGGLE static const struct gpio_dt_spec sw = GPIO_DT_SPEC_GET(SW0_NODE, gpios); static struct gpio_callback button_cb_data; static bool is_blinking = true; void button_pressed(const struct device *dev, struct gpio_callback *cb, uint32_t pins) { is_blinking = !is_blinking; if (!is_blinking) { /* 点滅オフ時はLEDを点灯させた状態にする */ gpio_pin_set_dt(&led, 1); } } #endif //CONFIG_ENABLE_BUTTON_TOGGLE int main(void) { int ret; /* Kconfigで設定されたボード名を出力 */ printf("Starting application on %s\n", CONFIG_BOARD_NAME_STRING); /* デバイスの準備確認 */ if (!gpio_is_ready_dt(&led)) { return -1; } /* ピンの設定 (Devicetreeで定義された初期状態などを考慮して設定) */ ret = gpio_pin_configure_dt(&led, GPIO_OUTPUT_ACTIVE); if (ret < 0) { return -1; } #ifdef CONFIG_ENABLE_BUTTON_TOGGLE if (!gpio_is_ready_dt(&sw)) { return -1; } ret = gpio_pin_configure_dt(&sw, GPIO_INPUT); if (ret < 0) { return -1; } ret = gpio_pin_interrupt_configure_dt(&sw, GPIO_INT_EDGE_TO_ACTIVE); if (ret < 0) { return -1; } gpio_init_callback(&button_cb_data, button_pressed, BIT(sw.pin)); gpio_add_callback(sw.port, &button_cb_data); #endif //CONFIG_ENABLE_BUTTON_TOGGLE while (1) { #ifdef CONFIG_ENABLE_BUTTON_TOGGLE if (is_blinking) { ret = gpio_pin_toggle_dt(&led); } #else /* ピンの状態を反転 (ボタン機能が無効な場合は常に点滅) */ ret = gpio_pin_toggle_dt(&led); #endif //CONFIG_ENABLE_BUTTON_TOGGLE /* Kconfigで設定された点滅間隔で待機 */ k_msleep(CONFIG_CUSTOM_BLINK_RATE_MS); } return 0; }     6. Build and run Now, let's actually test its functionality. Please refer to the previous article for instructions on setting up the build environment and enabling the west command. First, navigate to the directory of your installed zephyrproject repository as shown in the command instructions below, enable west, and then proceed. Operation confirmed with FRDM-MCXA153 (main) Build using the following command and write it to the FRDM-MCXA153.   ##　ホームディレクトリからZephyrprojectディレクトリに移動 cd ~/zephyrproject ## west環境を有効化 source .venv/bin/activate ## zephyr v4.3をチェックアウトしていない場合は、前回（第３回 初めてのLチカとソフトウェアの再利用性）を参考にv4.3をチェックアウトしてください。 west build -b frdm_mcxa153 my_hello west flash     Execution result   コンソール出力Console output   LED点滅、点灯モード切り替えLED flashing and steady light mode switching   The message "Starting application on FRDM-MCXA153 Board" will appear in the terminal. The LED blinks at 500ms intervals ("prj.conf"). (Settings). Pressing SW2 ("custom-sw") will turn it on, and pressing it again will return it to blinking. Operation confirmed with FRDM-MCXN947 We'll build the project using the exact same C source code, only changing the board specification.   # -pオプションを使用し、frdm_mcxa153のビルド情報をクリーンしてビルドします。 west build -p -b frdm_mcxn947//cpu0 my_hello west flash   Execution result   The contents of "boards/frdm_mcxn947_cpu0.conf" will be automatically applied, and the terminal will display "Starting application on FRDM-MCXN947 Board". The LED blinks rapidly at 250ms intervals (configured in "prj.conf"). Pressing SW3 (the button mapped to "user_button_3" on the MCXN947) will similarly switch between LED illumination and blinking. While the FRDM-MCXA153 and FRDM-MCXN947 use different GPIOs for controlling LEDs and switch buttons, the device tree effectively absorbs these differences, demonstrating how cleanly the application program and hardware are separated.   summary     In this session, we learned the basics of Kconfig and device trees in Zephyr, and practiced techniques to separate hardware-dependent parts from C code by utilizing them.   I believe you've experienced a powerful mechanism for reusing the same source code across multiple different boards, where hardware settings are absorbed by the device tree overlay (".overlay"), application parameters can be flexibly changed and features can be easily enabled or disabled using board-specific Kconfig files (".conf").   ========================== We are currently unable to respond to comments left in the "Comment" section of this post. We apologize for the inconvenience, but please refer to "Technical Questions to NXP - How to Contact Us (Japanese Blog)" when making inquiries. (If you are already an NXP distributor or have a relationship with NXP, you may ask your representative directly.) Zephyr-series-4-title.png This document provides an overview of the device tree and Kconfig, features designed to enhance Zephyr's software reusability. It then outlines the steps required to utilize these features in practice. After reading through this Zephyr series, from the first installment to the fourth, you will be able to write programs using the Zephyr RTOS. General Purpose Microcontrollers MCX Japanese Blog

在 FRDM-IMX95 上调试 Ara240 模块 入门视频 (function() { var wrapper = document.getElementById('lia-vid-6393577020112w960h540r856'); var videoEl = wrapper ? wrapper.querySelector('video-js') : null; if (videoEl) { if (window.videojs) { window.videojs(videoEl).ready(function() { this.on('loadedmetadata', function() { this.el().querySelectorAll('.vjs-load-progress div[data-start]').forEach(function(bar) { bar.setAttribute('role', 'presentation'); bar.setAttribute('aria-hidden', 'true'); }); }); }); } }})(); (在我的视频中查看） 本指南提供分步说明，说明如何验证与 Ara240 模块的成功通信以及与 FRDM i.MX 95 开发板接口的运行时软件环境。 打破常规 熟悉 Ara240 模块 Ara240 Module [Top view]Ara240 模块 [俯视图］ Ara240 Module [Back view]Ara240 模块 [后视图］      连接 M.2 模块 本节介绍如何将分立模块 Ara240 连接到 FRDM i.MX 95 开发板。FRDM i.MX 95 快速入门指南中的说明将引导您完成主板上预加载的嵌入式 Linux 映像的启动过程以及如何连接 USB 调试电缆。有关其他详细信息，请参阅 FRDM i.MX 95 开发板官方文档。 参考，引用: FRDM i.MX 95 快速入门指南 FRDM i.MX 95 开发板产品页面 FRDM i.MX 95 入门页面 ARA2-M2-16G-GT 入门 按照以下步骤将 Ara240 模块连接到 FRDM i.MX 95 开发板： 剧透 (加亮显示以阅读) 重要：在进行任何连接之前，请确保主板已关闭电源。 重要：在进行任何连接之前，请确保主板已关闭电源。 将 Ara240 模块插入 FRDM i.MX 95 开发板上的 M.2 Key-M 插槽。 使用提供的螺钉固定模块。 将风扇电缆连接到主板的风扇接头（有关接头的确切位置，请参阅 FRDM i.MX 95 主板文档）。 Connect the Ara240 to the FRDM i.MX 95 development board.将 Ara240 连接到 FRDM i.MX 95 开发板。 开启板电源 按照《FRDM-IMX95 入门》中的说明开启（启动）板。 开机后，检查风扇和 Ara240 模块的绿色 LED 指示灯是否亮起。   获取软件 本节将向您介绍 Ara240 Runtime 软件开发工具包 (SDK)，这是 Ara240 SDK 的精简子集，旨在恩智浦平台上快速启用和执行。Runtime SDK 简化了安装和配置，使开发人员能够以最小的工作量在 Ara240 模块上快速部署和运行 AI/ML 工作负载。 概述 有关 Ara240 软件开发套件 (SDK) 的详细信息，请参阅 Ara240 软件发行说明 Ara240 入门页面仅概述了在特定 i.MX 开发平台上的使用情况 对于任何其他平台，请联系您的恩智浦代表寻求指导。 模块枚举和软件配置 本节提供有关在 FRDM i.MX 95 开发板上验证是否正确安装了 Ara240 模块和 Ara240 Runtime SDK 配置的说明。 验证设备检测 主板成功启动后，连接到串行调试端口以监测系统日志。要确认主板是否检测到 Ara240 模块，请运行以下命令： $ lspci | grep 1e58 预期输出： 0000:01:00.0 Processing accelerators: Device 1e58:0002 (rev 02) 启用 Ara240 设备 为了快速启用，Ara240 运行时 SDK 会在启动时启动。有关详细说明和环境设置步骤，请参阅Ara240 Runtime SDK 文档。 开发人员体验 本节概述了使用 FRDM i.MX 95 开发板支持 Ara240 运行时软件。 验证设置环境 使用以下指南来了解如何连接所需设备。对于大多数演示，你需要摄像头、键盘、鼠标、互联网连接和一个 HDMI 显示器。 Setup preparation for FRDM i.MX 95 board [Top view]FRDM i.MX 95 主板的设置准备 [顶部视图] Setup preparation for FRDM i.MX 95 board [Back view]FRDM i.MX 95 主板的设置准备 [返回视图] 剧透 (加亮显示以阅读) 注意：您可能需要使用 USB 集线器来同时连接键盘、鼠标和摄像头。 注意：您可能需要使用 USB 集线器来同时连接键盘、鼠标和摄像头。   运行时设置 说明 Runtime SDK 提供了一个完整的运行环境，可在 Ara240 模块上实现 AI/ML 加速。要运行演示应用程序，请确保 Ara240 启动过程已成功完成，系统已为演示评估做好准备。 请参阅 Runtime SDK 文档，了解有关以下方面的详细指导： 验证 Runtime SDK 的正确安装。 检查并更新 Ara240 固件版本。 验证代理服务启动状态。 在 Ara240 上执行基准测试。 按照这些步骤操作可确保模块正确初始化并可随时使用。Ara240 支持执行 CNN、LLM、VLM 和代理框架，使高级人工智能工作负载能够直接在 Ara 上运行。有关全面的示例和端到端工作流程指导，请参阅Ara SDK文档页面。 FRDM-IMX9

2S TDM Master: Persistent 1-slot downward shift during continuous DMA streaming 1. Test Configuration I2S configured as TDM Master, DSP mode with short WS 8 slots per frame, 32-bit per slot, frame length = 256 bit Using fsl_i2s_dma driver Dual-buffer ping-pong transfer FreeRTOS task waits on a semaphore from the DMA callback, fills the buffer, then calls I2S_TxTransferSendDMA to re-submit Test data pattern: fixed 0x000Axxxx (upper 16 bits = 0x000A, lower 16 bits contain slot index and sample sequence number) 2. Persistent One-Slot Downward Shift (100% Reproducible) Logic analyzer captures show: Transmitted data is consistently shifted down by exactly one slot Data intended for Slot 0 appears in the physical Slot 1 position Data intended for Slot 1 appears in the physical Slot 2 position By extension, data intended for Slot 7 appears in Slot 0 of the next frame (or is lost) This shift is stable after the stream starts; it does not drift further over time and remains a fixed 1-slot offset 3. Startup Data Misalignment (Intermittent) The logic analyzer occasionally observes: After the WS frame sync pulse, the DATA line remains at low level (all zeros) for a period After a blank interval of 1~3 frames, valid test data suddenly appears Once the blank interval ends, the data still exhibits the 1-slot offset described in item 2 Xanderwangx_0-1780141578772.png Audio(PDM | I2S | SAI) Re: 2S TDM Master: Persistent 1-slot downward shift during continuous DMA streaming Hello @Xanderwangx , Thank you for your post. Could you please let us know which NXP MCU you are using? Also, are you working with one of our evaluation boards or a custom board? Are you using the SDK example code, or is this based on your own implementation? If it is your own code, would you be able to share it with us for further analysis? BR Celeste Re: 2S TDM Master: Persistent 1-slot downward shift during continuous DMA streaming Hello @Xanderwangx , Thank you for your reply. However, the RT family is not within my support scope. I mainly support MCX and Kinetis family. Also, this is MCX channel, not for RT product. Could you please create a new post under i.MX RT Crossover MCUs - NXP Community? The RT support team will be able to assist you there. BR Celeste Re: 2S TDM Master: Persistent 1-slot downward shift during continuous DMA streaming MCU: MIMXRT685-EVK (i.MX RT685) Board: Custom product board based on RT685. I am using Loop DMA mode with ping-pong buffers. The DMA is configured with I2S_TransferSendLoopDMA() using 2 descriptors. In the DMA callback, I fill the next buffer and the loop continues automatically. void I2S1_TDM_Init(void) { I2S_Type *base = I2S1; /* I2S Configuration */ i2s_config_t cfg; I2S_TxGetDefaultConfig(&cfg); cfg.masterSlave = kI2S_MasterSlaveNormalMaster; cfg.mode = kI2S_ModeDspWsShort; /* TDM = DSP mode */ cfg.divider = 24576000 / (TDM_SAMPLE_RATE * TDM_SLOT_NUM * TDM_SLOT_WIDTH); cfg.dataLength = TDM_SLOT_WIDTH; /* 32-bit */ cfg.frameLength = TDM_FRAME_LENGTH; /* 256-bit */ cfg.oneChannel = false; cfg.position = 0; cfg.wsPol = true; /* DSP A or B */ I2S_TxInit(base, &cfg); /* Enable 8 slots (Primary + 3 Secondary Channels) */ /* Note: Using 4 channels to cover 8 slots with 32-bit data */ I2S_EnableSecondaryChannel(base, kI2S_SecondaryChannel1, false, 32 * 2); I2S_EnableSecondaryChannel(base, kI2S_SecondaryChannel2, false, 32 * 4); I2S_EnableSecondaryChannel(base, kI2S_SecondaryChannel3, false, 32 * 6); /* DMA Loop Transfer Setup */ DMA_Init(DMA0); DMA_EnableChannel(DMA0, I2S_TX_DMA_CH); DMA_SetChannelPriority(DMA0, I2S_TX_DMA_CH, kDMA_ChannelPriority3); DMA_CreateHandle(&dma_handle, DMA0, I2S_TX_DMA_CH); I2S_TxTransferCreateHandleDMA(base, &i2s_handle, &dma_handle, I2S1_Callback, tdm_xfer); I2S_TransferInstallLoopDMADescriptorMemory(&i2s_handle, tdm_desc, 2); if (I2S_TransferSendLoopDMA(base, &i2s_handle, &tdm_xfer[0], 2) != kStatus_Success) { while (1); /* Fails if TDM_FRAMES * 8 > DMA_MAX_TRANSFER_COUNT(1024) */ } } The slot offset is random across power cycles, not fixed.I also tried disable interrupts before and after the DMA transfer to force synchronization, but slot misalignment still occurs. Does I2S_TransferSendLoopDMA() guarantee frame-aligned DMA startup on RT685? If not, how to force alignment to WS boundary? i.MX-RT600 

S32K3 LPSPIに関する質問 NXPのエキスパートの皆様へ： GPIOピンを使用してLPSPIチップセレクト（CS）を手動で制御する場合、S32DS設定ツールのSpiCsPolarity設定は依然として影響しますか？ツールでPCS（周辺チップセレクト）の選択を無効にする必要がありますか？また、SpiHostRequestパラメータの目的は何ですか？ focusdoit_0-1779058033130.png Re: S32K3 LPSPI pcs question こんにちは、 @focusdoit GPIOピンを使用してLPSPIチップセレクト（CS）を手動で制御する場合、S32DS設定ツールのSpiCsPolarity設定は依然として影響しますか？ いいえ、動作には影響しないはずです。 チップセレクトとしてGPIOを使用する場合は、その制御はユーザーの責任となります。SpiCsPolarityパラメータは、LPSPI周辺機器によって管理されるハードウェア制御のCSに適用され、GPIO制御信号には適用されません。 ツールでPCS（周辺チップセレクト）の選択を無効にする必要がありますか？ ConfigToolsで低レベルドライバ（IP）を使用する場合は、目的のピンをGPIOとして設定するだけでよく、PCSピンを設定する必要はありません。 高レベルドライバ（MCAL）の場合、ピンをGPIOとして設定することに加えて、SpiCsSelectionというパラメータがあります。このパラメータはCS_VIA_GPIOに設定する必要があります。この**CASE**、ドライバは通知（SpiJobStartNotificationノードとSpiJobEndNotificationノードで定義）を使用して、各SPIジョブのGPIOを介してCSピンを制御します。 また、SpiHostRequestパラメータの目的は何ですか？ マスターモードでは、このパラメータにより、LPSPIモジュールはホストからの要求入力がアサートされた場合にのみ、新しいSPI転送を開始できます。LPSPIがビジー状態の場合、ホストからの要求入力は無視されます。 スレーブモードでは、送信可能なデータが利用可能になったときに、HREQ出力ピンがアサート状態になります。 BR、VaneB

Guidance for IVT Flash Image Creation for R52_0_0 Core on S32Z280-594EVB Without Debug Probe. Hi, Currently I am working with the NXP S32Z280-594EVB board. I created a Blink LED project for the R52_0_0 core using S32DS. I do not have the S32 Debug Probe, but I need to flash my project to the board. Please give me guidance on how to convert my project into a flashable image using the IVT method. Could you please share the procedure or any reference documents/examples for generating the flash image and booting it on the S32Z280 board without the debug probe? Thank you. Re: Guidance for IVT Flash Image Creation for R52_0_0 Core on S32Z280-594EVB Without Debug Probe. Hi,suresh308531 Thank you for contacting us. I have received your question and will help you to check it. BR Joey Re: Guidance for IVT Flash Image Creation for R52_0_0 Core on S32Z280-594EVB Without Debug Probe. Hi，suresh308531 Thank you for contacting us. You can try to refer to this links as the following contents for your question. creating a Blob Image using IVT S32Z2 How to reduce the binary size in S32Z2 Hope this information can help you. BR Joey Re: Guidance for IVT Flash Image Creation for R52_0_0 Core on S32Z280-594EVB Without Debug Probe. Hi Joey_z, Thank you for your support. I followed your steps successfully. I reduced the .bin file size and created the flash image using the IVT method. However, after flashing the image, there is no output from the board. I tested a simple UART example code. The same UART code runs successfully on the M33 core, using the same pins and configuration. Then I created a new project for the R52_0_0 core, but the UART output is not showing. For the IVT configuration, I used the RAM start pointer address and RAM entry pointer address from the .ld file and .map file. Could you please help me solve this issue? Please let me know if there are any additional boot settings, memory settings, or R52-specific configurations required for the S32Z280 R52_0_0 core. suresh308531_0-1779168290104.png   BR, suresh Re: Guidance for IVT Flash Image Creation for R52_0_0 Core on S32Z280-594EVB Without Debug Probe. Hi,suresh308531 Could you share your R52 UART project with me? I can help you to check it. BR Joey Re: Guidance for IVT Flash Image Creation for R52_0_0 Core on S32Z280-594EVB Without Debug Probe. Hi Joey_z, Thank you for your support. I have attached my R52 UART project for your reference. Could you please check the project and help me identify why the R52_0_0 core is not booting/running after creating the IVT flash image? The IVT image is generated successfully and flashing also completes successfully, but there is no UART output from the R52 core. BR, Suresh Re: Guidance for IVT Flash Image Creation for R52_0_0 Core on S32Z280-594EVB Without Debug Probe. Hi,suresh308531 I have checked your project, please try to modify your code as the following contents. If you want to boot from R52 directly, please try to refer to the steps as the following. 1.Modify the file of startup.s to initial the RTU0 early, added for RTU0 SRAM initialization for boot target as R52 as the following picture. The startup.s patch file in the attachment.  Joey_z_0-1779178666469.png 2.Enable the partition1(use the function of Mcu_SetMode()) before use the clock initial as the following picture. Joey_z_1-1779178696373.png Joey_z_2-1779178770542.png 3.Set the board boot from QSPI. Hope this information can help you. BR Joey Re: Guidance for IVT Flash Image Creation for R52_0_0 Core on S32Z280-594EVB Without Debug Probe. Hi，suresh308531 Have you finished this application? I can continue support you if you still have any issue. BR Joey Re: Guidance for IVT Flash Image Creation for R52_0_0 Core on S32Z280-594EVB Without Debug Probe. Hi，Suresh Thank you for your reply and information. You can contact us at any time if you have other issue. BR Joey Re: Guidance for IVT Flash Image Creation for R52_0_0 Core on S32Z280-594EVB Without Debug Probe. Hi Joey_z, Thank you for your reply and support. I successfully ran the project with the R52 core. Your suggested binary size reduction process and the startup.s file modifications helped me achieve this successfully. Currently, the project is working even without enabling the Partition 1 clock and without using the Mcu_SetMode() function. Thank you again for your guidance. BR, Suresh

Errata ERR053404: Use Cases for Different Message Buffer Configurations This article discusses the different use cases and configuration of the errata "ERR053404: FlexCAN: Message Buffer (MB) and Enhanced RX FIFO Filter Element (ERFFEL) Memory Corruption". The errata is impacting Messabe Buffers (MB) and Enhanced RX FIFO Filter Elements (ERFFEL), the impact of each MB or ERFFEL depends on the configuration of the payload buffer, MB and/or ERFFEL. In this post, we plan to provide some examples of such configuration and impact on the FlexCAN IP.  Taking a 64-byte payload as an example, the following configurations illustrate the trade-off between the number of Message Buffers (MBs) and acceptance filters: /* ERR053404: This errata explains affected words depends on MB payload size, this example applies for MB configured for 64-byte payload */ #define BYTES_IN_MB kFLEXCAN_64BperMB FLEXCAN_FDInit(EXAMPLE_CAN, &flexcanConfig, EXAMPLE_CAN_CLK_FREQ, BYTES_IN_MB, true); 1. MB0 is not used, MB1 is used. In this configuration, ERFFEL[0–29] can be fully utilized as acceptance filters, while MB1–MB6 are available as Message Buffers, maximum ERFCR[NFE] is 14. The following code can be used as reference for the driver configuration for this case.  /* Config fifo filters to make it accept STD frame with ID 0x123 ~ 0x140. Used ERFFEL[0–29], ERFCR[NFE]=14 */ uint32_t rxEnFifoFilter[] = {FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x123, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x124, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x125, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x126, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x127, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x128, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x129, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12A, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12B, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12C, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12D, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12E, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12F, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x130, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x131, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x132, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x133, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x134, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x135, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x136, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x137, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x138, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x139, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x13A, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x13B, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x13C, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x13D, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x13E, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x13F, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x140, 0, 0x3F, 0)}; flexcan_enhanced_rx_fifo_config_t rxEhFifoConfig; flexcan_rx_mb_config_t mbConfig; /* Setup Enhanced Rx FIFO. */ rxEhFifoConfig.idFilterTable = rxEnFifoFilter; rxEhFifoConfig.idFilterPairNum = sizeof(rxEnFifoFilter) / sizeof(rxEnFifoFilter[0]) / 2U; rxEhFifoConfig.extendIdFilterNum = 0; rxEhFifoConfig.fifoWatermark = RX_MESSAGE_COUNT - 1U; /* Reduce the frequency to enter IRQ. */ rxEhFifoConfig.dmaPerReadLength = kFLEXCAN_19WordPerRead; rxEhFifoConfig.priority = kFLEXCAN_RxFifoPrioHigh; FLEXCAN_SetEnhancedRxFifoConfig(EXAMPLE_CAN, &rxEhFifoConfig, true); rxFifoXfer.framefd = &rxFrame[0]; rxFifoXfer.frameNum = RX_MESSAGE_COUNT; /* Set Rx Masking mechanism for MB. Only accept data frame with desired ID. */ FLEXCAN_SetRxMbGlobalMask(EXAMPLE_CAN, FLEXCAN_RX_MB_STD_MASK(0x7FFU, 0, 0)); #define RX_MESSAGE_BUFFER_1 (1U) /* Setup Rx Message Buffer 1. */ mbConfig.format = kFLEXCAN_FrameFormatStandard; mbConfig.type = kFLEXCAN_FrameTypeData; mbConfig.id = FLEXCAN_ID_STD(0x121U); FLEXCAN_SetFDRxMbConfig(EXAMPLE_CAN, RX_MESSAGE_BUFFER_1, &mbConfig, true); 2. MB0 and MB1 are not used. In this case, ERFFEL[0–31] are available for acceptance filtering, and MB2–MB6 are reserved as Message Buffers, maximum ERFCR[NFE] is 15. The following code can be used as reference for the driver configuration for this case.  /* Config fifo filters to make it accept STD frame with ID 0x123 ~ 0x142. Used ERFFEL[0–31], ERFCR[NFE]=15 */ uint32_t rxEnFifoFilter[] = {FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x123, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x124, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x125, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x126, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x127, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x128, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x129, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12A, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12B, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12C, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12D, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12E, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12F, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x130, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x131, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x132, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x133, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x134, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x135, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x136, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x137, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x138, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x139, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x13A, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x13B, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x13C, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x13D, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x13E, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x13F, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x140, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x141, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x142, 0, 0x3F, 0)}; flexcan_enhanced_rx_fifo_config_t rxEhFifoConfig; /* Setup Enhanced Rx FIFO. */ rxEhFifoConfig.idFilterTable = rxEnFifoFilter; rxEhFifoConfig.idFilterPairNum = sizeof(rxEnFifoFilter) / sizeof(rxEnFifoFilter[0]) / 2U; rxEhFifoConfig.extendIdFilterNum = 0; rxEhFifoConfig.fifoWatermark = RX_MESSAGE_COUNT - 1U; /* Reduce the frequency to enter IRQ. */ rxEhFifoConfig.dmaPerReadLength = kFLEXCAN_19WordPerRead; rxEhFifoConfig.priority = kFLEXCAN_RxFifoPrioHigh; FLEXCAN_SetEnhancedRxFifoConfig(EXAMPLE_CAN, &rxEhFifoConfig, true); rxFifoXfer.framefd = &rxFrame[0]; rxFifoXfer.frameNum = RX_MESSAGE_COUNT; 3. MB0 and MB1 are both used. Under this configuration, only ERFFEL[0–11] can be used as acceptance filters. ERFFEL[12–31] are not available, while MB0–MB6 can be used as Message Buffers, maximum ERFCR[NFE] is 5. The following code can be used as reference for the driver configuration for this case.  /* Config fifo filters to make it accept STD frame with ID 0x123 ~ 0x12E. Used ERFFEL[0–11], ERFCR[NFE]=5 */ uint32_t rxEnFifoFilter[] = {FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x123, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x124, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x125, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x126, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x127, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x128, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x129, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12A, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12B, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12C, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12D, 0, 0x3F, 0), FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(0x12E, 0, 0x3F, 0)}; flexcan_enhanced_rx_fifo_config_t rxEhFifoConfig; flexcan_rx_mb_config_t mbConfig; /* Setup Enhanced Rx FIFO. */ rxEhFifoConfig.idFilterTable = rxEnFifoFilter; rxEhFifoConfig.idFilterPairNum = sizeof(rxEnFifoFilter) / sizeof(rxEnFifoFilter[0]) / 2U; rxEhFifoConfig.extendIdFilterNum = 0; rxEhFifoConfig.fifoWatermark = RX_MESSAGE_COUNT - 1U; /* Reduce the frequency to enter IRQ. */ rxEhFifoConfig.dmaPerReadLength = kFLEXCAN_19WordPerRead; rxEhFifoConfig.priority = kFLEXCAN_RxFifoPrioHigh; FLEXCAN_SetEnhancedRxFifoConfig(EXAMPLE_CAN, &rxEhFifoConfig, true); rxFifoXfer.framefd = &rxFrame[0]; rxFifoXfer.frameNum = RX_MESSAGE_COUNT; /* Set Rx Masking mechanism for MB. Only accept data frame with desired ID. */ FLEXCAN_SetRxMbGlobalMask(EXAMPLE_CAN, FLEXCAN_RX_MB_STD_MASK(0x7FFU, 0, 0)); #define RX_MESSAGE_BUFFER_0 (0U) /* Setup Rx Message Buffer 0. */ mbConfig.format = kFLEXCAN_FrameFormatStandard; mbConfig.type = kFLEXCAN_FrameTypeData; mbConfig.id = FLEXCAN_ID_STD(0x120U); FLEXCAN_SetFDRxMbConfig(EXAMPLE_CAN, RX_MESSAGE_BUFFER_0, &mbConfig, true); #define RX_MESSAGE_BUFFER_1 (1U) /* Setup Rx Message Buffer 1. */ mbConfig.format = kFLEXCAN_FrameFormatStandard; mbConfig.type = kFLEXCAN_FrameTypeData; mbConfig.id = FLEXCAN_ID_STD(0x121U); FLEXCAN_SetFDRxMbConfig(EXAMPLE_CAN, RX_MESSAGE_BUFFER_1, &mbConfig, true); Recommendation: To achieve a balanced trade-off between the number of Message Buffers and acceptance filters, Option 1 is recommended.

SE050E2HQ1/Z01Z3Z 的电容和铁氧体磁珠要求 您好，NXP团队， 我们在定制设计板中使用安全元件 P/N：SE050E2HQ1/Z01Z3Z。 在审查参考设计板 OM-SE050ARD 时，我们几乎没有什么顾虑，如下所示 1.是否严格要求在 VIN (12)、VOUT (15)、VCC (18)引脚上使用阻抗为 330 欧姆、频率为 100 MHz 的 P/N: BLM21PG331SN1D铁氧体磁珠？ 2.我们是否还需要在 VSS (19) 引脚上添加铁氧体磁珠？ 3.是否需要使用 0.033uF 电容或者我们可以使用 100nF 电容？ kadamm_1-1777647134719.png 谢谢！ Re: Capacitor and Ferrite Bead requirement for SE050E2HQ1/Z01Z3Z 你好@kadamm 希望你一切顺利。 铁氧体磁珠主要与双接口操作（由非接触式接口提供）有关，以实现正确的电磁兼容性。 关于电容，您是否正在考虑只使用一个（共享）100nF 电容？如果是这样，我相信应该不会有什么大的不便。 Eduardo。 Re: Capacitor and Ferrite Bead requirement for SE050E2HQ1/Z01Z3Z 你好，爱德华多、 我们的设计没有采用 ISO 14443 或 ISO 7816 接口。因此，我们计划直接连接 VIN、VCC、VOUT 和 GND 引脚，而不使用铁氧体磁珠。此外，我们在引脚上放置一个 0.1 µF 电容以进行解耦。请问这种方法是否合适？   kadamm_0-1778561393143.png 谢谢！

无法在 SImulink MBDT 中使用 UART_Echo 进行传输 嗨，恩智浦支持团队、 我目前正在使用 Simulink MBDT 处理 S32K358 MCU，并尝试使用 UART Echo 示例（UART_Asynchronous S32CT）实现 UART 通信。）当我从S32K3xx工具箱中构建和部署现有示例时，它可以按预期运行，并且我能够观察串行监视器中的回声数据。在默认设置中，使用 LPUART2。 不过，我的硬件设置要求使用 LPUART0（PTB0 和 PTB1）。我已在 S32 配置工具 (S32CT) 中相应更新了 UART 实例和引脚配置。在这些更改之后，该项目成功构建和部署，但是即使我在传输消息，我也没有在串行监测中收到任何回显数据。 我已经上传了 pdf 文件，其中包含详细说明的截图。 如果您能就我可能需要解决的其他配置或潜在疏忽提供指导，以便在 LPUART0 上实现正确的 UART 通信，我将不胜感激。 MBDT#SimulinkS32K3 Re: Can't transmit with UART_Echo in SImulink MBDT Naresh2000_0-1776926139513.png 上图是 UART_Echo 示例的配置设置。我在这里感到困惑。实际上，我的 UART 是 LPUART0。当我移除 LPUARAT2 并添加 LPUART0 时，我可以看到如下设置（图片附后）： Naresh2000_1-1776926149365.png 中断名称：LPUART1 优先级： 0 处理程序：undefined_handler " 我的问题是，是否需要保持这些设置，还是需要更改处理程序和优先级？" Re: Can't transmit with UART_Echo in SImulink MBDT 你好 就这个问题谈几点看法： 你不必从 “驱动程序” 选项卡更新 Siul2_Port 元器件。只需更新 PINS 视图中外设使用的引脚即可。 SorinIBancila_0-1777475786708.png 启用新外围设备后，你需要进入平台—— > 中断控制器（你已经这样做了）和 MCU-> mcuModuleConfiguration-> mcuModuleSettingConfiguration-mcumodeSettingConfiguration-> mcuPressettingConfiguration-mcuPreserational 并启用外设时钟 SorinIBancila_1-1777476028484.png 关于未定义的处理程序，对于 LPUART0_IRQn，您可以使用以下处理程序：LPUART_UART_IP_0_IRQHandler。 优先级由您决定（数值越低，优先级越高）。 提示！在模型中添加一个变量，每一步都递增。然后，使用 FreeMASTER 检查主板是否正在运行，就好像某些配置不当一样，它可能会进入硬故障。即使未配置 UART，您仍然可以通过调试探头连接到电路板。 顺祝商祺！ 索林-班奇拉 Re: Can't transmit with UART_Echo in SImulink MBDT 你好 我很高兴问题得到了解决。 如果您已经在使用 R2022b 和 S32DS 3.5，则可以继续使用这些版本。 顺祝商祺！ 索林-班奇拉 Re: Can't transmit with UART_Echo in SImulink MBDT 感谢@SorinBancila 解决了这个问题。 我能否知道哪个版本的 MATLAB-Simulink& S32DS 最适合 FS26 (SBC) CDD 驱动程序？目前我使用的是 MATLAB R2022b 和 S32DS 3.5。 Re: Can't transmit with UART_Echo in SImulink MBDT Hii@SorinIBancila, 首先，非常感谢你及时、有益的回复，这非常有用。 我无法在 S32 配置工具中找到CDD_Sbc_fs26 驱动程序。经过研究，我了解到 MBDT 限制在 S32CT 中安装新软件，以防止用户破坏工具链。 在找到这个之前，我尝试使用 “帮助” → “安装新软件” 通过 S32 Design Studio 安装 FS26 软件包。然而，重新打开 Simulink 并检查 S32CT 后，CDD 驱动程序仍然不可用。看来S32设计工作室和Simulink S32配置工具是独立运行的，不共享已安装的组件。 作为一种解决方法，我从电池管理系统示例项目中复制了 FS26 初始化块。但是当我尝试构建、部署和启动模型时，我遇到了以下错误：致命错误：cdd_sbc_fs26.h：无此文件或目录 我目前处于困境，需要有关如何正确解决此问题以及集成所需的 FS26 驱动程序或其他任何方法的指导。 mbdt fs26 pmics-sbcs-多供应商处理器