Booting a Non-XIP Application from SEMC NAND on MIMXRT1170-EVKB
Software Prerequisites
MCUXpresso IDE
Tera Term (serial terminal)
Secure Provisioning Tool
1 Introduction
This article describes the end-to-end procedure for booting a non-XIP application from SEMC parallel NAND flash on the MIMXRT1170-EVKB. Because NAND memory is block-oriented and cannot be executed in place, the application image must be linked to internal or external RAM (ITCM, DTCM, OCRAM, or SDRAM) and copied from NAND into RAM by the i.MX RT1170 BootROM prior to execution.
The guide covers the required board rework, hardware validation using the MCUXpresso SDK, project configuration for RAM-linked builds, bootable image generation using the MCUXpresso Secure Provisioning Tool (SEC), one-time fuse programming for ECC, image programming to NAND, and final boot verification. Readers are strongly encouraged to review Section 2 (Bootable Image Layout) of application note AN14069 before proceeding, as familiarity with the image layout is essential for understanding the steps that follow.
swetha_v_0-1779206877689.png
RT1170 Bootable image layout
2 Hardware Rework
The EVKB ships with the SEMC NAND data-line 0-ohm resistors depopulated (DNP) because those SoC pins are muxed with other functions on the board. You must solder them in before NAND is usable.
2.1 Resistors to Populate
Solder R1872 through R1879 (eight 0-ohm resistors) on NAND data lines DATA0-DATA7. Before soldering, cross-check against your specific EVKB revision’s schematic. Open the board schematic PDF and search for the SEMC NAND section, the reference designators can shift by a digit or two between revisions. The relevant schematic is downloadable from the NXP product page.
swetha_v_0-1779205885596.png
2.2 Hardware Validation via SDK Examples
After populating the resistors, validate the rework by running the SDK example mentioned below in the default QSPI NOR boot configuration (no changes to SW1/SW2 from factory settings yet). This isolates hardware issues from boot-configuration issues and gives clean signal before attempting SEC flashing.
2.3 Recommended Validation Sequence
Run the semc_nand component example.
Path: \boards\evkbmimxrt1170\component_examples\flash_component\semc_nand.
Import via File → Import → MCUXpresso SDK Examples → MIMXRT1170-EVKB → component_examples\flash_component\semc_nand
Build and flash to QSPI NOR (default boot configuration).
Open a serial terminal on the MCU-Link VCOM port at 115200 baud 8N1.
Press reset. The example will read the NAND ID, erase a block, program a page, read it back, and print the results.
Pass criteria: all operations complete without errors and the read-back data matches the written data.
If this passes, the hardware rework (R1872–R1879) is electrically correct and the NAND software layer that SEC depends on works. Please proceed to SEC flashing.
swetha_v_1-1779205885702.png
3 Build a NAND-Bootable Application in MCUXpresso IDE
NAND is block-oriented; the CPU cannot execute directly from it. The application must be RAM-linked (non-XIP), and the ROM will copy it into RAM before jumping.
3.1 Import the SDK Example
Install SDK_26.03.00_MIMXRT1170-EVKB into MCUXpresso IDE (drag the ZIP into “Installed SDKs”).
File → Import → MCUXpresso SDK Examples.
Board: MIMXRT1170-EVKB; core: CM7.
Select the iled_blinky example for initial bring-up.
Click Finish.
3.2 Configure Project for RAM-Linked (Non-XIP) Build
Right-click project → Properties → C/C++ Build → MCU settings:
In Memory details, set default RAM to ITCM/OCRAM/SDRAM as shown in below images. Move the corresponding RAM to the lower line of the Flash item, below BOARD_FLASH using the arrows on the right.
Since the BootROM uses the first 8K of the linked RAM during image copying, in this step, the start address is offset by 0x2000 and the size is modified accordingly.
Setting default RAM to ITCM:
swetha_v_2-1779205885730.png
Setting default RAM to OCRAM:
swetha_v_3-1779205885759.png
Note: There is no limitation when linking the image text section to ITCM, DTCM, or SDRAM for non-XIP boot. However, when linking the image text section to OCRAM (0x2020_0000 – 0x203F_FFFF), one limitation applies: the region 0x2024_0000 – 0x2024_BFFF must be reserved as this is the ROM RW region. If the image text section is linked into the ROM RW region, the ROM routine will be corrupted during image copying.
swetha_v_4-1779205885777.png
Setting default RAM to SDRAM:
swetha_v_5-1779205885807.png
Note: This option requires an XMCD (External Memory Configuration Data) block in the boot image.
Then C/C++ Build → Settings → MCU C Compiler → Preprocessor, add or change:
XIP_BOOT_HEADER_ENABLE=0
XIP_EXTERNAL_FLASH=0
In the project’s Settings tab (project root), check “Link application to RAM”.
swetha_v_6-1779205885863.png
4 Build the Bootable Image in the SEC Tool
4.1 Create the SEC Workspace
Launch MCUXpresso Secure Provisioning Tool
File → New workspace → choose a folder
Processor: MIMXRT1176 (RT1170-EVKB)
Boot type (toolbar): Unsigned
Boot device (toolbar): SEMC NAND
LC: Open, HAB disabled
swetha_v_7-1779205885887.png
4.2 Configure SEMC NAND device parameters for Micron MT29F2G08ABAGAH4-IT:G
Select Target → Boot Memory … to open Boot Memory Configurations
swetha_v_8-1779205885915.png
Based on MT29F2G08ABAGAH4 datasheet, its default ECC is off, so we need to do the below ECC settings:
swetha_v_9-1779205886059.png
4.3 Build the bootable image
Go back to the MCUXpresso IDE and build the iled_blinky project. Upon successful build, an axf file will be generated. You may find it in …\MCUXpressoIDE_25.6.136\workspace\evkbmimxrt1170_iled_blinky_cm7\Debug
Navigate back to Secure Provisioning Tool → Build image
Source executable image → Browse → …\MCUXpressoIDE_25.6.136\workspace\evkbmimxrt1170_iled_blinky_cm7\Debug\evkbmimxrt1170_iled_blinky_cm7.axf
Start address: Needs to correspond to the start address set in Memory Configurations in Part 3.2
If linking the application to SDRAM, check XMDC → SEMC SDRAM
DCD (binary): None
Click Build Image
Status of the command is shown in the log and the bottom of the screen:
swetha_v_10-1779205886160.png
5 Put the Board in Serial Downloader Mode
Before SEC can write to NAND, the RT1176 ROM must be in SDP mode.
5.1 Boot Mode for Serial Downloader
SW1 = OFF-OFF-OFF-ON (BOOT_MODE[1:0] = 01)
The boot mode is selected based on the binary value stored in the internal BOOT_MODE register, and switch SW1-3 and SW1-4 are used to select the boot mode on the MIMXRT1170 EVKB board.
SW1-1
SW1-2
SW1-3
SW1-4
BOOT_MODE
Mode
OFF
OFF
OFF
ON
01
Serial Downloader
OFF
OFF
ON
OFF
10
Internal Boot
5.2 Connect and Verify
Power off the board (SW5 OFF).
Set SW1 as shown above.
Connect a USB cable to J20 (USB OTG1, primary USB per the schematic)
Power on (SW5 ON) and press SW4 (reset).
Windows Device Manager should show an HID device with VID=0x1FC9, PID=0x013D. This is the RT1176 ROM’s SDP interface.
6 Burn Fuse for the EVKB’s NAND
This step is NAND-specific. Per RM Table 10-20 (Fuse definition for Parallel NAND over SEMC), for the RT117x ROM to load an image from this NAND with ECC protection and valid bad-block detection, one fuse must be burned for reliable NAND boot on the EVKB’s Micron NAND.
6.1 The Fuse
Attribute
Value
Register
BOOT_CONFIG_MISC2[31:0]
Offset
0x0C80
Bit to burn
Bit 24
Bit value
1
Value to burn for EVKB
1 (register = 0x01000000)
Without this burn, the ROM reads pages without ECC correction. Because the Micron NAND writes ECC-protected data only when ECC is enabled, any data written via the SDK with ECC enabled would appear as uncorrected bytes + parity. With ECC off, even small bit-errors become uncorrectable read failures, and bad-block detection via ECC status is unreliable.
6.2 Test Connection
Click Test connection. The expected result is shown in the screenshot below.
swetha_v_11-1779205886273.png
6.3 How to Burn the Fuse via SEC
Ensure the board is in SDP mode, with USB connected to J20.
In the SEC workspace, open Build image → OTP configuration.
Read the current values from the processor.
Locate BOOT_CONFIG_MISC2[31:0] at offset 0x0C80.
In the Required value column, enter 0x01000000.
Ensure there is no “*” (unknown) in any bit of the current or required value.
Select Advanced Mode → Generate script, to confirm that only MISC2 bit 24 will be written.
Select Advanced Mode → Burn to execute the burn.
Read the fuses back and verify that BOOT_CONFIG_MISC2 = 0x01000000 and that other fuses remain unchanged. Click OK.
swetha_v_0-1779206602330.png
swetha_v_13-1779205886328.png
swetha_v_14-1779205886431.png
7 Write the Bootable Image to NAND via SEC
At this stage, every item in the Build image tab should be checked green.
swetha_v_15-1779205886625.png
Switch to the “Write image” view.
Use built image: checked.
Connection type: USB (ensure that the device remains in SDP mode and is connected).
Click Write image.
swetha_v_16-1779205886676.png
8 Configure Boot Switches for Internal Boot from SEMC NAND
8.1 Power Off
Slide SW5 to OFF.
8.2 Set BOOT_MODE to Internal Boot
SW1 = OFF-OFF-ON-OFF (BOOT_MODE[1:0] = 10)
8.3 Set BOOT_CFG1 for SEMC Parallel NAND
SW2 = OFF-OFF-OFF-OFF-ON-OFF-OFF-OFF
SW2 position
BOOT_CFG1 bit
Value
SW2-1
BOOT_CFG[0]
0 (OFF)
SW2-2
BOOT_CFG[1]
0 (OFF)
SW2-3
BOOT_CFG[2]
0 (OFF)
SW2-4
BOOT_CFG[3]
0 (OFF)
SW2-5
BOOT_CFG[4]
0 (OFF)
SW2-6
BOOT_CFG[5]
1 (ON)
SW2-7
BOOT_CFG[6]
0 (OFF)
SW2-8
BOOT_CFG[7]
0 (OFF)
SW2-9
BOOT_CFG[8]
0 (OFF)
SW2-10
BOOT_CFG[9]
0 (OFF)
This is the EVKB-specific setting that selects SEMC Parallel NAND as the boot device.
9 Boot and Verify
Slide SW5 to ON.
Press SW4 (reset).
The on-board user LED should blink, confirming that the application has booted successfully from SEMC NAND.
References
AN14069 — How to Enable Non-XIP Boot on i.MX RT Series EVK Board.
IMXRT1170RM — i.MX RT1170 Reference Manual.
MIMXRT1170-EVKB Hardware Development User Guide and Board Schematic.
Micron MT29F2G08ABAGAH4 NAND Flash Datasheet.
MCUXpresso Secure Provisioning Tool User Guide.
This article describes the end-to-end procedure for booting a non-XIP application from SEMC parallel NAND flash on the MIMXRT1170-EVKB.
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