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S32G read Serial Number Hello     How can I read the S32G serial number on Linux? Re: S32G read Serial Number Hello, @liuchi  Thanks for your post. On Linux, you may try using the devmem2 to read the register value from 0x400a4210/214 to find the very number for your SOC. BR Chenyin 
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FreeMASTER 应用程序命令和变量刺激 您好, 是否有办法了解如何在 FreeMASTER 上使用应用程序命令和变量刺激?是否可以 通过它们 发送命令或操作变量 ? 谢谢! 西蒙 Re: FreeMASTER Application Commands and Variable Stimulus 感谢您关注我们的产品并为我们的社区做出贡献。 对于你的其他门票,我假设你使用的是 S32K3 设备。 请访问FreeMASTER页面-> Downloads -> FreeMASTER Communication Driver 3.0 for S32K3 -> 1.4.2 RFP 请在每个代码包的版本说明之前查看软件依赖关系和流程安装。 安装软件后,您将找到一些可以作为参考的示例: 如果您使用其他设备和/或有更多与 FreeMaster 相关的问题,我们有一个专门的论坛,该主题的专家可以为您提供帮助。请大家将相关问题转到以下社区: FreeMASTER技术论坛 感谢您的理解,希望这些信息对您有所帮助。
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Reallocation FlexRAM Hi I'm trying to reallocate the FlexRam to be DTC = 128KB, ITC = 64KB, OC = 64KB on i.mxrt 1024 I did these changes    I also modified the linker file to fit with these changes. Now it works, but my question is about these two lines "LDR R0, =0x20001fff\n" // load initial value of stack pointer into R0 "MSR MSP, R0\n" // Reinitialize stack pointer by new value Why without these lines it doesn’t work even if I modified the linker so _vStackTop must be up to date! i.MXRT 102x Re: Reallocation FlexRAM Please refer to this post for more details on why SP is reset: RT1176 ROM code does not set stack pointer correctly - NXP Community BR, Omar
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FS23 SBC AUTOSAR R21-11 バージョン 0.9.0 リリース ノートに記載されているすべての手順に従って、DS3.5 環境に FS23 SBC AUTOSAR R21-11 バージョン 0.9.0 をインストールしました。 ただし、パッケージは SDK に表示されません。 私のセットアップの詳細は次のとおりです。 対象ボード: S32K311 RTDバージョン: 3.0 FS23 SBC AUTOSAR R21-11 バージョン: 0.9.0 開発スタジオバージョン: DS3.5 インストール パスを確認し、リリース ノートのすべての手順に従いましたが、SDKs にはまだ FS23 SBC コンポーネントがリストされません。 SDK で表示できるようにするための解決策またはアップデートを提案していただけますか? Re: FS23 SBC AUTOSAR R21-11 Version 0.9.0 こんにちは@raghunandanreddy 、 FS23 の IP コンポーネントは 0.9.0 パッケージでは利用できません。 代わりに FS23 1.0.0 + RTD 4.0.0 を使用することをお勧めします 。 1.0.0 パッケージでは、IP コンポーネントと MCAL コンポーネントの両方と、サンプル ルーチンが利用可能です。 更新サイトの生成プロセス中にFS23 パッケージが FS26 を上書きするというバグもありましたが、これは後にバージョンS32K3xx_SBC_FS23_R21-11_1.0.0_DS_updatesite_D2402_updated_D250115.zip で修正されました。 よろしくお願いします、 ジュリアン
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XGATE 信号问题 MC9S12XEP100、CW 特别版、USBDM、RAM 中的 XGATE、可重定位汇编器编码。 我有一个用绝对汇编程序编写的项目,其中使用了大量中断。现在运行得很好,但我想结合 XGATE 来处理大部分(如果不是全部)中断。为什么?也许只是想看看我能不能做到。为此,我已经能够将项目转换为可重置汇编程序(这对我来说并不容易),但它似乎可以工作。 无论如何,我花了很多时间研究参考手册和 AN2685,但我仍然不太清楚 XGATE 信号量的基础知识。 当我更改中断服务例程,使其由 XGATE 而不是 CPU 提供服务时,我读到 semaphores 需要参与其中,但我不清楚在什么情况下。 是否只有在 XGATE 服务的 ISR 中修改变量和 CPU 服务的 ISR 中修改变量时才需要使用它们? Or。 另外,当一个变量在 XGATE 服务的 ISR 中被修改,但它只被 CPU 使用而未被修改时? 此致, 罗伯特 Re: XGATE semaphore question 你好,拉迪斯拉夫 谢谢你的澄清。我想应该是这样的,但我不确定。 此致, 罗伯特 Re: XGATE semaphore question 您好, 只有当两个内核(S12X 和 XGATE)访问相同的共享资源(通常是 RAM 中的变量)时,才需要 Semaphores。需要它们来避免两个内核同时进行 R/W 操作。例如,CPU 分一到两步写入某些数据,XGATE 在同一时刻读取这些数据。数据一致性得不到保证。 在下列情况下使用信号传递器 XGATE 和 S12X ISR 都会修改变量。 例如由两个内核更新的状态标志或计数器。或写入端口。 一个核心修改一个变量,另一个核心读取另一个变量,而且读取必须一致。 示例缓冲区索引由 XGATE 更新,并由 S12X 在循环中读取。 在下列情况下,您不需要 semaphores 变量仅由 XGATE 修改,仅由 S12X 读取,一致性并不重要(例如,偶尔的陈旧读取是可以接受的)。 一个变量只能被一个核心访问(读取或写入)。 注意,我发现我的旧代码如下。这对某些面具套件可能并不重要,但最好还是实施一下,以确保它在所有地方都能正常工作。 .... *.cxgate模块 中断 void PIT0isr(void) { //--- 受保护软件区域开始 // AN2685.pdf //----------------------------------------- // 使用这个 asm LOOP1: asm SSEM #0 // 尝试锁定寄存器 0 asm SSEM #0 // 由于内部硅错误,再次尝试锁定寄存器 0 // asm BCC LOOP1 // 锁定后重试 //----------------------------------------- //or this //asm SSEM #0 // 尝试锁定寄存器 0 //asm SSEM #0 // 由于内部硅错误,再次尝试锁定寄存器 0 // //asm BCC PIT0isr_RTI // 返回时不清除标志,以便为优先级更高的中断提供服务 //----------------------------------------- .... ..... .... //--------------------------------------------------------------------------------------------------------------------------------------------------- | #0 asm PIT0isr_RTI: //----------------------------------------- PITTF = 0x01; // 清除 PIT0isr 的中断标志 } 顺祝商祺! 拉吉斯拉夫
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i.MXRT1180-EVK: Cannot set a breakpoint in CM33 project I’m using the i.MXRT1180-EVK board with Keil uVision and the CMSIS-DAP ARMv8-M Debugger to debug the hello_world_cm33 multicore project. I can step through the code, but when I set a breakpoint and press the Run button, the command window displays the message “Cannot access memory (@0x2800F3E0, Read, Access Size: 2 Bytes)” and the program crashes. Please note that I’m using the original example project, and I build the hello_world_cm7 project before starting the debugging process for the hello_world_cm33 project. The i.MXRT1180-EVK board is setup to BOOT_MODE[2:0] - 100 FlexSPI quad SPI serial NOR. What do I have to do to use breakpoints in my project? Re: i.MXRT1180-EVK: Cannot set a breakpoint in CM33 project Hi @pat24, What process are you doing to import the examples, and build these projects? Are you making sure to create a multi-core workspace? Are you making sure to build first the secondary core (cm7) and then the primary core (cm33)? Please see the process on how to run a multicore application on Keil here: Run a demo using Keil MDK/μVision — MCUXpresso SDK Documentation Although for the RT1170, it is the same process for RT1180. BR, Edwin. Re: i.MXRT1180-EVK: Cannot set a breakpoint in CM33 project I also have no problem with MCUXpresso, but I have to use the Keil uVision and I cannot switch to MCUXpresso. I use the Keil uVision Pack Installer with the package NXT::MIMXRT1189_DFP – 25.09.00-pvw2 (2025-08-12). It seems to me that we are using the same device specific package. I have tried a Segger Flasher Portable PLUS debugger, and it works with the hello_world_cm33 project but it doesn’t work with the hello_world_cm7. The project hang up in a tasks.c at startup. It is not possible to debug anything.                                            Onboard debugger                         Segger hello_world_cm33         no Breakpoint possible                    works hello_world_cm7            works                                                  hang up in a task at startup Re: i.MXRT1180-EVK: Cannot set a breakpoint in CM33 project Hi @pat24, I imported the multicore hello world example projects from the MIMXRT1180-EVK SDK v25.09.00. Are you also using this SDK release? I ran the example and placed a breakpoint on the main.c file of the cm33 project, and it stopped at the breakpoint without any error messages. That said, I did this on MCUXpresso. Could you try doing this on MCUXpresso in order to make sure it is not an issue with the hardware or with the example projects, but rather with your IDE settings? BR, Edwin. Re: i.MXRT1180-EVK: Cannot set a breakpoint in CM33 project Thank you for your reply. I can set a breakpoint in the hello_world_cm7 project, but it doesn't work in the hello_world_cm33 project, even after clearing all the flash memory. I've tried several times. Could you please reproduce my debugging problem? It's a sample project from Keil and I'm using the i.MXRT1180-EVK board. Re: i.MXRT1180-EVK: Cannot set a breakpoint in CM33 project Hi @pat24, Try doing a mass erase, delete the "debug" folder on your project, and finally clean your project before rebuilding and re-flashing your board. If you are not able to do a mass erase, please follow these steps: RT board recovery for debugger connect issues - NXP Community BR, Edwin.
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用于 RW610 的 Zephyr BLE 示例 您好, 我正在努力开发一款基于 RW610 的自定义板。到目前为止,我已经在板上测试了 I2C、SPI 和 UART。该项目基于 Zephyr,下一步将测试 BLE。 首先,无法导入 RW610 的示例,因为该芯片没有专用的开发板。我尝试使用 FRDM-RW610 板作为参考,通过传递补充叠加文件根据我的自定义板配置引脚,还根据需要配置了外围设备。我尝试了多种启用 BLE 的方法,但都无效。 peripheral_ht "示例可以在 FRDM-RW612 上直接运行,但在 RW610 上,即使进行了配置,同样的示例也无法运行。 我提到了这个问题以供参考。 在串行调试中,我收到以下错误: ASSERTION FAIL [err == 0] @ WEST_TOPDIR/zephyr/subsys/bluetooth/host/hci_core.c:504 Controller unresponsive, command opcode 0xfc61 timeout with err -11 [00:00:16.717,989] os: r0/a1: 0x00000003 r1/a2: 0x00000000 r2/a3: 0x00000002 [00:00:16.717,992] os: r3/a4: 0x00000003 r12/ip: 0x00000010 r14/lr: 0x10045e9f [00:00:16.717,994] os: xpsr: 0x01000000 [00:00:16.717,997] os: Faulting instruction address (r15/pc): 0x10045eae [00:00:16.718,004] os: >>> ZEPHYR FATAL ERROR 3: Kernel oops on CPU 0 [00:00:16.718,010] os: Current thread: 0x100b48a8 (unknown) [00:00:16.777,075] os: Halting system Re: Zephyr BLE examples for RW610 如果定制板,恩智浦需要审查设计并确保定制板符合我们的要求。 Re: Zephyr BLE examples for RW610 你好@snjy 该芯片没有专用的开发板。 你在用 rw610 定制板吗?我们提供 frdm 板 和 evk 用于开发,我们的合作伙伴有基于 rw61x 的模块。 顺祝商祺! 肖恩
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can-fd を使用する場合、MB 数をどれくらいに設定すればよいですか? 私はs32ds rtd 4.0.0とs32k344を使用しています ペイロード サイズを 8 に設定すると、can-fd を使用するための開発はすでに完了しています。 ただし、can-fd がサポートされているペイロードは 64 バイトです。 SO、ペイロードを 64 バイト、MB 数を 31 に設定すると、エラーが発生しました。 CAN-FD で 64 バイトのペイロードを使用する場合、MB 数をいくつに設定すればよいですか? よろしくお願いします。 Re: how much i set Number of MB when i use can-fd? こんにちは、 64 バイトのペイロード設定のCASE、RAM ブロックは最大 7 MB を保持CAN。 FlexCAN 1 には 2 つの RAM ブロック (64 MB @8 バイトのペイロード) があるため、構成できる MB の数は最大 14 になります。 BR、ペトル
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RSA Verification of Signature of CA X509 Certificate for authenticity Hi @lukaszadrapa, I have created a CA self-signed certificate through which I need to build an application where i need to verify the signature of the certificate by its public key. This is my application code, and I'm facing a verification failed error code: int main(void) { /* ========================================================== * 1.  Initialize environment and hardware security module * ========================================================== */ WaitForHSEFWInitToFinish();   /*Key Handle for ECC key pair in NVM Catalog*/ hseKeyHandle_t g2b_keyPairHandler = GET_KEY_HANDLE(HSE_KEY_CATALOG_ID_NVM, 0, 0); /*Key Handle for Public Key in RAM catalog*/ hseKeyHandle_t g2b_keyPubHandler = GET_KEY_HANDLE(HSE_KEY_CATALOG_ID_RAM, 0, 0);   /*Formats the Key catalogs */ g2b_HSE_Status = FormatKeyCatalogs(g2b_nvmKeyCatalog_rsa, g2b_ramKeyCatalog_rsa);   /*Initializes the Key Allocator Driver for Hanfdling Keys in the framework*/ g2b_HSE_Status = HKF_Init(g2b_nvmKeyCatalog_rsa, g2b_ramKeyCatalog_rsa);   /* ========================================================== * 2.  Load the CA certificate (in PEM format) * ========================================================== */ static const char *ca_pem = "-----BEGIN CERTIFICATE-----\r\n" "MIIDhDCCAmygAwIBAgIINYKWbrYzIuEwDQYJKoZIhvcNAQELBQAwSDELMAkGA1UE\r\n" "BhMCSU4xJzAlBgNVBAoTHkdldHRvYnl0ZSBUZWNobm9sb2dpZXMgUHZ0IEx0ZDEQ\r\n" "MA4GA1UEAwwHUm9vdF9DQTAeFw0yNTEwMjgxMTQ0MDBaFw0zNTEwMjgxMTQ0MDBa\r\n" "MEgxCzAJBgNVBAYTAklOMScwJQYDVQQKEx5HZXR0b2J5dGUgVGVjaG5vbG9naWVz\r\n" "IFB2dCBMdGQxEDAOBgNVBAMMB1Jvb3RfQ0EwggEiMA0GCSqGSIb3DQEBAQUAA4IB\r\n" "DwAwggEKAoIBAQC5+qqEb+wIDQTG7mgAAgXdH9eM1PjuR34e4qDZDTW7aRukWt0I\r\n" "Whwef6NbfXV51N/CI+4+446sND4jW8Y4tK8h7i+QJBaTx3sdDyBO3JNthpp/uUtt\r\n" "+2EUGJP8tKNiP1GhhAjjCMmHwrY3kqyAzXKiCdRFGnWOdQvae6QfgTogDGoXwfEj\r\n" "IGRfOAXZYOLo/+PTm7AZvF+eWSGnXV3mnvP0FimE/NhBdJwL3T8AoxaMW+jNWRTf\r\n" "XV5NAZili62U7Va/BdGSw3Vrbf70O3S7nbnQWmHJTKrZT8CjUft2fVXpsNWJ+lAp\r\n" "cWqRrOtY5Ux5sO2ke5l52vXVrWckwSHESCCjAgMBAAGjcjBwMA8GA1UdEwEB/wQF\r\n" "MAMBAf8wHQYDVR0OBBYEFOaB3KdlqOw1UgifcfwjaAQmyoHjMAsGA1UdDwQEAwIB\r\n" "BjARBglghkgBhvhCAQEEBAMCAAcwHgYJYIZIAYb4QgENBBEWD3hjYSBjZXJ0aWZp\r\n" "Y2F0ZTANBgkqhkiG9w0BAQsFAAOCAQEAtkNO6oP39gHMzH6Zz53dOs6zqJbrZFab\r\n" "w1ekLN30hwAbC9v32zp9Elq1zFnZRQAeILOYTpeR2ejD2PgpZATeYhH9w93OgDgx\r\n" "/CWtDQAcYN/kOvIzAaFGBY3+QoRsOTzggLNNehhO4ZhevBjRS6QWsJDY1RaAp8ss\r\n" "9QWJnuYtkfUAtfqDD3jGC3VsE9h5dBQn4JG0REeC7go6S7D+ofzzgBDbK/gwdFcr\r\n" "YnS4e9Mse0D1RQjFEaEKibB0hX7L3uEAzVIDCS2lD/0jzwCLxQ1xhFooVzv5Tb4k\r\n" "nRr+v8ht/baCu3vtZEeGxM8/IeP3ttjavdNnb/IiCS2nVgj/YfzNDw==\r\n" "-----END CERTIFICATE-----\r\n"; pem_cert_to_der(ca_pem, &ca_der, &ca_der_len);   /* ========================================================== * 3.  Parse the CA certificate to extract important fields * ========================================================== */   int rc = simple_x509_parse_der(ca_der, ca_der_len, &c); if (rc) { /* If this fails, the certificate is malformed or unsupported. */ }   /* ========================================================== * 4.  Locate critical ASN.1 slices for verification * ========================================================== */   if (simple_x509_locate_core(ca_der, ca_der_len, &tbs, &tbs_len, &sig_oid, &sig_oid_len, &sig, &sig_len) != SX_OK) { printf("Locate core failed\n"); return -1; }   /* ========================================================== * 5.  Extract the CA's own public key (SPKI bits -> N, E) * ========================================================== */   simple_x509_locate_spki_bits(ca_der, ca_der_len, &spki_bits, &spki_len); rsa_pub_init(&ca_pub);   /* ========================================================== * 6.  Map signatureAlgorithm OID → RSA + SHA256 scheme * ========================================================== */   sig_params_t scheme = map_sig_oid(sig_oid, sig_oid_len);   g2b_HSE_Status = HashReq(HSE_ACCESS_MODE_ONE_PASS, 0U, 1U, HSE_HASH_ALGO_SHA2_256, 0U, (uint32_t) tbs_len, tbs, &hash_len, hash, txOptions, HSE_SGT_OPTION_NONE);   uint16_t modulus_len = ca_pub.N_len * 8; uint16_t exponent_len = ca_pub.E_len; g2b_HSE_Status = LoadRsaPublicKey(&g2b_keyPubHandler, 0U, modulus_len, ca_pub.N, exponent_len, ca_pub.E);   g2b_HSE_Status = RsaPkcs1v15VerSrv(g2b_keyPubHandler, HSE_HASH_ALGO_SHA2_256, (uint32_t) tbs_len, tbs, FALSE, HSE_SGT_OPTION_NONE, (uint32_t) &sig_len, sig);   rsa_pub_free(&ca_pub);   /* Demo end: stay alive*/ for (;;) {   }   /* Unreachable */ /* return 0; */ } Re: RSA Verification of Signature of CA X509 Certificate for authenticity Hi @R_S002  I saw that you accepted my previous reply as a solution. Does it mean you solved the problem? I wanted to check it today, so please confirm if it is still active issue or not.  Thanks, Lukas Re: RSA Verification of Signature of CA X509 Certificate for authenticity hi @lukaszadrapa  Actually, I built this complete code step by step, only by verifying every step before moving to the next. Therefore, i dont think/expect there is any issue above the signature verification step. Also, you can build and run this code directly into the DS, cause intermediate data are pointers. Therefore, copying and pasting them here is tedious. If you want, I can drop PEM files of the certificate and public key. It is an urgent development so your quick revert will be really helpful. Re: RSA Verification of Signature of CA X509 Certificate for authenticity Hi @R_S002  Just to clarify, have you tried verifying each step of the process individually – maybe by comparing the intermediate results with OpenSSL? That might help pinpoint where things diverge. If possible, could you share the intermediate data (tbs, signature, public key…) you got? Regards, Lukas
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MIMXRT1020-EVK - Unable to interface with ROM bootloader via UART Hello, I'm looking for a sanity check and advice for communicating with the ROM bootloader on the MIMXRT1020-EVK via UART. I'm planning on using an RT1020 in a project, and before I do, I want to make sure I have the hardware interfacing understood. My setup for interfacing with the ROM bootloader: SW8/boot config set to 0b0001 (0b01 boot config for Serial Downloader) All JTAG jumpers (J44-J50) removed  UART interface connected TX to GPIO_AD_B0_07 and RX to GPIO_AD_B0_06 Tried powering from J2, J9, and J23 separately So far, I've been trying to use blhost to get a ping response. I've tried power cycling and connecting with and without UART connected then running blhost -p /dev/tty.usbserial-FT99ICPP,115200 -- get-property 1 but every time I get the response "No response received for ping command". Looking at my logic analyzer, I see no signal changing on my RX line. In addition to this, I've successfully loaded the Flashloader project and been able to interface with that. I've also ported, built, and flashed the second bootloader from the AN12604 app note. So I feel confident I have the UART interface working, since they should all use the same LPUART1 configuration. What might I be missing that could explain why I'm unable to interface with the ROM bootloader? I've seen mfgtools mentioned, but I can't seem to get it to recognize my dev board in my windows VM (SE Blank RT Family does show up as a connected device in the VM, but doesn't list with uuu.exe -lsusb). I've also seen sdphost mentioned, but I was unsure if it works with the RT1020 since it's not listed here (https://mcuxpresso.nxp.com/mcuxsdk/latest/html/middleware/mcu_bootloader/docs/iMXRT1020_Flashloader_Release_Notes/topics/host_tools.html). I've also been operating under the assumption the ROM bootloader responds to SDP the same way flashloader and second bootloader do, and maybe that's my mistake? i.MXRT 102x Re: MIMXRT1020-EVK - Unable to interface with ROM bootloader via UART Thank you for your updated information. If you meet any issue in the future, welcome to create the new question post. Re: MIMXRT1020-EVK - Unable to interface with ROM bootloader via UART Thank for you, @mayliu1 , I did not realize ROM bootloader communication was completely different from communicating with the flashloader or second bootloader. I was able to communicate with the ROM bootloader using sdphost. Re: MIMXRT1020-EVK - Unable to interface with ROM bootloader via UART Hi @rob-RL , Thank you so much for your interest in our products and for using our community. First,  I think your Setup Looks mostly correct, you set  RT1020 chip Boot Mode as  serial downloader mode, and also  UART  interface is correct. Second, I suggest you use Sdphost instead of blhost. 1:  blhost is used after the ROM bootloader has responded and is ready to accept commands. 2:  sdphost is used to initiate communication with the ROM bootloader using the Serial Download Protocol (SDP). Wish it helps you. If you still have question about it, please kindly let me know.  Best Regards MayLiu
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PN7150はISO 14443-4カードを完全に検出できません こんにちは、 PN7150 と libnfc-nci と組み合わせたあるタイプの RFID カードに問題があります。リーダーはカードを発見しません。 カードの詳細は次のとおりです(PlayStore アプリの NFC ツールを使用して決定されます)。 EMマイクロエレクトロニクス タグタイプ: ISO 14443-4 テクノロジー: IsoDep、NfcA カードを提示すると、libnfc-nci のデバッグ出力には次のように表示されます。 2025:11:04-11:18:47.496 NxpTml: PN54X - I2C 読み取りに成功しました..... 2025:11:04-11:18:47.496 NxpNciR: len = 4 > 600701A1 2025:11:04-11:18:47.496 NxpTml: PN54X - 読み取りメッセージを投稿しています..... 2025:11:04-11:18:47.496 NxpHal: 読み取り成功ステータス = 0x0 2025:11:04-11:18:47.496 NxpFunc: NfcAdaptation::HalDeviceContextDataCallback: len=4 2025:11:04-11:18:47.497 NxpTml: PN54X - 読み取りが要求されました..... 2025:11:04-11:18:47.497 NxpTml: PN54X - I2C 読み取りを呼び出しています..... 2025:11:04-11:18:47.497 NxpFunc: Nfc: プロセスイベント情報 mt:3 2025:11:04-11:18:47.497 NxpFunc: Nfc: NFC 受信 ntf gid:0 2025:11:04-11:18:47.497 NxpFunc: Nfc: nci_proc_core_ntf オペコード:0x7 2025:11:04-11:18:47.497 NxpFunc: Nfc: nfa_dm_nfc_response_cback() イベント情報=0x500d 2025:11:04-11:18:47.497 NxpFunc: Nfc: nfa_dm_disc_data_cback() 2025:11:04-11:18:47.497 NxpFunc: Nfc: nfa_dm_disc_sm_execute(): 状態: 1、イベント情報: 10 ディスクフラグ: 0x1 2025:11:04-11:18:47.497 NxpFunc: Nfc: nfa_dm_disc_sm_execute(): 新しい状態: 1、disc_flags: 0x1 libnfc-nci.conf の内容は次のとおりです。 APPL_TRACE_LEVEL=0xFF プロトコル_トレース_レベル=0xFF HOST_LISTEN_TECH_MASK=0x07 ポーリングテクノロジーマスク=0xEF P2P_LISTEN_TECH_MASK=0x00 MIFARE Classic や DESFire などの他のカードは問題なく検出されます。 この問題を解決する方法について何かアイデアを持っている人はいますか? よろしくお願いいたします。 🙂 Re: PN7150 can't discover my ISO 14443-4 card completly こんにちは、 デバイスは RF レベルでカードを検出しますが、カードのアクティベーションがありません。これはおそらく、スタック内のカードのフィルタリング/拒否、またはタイムアウトに関連している可能性があります。サードパーティ製のカードを使用しているため、カードの製造元が提供するドキュメントに基づいて、ソフトウェアにこのデバイスのサポートを実装する必要がある場合があります。 サポートチケットも送信されたことに気付きました。情報の混乱を避けるため、社内チケットでコミュニケーションを続けてください。 よろしくお願いいたします。 エドゥアルド。 Re: PN7150 can't discover my ISO 14443-4 card completly こんにちは@EduardoZamoraさん、 情報はありがたいのですが、その製品はすでにマーケットに出回っています。新製品ではPN7160を採用します。 添付されているのは、PN7150 で認識されないタグの TagInfo データを表示した、NXP の NFC TagInfo アプリのスクリーンショットです。 開発キットは使用していません。これはカスタム ボードです。 はい、現在、libnfc-nci を実行する Linux システムを使用しています。 よろしくお願いします、 サイモン Re: PN7150 can't discover my ISO 14443-4 card completly こんにちは@simon0815 あなたの調子が良いといいのですが。 PN7150 は新しいデザインには推奨されませんのでご了承ください。代わりにPN7160を使用することをお勧めします。 ひょっとすると、 OM5579などの PN7150 用開発キットを使用していますか、それともカスタム ボードですか?また、アプリケーションは、AN11697 PN71xx Linux ソフトウェア スタック統合ガイドラインに記載されているソフトウェアとドライバに基づいていますか? カードの詳細を取得するには、 NXP の NFC TagInfo アプリを使用してみてください。 よろしくお願いいたします。 エドゥアルド。
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IGMP Snooping with SJA1110 Hello, I have an S32G with SJA1110 running bsp43 and am trying to enable IGMP snooping to dynamically route multicast streams.  I have identified a few unique issues related to IGMP which I am not sure how to resolve.  I have confirmed that disabling IGMP snooping causes multicast packets to flood the switch, so the IGMP snooping option is doing something...  Just not the expected behavior. Multicast traffic is always forwarded to the lowest enumerated active port A stream egressing on port 4 with a node on port 3 requesting that traffic through IGMP will cause traffic to egress through port 1 (if that link is active) as if port 1 had requested the traffic.  If the port 1 link is not active, traffic will be forwarded to port 2 if that link is active. I am able to manually route the traffic with mdb, but my expectation is that IGMP snooping should be managing this automatically Enabling multicast-querier does not cause membership queries to egress the switch ports There are  IGMP queries on the DSA bridge interface, but no IGMP queries are visible on other links connected to the switch I suspect I may need to set up a tc rule to trap IGMP queries from the bridge port and redirect them to the switch ports? I'm not clear if this is some issue with Linux configuration or a limitation from switch hardware. Thanks for any suggestions. Re: IGMP Snooping with SJA1110 Hello @sg_cnh, Thanks for understanding and reposting your question in the other forum. Let me know if there is something else you need support with. Re: IGMP Snooping with SJA1110 Thanks for the reply.  I have reposted to the other forum you suggested. Re: IGMP Snooping with SJA1110 Hello @sg_cnh, Thanks for reaching out to us. About your question, the IGMP is not a feature we can support in the S32G community, as far as I can tell the IGMP is done over IP, it is not related to the S32G itself, I checked the GMAC, PFE modules and the SJA1110 chip and none of them include direct support or examples for that feature. You may get some guidance in Other-NXP-Products, where the support engineers for the SJA1110 can help you. I apologize for the inconveniences. 
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S32DS 文件夹被划掉 在截图中,你可以看到一些文件和文件夹有一条线穿过。这句话是什么意思?我以为该文件不可用,但它有预期的内容,所以我不知道为什么会有这一行。 谁能解释一下 "划掉 "的含义? Re: S32DS folders crossed out 你好@ekmas-19、 eclipse 中划掉的图标表示该文件被排除在项目的版本路径中:eclipse-什么会导致我的源文件在文件图标上用删除线显示为灰色?-堆栈溢出。 通常情况下,.mex.NET 会使用.mex.NET、描述 .txt文件、YAML 配置等不包含在版本中,因为它们不是必需的。如果你需要添加文件,请右键单击它并选择 " 版本路径-> 添加到-> *版本名称* ": 致以最诚挚的问候, Julián
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After modifying the .ld file, both the sram_data and sram_bss segments have shifted backwards. First, allocate a p_flash area in memory for storing data during power loss. int_flash : ORIGIN = 0x0043E000, LENGTH = 0x2000 And place this area in SECTIONS for declaration. Fix a struct at this position The left side is where the structure is fixed to the p_flash area, while the right side is not fixed. It seems that the data in the sram_bss and sram_data areas have been pushed to the end. Before the data was fixed to 0x0043E000, the initialization data for these global variables was stored starting at 0x00426420. After the data was fixed at 0x0043E000, the storage location for the initialization data of these global variables shifted to start at 0x0043E100. What I want to know is why the data is shifted to this position. Also, I have already partitioned out this 8K area, but why is there still other data stored in it? During later use, because these data are on the same page, erasing and writing operations were performed, which led to the entry into HardFault_Handler. Thank you all for your support. Re: After modifying the .ld file, both the sram_data and sram_bss segments have shifted backwards. According to your description it behaves exactly how you set it up in the linker. I don't understand relation to bss/sdata, you haven't taken screenshot of this section completely and what you changed there and why.
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LPC4088FET180 I2C1ピン - マイクロの電源が入っていないときの入力インピーダンスと電流シンク こんにちは、 シングルボードコンピュータ (SBC) デザインで LPC4088FET180 マイクロを使用しています。このボードには RTC チップも組み込まれています。このチップは、SBC への電源が切断されたときにバックアップ電源として 3.0V コイン型電池を使用します。I2C クロックおよびデータ ラインは、外部の 4.75k オームの抵抗器を通じてハイに引き上げられます。 シングルボードコンピュータから電源が除去されたとき (Vdd=0V)、LPC4088FET180 の I2C1 クロックおよびデータピンの入力インピーダンスまたは電流をシンクする能力の仕様があるかどうかを確認しようとしています。LPC4088FET180 に電源が供給されていない場合、これらのピンはハイインピーダンスになるはずです。クロック ピンとデータ ピンにはプルアップ抵抗やプルダウン抵抗が存在する可能性があると思います。SO、マイクロに電源が供給されていないとき (Vdd = 0V)、I2C1 ピン上のこれらのプルアップまたはプルダウン抵抗の状態がどうなるかはわかりません。データシートに記載されているプルアップまたはプルダウンに関する情報は、Vdd が 3.3V であることに特有のもののようです。ただし、Vdd が 0V のときのプルアップまたはプルダウンの値と状態がどうなるかを知りたいと思っています。このトピックに関して、できる限りのご助力や情報をいただければ幸いです。 LPC40xx Re: LPC4088FET180 I2C1 pins - input impedance and current sinking when micro not powered こんにちは、ハリー。 Vdd=0V のときの I2C バス ピンの状態に関する LPC408x/7x データシートの情報を教えていただき、ありがとうございます。Vdd=0V のとき入力がハイ Z になることを知ってうれしく思います。 それでは。 ショーン Re: LPC4088FET180 I2C1 pins - input impedance and current sinking when micro not powered こんにちは@longboard LPC408x/7x のデータシートを確認しました。 LPC408x/7x ファミリのデータシートには、I²C ピンは真のオープン ドレインであり、「電源がスイッチオフになっている場合、I²C バスにコネクテッドされたこのピンはフローティング状態になり、I²C ラインに影響を与えません」と記載されています。つまり、VDD = 0 V の場合、ピン ドライバ自体はハイ Z になります。 BR ハリー
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S32 Design Studio v3.6.x and S32K39x Pins tool for LQFP package Hello, I tried both importing an existing example and generating a new application project using RTD 6 QLP01 for S32K396. The graphic display of the pins tool looks great for the BGA package, but after changing the package to 176LQFP, there are no pins on the top of the LQFP package (all are on left, right, and bottom).  Is this something that is planned to address, or is this an issue with my installation? Thanks!  Re: S32 Design Studio v3.6.x and S32K39x Pins tool for LQFP package A bug report has been submitted to the S32 Design Studio team. They have confirmed the bug and will fix it in a future release. Re: S32 Design Studio v3.6.x and S32K39x Pins tool for LQFP package Hi Thank you for reporting this issue.  I have reported this issue to the S32DS team and will let you know once I receive a response. The pin positions are currently displayed incorrectly. Please refer to the S32K396_176lqfp_EP of S32K36_IOMUX.xlsx file in S32K396RM (Rev. 4 11 2024).pdf for the correct pin positions. Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------
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How to determine the registers and slots corresponding to peripheral access control Hi, how should I determine the registers and slots corresponding to the access control of peripherals for the S32K142 chip AIPS module? For example, if I want to write-protect FTM0, which OPACR register should I make which position 1? Re: 如何确定外设的访问控制对应的寄存器和插槽 Hi @minsky  Refer to the following thread, where this topic is discussed. It may provide useful insights for you. How to use s32k144 aips? BR, VaneB
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i.MXRT 1010 Hardware Design I'm designing a USB to I2S digital audio interface, and I'm not sure about my circuit design. Could my peripheral circuit design meet the demand of i.MXRT 1010, especially for POR circuit and power supply? The schematic is given in the attachment(some temporary unused peripheral eg. FUSB302 was left unconnected). i.MXRT 101x Re: i.MXRT 1010 Hardware Design @nonameC_  It is Okay to choose the RESET IC if its threadhold is about 2.7V. Re: i.MXRT 1010 Hardware Design Thanks for your reply! For the first problem, I will remove the pull-up resistor on POR_B. But for the second problem, UM803RS is rather hard for me to get. Is there any replacement for UM803? And, will LM809 work for the POR circuit?  Re: i.MXRT 1010 Hardware Design @nonameC_  Pleased download I.MXRT1010-EVK board files from its offical webiste, https://www.nxp.com/webapp/Download?colCode=IMXRT1010-EVK-DESIGN-FILES   1. The POR_B already has an internal pull-up (details in Reference Manual, section 21.5.1, page 745), so there's no need to pull-up here again. 2. You used anthoer RESET IC to instead of default UM803RS(threadhold is 2.7V, it means if the supply drop down to 2.7V, it will output to POR_B to make system reset)from EVK board, https://www.nxp.com/docs/en/data-sheet/IMXRT1010IEC.pdf  B.R, Sam
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Can i use MIMXRT1060-EVK default firmware for MIMXRT1060-EVKB Hi, I have been looking through some tutorials when the board is stuck and I get the error: 0 available SWD Devices detected. When I researched and reloaded the firmware for the board. In my pc I did not find the firmware for MIMXRT1060-EVKB but only the MIMXRT1060-EVK version https://www.nxp.com/design/design-center/development-boards-and-designs/OPENSDA#MIMXRT1060-EVK I wonder if it is possible to load that firmware. Thanks everyone Boot ROM|Booting | Flash Re: Can i use MIMXRT1060-EVK default firmware for MIMXRT1060-EVKB Hi @cylasion, It is possible to load the OpenSDA firmware from the MIMXRT1060-EVK onto the MIMXRT1060-EVKB. OpenSDA firmware is loaded onto the FreeLink interface, and both the MIMXRT1060-EVK and MIMXRT1060-EVKB use an LPC432x device for this interface. Best Regards, Pablo
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在 IMX8MP 上启用内核验证 您好, 我正在进行内核身份验证并通过 u-boot 启动。以下是用于对内核进行身份验证的 u-启动 命令。我试过使用已签名的内核和正确的密钥,也试过使用不同的密钥。但我只得到"内核验证通过!" 。 有没有其他方法可以验证内核映像? u-boot= > setenv auth_kernel 'if fatload mmc 1:1 ${loadaddr} 图片 & & hab_auth_img ${loadaddr} ${filesize} 0x1a90000;然后\ echo " 内核认证通过了! ";\ else\ echo " 内核身份验证失败!";\ fi' 谢谢, Kartheek Re: Enabling kernel verification on IMX8MP 您好, 如果有事件发生,将打印错误日志。 CST 中提供了一个离线工具 - hab_image_verifier。 此致 哈维
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