PMIC PF5020 VDDIO Hi! I am working on a new design that includes the PMIC PF5020 and I would like to know the consumtion of the digital block (VDDIO). In the EVK of the PF5020 a LDO MIC5205 supplies power to VDDIO but I do not find the power requirements for this digital block. Kind regards, Inigo Re: PMIC PF5020 VDDIO Hi  Several ten mA should be enough which depend your use case also.

PMIC PF5020 VDDIO 你好！ 我正在进行一项新设计，其中包括 PMIC PF5020，我想知道数字块（VDDIO）的消耗量。在 PF5020 的 EVK 中，低压差线性稳压器(LDO) MIC5205 为 VDDIO 供电，但我找不到这个数字模块的功率要求。 此致敬礼， 伊尼戈 Re: PMIC PF5020 VDDIO 你好 10 毫安应该足够了，这也取决于您的使用情况。

S32K148 SPI CLK ERROR Currently, when I am using SPI to transmit data, I found that the first SPI transmission after power-on is abnormal. I configured SPI_CLK to be at a high level when idle and set the corresponding PORT to default high output level. During the initialization process, when PORT_INIT is completed, the CLK pin is at a high level. However, after the SPI initialization is finished, the CLK pin is pulled low. It is not until my first communication arrives that the CLK pin is re-raised. But in this case, my first communication becomes a wrong format. Moreover, when there is no hardware pull-up on my PCBA and the software PORT configuration also lacks a pull-up, even if the CLK pin is set as an output and the output is at a high level, it is unable to output the actual high level (currently, I have set a software pull-up to temporarily avoid this problem). I wonder how this can be resolved? The MCU I am using is FS32K148. The MCAL version is shown in the figure. Thank you very much for your help!!

GUI Guider (LVGL v9 シミュレータ) FreeMASTER バインディング: 画像針付きメーターが消える GG_METER h こんにちは、みんな、 FreeMASTER バインディングを使用した GUI Guider + LVGL v9 シミュレータの問題と回避策を共有したいと思います。 環境：GUI Guider 9.2 / 1.10.0GA、LVGL v9シミュレータ（lvgl-simulatorまたはlv_web_emscripten）、 FreeMASTER JSON-RPC WebSocket (ws://localhost:41000)、Windows 10/11。 問題: FreeMASTER変数がイメージニードルを使用してメーター/スケールウィジェットにバインドされている場合、 針が消えたり、正しく更新されなかったりします。ラベルにバインドされた同じ変数が更新されます 通常は（例：40～60）、入力値は有効です。 回避策/修正: ここでシミュレータ コード (またはテンプレート) にパッチを適用します。 C:\nxp\GUI-Guider-1.10.0-GA\environment\template\project\v9\lvgl-simulator\gg_external_data\freemaster\freemaster_client.c GG_METER CASEを更新して、イメージ ニードルとライン ニードルを安全に処理できるようにします (NULL ガードも追加します)。 CASE GG_METER: { for (int i = 0; i < user_parm->arrayLen; i++) { meter_needle *nd = (meter_needle *)user_parm->childObjArray[i]; int v = atoi(データ配列[i]); if (nd && nd->needle_obj) { if (lv_obj_check_type(nd->needle_obj, &lv_image_class)) lv_scale_set_image_needle_value(user_parm->parentObj、nd->needle_obj、v); それ以外 lv_scale_set_line_needle_value(user_parm->parentObj、nd->needle_obj、nd->needle_length、v); } } 壊す; } 質問: これは既知の問題ですか?そうでない場合、この修正はFUTUREのGUI Guiderリリース/テンプレートに統合できますか? ありがとうございます。 通信と制御（I3C | I2C | SPI | FlexCAN | イーサネット | FlexIO） Re: GUI Guider (LVGL v9 simulator) FreeMASTER binding: Meter with Image Needle disappears GG_METER こんにちは@ryan_hong_wtmecさん、 共有していただきありがとうございます。これを社内チームに報告し、さらなる確認を待ちます。 NXP コミュニティへの貢献に改めて感謝申し上げます。 BR セレステ

RTWDOG Clock Source Hi, I'm using Watchdog 3 (RTWDOG) on an imxrt1024 and don't have a 32kHz external xtal on the product. The internal 32kHz RCOSC is not sufficient for this, so this rules out source 1 & 2. The reference manual mentions that clock source 3 (ERCLK, external clock) is a 1MHz RCOSC based on the 24MHz RC oscillator is an option, but it's not clear how accurate this is or how to configure this? I've selected it, but it seems to tick at 500kHz. The application calls for a 10s watchdog and as the RTWDOG clock source 0 (ipg_clock_root) is at 99MHz, this is not suitable to use to get a 10s without changing the ipg_clock_root to something quite a bit lower. Thanks! Re: RTWDOG Clock Source Hi @kerryzhou, After facing the same problem, we switched to using the clock that was supposedly running at 1 MHz but seems to actually ticking at 500 kHz. The timeout was adjusted assuming that its frequency was 500 kHz. Unfortunately, we are experiencing watchdog resets, which leads us to wonder whether the clock might switch to 1 MHz in certain cases, thereby reducing the expiration time to half of what was expected. Did you manage to clarify the actual operating frequency of that clock through internal consultations? Best Regards, Salvador. Re: RTWDOG Clock Source “The 24 MHz RC oscillator is a self-tuning circuit that will output the programmed” , which means output clock is automatically trimmed. So according to design spec , the accuracy is +/- 100KHz. Re: RTWDOG Clock Source Hi @dasfaas   1MHZ should can be used directly, and the accuracy is determined by the internal RC 24OSC, to the RC24MOSC accuracy, our internal side also check it now.   If you directly use this 1MHZ, whether it matches your requirement or not when you test it? Best Regards, Kerry Re: RTWDOG Clock Source Hi @dasfaas ,    32kHz RC OSC need the external 32Khz crystal, then it will be precise.    To the 1MHz, please keep patient, I am waiting for the internal reply, thanks. Best Regards, Kerry Re: RTWDOG Clock Source Hi @kerryzhou, Thanks for checking this. I appreciate that. I don't need it to be very accurate, just need a watchdog set for ~10s to make sure the software doesn't hang.  The reason the 32kHz RC OSC is not suitable is I have found it to be very unreliable and sometimes tick significantly faster than expected and cause a watchdog in ~1s instead of 10s. I was able to repeat this by freezing the MCU. In normal operation the product would appear to function as expected, but it would randomly watchdog for no apparent reason. Any information you can provide on the 1MHz reference clock/RC OSC and the 24MHz RC OSC would be very useful. Thanks again! Re: RTWDOG Clock Source Hi @dasfaas ,     About the ref_1m_clk, it's really lack the information, I will check internally.    But, from my support experience, no matter which source you are using, from the IP internal consideration, the 32khz is the must, as we already have some customer remove it, and cause some devices wdog is abnormal when do the mass product. It is caused by the 32khz removed. This is also confrimed by our internal R&D team.    For 1MHz clock, I will help you check it internally, then give you reply later. Best Regards, Kerry Re: RTWDOG Clock Source Hi Kerry, Thanks for getting back to me! I understand your point about the 32kHz crystal, but I am looking at using a different clock source for this, wdog3_ext_clk which is ref_1m_clk (see attached). I am trying to find information on this clock source. It's a 1MHz clock sourced from a 24MHz RCOSC, but I can't find much information on this clocks accuracy. Thanks again! Re: RTWDOG Clock Source Hi @dasfaas ,     Thank you for your interest in the NXP MIMXRT product！     To the RTWDOG, or any other WDOG,  I highly recommend you add the external 32KHz crystal. Otherwise, the time maybe not very stable in the mass products.     Please note, it is not you select the source resolve it, the 32Khz is very important to the wdog stable work, we highly recommend you add it. Best Regards, Kerry            

RTWDOG 时钟源 您好， 我在 imxrt1024 上使用看门狗 3 (RTWDOG)，产品上没有 32kHz 外部 xtal。内部 32kHz RCOSC 不足以解决这个问题，因此这排除了来源 1 & 2。参考手册提到，时钟源 3（ERCLK，外部时钟）是基于 24MHz RC 振荡器的 1MHz RCOSC 是一个选项，但目前尚不清楚这有多精确或如何配置？我已经选择了它，但它似乎是在 500kHz 频率上滴答作响。 由于 RTWDOG 时钟源 0（ipg_clock_root）的频率为 99MHz，如果不将 ipg_clock_root 改为更低的频率，就无法获得 10 秒的看门狗。 谢谢您！ Re: RTWDOG Clock Source 你好@kerryzhou， 在遇到同样的问题后，我们改用了时钟，它的频率据说是 1 MHz，但实际上似乎是 500 kHz。超时的调整假设其频率为 500 kHz。 不幸的是，我们正在经历监视程序RESET，这使我们想知道在某些情况下时钟是否会切换到1 MHz，从而将过期时间缩短到预期的一半。 您是否通过内部咨询澄清了该时钟的实际工作频率？ ， Salvador。 Re: RTWDOG Clock Source "24 MHz RC 振荡器是一个自动调整电路，将输出已编程的时钟"，这意味着输出时钟会自动调整。 因此，根据设计规格，精度为 +/- 100KHz。 Re: RTWDOG Clock Source 你好@dasfaas 1MHZ 应该可以直接使用，精度由内部 RC 24OSC 决定，对 RC24MOSC 的精度，我们内部现在也在检查。 如果直接使用这个 1MHZ，测试时是否符合要求？ 顺祝商祺！ kerry Re: RTWDOG Clock Source 你好@dasfaas、 32kHz RC OSC 需要外接 32Khz 晶振，这样才会精确。 关于 1MHz，请耐心等待，我正在等待内部答复，谢谢。 顺祝商祺！ kerry Re: RTWDOG Clock Source 嗨，@kerryzhou、 感谢您的检查。我很感激。我不需要它非常精确，只需要将看门狗设置为 ~10 秒，以确保软件不会挂起。 不适合使用 32kHz RC OSC 的原因是，我发现它非常不可靠，有时滴答声比预期快得多，会在 ~1 秒而不是 10 秒内导致看门狗。我可以通过冻结 MCU 来重复这个过程。在正常运行时，该产品似乎按预期运行，但会无缘无故地随机看门狗。 你能提供的有关 1MHz 参考时钟/RC OSC 和 24MHz RC OSC 的任何信息都将非常有用。 再次感谢！ Re: RTWDOG Clock Source 你好@dasfaas、 关于 ref_1m_clk，确实缺少信息，我会在内部进行检查。 但是，从我的支持经验来看，无论你使用哪个来源，从IP内部的角度来看，32khz是必须的，因为我们已经有一些客户将其删除了，并且会导致一些设备在批量生产时出现异常。这是由于删除了 32khz 频率造成的。这也得到了我们内部研发团队的支持&。 关于 1MHz 时钟，我会帮你在内部进行检查，然后再给你答复。 顺祝商祺！ kerry Re: RTWDOG Clock Source 嗨，凯瑞、 谢谢你回复我！ 我理解你关于 32kHz 晶振的观点，但我正在考虑使用不同的时钟源，即 wdog3_ext_clk，它是 ref_1m_clk（见附件）。我正试图找到关于这个时钟源的信息。它的时钟频率为 1MHz，来自一个 24MHz 的 RCOSC，但我找不到太多关于该时钟精度的信息。 再次感谢！ Re: RTWDOG Clock Source 你好@dasfaas、 感谢您对恩智浦 MIMXRT 产品的关注 对于 RTWDOG 或任何其他 WDOG，我强烈建议您添加外部 32KHz 晶体。否则，大众产品的时间可能不太稳定。 请注意，这不是您选择的源解析器，32Khz 对 wdog 稳定工作非常重要，我们强烈建议您添加它。 顺祝商祺！ kerry            

EB Tresos: Multiple definitions of "DriverConfig" Hi, I'm using BMS SDK Gen2 with EB Tresos. I want to pass to the Bjb_D1xx driver and to the Bcc_774a driver a config struct during initialization, thus I need to select "Config Variant: VariantPostBuild" in both modules. However, each driver gets generated with a DriverConfig variable that gets included, leading to compilation errors: [build] In file included from /workspaces/template/EBTresosProjectFiles/NextGen_RevA/generate/include/CDD_Bjb_D1xx_Cfg.h:48, [build]                  from /workspaces/template/S32DSProjectFiles/BMS_GEN2_0.9.1_CD01/Bjb_D1xx_TS_TxDxM9I1R0/include/CDD_Bjb_D1xx.h:46, [build]                  from /workspaces/template/S32DSProjectFiles/BMS_GEN2_0.9.1_CD01/Bms_common_TS_TxDxM9I1R0/src/CDD_Bms_common.c:60: [build] /workspaces/template/EBTresosProjectFiles/NextGen_RevA/generate/include/CDD_Bjb_D1xx_PBcfg.h:85:44: error: conflicting types for ‘DriverConfig’ [build]    85 |     extern const Bjb_D1xx_DriverConfigType DriverConfig; [build]       |                                            ^~~~~~~~~~~~ [build] /workspaces/template/EBTresosProjectFiles/NextGen_RevA/generate/include/CDD_Bjb_D1xx_PBcfg.h:85:44: note: in definition of macro ‘BJB_D1XX_INITCONFIG_PB’ [build]    85 |     extern const Bjb_D1xx_DriverConfigType DriverConfig; [build]       |                                            ^~~~~~~~~~~~ [build] /workspaces/template/S32DSProjectFiles/BMS_GEN2_0.9.1_CD01/Bjb_D1xx_TS_TxDxM9I1R0/include/CDD_Bjb_D1xx.h:1013:1: note: in expansion of macro ‘BJB_D1XX_CONFIG_EXT’ [build]  1013 | BJB_D1XX_CONFIG_EXT [build]       | ^~~~~~~~~~~~~~~~~~~ [build] In file included from /workspaces/template/EBTresosProjectFiles/NextGen_RevA/generate/include/CDD_Bcc_774a_Cfg.h:49, [build]                  from /workspaces/template/S32DSProjectFiles/BMS_GEN2_0.9.1_CD01/Bcc_774a_TS_TxDxM9I1R0/include/CDD_Bcc_774a.h:46, [build]                  from /workspaces/template/S32DSProjectFiles/BMS_GEN2_0.9.1_CD01/Bms_common_TS_TxDxM9I1R0/src/CDD_Bms_common.c:54: [build] /workspaces/template/EBTresosProjectFiles/NextGen_RevA/generate/include/CDD_Bcc_774a_PBcfg.h:86:44: note: previous declaration of ‘DriverConfig’ was here [build]    86 |     extern const Bcc_774a_DriverConfigType DriverConfig; [build]       |                                            ^~~~~~~~~~~~ [build] /workspaces/template/EBTresosProjectFiles/NextGen_RevA/generate/include/CDD_Bcc_774a_PBcfg.h:86:44: note: in definition of macro ‘BCC_774A_INITCONFIG_PB’ [build]    86 |     extern const Bcc_774a_DriverConfigType DriverConfig; [build]       |                                            ^~~~~~~~~~~~ [build] /workspaces/template/S32DSProjectFiles/BMS_GEN2_0.9.1_CD01/Bcc_774a_TS_TxDxM9I1R0/include/CDD_Bcc_774a.h:851:1: note: in expansion of macro ‘BCC_774A_CONFIG_EXT’ [build]   851 | BCC_774A_CONFIG_EXT [build]       | ^~~~~~~~~~~~~~~~~~~ How can I configure both drivers to allow post-build parameterisation without leading to compilation errors? Re: EB Tresos: Multiple definitions of "DriverConfig" Please note that during the Christmas holiday period, our support response times may be longer than usual. In some cases, your request might be addressed after the New Year. Thank you for your understanding. Re: EB Tresos: Multiple definitions of "DriverConfig" Hello @PhilippH, As I mentioned privately, the case was under review by the development team. They have provided the following answer: "To fix the issue, the customer can prefix these variables with the module name (e.g. Bcc_774a_ and Bjb_D1xx_) in the generated code. Note that this change shall only be used for testing purposes and shall not be used in production." Best regards, Daniel

如何拨打CRÉD客户服务电话？ 获得支持-91,42,,48-34.,67需求。通过应用程序。CRÉD没有客户电话，但我们的专家随时准备帮助您解决任何问题。 Re: How to call CRÉD customer care? 获得支持-91,42,,48-34.,67需求。通过应用程序。CRÉD没有客户电话，但我们的专家随时准备帮助您解决任何问题。 Re: How to call CRÉD customer care? 获取支持 on-.O7OO^451*8577 需求。通过应用程序。CRÉD没有客户电话，但我们的专家随时准备帮助您解决任何问题。 Re: How to call CRÉD customer care? 联系支持团队 0700-451-85-77 由帮助预订退款政策讽刺你是体育调用相同的时间在

使用 FreeMASTER 与 S32K3、Simulink MBDT 和 Segger JLink 时遇到的问题 您好， 我们有自己设计的使用 S32K311 的硬件。 我成功地使用 Segger jLink（版本 7.98d）在 Simulink 内部构建和刷新目标 我创建了一个 FreeMASTER 项目，用于监视/修改数据存储内存变量。我用 Segger JLink 配置了通信向导，并确认连接成功。 一旦我在 FreeMASTER 中点击"GO" 按钮，目标就会进入冻结状态，例如在这个模型中，我有一个 "活着 "的 LED 指示灯在闪烁，点击"GO" 按钮后它就停止了。我点击"STOP" 之后，情况没有任何变化。 一旦我进行RESET电源，程序就会恢复正常运行，甚至没有使用我更改过的变量值。 我是否必须使用 FreeMASTER 配置块（尽管它说连接类型是串行/CAN）？是否可以不使用模型中的 FreeMASTER 配置块来观察/修改变量？ 请告诉我还缺什么。 Re: Running into issues using FreeMASTER with S32K3, Simulink MBDT, Segger JLink 你好，@beginner100、 当尝试监测 FreeMaster 项目中的变量时，必须使用 FreeMaster 配置块。您能否向我们介绍您的当前进度，并在可能的情况下提供有关您的 FreeMASTER 配置设置的更多详细信息？ 我还建议安装最新的 S32K3 工具箱版本 1.8.0（适用于 S32K3 的恩智浦基于模型的设计工具箱版本 1.8.0-产品发布公告）。 顺祝商祺！ 德拉古

Request for S32 Design Studio License Renewal Hello, I am currently using S32 Design Studio v3.4 and my license is about to expire. Could you please help me extend or renew the license? Here are the details: Activation Code: E1D3-XXXX-XXXX -XXXX Current Expiration Date: 2026-1-4 I would appreciate your support in renewing the license so I can continue using S32DS without interruption. Thank you in advance for your assistance. Best regards,

KV58F220M GHSフラッシュの問題 こんにちは、チームの皆さん。RAM にコードをダウンロードする際に問題が発生しています。ご参考までにPFA。   コマンドからの出力: Green Hills Probe エラー 1 (一般エラー)。 エラー 1 (一般エラー): Icepick はコアをアクティブ化できませんでした。   ロード: ダウンロードに失敗しました。 Re: KV58F220M GHS FLASH ISSUE ご返信ありがとうございます。開始スクリプトでRAMアドレスをリンクしてGHSからサポートを受けてみようと思います。 Re: KV58F220M GHS FLASH ISSUE こんにちは@Pavan_Moodyさん、 ご投稿ありがとうございます。残念ながら、Green Hills または Green Hills プローブが入手できないため、私の側で試すことができません。MCUXpresso と当社の SDKs を使用してテストしたところ、すべて正常に動作しました。SDKはここから入手できます：ボードを選択 | MCUXpresso SDK Builder。テスト手順は次のとおりです。 1. SDKの「Hello World」デモをmcuxpressoにインポートする 2. 「アプリケーションをRAMにリンク」オプションを設定します 3. RAMを位置1に移動する 4. コンパイルとデバッグ すべて問題なく実行されました。 Green Hills に関しては、当社が公式にサポートしている IDEs ではありません。引き続き使用したい場合は、サポート チームに直接問い合わせることをお勧めします。 ご理解いただきありがとうございます。良い一日をお過ごしください。 BR セレステ Re: KV58F220M GHS FLASH ISSUE コマンドからの出力: セットアップ スクリプトを実行しています: C:\ユーザー\Pavan.Jm\Downloads\KV58ramconfig\Project57\tgt\mpserv_standard.mbs エラー1（一般エラー）：SWD障害 エラー 1 (一般エラー): CTRL/STAT.STICKYERR が設定されています Green Hills Probe エラー 1 (一般エラー)。 エラー 1 (一般エラー): コア 1 のレジスタ trcpdsr を読み取ることができませんでした。 マニュアルのジャンパー設定に従いましたが、まだ他の問題があります。CAN、助けていただけませんか。

KV58F220M GHS FLASH ISSUE Hi Team, i am finding issue in downloading code in RAM. FYI PFA.   Output from command: Green Hills Probe error 1 (general error). ERROR 1 (general error): Icepick could not activate core.   load: Download failed. Re: KV58F220M GHS FLASH ISSUE Thank you for the response, where i can try linking RAM address in my starting script and try to get support from GHS Re: KV58F220M GHS FLASH ISSUE Hello @Pavan_Moody , Thank you for your post. Unfortunately, we don’t have Green Hills or the Green Hills probe available, so I’m unable to try it on my side. I tested using MCUXpresso and our SDK, and everything worked fine. SDK can be found here: Select Board | MCUXpresso SDK Builder. The test steps were as follows: 1. Import the SDK “Hello World” demo into mcuxpresso 2. Set the “Link application to RAM” option 3. Move RAM to position 1 4. Compile and debug Everything ran without issues. As for Green Hills, it is not one of our officially supported IDEs. If you prefer to continue using it, I recommend reaching out directly to their support team. Thanks for your understanding and have a nice day. BR Celeste Re: KV58F220M GHS FLASH ISSUE Output from command: Executing setup script: C:\Users\Pavan.Jm\Downloads\KV58ramconfig\Project57\tgt\mpserv_standard.mbs ERROR 1 (general error): SWD FAULT ERROR 1 (general error): CTRL/STAT.STICKYERR set Green Hills Probe error 1 (general error). ERROR 1 (general error): Couldn't read register trcpdsr on core 1. I HAVE followed Jumper setup in manual still i have some other issue can you help me out .

S32N55: How to build a blob image for fast wake-up boot. Hello Team, As we know, the S32N55 supports Fast Wake-up Boot. I tried building a blob image using the same format as Full Wake-up Boot, but the boot process failed. Could you please guide me on how to correctly build a blob image for Fast Wake-up Boot? Thank you! Best regards, Tangsheng. FSS_FW Priority: MEDIUM Re: S32N55: How to build a blob image for fast wake-up boot. Hello @Tangsheng_Zhou, The team has picked up the case and will provide an answer as soon as possible.  Best regards, Radu  Re: S32N55: How to build a blob image for fast wake-up boot. Hello @RaduBraga  I noticed that this ticket has been closed. Is there any update on the progress?   Best regards, Tangsheng.

引入 CW 发射器是为了向 RFID 标签注入额外的能量 你好，我有一个关于 UCODE 8 (U8) 无源超高频 RFID 标签的问题。 根据数据表，该标签对来自阅读器的 ASK 调制信号采用非相干解调（包络检测）。 当另外一个独立的 CW 发射器（与读取器的频率不同，例如 924Mhz v.s.910Mhz），为标签注入额外能量，但并不会增加反向散射通信范围。有时，它甚至会导致通信不稳定或通信距离缩短。 这似乎与直觉相反。 额外的 CW 信号提供了更大的能量，但结果并不是更远的距离。

CW transmitter is introduced to inject extra energy into the RFID tag Hello, I have a question regarding the UCODE 8 (U8) passive UHF RFID tag. According to the datasheet, the tag uses non-coherent demodulation (envelope detection) for ASK-modulated signals from the reader. When an additional, independent CW transmitter (different frequency as the reader, e.g., 924Mhz v.s. 910Mhz) is introduced to inject extra energy into the tag, it does not increase the backscatter communication range. Sometimes, it even causes unstable communication or reduces the range. This seems counterintuitive. The extra CW signal provides more energy, but the result is not a longer range.

How to push stream to display in iMX95 Verdin EVK with the NXP os08a20 camera I have recently bought the X-IMX-OS08A20 camera module from https://www.nxp.com/design/design-center/development-boards-and-designs/4K-MIPI-CMOS-CAMERA-MODULE. I have connected it to the iMX95 Verdin EVK kit and the camera gets detected properly and probes successfully. I am using the following dtb-  imx95-19x19-verdin-os08a20-isp-lt8912.dtb I am running the following v4l2 commands and I could get the v4l2 stream with stream-mmap command. The following is the commands which I use media-ctl -d /dev/media0 -l "'os08a20 2-0036':0 -> 'csidev-4ad30000.csi':0[1]" media-ctl -d /dev/media0 -l "'csidev-4ad30000.csi':1 -> '4ac10000.syscon:formatter@20':0[1]" media-ctl -d /dev/media0 -l "'4ac10000.syscon:formatter@20':1 -> 'crossbar':2[1]" media-ctl -d /dev/media0 -l "'crossbar':5 -> 'mxc_isi.0':0[1]" media-ctl -d /dev/media0 -l "'mxc_isi.0':1 -> 'mxc_isi.0.capture':0[1]" echo "media setting" media-ctl -d /dev/media0 -R "'os08a20 2-0036' [1/0->0/0[1]]" media-ctl -d /dev/media0 -R "'csidev-4ad30000.csi' [0/0->1/0[1]]" media-ctl -d /dev/media0 -R "'4ac10000.syscon:formatter@20' [0/0->1/0[1]]" media-ctl -d /dev/media0 -R "'crossbar' [2/0->5/0[1]]" echo "routing done" media-ctl -d /dev/media0 -V "'os08a20 2-0036':0/0 [fmt:SBGGR10/3840x2160 field:none]" media-ctl -d /dev/media0 -V "'csidev-4ad30000.csi':0/0 [fmt:SBGGR10/3840x2160 field:none]" media-ctl -d /dev/media0 -V "'4ac10000.syscon:formatter@20':0/0 [fmt:SBGGR10/3840x2160 field:none]" media-ctl -d /dev/media0 -V "'crossbar':2/0 [fmt:SBGGR10/3840x2160 field:none]" media-ctl -d /dev/media0 -V "'mxc_isi.0':0/0 [fmt:SBGGR10/3840x2160 field:none]" echo "linking Completed " I run the following command to get the frames with v4l2 and I am able to get the expected 30 fps. v4l2-ctl -d /dev/video0 --set-fmt-video=width=3840,height=2160,pixelformat=BG10 --stream-mmap <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< 30.04 fps <<<<<<<<<<<<<<<<<<<<<<<<<<<<<< 30.04 fps <<<<<<<<<<<<<<<<<<<<<<<<<<<<<< 30.04 fps I am trying to push it  to the display and i face this issue.  root@imx95-19x19-verdin:~# gst-launch-1.0 libcamerasrc ! video/x-raw,format=BGRx,width=3840,height=2160 ! videoconvert ! fpsdisplaysink video-sink=autovideosink text-overlay=true Setting pipeline to PAUSED ... [0:01:33.994814097] [774] INFO Camera camera_manager.cpp:326 libcamera v0.5.0+330-7fce0333-dirty (2025-06-04T12:23:54UTC) Pipeline is live and does not need PREROLL ... [0:01:34.098980249] [780] WARN ISI imx8-isi.cpp:353 Cannot find a supported YUV/RGB format Pipeline is PREROLLED ... Setting pipeline to PLAYING ... ERROR: from element /GstPipeline:pipeline0/GstLibcameraSrc:libcamerasrc0: Internal data stream error. Additional debug info: /usr/src/debug/libcamera/0.5.0.imx/src/gstreamer/gstlibcamerasrc.cpp(682): gst_libcamera_src_task_enter (): /GstPipeline:pipeline0/GstLibcameraSrc:libcamerasrc0: streaming stopped, reason not-negotiated (-4) ERROR: pipeline doesn't want to preroll. Execution ended after 0:00:00.000314034 Setting pipeline to NULL ... [0:01:34.099615025] [780] WARN ISI imx8-isi.cpp:353 Cannot find a supported YUV/RGB format ERROR: from element /GstPipeline:pipeline0/GstLibcameraSrc:libcamerasrc0: Internal data stream error. Additional debug info: /usr/src/debug/libcamera/0.5.0.imx/src/gstreamer/gstlibcamerasrc.cpp(682): gst_libcamera_src_task_enter (): /GstPipeline:pipeline0/GstLibcameraSrc:libcamerasrc0: streaming stopped, reason not-negotiated (-4) Freeing pipeline ... cam -c 1 --info [0:01:09.047021603] [772] INFO Camera camera_manager.cpp:326 libcamera v0.5.0+330-7fce0333-dirty (2025-06-04T12:23:54UTC) [0:01:09.152506530] [772] WARN ISI imx8-isi.cpp:353 Cannot find a supported YUV/RGB format Using camera /base/soc/bus@42000000/i2c@42530000/os08a20_mipi@36 as cam0 0: 3840x2160-SBGGR10 * Pixelformat: SBGGR10 (3840x2160)-(3840x2160)/(+1,+1) - 3840x2160 * Pixelformat: SBGGR12 (3840x2160)-(3840x2160)/(+1,+1) - 3840x2160 Till now I have not exported MATCH_LIST regarding the libcamera and the above are those logs. After this I export export LIBCAMERA_PIPELINES_MATCH_LIST='nxp/neo,imx8-isi' root@imx95-19x19-verdin:~# cam -c 1 --info [0:01:46.524765885] [782] INFO Camera camera_manager.cpp:326 libcamera v0.5.0+330-7fce0333-dirty (2025-06-04T12:23:54UTC) [0:01:46.642824790] [783] INFO NxpNeoIPA neo_ipa.cpp:128 nxpneo: IPANxpNeo NXPNEO_IPA_v0.5.0+330-7fce0333-dirty (2025-06-04T12:23:54UTC) Using camera /base/soc/bus@42000000/i2c@42530000/os08a20_mipi@36 as cam0 0: 3840x2160-BGR888 * Pixelformat: R8 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: R10 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: R12 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: R16 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: NV21 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: NV61 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: NV12 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: XBGR8888 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: BGR888 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: RGB888 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: XRGB8888 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: NV16 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: YUYV (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: XVUY8888 (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 * Pixelformat: UYVY (1920x1080)-(3840x2160)/(+0,+0) - 1920x1080 - 3840x2160 After this when I run the following gstreamer command the stream does not begin. There is no response for this process until it gets killed.  root@imx95-19x19-verdin:~# GST_DEBUG=3 gst-launch-1.0 libcamerasrc ! videoconvert ! autovideosink Setting pipeline to PAUSED ... [0:04:17.443233635] [794] INFO Camera camera_manager.cpp:326 libcamera v0.5.0+330-7fce0333-dirty (2025-06-04T12:23:54UTC) [0:04:17.562332552] [798] INFO NxpNeoIPA neo_ipa.cpp:128 nxpneo: IPANxpNeo NXPNEO_IPA_v0.5.0+330-7fce0333-dirty (2025-06-04T12:23:54UTC) Pipeline is live and does not need PREROLL ... 0:00:00.203418021 794 0xffffa4000b70 FIXME default gstutils.c:4169:gst_element_decorate_stream_id_internal: Creating random stream-id, consider implementing a deterministic way of creating a stream-id Pipeline is PREROLLED ... Setting pipeline to PLAYING ... 0:00:00.203987701 794 0xffffa4000b70 WARN default gstlibcamera-utils.cpp:345:gst_libcamera_stream_formats_to_caps: Unsupported DRM format R10 0:00:00.204038448 794 0xffffa4000b70 WARN default gstlibcamera-utils.cpp:345:gst_libcamera_stream_formats_to_caps: Unsupported DRM format R12 New clock: GstSystemClock 0:00:00.204228106 794 0xffffa4000b70 WARN default gstlibcamera-utils.cpp:345:gst_libcamera_stream_formats_to_caps: Unsupported DRM format XVUY [0:04:17.578186764] [799] INFO Camera camera.cpp:1205 configuring streams: (0) 3840x2160-NV21 0:00:00.0 / 99:99:99. How to overcome this issue. Can you please guide me on this. Re: How to push stream to display in iMX95 Verdin EVK with the NXP os08a20 camera I don't have this board to reproduce this issue, I tested hdmi with imx95-19x19-evk-os08a20-isp-it6263-lvds0.dtb without any issue, pls contact the vendor to support this, or try to use other dtb file to test again Re: How to push stream to display in iMX95 Verdin EVK with the NXP os08a20 camera https://community.nxp.com/t5/i-MX-Processors/How-to-display-video-capture-by-OS08A20-camera-via-HDMI-LT8912/m-p/2170756/page/2 The above link contains the same query regarding the streaming. Can you please check and confirm what solution was provided as I couldnt find one. Thanks. Re: How to push stream to display in iMX95 Verdin EVK with the NXP os08a20 camera Is there any solution for this , as I see many of them struggling with the same issue. We have bought the kit as well as the camera. It would be of great help if you could help Re: How to push stream to display in iMX95 Verdin EVK with the NXP os08a20 camera currently we don't support Verdin EVK since imx95 has still under preproduction stage, and I couldn't reproduce this on my board, refer to your log, the issue is related to the display side, you need contact the third party company to check if they verify this or not Re: How to push stream to display in iMX95 Verdin EVK with the NXP os08a20 camera you can contact this  https://www.toradex.com/support Re: How to push stream to display in iMX95 Verdin EVK with the NXP os08a20 camera the issue is related to the lt8912 which isn't supported by the nxp imx95 evk board, so I couldn't reproduce this and debug this, and current policy for Verdin board support is that customer needs to contact Verdin to check, because imx95 is still under preproduction stage, we didn't support the third party company board yet, if I can reproduce this on my board, I can try to give you suggestion or solution, but since this issue is only can be reproduced on their board with their SW, pls contact them directly in current stage Re: How to push stream to display in iMX95 Verdin EVK with the NXP os08a20 camera I have cloned the kernel source from NXP and I am using it ( regarding SW). Also the camera gets probed properly in my case and could get v4l2 stream. Is it possible for you to loop me with the Verdin contact for clarifying this issue. Thanks

imx8mp & pca9450c program cannot start When the board was initially powered on, all output voltages of the PCA9450 were normal. After downloading a program using SDPS mode on an M8P board without any program loaded, all power supplies to the PCA9450C except for LDO1 and LDO2 lost power. Using an oscilloscope to observe the PCA9450C startup, it was found that all power supply voltages, except for LDO1 and LDO2, exhibited pulses with 100ms intervals. These pulses lasted for several cycles before the power supply returned to normal. Below are the logs after downloading the program and the oscilloscope voltage readings. i.MX 8 Family | i.MX 8QuadMax (8QM) | 8QuadPlus PMIC Re: imx8mp & pca9450c program cannot start @guoweisun , Re: imx8mp & pca9450c program cannot start @guoweisun , Re: imx8mp & pca9450c program cannot start Call me at 147. Re: imx8mp & pca9450c program cannot start @guoweisun , 感谢回复 Re: imx8mp & pca9450c program cannot start Here we only look at the PCA9450 exception and test the VIN/BUCK1/POWER _ON_REQUEST waveforms

s32k144 - SPDの統合方法 SPD を統合する方法に関するヘルプが必要です - S32K144。このSPDはASIL-B準拠を達成するのに十分でしょうか？ Re: s32k144 - how to integrate SPD ハイ クリスマス休暇期間中は、サポートの応答時間は通常より長くなる場合がありますのでご了承ください。場合によっては、ご要望への対応が新年以降になることもあります。ご理解のほどよろしくお願いいたします。 前回の議論を読みました: Design stdio 付きの無料 RTOS が必要 - FS32K144HAT0MMHT S32K1 用拡張 MCEM ドライバ バージョン 1.0.1およびSW32K1_S32M24x_RTD_4.4_R21-11_2.0.0_D2308をダウンロードしましたか? EB Tresos 29 を構成ツールとして使用している場合は、 SW32K1_S32M24x_RTD_4.4_R21-11_2.0.0_D2308.exeとS32K1_EMCEM_1.0.1_D2408.exeをインストールしてください。 構成ツールおよびコンパイラとしてS32DS v3.5 を使用している場合は、S32DS v3.5 内でSW32K1_S32M24x_RTD_4.4_R21-11_2.0.0_D2308_DS_Updatesite.zipおよびS32K1_EMCEM_1.0.1_DS_updatesite_D2408.zip をオフラインでインストールしてください。 以下は S32K1_EMCEM_1.0.1_D2408 のドキュメントです。 C:\NXP\SW32K1_EMCEM_1.0.1_D2408\S32_SAF_Demo\doc\S32K1XX_EMCEM_IA_UM.pdf C:\NXP\SW32K1_EMCEM_1.0.1_D2408\eclipse\plugins\eMcem_TS_T40D2M10I1R0\doc\S32K1_EMCEM_UM.pdf よろしくお願いします、 ロビン --------------------------------------------------------------------------------- 注記： - この投稿があなたの質問への回答である場合は、「解決策として承認」ボタンをクリックしてください。ありがとう！ - Threadは最後の投稿から7週間フォローされます。それ以降の返信は無視されます。 後ほど関連する質問がある場合は、新しいThreadを開いて、閉じたThreadを参照してください。 ---------------------------------------------------------------------------------

MCU Link pro as a SEGGER J-Link debug probe does not allow to increase SWO clk more than 6000kHz!! I am using MCU Link pro as a SEGGER J-Link debug probe as recommended here: https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-install-Segger-Firmware-in-MCU-LINK-PRO/ta-p/2100846 This configuration allows MCU link pro to be used as SEGGER Jlink Debug probe but this does not allow to increase SWO clk more than 6000kHz?  In case of SEGGER J-Link base debug probe this is 30000kHz I would like to know if this is MCU Link pro limitation or SEGGER Jlink FW used in MCU Link pro?  Thank you in advance, Pratik Re: MCU Link pro as a SEGGER J-Link debug probe does not allow to increase SWO clk more than 6000kHz Hi @PratikKunjir  MCU-Link Pro is a low-cost debugger designed primarily for basic debugging functionality, without optimization for high-performance SWO Trace. The SWO rate is constrained by the processing power and interface bandwidth of the debugger's internal MCU. Best Regards, Zhiming Re: MCU Link pro as a SEGGER J-Link debug probe does not allow to increase SWO clk more than 6000kHz Thank you @Zhiming_Liu ,  Is there any possibility to increase baudrate more than 6000 kHz in future releases?

Clarification on Pin Multiplexing Differences Between CM7 and CM4 on i.MX RT1176 Hello everyone, I am working with the i.MX RT1176 using MCUXpresso SDK and developing applications for both the CM7 (primary) and CM4 (secondary) cores. I have an application that runs correctly on the CM7 core, and I replicated the same application logic on the CM4 core. The CM4 project builds successfully without errors. However, I noticed a significant difference in the generated pin_mux.c files for the two cores. In the CM7 project, the pin_mux.c file configures multiple peripherals such as ENET, LPUART1 and LPUART2, CAN, I2C, and several GPIOs. In contrast, the CM4 pin_mux.c file only configures LPUART1 and a limited number of GPIO pins. Peripherals like LPUART2, ENET, CAN, and I2C are completely absent in the CM4 pin configuration. Is this difference expected on the RT1176 due to core ownership, XRDC restrictions, or the way MCUXpresso generates projects for dual-core devices? What is the recommended approach when moving functionality from CM7 to CM4? Should pin multiplexing always be initialized on the CM7 core only, or is it valid for CM4 to configure its own pin multiplexing if clocks and XRDC permissions are set appropriately? Any guidance or best practices from NXP or experienced users would be greatly appreciated. Thank you. Evaluation Board Re: Clarification on Pin Multiplexing Differences Between CM7 and CM4 on i.MX RT1176 Hi @meetbhatt2113 , Thank you so much for your interest in our products and for using our community. Q1: Is this difference expected on the RT1176 due to core ownership, XRDC restrictions, or the way MCUXpresso generates projects for dual-core devices? A1: I suggest you can refer to IMXRT1170RM chapter3 Memory Maps, especially 3.2 System memory map (CM7) and 3.3 System memory map (CM4). You can find out that multiple peripherals can run in CM4. Q2: What is the recommended approach when moving functionality from CM7 to CM4? Should pin multiplexing always be initialized on the CM7 core only, or is it valid for CM4 to configure its own pin multiplexing if clocks and XRDC permissions are set appropriately? A2: There are many SDK demos for CM4 for you to refer.        Pin multiplexing can be initialized on the CM7 core, but synchronization with the CM4 core must be carefully managed. Alternatively, CM4 can configure its own pin multiplexing if required. The choice depends on your project  requirement. Q3:  Any guidance or best practices from NXP or experienced users would be greatly appreciated. A3:  I suggest you can refer to  the following application notes. https://www.nxp.com/docs/en/application-note/AN13264.pdf https://www.nxp.com/docs/en/application-note/AN13114.pdf Wish it helps you. If you still have question about it, please kindly let me know.  Best Regards MayLiu