s32ds 3.6 linux ADKP 选项？ 客户是 CNH。S32G3 + S32DS 3.6 有人提到 Linux S32 Design Studio 支持挑战/响应调试。为此，我安装了最新的 S32 Design Studio - 3.6.2。但是，我没有看到选择 "挑战/响应 "的选项，而只有密码可以在 "调试配置"--"安全调试 "部分中使用。 我是不是漏掉了什么？我们需要安装其他东西吗？ -兰迪-克拉科拉 优先级：高 S32DS 资料来源直接客户 Re: s32ds 3.6 linux ADKP options? 嗨，Randy， Challenge&Response 选择目前在 Linux 上的 S32 DesignStudio 中禁用，因为 S32 调试器还不完全支持用例。请在此 jira 项目中提出变更请求以申请此功能 -Design Studio 目标访问

imx6dl HAB u-boot.imx signature I am working on an imx6dl-powered custom hardware and I need to implement the HAB, as far as I noticed I have: - SPL - u-boot.imx - kernel fitImage The build is done using Yocto but the signature is done afterwards using a script I inherited from another project which is able to sign SPL, u-boot.img and kernel fitImage using CST tool, I am trying to use the same script for this project but I am not sure about the signature of u-boot.imx. The script is able to generate the IVT, the CSF, to pad and to concat the signature to the padded binary and so on, but in order to get the u-boot image size (used to computate load address, IVT address, CSF address) it does: $(od -j 0x04 -N 0x4 --endian=big u-boot-image.bin -t x4 | sed -ne 's/0*04[[:space:]]/0x/p') which I think is good for fitImages but not really for my u-boot.imx which is a: dumpimage -l u-boot.imx   Image Type:   Freescale IMX Boot Image Image Ver:    2 (i.MX53/6/7 compatible) Mode:         DCD Data Size:    61536 Bytes = 60.09 KiB = 0.06 MiB Load Address: 00907420 Entry Point:  00908000 HAB Blocks:   0x00907400 0x00000000 0x0000cc00 DCD Blocks:   0x00910000 0x0000002c 0x0000000 so, the question is, how to CST-sign a Freescale IMX Boot Image? How to properly generate IVT (which should already be present after Yocto build..) etc? I also have a u-boot.img which seems to be a u-boot fitImage, but my project requires u-boot.imx Moreover, yocto provides SPL.log (containing the HAB Blocks) but not a u-boot.log Thanks in advance! Re: imx6dl HAB u-boot.imx signature The spl signing for i.MX6 is not officially supported in our BSP. Regards Harvey Re: imx6dl HAB u-boot.imx signature Hello, thanks for your answer! Problem is, my SPL.bin and u-boot.imx have the same IVT table File: u-boot.imx Offset: 0x0 Image Vector Table:  Offset: 0x0  IVT Tag: 0xD1  IVT Version: 0  IVT Length: 0x20  HAB Version: 0x40  Entry: 0x908000  DCD: 0x0  Boot Data: 0x907420  Self: 0x907400  CSF: 0x914000 Invalid CSF tag So I guess that even if I add a signature at the end of the u-boot.imx, the CSF address may be totally wrong Re: imx6dl HAB u-boot.imx signature Hello @imx8mp_developer  For the u-boot.imx, its structure is IVT+DCD+U-Boot.bin. As our guides the SPL may not needed. For IVT table, it can be presented in 908000. Regards Harvey Re: imx6dl HAB u-boot.imx signature Hello @Harvey021  and thanks for your reply, it is very useful actually, but let's say that it would be a little long to integrate the changes into an already existing project... So let's say that I already have a script coming from older projects which is able to sign: - SPL (using SPL.log) - u-boot.img  (I assume it's treated as u-boot fitImage since running "dumpimage -l" shows all the contents) - kernel fitImage which also generates the CSF and IVT and I need to adapt it to another project which makes use of u-boot.imx (also, in this case, should I care about SPL? Or u-boot.imx will include both!?) I need a way to figure out if the signed files are OK or not (in terms of signature position and so on) before deploying them on a fused target.. For instance, I can run like: cst-4.0.0/linux64/bin/hab4_image_verifier ../u-boot.imx.signed and, if I use offset=0x0 I have: File: ../u-boot.imx.signed Offset: 0x0 Image Vector Table:  Offset: 0x0  IVT Tag: 0xD1  IVT Version: 0  IVT Length: 0x20  HAB Version: 0x40  Entry: 0x908000  DCD: 0x0  Boot Data: 0x907420  Self: 0x907400  CSF: 0x914000 Invalid CSF tag While if I use 0xd45ec, I get like: File: ../u-boot.imx.signed Offset: 0xD45EC Image Vector Table:  Offset: 0xD45EC  IVT Tag: 0xD1  IVT Version: 0  IVT Length: 0x20  HAB Version: 0x41  Entry: 0x177EDD40  DCD: 0x0  Boot Data: 0x0  Self: 0x177FDD40  CSF: 0x177FDD60  Command Sequence File (CSF):  Offset: 0xD460C  CSF Tag: 0xD4  CSF Length: 80 bytes  HAB Version: 0x41  Command:    Command Tag: 0xBE    Command Length: 12 bytes    Processing 'Install Key' command...    Flags: 0x0    Protocol Tag: 0x3 (SRK certificate format)    Algorithm Tag: 0x17 (SHA-256 algorithm)    SRK Table processed    Source Index: 0    Target Index: 0    Certificate Offset: 0x50 [............] SRK Table Hash: 23969F270F41....  Key 1:    Offset: 0xD4E9C    Length: 1363 bytes Invalid key length  Signature 1:    Offset: 0xD53F0    Length: 770 bytes Invalid signature length For SPL, 0x0 is correct, in the sense that I have a similar output including the invalid key and invalid signature length Same thing for the kernel fitImage, with offset 0x0 I don't have any IVT table (since it's not present from  yocto) but after signing I can see all the info (including invalid key and signature length) at offset 0x1623000 On another parallel project (which doesn't make use of SPL) we can have a similar output, including the invalid key and invalid signature length using offset =0x0 when checking u-boot.imx I am currently working with an imx6dl is the "Entry: 0x908000" present in IVT table correct? Thanks in advance Best Regards Renato Re: imx6dl HAB u-boot.imx signature Referring to the section <10.9 Security reference design> of Linux User Guide  Where we provide a tool as CST Signer that can help analyze BSP image for signing.   Regards Harvey Re: imx6dl HAB u-boot.imx signature Hi, do you have any updates about the u-boot.imx signature?

Where to Obtain the Demo Software for the S32K388EVB-Q289 Evaluation Board? Hello NXP team, We have purchased the S32K388EVB-Q289 Evaluation Board. Could you please advise us on the following: Where we can obtain the corresponding demonstration software (demo soft) for this board? For the S32K388, what is the recommended RTD (Runtime Driver) version for software operation? What is the appropriate version of the TCP/IP-related driver package? The versions we have currently installed are as follows: S32 Design Studio for S32 Platform: 3.6.3 RTD S32K3_S32M27X: 6.0.0.202508131114 TCPIP_STACK S32K3XX: 3.0.0.202507110930 FREERTOS S32K3XX: 6.0.0.202506270658 Thank you for your assistance! Re: Where to Obtain the Demo Software for the S32K388EVB-Q289 Evaluation Board? Hi, regarding the pre-flashed SW; I asked Apps team if can be provided.  For the TCPIP module; from TCPIP stack 2.0.0 just Eth_HLD driver is supported, and lwip demo examples are based on HLD only. Using IP driver the CT generates error you got. If LLD/IP is required the previous version of TCPIP should be used. BR, Petr Re: Where to Obtain the Demo Software for the S32K388EVB-Q289 Evaluation Board? Another question: After adding the TCPIP module to the GMAC_K388 Example, these errors occur, and the problem cannot be eliminated through modifications in the configuration interface. May I ask if there are any solutions to these problems? Or is it that the Gmac of Drivers cannot work with the Tcpip module? Could you please help take a look? Thank you! 问题: [CODEGEN] Failed to generate file "netifcfg.c" 级别: 错误 类型: 工具问题 工具: Peripherals 来源: Peripherals 相关资源: Sources 信息: [CODEGEN] Failed to generate file "netifcfg.c" Re: Where to Obtain the Demo Software for the S32K388EVB-Q289 Evaluation Board? No program download is required after receiving the development board, as the board already has a pre-programmed program. What I need is exactly this firmware and its source code that are pre-flashed onto the board at the factory. Alternatively, is the pre-installed software on this development board the LED demo software included in the RTD demos? Re: Where to Obtain the Demo Software for the S32K388EVB-Q289 Evaluation Board? Hi, not sure which firmware you are pointing to. The EVB getting started guide simply points to RTD demos BR, Petr Re: Where to Obtain the Demo Software for the S32K388EVB-Q289 Evaluation Board? Thank you for your explanation! However, what I actually need are the program firmware and corresponding source code that run on the demo board we purchased. Could these be provided to us? It seems that the standalone module example programs are no longer available after installing RTD 6.0, and they can only be viewed in the environment where RTD 4.0 is installed. Re: Where to Obtain the Demo Software for the S32K388EVB-Q289 Evaluation Board? Hi, 1) demo examples are part of RTD, FreeRTOS, TCPIP stack installation. If all is properly installed you can see available demos once you are going to create new project from example 2) RTD600 is latest one. There are also some patches available, but you are using right RTD one; https://www.nxp.com/webapp/swlicensing/sso/downloadSoftware.sp?catid=SW32K3-STDSW-D 3) TCPIP_STACK S32K3XX: 3.0.0 is latest one and should be used/installed on top of RTD S32K3_S32M27X: 6.0.0 and FREERTOS S32K3XX: 6.0.0. BR, Petr

Need a demo code to run a DC motor using S12ZVMBEVB board Hello All, I am working on the S12ZVMBEVB board, and I am new to this board. I need your help to configure the pins and a sample code to run a 12v DC motor. Re: Need a demo code to run a DC motor using S12ZVMBEVB board Hi, The board does not have official ref design. However there is a lab package. You can download it from communication here> Is there some source code about ZVMBA? - NXP Community Best regards, Ladislav

Failed to disable prefetcher for kernel 6.6.52 On the chip LS1023a, when running the Linux kernel 6.6.52, an error log related to arm-smmu will appear. [ 3.901722] arm-smmu 9000000.iommu: probing hardware configuration... [ 3.908214] arm-smmu 9000000.iommu: SMMUv2 with: [ 3.912852] arm-smmu 9000000.iommu: stage 1 translation [ 3.918174] arm-smmu 9000000.iommu: stage 2 translation [ 3.923496] arm-smmu 9000000.iommu: nested translation [ 3.928731] arm-smmu 9000000.iommu: coherent table walk [ 3.934054] arm-smmu 9000000.iommu: stream matching with 64 register groups [ 3.941117] arm-smmu 9000000.iommu: 32 context banks (0 stage-2 only) [ 3.947660] arm-smmu 9000000.iommu: Supported page sizes: 0x61311000 [ 3.954112] arm-smmu 9000000.iommu: Stage-1: 48-bit VA -> 48-bit IPA [ 3.960563] arm-smmu 9000000.iommu: Stage-2: 48-bit IPA -> 48-bit PA [ 3.967399] arm-smmu 9000000.iommu: preserved 0 boot mappings [ 3.973273] arm-smmu 9000000.iommu: Failed to disable prefetcher [errata #841119 and #826419], check ACR.CACHE_LOCK Re: Failed to disable prefetcher for kernel 6.6.52 Please download Debian LSDK pre-built image package. wget https://www.nxp.com/lgfiles/sdk/lsdk2506/boot_LS_arm64_lts_6.6.52.tar.zst Then try "Image" provided in this package.

W8987 for real time kernel support Hi NXP team,  We are use W8987 wifi&bi chip in rt-kernel for my project, the firmware is sdiouart8987_combo_v0.bin，that can connect other AP，but sometimes  will disconnect and catch out dma timeout error. Re: W8987 for real time kernel support Hello @Liang1  Could you share more details? like hardware use and error logs. Best Regards Shaun

S32 Design studio 2.2によるARM用コード生成 この質問はARM v2.2のS32DSに関するものであることに再度注意してください。 IDE によって 'Generated_Code' ディレクトリに車載生成されたコードは、コンパイルされた後に (おそらく更新されて) 再生成されるようです。これは間違っているように思われますが、このディレクトリ内のファイルを削除すると、ヘッダー ファイルが見つからないためプロジェクトのビルドが失敗することがわかりました。しかし、これらのファイルをgitリポジトリに含めると、各プロジェクトを再構築した後、これらのファイルは異なる日付/タイムスタンプで変更されたものとして表示されます。つまり、次のような行になります。 ** 日付/時刻: 2025-08-29, 11:06, # CodeGen: 54 このコードを使用する前に生成することはできますか? Re: Code generation by S32 Design studio 2.2 for ARM こんにちは@jiri_kral 私はS32 DS for ARM v 2.2を使用しています。スクリーンショットをご覧ください。 SDKバージョンは3.0.0です。以下のスクリーンショットをご覧ください。 このプロジェクトのハードウェアは成熟しており、プロセッサ Expert のコードを (明示的に) 更新していません (ツールがバックグラウンドでそれを呼び出している可能性があります)。 重要なコード変更 (ハードウェアではなくアプリケーション ロジックに関連するもの) を行った後は、プロジェクト メニューの [クリーン...] をクリックして、プロジェクトを完全に再構築します。 これにより、プロジェクト全体 (車載生成されたコードを含む) から大量の警告が表示されることもあれば、アプリケーション ロジックでのみ少数の警告が表示されることもあります。これは、車載生成されたコードが時々再コンパイルされるが常にではないことを意味しているようです。これに加えて、自動生成されたすべてのコードが git で変更済みとして表示されることもありますが、一部のコードだけが変更済みとして表示されたり、まったく変更済みとして表示されないこともあります。変更が実際に行われる場合、以下のスクリーンショットに示すように、ファイルのタイムスタンプにのみ変更が反映されます。 コードの有効性には影響しませんが、CI/CD パイプラインには影響します。次のいずれかを希望します: 1. 自動生成されたコードをバージョン管理の *外* に置きます (これはセーフティが重要な製品であり、イメージ内のすべてのコードが追跡可能である必要があるため、あまり好ましくありません)。ただし、コードはビルドの一部として (常に) 再生成されるわけではないため、この方法は機能しません。 または 2. コードをバージョン管理下に保ちます (推奨される方法)。ただし、ビルド ツールによってタイムスタンプの更新ごとにコードが変更されることはありません。 問題が解決するのであれば、変更された自動生成コードを一度コミットしてみることもできますが、ビルドごとにタイムスタンプが更新される場合は、それがどのように機能するか分かりません。 Re: Code generation by S32 Design studio 2.2 for ARM こんにちは、 プロセッサ エキスパート タブのコード生成アイコンをクリックすると、プロセッサ エキスパートによってコードが生成されます。通常、既存の生成されたコードはそのまま残ります。セットアップの詳細と、使用している SDK バージョンを教えていただけますか?

How to edit the CMPA using Secure provisioning on MCXA156 In Secure provisioning CMPA configuration, the default values shows an error and using the fix button before writing doesn't work. Reading the FRDM-MCXA156 values only show 0xFFFFFFFF on every parameter. Also, the terminal doesn't show the blhost command used (it does when verifying the connection). The question is : How to properly use the CMPA configuration ? MCXA Re: How to edit the CMPA using Secure provisioning on MCXA156 Thank you for your question. We will improve the SEC tool documentation to provide more info about the configuration. Re: How to edit the CMPA using Secure provisioning on MCXA156 We refered to the "DEFAULT_RW_UNLOCKED" but after re-reading, it appear to be a misunderstanding on our side as it must mean only read and write access (not execute). That automatically answers my question. I will mark your first answer as the accepted one. Thank you for your time. Re: How to edit the CMPA using Secure provisioning on MCXA156 Hi, which from the available options do you call "full access"? Re: How to edit the CMPA using Secure provisioning on MCXA156 Not true. You can set access to all regions to "ROM_RX_UNLOCKED" for example, which means the code can be executed, the flash can be read but the code cannot modify the flash (write not allowed). Unlocked means you can modify access in the runtime Does is it mean that we can set all regions to full access if we set one in "ROM_RX_UNLOCKED"? Re: How to edit the CMPA using Secure provisioning on MCXA156 Hi again, 0xFF everywhere is the default state of the chip after manufacturing and CMPA isn't taken into account by the MCU Correct! To program the CMPA we need to set at least one area as locked and make sure the user code don't use it Not true. You can set access to all regions to "ROM_RX_UNLOCKED" for example, which means the code can be executed, the flash can be read but the code cannot modify the flash (write not allowed). Unlocked means you can modify access in the runtime Are the CMPA only one-time programmable? In development life cycle, it is possible to update CMPA several times. Re: How to edit the CMPA using Secure provisioning on MCXA156 Hi marek, Thank you for the quick answer. To summarize what we understand : 0xFF everywhere is the default state of the chip after manufacturing and isn't taken into account by the MCU To program the CMPA we need to set at least one area as locked and make sure the user code don't use it We also have a small doubt that we couldn't confirm in the reference manual: Are the CMPA only one-time programmable? Re: How to edit the CMPA using Secure provisioning on MCXA156 Hi @rj_engineer  Good question. If the processor is clear, there are 0xFF values in the whole flash and so the CMPA page is invalid and the flash configuration from CMPA is not applied. If you install CMPA using SEC tool, the flash access configuration will be applied and it is critical to set access rights properly. There is not option allowing full flash access rights, so basically there is not "safe" default value. Each user needs to decide based on his application, what areas should be executable and what shall be read-only or shall be allowed for write. If the access right is not set properly, the processor will not boot. This is the reason why SEC tool shows an error. The error is the "guide" to the configuration asking to be aware about the configuration and set it properly. To prevent to configure the processor into the state that it does not boot, SEC tool requires to set access right explicitly.

EVKMIMXRT1064 gpio_polling example model is not compiled from MCUXpresso IDE Hi, I am using MIMXRT1064-EVK in order to develop projects by using IMXRT1XXXX MBD toolboxes at Matlab/Simulink environment. I managed to built and deployed gpio_polling.mdl example and run the demo on EVK successfully. gpio_pollingConfig folder was created from Simulink also. When i loaded project files to MCUXpresso (11.6.0) and tried to compile the project, i got an error. How can i fix the problem? I attached project files and error message also Thanks in advance for your support. Best regards.

s32k 146 flash wtrite error Hello friends in the community, I have encountered an issue and come here for help. I am developing my project using the S32K146. When using the flash memory, I want to write 256 bytes of data into the flash (with the start address being 0x80000), but in the actual process, a problem occurred: not all data was written to the specified address. The details are as follows: I. I used EB Tresos to configure the PFlash, as shown in the figure (only one sector is selected for demonstration purposes). II. This is a data test function I used to write data into the flash, as shown in the figure. III. This is the result during debugging: This is where I called my function. I used the Mem_43_INFLS_GetJobResult function to determine whether the writing was successful, and the return value was 2 (indicating MEM_43_INFLS_JOB_FAILED). Some data was written to the flash at the address 0x80000, but only a part of it—this obviously does not meet my requirements. My question: Did I make a mistake in the configuration, or is there a missing step that prevents me from writing 256 bytes of data? Re: s32k 146 flash wtrite error hi，shiqi I have also encountered the same issue when performing OTA test recently, we are using S32K324, RTD500. Have you fixed the issue? if yes, could you please tell me the solution, looking forward to your reply, thanks! Re: s32k 146 flash wtrite error Hello @shiqi_seventeen, I'm sorry for the delay, I was out of office for two days. Can you share the whole INFLS configuration? Do you copy the INFLS code to SRAM using the option highlighted below, or is it executed from the flash? Do you have any code in the block that you program? Can you use Mem_43_INFLS_BlankCheck() between the erase and the write operations? I don't see anything wrong in the code snippet. Maybe you can share the complete project via a support ticket privately so that I can test it on my side. Regards, Daniel Re: s32k 146 flash wtrite error Hi，@danielmartynek The version of the drivers is Autosar 4.7  V2.0.0 Re: s32k 146 flash wtrite error Hi @shiqi_seventeen, Can you share screenshots of the whole INFLS configuration? Which revision of the drivers do you use? Thank you, BR, Daniel

Jtag关闭后能再次打开吗 你好，NXP:        请问S32L3系列的芯片，通过推进生命周期的方式关闭Jtag口后还能再次打开吗？ Re: Jtag关闭后能再次打开吗 Hi@vurtual 参考该回答，这个意思就是说，依然还是可以通过密码关闭secure debug的。 https://community.nxp.com/t5/S32K/Can-I-disable-S32K3-s-JTAG-permanently-by-LifeCycle/m-p/1505254

COCKPIT_A53 picked for IMX8 Quad Max, watchdog keeps resetting I have watchdogs enabled originally for all 6 processors active on a Quad Max, then I enabled the COCKPIT_A53 setting in ATF. Now it appears that there is a watchdog triggering if the A72 processors are disabled (at the SCFW level/ not the device tree level). Any idea how to disable the watchdogs just for the A72 processors? i.MX 8 Family | i.MX 8QuadMax (8QM) | 8QuadPlus Re: COCKPIT_A53 picked for IMX8 Quad Max, watchdog keeps resetting Hi @flobro! Thank you for reaching out to NXP Support! You're absolutely right, to prevent resets caused by the watchdog, it’s necessary to configure it properly within the SCFW as well. You can download the SCFW source code from the link below, based on the BSP version you're using: Embedded Linux for i.MX Applications Processors  Once downloaded, run the binary file located in the packages folder to extract the source code and documentation for SCFW. Best regards, Chavira

imx8mp Chromium (Ozone/Wayland) on BSP 6.6.23 does not receive input events in RDP session I am using NXP BSP version 6.6.23 on i.MX8MP with Weston as the Wayland compositor and Chromium 117 built with Ozone/Wayland support. I have configured a remote desktop session using Weston’s RDP backend. The RDP connection works correctly, and the Chromium window is displayed as expected. However, Chromium does not receive keyboard or mouse events from the RDP client. Other applications, such as weston-terminal, work fine in the same RDP session and accept input events without issues. This problem only affects Chromium when running in the RDP session; locally on DRM output, Chromium works as expected. Any suggestions or known workarounds for enabling input events in Chromium under Weston RDP sessions? i.MX 8 Family | i.MX 8QuadMax (8QM) | 8QuadPlus i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: imx8mp Chromium (Ozone/Wayland) on BSP 6.6.23 does not receive input events in RDP session Hi Manuel, Thanks again for your help. I’ve adapted the patch to Chromium 117 and it’s working great, keyboard and mouse input are now correctly received in the RDP session with Weston. Really appreciate the support! Best, Diego Re: imx8mp Chromium (Ozone/Wayland) on BSP 6.6.23 does not receive input events in RDP session Hello @diegoperez  I hope you are doing very well. You can try adding the patch shared here. Best regards, Salas.

COCKPIT_A53 が IMX8 Quad Max に選ばれ、ウォッチドッグがリセットされ続ける もともと Quad Max でアクティブな 6 つのプロセッサすべてに対してウォッチドッグを有効にしていましたが、その後、ATF で COCKPIT_A53 設定を有効にしました。現在、A72 プロセッサが無効になっている場合 (デバイス ツリー レベルではなく SCFW レベル)、ウォッチドッグがトリガーされるようです。 A72 プロセッサに対してのみウォッチドッグを無効にする方法をご存知ですか? i.MX 8ファミリ | i.MX 8QuadMax (8QM) | 8QuadPlus Re: COCKPIT_A53 picked for IMX8 Quad Max, watchdog keeps resetting こんにちは@flobro ！ NXP サポートにお問い合わせいただきありがとうございます。 おっしゃる通り、ウォッチドッグによるリセットを防ぐには、SCFW 内でもウォッチドッグを適切に設定する必要があります。 使用している BSP バージョンに基づいて、以下のリンクから SCFW ソース コードをダウンロードできます。 i.MX アプリケーション プロセッサ向け組み込み Linux ダウンロードしたら、パッケージフォルダーにあるバイナリ ファイルを実行して、SCFW のソース コードとドキュメントを抽出します。 よろしくお願いします、 チャビラ

GUI Guider のすべてのデータを完全に消去するにはどうすればよいですか? アンインストールして再インストールしてみましたが、最近のプロジェクトを含む元のデータがまだ残っていました。 GUI Guider はコード生成時に null エラーを繰り返しますが、他のコンピューターでは正常に動作します。完全にアンインストールして再インストールしたいのですが、何か方法はありますか？ Re: 如何将GUI Guider所有数据都清理干净，我尝试卸载重新安装，发现重新安装后原始数据都还在，最近项目也在。 こんにちは@Newbie2さん、 「Uninstall GUI-Guider.exe」プログラムを使用してダウンロード操作を完了すると、次の画面が表示されます。 よろしくお願いいたします。 セレステ ----------------------------------------------------------------------------------------------------------------- 注: この投稿が質問の答えである場合は、「解決策として承認」ボタンをクリックしてください。ありがとう！ -----------------------------------------------------------------------------------------------------------------

Altium用MIMXRT1040-EVKデザインファイル こんにちは、 Altium cad 用の MIMXRT1040-EVK デザインファイルを問い合わせることは可能でしょうか? どうもありがとう、 ミシェル Re: MIMXRT1040-EVK design files for Altium こんにちは@Mike21さん、 申し訳ございませんが、RT1040EVK 用の Cadence ベースの デザインファイルのみがあります。以下のガイドに従って変換する必要があります。 https://www.altium.com/altium-designer/migrate/cadence-orcad?srsltid=AfmBOorYn3H1xswkjTm6Ig-UPf3pDheUUKhs3W2TuVVEkZm075NWq9fJ お役に立てれば幸いです。 すてきな一日を、 カン --------------------------------------------------------------------------------- 注記： - この投稿があなたの質問への回答である場合は、「正解としてマーク」ボタンをクリックしてください。ありがとう！ - Threadは最後の投稿から7週間フォローされます。それ以降の返信は無視されます。 後ほど関連する質問がある場合は、新しいThreadを開いて、閉じたThreadを参照してください。 ---------------------------------------------------------------------------------

Sample code for WiFi Aware (NAN) on iMX boards with the IW612 tri-radio module Apple officially released iOS 26, which includes support for WiFi Aware, a feature supported by the IW612 module. I’m wondering if there’s any sample code or API available to connect iMX boards to iOS using WiFi Aware. Re: Sample code for WiFi Aware (NAN) on iMX boards with the IW612 tri-radio module Hi Chrsitane,  Yeah, I think we can close this ticket. Thank you for the guidance. Best Behnam Re: Sample code for WiFi Aware (NAN) on iMX boards with the IW612 tri-radio module Hi, @Behnam  Sure. I already sent an email to you with my private working email. Please feel free to contact me if you meet any issue when you using our NXP wireless products. If there is no other concerns on this case, would you please help to mark my answer as a solution? So that we can close this ticket for now. Thanks! Best regards, Christine. Re: Sample code for WiFi Aware (NAN) on iMX boards with the IW612 tri-radio module Thank Christine, May I have your email address for direct contact, please? Best, Behnam Re: Sample code for WiFi Aware (NAN) on iMX boards with the IW612 tri-radio module Hi, @Behnam  Thanks for creating case to us. We have a special Application Note: Neighbor Awareness Networking (NAN) - Application note (confidential) But it is under secure files access control. You need to: 1. Firstly sign NDA with us by below link: Request an NDA 2.Apply for secure files access: Request secure access rights And also please provide me your project info: Company name: Location: Project: Application: Use case description: Which distributor is supporting? Who is the NXP sales contact? Project Annual Volume:  With above info, we can move forward to get the secure files access granted. Best regards, Christine.

Zephyr support of K27 or K28 Hi, We would like to use Zephyr on the NXP K27 (MK27FN2M0AVMI15) or K28 (MK28FN2M0AVMI15). Is there support for this and/or is there any plan for this support to be added?  Thanks Re: Zephyr support of K27 or K28 Hi @JPH1, As you can see on the following link, the only Kinetis K2x that is supported on Zephyr is the K22: Supported Boards and Shields — Zephyr Project Documentation. Unfortunately, I do not have information whether the K27 or K28 will be supported in the future. BR, Edwin.

S32N55：系统在睡眠后立即被唤醒 你好，团队、 硬件：S32N55-RDB 软件：SW32N5_GRAYVIP_1_0_22_0 FSS 固件：S32N_FSS_FW_R21-11_1.10.0 客户正在 使用配置为前沿检测的 FSS_WKUP2 测试 唤醒功能 。在测试场景中，FSS_WKUP2 仍然处于高位，并且没有出现上升沿。 观察到的行为 即使没有上升沿，系统 在进入睡眠状态后也会 立即 唤醒。 预期行为： 系统 只有在 FSS_WKUP2 上检测到上升沿时 才会唤醒。 下面的波形图详细显示了信号行为。 有趣的是，当我们 将 的 执行顺序 互换 时： 启用唤醒请求 启用上升沿检测 ... 系统的行为符合预期，只有在上升沿才会醒来。 问题 这种行为正确吗？ 为什么更改启用唤醒请求和上升沿检测的顺序会影响结果？ 感谢您的支持！ 谨致问候， Tangsheng FSS_FW 优先权：紧急 资料来源直接客户 Re: S32N55: system is waken up right after sleep 你好，屋大维 感谢你的支持 Re: S32N55: system is waken up right after sleep 也许吧 感谢您分享这些信息。 Re: S32N55: system is waken up right after sleep 已在https://jira.sw.nxp.com/browse/FFSYM-265上修复 Re: S32N55: system is waken up right after sleep 我可以确认，只要序列是 WIREER -> I/WRER，而不是 I/WRER -> WIREER，WISR[3:0]就会被设置为 0xF： 根据我的观察，WIFEER 不会出现这种情况，但我猜这与垫的当前值有关。   Re: S32N55: system is waken up right after sleep 你好，阿琳娜、 是的，以下顺序按预期运行： 1.启用唤醒请求 2.启用上升沿检测 不过，还有一个问题需要考虑：在当前 FSS 固件版本的 Suspend_Ss.c 中，唤醒源 LR_WKPU_FSS_WKUP0-3 被配置为中断。这意味着在发出唤醒请求之前， LR_WKPU_FSS_WKUP0-3 的上升沿检测始终处于启用状态。请在处理问题时考虑到这种情况。 顺祝商祺！ 唐生。 Re: S32N55: system is waken up right after sleep 你好，唐生、 客户是否使用 SCMI Scmi_SystemPowerStateSetSynch API 进入 SoC 待机模式？ 以下顺序是否可行？ 1.启用唤醒请求 2.启用上升沿检测 如果是，则这可能是正确的顺序，正如参考手册所指出的那样： " WIREER 或 WIFEER 配置为在 WRER 之后的上升沿或下降沿，以启用唤醒源 "。 在 FSS 固件中，我们可能会遇到问题，因为我们的顺序对调了：首先配置上升沿/下降沿，然后启用唤醒源。 致以最诚挚的问候， Alina

Server side application to decode NTAG424DNA link generated with non default Master KEY and App KEYS Hi, I am using NTAG424DNA to connect securely to my web application and exchange some information stored into the file data. I used the sdm-backend application https://github.com/nfc-developer/sdm-backend that works fine if the Master key is the default one (with all zeros) but it doesn't work if the Master key or App keys are changed. Is there any available application that can be used to decode the url and returns the UID/counter and file data informations? Thanks, regards Mimmo Authentication server problems Online authentication Re: Server side application to decode NTAG424DNA link generated with non default Master KEY and App Hello @mimmolf Hope you are doing well. I am not fully aware of the functionality that the application you referred offers; however, I can see that, as you pointed out, it does not support personalized authentication Keys. Perhaps you can contact the developer of that repo to see the support they can offer for your setup. Unfortunately, there is no Backend application I could recommend, it should be implemented by the user. Perhaps you could take a look at the Secure Services for the NTAG Product Family | NXP Semiconductors > NTAG Secure Cloud Platform Service; for more information on this service, please try contacting the email address specified in that webpage. Regards, Eduardo.