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Nxps32k312 内存检查了解 你好@lukaszadrapa 我正在研究 NXP S32K312 微控制器,希望了解如何检测 RAM 和 ROM 内存错误。我注意到FCCU(故障收集和控制单元)可以用来监测此类错误。但是,使用FCCU似乎通常需要安装SAF(功能安全)驱动程序。我希望不要使用任何额外的驱动程序。有没有直接访问或激活 FCCU 寄存器的方法,或者有没有不依赖 SAF 驱动程序而检测 RAM 和 ROM 错误的其他方法? Re: Nxps32k312 RAM Check Understanding 你好@Anitha7、 正如我所说,使用 SPD 驱动程序。 Re: Nxps32k312 RAM Check Understanding 您好@danielmartynek ,感谢您的回复。请就如何检查 RAM 和 ROM 内存错误提出解决方案。 Re: Nxps32k312 RAM Check Understanding 你好,@Anitha7、 您不需要 SAF 向 SRAM 或闪存注入故障并通过 FCCU 进行检测。 相反,您可以使用标准 S32K3xx 软件包中包含的 SDP 驱动程序,这些驱动程序是免费提供的。 要配置 FCCU,请使用 eMcem 驱动程序并调用 eMcem_InjectFault() 以注入故障。 SPD 独立组网 (SA) 安装程序 (.exe) 中提供了 SPD 演示以供参考。 当然,如有需要,您也可以实施自己的 EIM/FCCU 解决方案。 此外,通过 EIM 注入的故障也可被 ERM 模块检测到,不过我们目前还没有提供这方面的解决方案。 此致, 丹尼尔
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S32G274A Qspi_Ip_Example_S32G274A_M7 Qspi_Ip_Init タイムアウト 皆さんこんにちは SRAM上でサンプルプロジェクトQspi_Ip_Example_S32G274A_M7を実行すると、タイムアウトのためQspi_Ip_Initが失敗しました。 Qspi_Ip_InitProtection でタイムアウトにより失敗したことの詳細 (BUSY = 1) vuspkt_0-1762422534503.png 私はS32DS 3.5、SW RTD SW32_RTD_4.4_5.0.0_QLP03_D2505、ボードはS32G-VNP-EVB3を使用しています。 Re: S32G274A Qspi_Ip_Example_S32G274A_M7 Qspi_Ip_Init timeout こんにちは、 @vuspkt ご返信ありがとうございます。 はい、それは奇妙です。なぜなら、かつて利用可能だった同じソフトウェアが、今日では同じボード上で使用できないからです。 以前の設定でもう一度慎重に試してみることをお勧めします。可能であれば、参考のために他のボードや他のサンプルも試してみてください。 BR チェイン Re: S32G274A Qspi_Ip_Example_S32G274A_M7 Qspi_Ip_Init timeout こんにちは@chenyin_h 残念ながら、今日このCASEを再度テストしたところ、問題は再発しました 😞 それは奇妙だ Re: S32G274A Qspi_Ip_Example_S32G274A_M7 Qspi_Ip_Init timeout こんにちは、 @vuspkt どういたしまして。 S32G 製品の使用中に他の問題が発生した場合は、お気軽にこちらに投稿するか、NXP.com からサポート CASE を提出してください。喜んでお手伝いいたします。 BR チェイン Re: S32G274A Qspi_Ip_Example_S32G274A_M7 Qspi_Ip_Init timeout こんにちは@chenyin_h そうですね、私はRTD 4.0.0を使用しました。SW32_RTD_4.4_4.0.0_P02_DS_updatesite_D2212です そして私の問題は解決しました サポートありがとうございます! Re: S32G274A Qspi_Ip_Example_S32G274A_M7 Qspi_Ip_Init timeout こんにちは、 @vuspkt 情報を共有していただきありがとうございます。 共有された写真から判断すると、B2 バージョンの EVB ですが、SOC のバージョンは不明なので、ヒートシンクを取り外して確認してみてください。 REV2.0 バージョンの場合は、セットアップと互換性がある可能性のある RTD4.0.0 のサンプルを確認することをお勧めします。 BR チェイン Re: S32G274A Qspi_Ip_Example_S32G274A_M7 Qspi_Ip_Init timeout こんにちは@chenyin_hさん、 よろしくお願いいたします。 バックサイトの掲示板にいくつかのバージョンが表示されていますが、 rev2やrev2.1は表示されません。2018年からの掲示板のようです。 これらのバージョンが有効かどうか確認してもらえますか? プロセッサの背面サイト Image (6).jpg Image (5).jpg マザーボードの裏側 Image (7).jpg Re: S32G274A Qspi_Ip_Example_S32G274A_M7 Qspi_Ip_Init timeout こんにちは、 @vuspkt ご返信ありがとうございます。 共有された写真から判断すると、EVB ボードを使用していたようですね (S32G274 rev2 または rev2.1 であることを確認できますか)。また、詳細なボードバージョンは見ることができませんが、通常はプロセッサボードの裏側に表示されます。 RTDサンプルの説明から、サンプルはRDB2 REVEで正式にテストされていることがわかります。 chenyin_h_2-1762755319855.png RDB2 と EVB3 (S32G274REV2.1) の両方でテストしましたが、問題はないようです。ただし、EVB ボードは非常に初期のバージョンのボードなので、手元にないので申し訳ありませんが、別の試行として RTD 4.0.0 のサンプルでテストすることをお勧めします。 BR チェイン Re: S32G274A Qspi_Ip_Example_S32G274A_M7 Qspi_Ip_Init timeout ボードのセットアップ Image (3).jpg Image (4).jpg Re: S32G274A Qspi_Ip_Example_S32G274A_M7 Qspi_Ip_Init timeout こんにちは、 @vuspkt ご返信ありがとうございます。 使用したボードの写真を共有していただけますか?(両面表示) BR チェイン Re: S32G274A Qspi_Ip_Example_S32G274A_M7 Qspi_Ip_Init timeout あなたのやり方(シリアルブートモードを設定し、cmm を使用する)を試しましたが、問題は同じです。 他のRTDソフトウェアバージョンも試しましたが、問題は同じです Re: S32G274A Qspi_Ip_Example_S32G274A_M7 Qspi_Ip_Init timeout こんにちは、 @vuspkt 投稿ありがとうございます。 同じボードでテストしましたが、問題は見つかりませんでした。 まず、スイッチをシリアル ブート モードに変更することをお勧めします。 chenyin_h_0-1762481645476.png ...\SW32G_RTD_4.4_5.0.0_QLP03\eclipse\plugins\Fls_TS_T40D11M50I0R0\examples\EBT\S32G2\Fls_Example_S32G274A_M7\debug の CMM ファイルを試してください。 BR チェイン
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LPC55S28-EVK b2b I2C communication Dear all, I'm using LPC55S28-EVK configured as slave to receive I2C data coming from master. I'm using SDK example i2c_interrupt_b2b_transfer_slave. It works but I don't know how to detect if received data is write or read command. As you know I2C read or write command depends on the LSB of address. How to tetect it ? Thank you very much for your help and cooperation regards Re: LPC55S28-EVK b2b I2C communication Hi @Marconi_  In I2C protocol, the LSB of the address byte is used to determine whether the command is a read or write operation. If the LSB is 0, it's a write operation; if it's 1, it's a read operation. When you receive an interrupt indicating that data has been received, you can check the LSB of the address byte to determine whether it's a read or write operation. Here's a simple example: void I2C0_IRQHandler(void) { // Address match event occurred uint8_t address = I2C0->ADDR; // Check the LSB to determine read (1) or write (0) if (address & 0x01) { // Read command (LSB is 1) // Perform actions for read command } else { // Write command (LSB is 0) // Perform actions for write command } } Hope this will help you. BR Hang
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FreeMASTER V3.2.4.3 明显较慢 尊敬的 FreeMASTER 开发人员和用户: 当您加载项目或者想要修改或添加要监控的变量时,您是否也注意到 3.2.4.3 版本的等待时间更长? 目前我们仍在使用速度更快的 3.2.2.2 版本。 有人可以证实这种行为吗?有人知道为什么吗? 此致 迈克尔·L 回复:FreeMASTER V3.2.4.3 明显速度较慢 非常感谢 Michal 提供官方的错误修复版本。 我测试了新的 FreeMASTER 版本 3.2.4.4,该版本于 2024-10-24 构建。它按预期工作。现在,显示添加或修改变量的对话框时仅会出现短暂的延迟。 此外,新的地址栏也很有帮助。 此致, 迈克尔·L 回复:FreeMASTER V3.2.4.3 明显速度较慢 亲爱的 Michal, 这是个好消息。非常感谢您提前提供修复版本。 如果需要并且您愿意,我们可以使用我们的项目和 ELF 文件测试测试版本。 有关如何安装多个仅有小数字不同的版本的说明将有助于我们将来评估新版本。谢谢。 一切顺利, 迈克尔·L 回复:FreeMASTER V3.2.4.3 明显速度较慢 亲爱的迈克尔和托尔斯滕, 我确认当 ELF 符号数量较多时该错误会严重影响性能。我们将尽快提供修复版本。 为了安装更多次要版本,您可以随时将整个安装文件夹复制到其他位置,然后再运行更新它的新安装程序。然后您可以从复制的位置运行 pcmaster.exe。请注意,您确实需要复制安装,而不是移动或重命名它。重命名它会使安装程序感到困惑,因为它找不到现有的安装。 新的安装程序将始终安装并注册最新版本的插件,并且它们也将与旧版本一起使用,但在大多数情况下这是可以的。在最坏的情况下,可以通过以管理员身份运行其 register.bat 来重新注册旧版本的插件。 感谢您帮助 FreeMASTER 变得更好。 此致, 米哈尔 回复:FreeMASTER V3.2.4.3 明显速度较慢 亲爱的 Michal, 非常感谢您极其迅速的回复。- 目前,这对我们来说不是一个紧急问题,因为我们主要使用 3.2.2.2 版本(我们对它相当满意)。但我们仍然对错误修复、新功能和一般改进感兴趣。 是的,我想说我们的项目相当大。但我不知道普通 FreeMASTER 用户的典型项目有多大。我们对 FreeMASTER 项目使用 XML 文件格式,它更适合我们的版本控制系统。我的 PMPX 文件大小约为 3.5 MByte。 正如 Torsten 已经解释的那样,我也尝试将 3.2.4.3 版本与另一个项目文件结合使用,并且也注意到速度变慢了。 项目的加载时间略有增加(大约 40 秒 vs 50 秒),但编辑和修改的等待时间变得更长。在 3.2.2.2 版本中,打开对话框大约需要 5 秒。在最新版本中,我可以同时去喝杯咖啡。如果通信尚未开始,也会发生这种情况。 我已经降级到 V3.2.2.2。 顺便一提: 是否可以在同一台电脑上安装两个 FreeMASTER 版本 3.2.uv 和 3.2.xy? - 如果我安装另一个 3.2 版本,已安装的版本将被删除。 问候 迈克尔·L 回复:FreeMASTER V3.2.4.3 明显速度较慢 我尝试了一些不同的东西。我全新启动 FreeMaster,在一个空白窗口中单击“文件 -> 新建项目”,然后在“项目 -> 选项...”下加载一个较小的 ELF 文件。我尝试使用“项目 -> 变量 -> 新建”创建一个新变量。窗户打开花了58秒。 然后,我将 FreeMaster 降级到版本 3.2.3.2 并重复了完全相同的步骤。使用此版本,窗口只需 2 秒即可打开。 因此,版本 3.2.2.2 和 3.2.3.2 还可以,但版本 3.2.4.2 几乎无法使用。 回复:FreeMASTER V3.2.4.3 明显速度较慢 亲爱的迈克尔, 很遗憾听到您遇到了性能问题。我们在测试中没有观察到这一点。我需要有关项目、使用的 HTML 组件、通信设置、ELF 文件等的更多详细信息。这个项目规模大吗?(数千个变量或项目项?) 我能想到的唯一可能影响速度的变化是错误修复/通信插件线程模型的更改。所有插件都从中性线程模型重新声明为自由线程模型,以防止在插件显示消息框或对话框窗口时出现锁定问题。但是,当通信关闭时,这种变化不会影响 UI,而且由于插件是系统范围的库,它也会影响旧版本。我是否理解正确,3.2.2.2 版本不受影响? 其他修复更多的是表面的改变或更大的功能,如 NXP Gui Guider 支持,但我无法想象它会如何影响性能。 尝试查看 UI 操作性能是否得到改善(如果有帮助请告诉我): 关闭HTML控制页面 停止通信 切换图形视图(例如选择项目根项) 切换到具有空变量监视的项目 关闭所有浮动图形或观察视图。 谢谢, 米哈尔
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NMI Handler (Non Maskable Interrupt) not triggering in S32K388 Hi Team, We are using the S32K388 eval board. We want to trigger the non-maskable interrupt when the pin PTD3 value changes. We have configured PTD3 pin mode as SYSTEM_NMI_B. The pin PTD24 is configured as the GPIO output mode. We have connected the PTD3 & PTD24 via a wire on the IO matrix of the Eval board. The code is written to toggle the PTD24 pin. Since this pin is connected to PTD3 which is configured as SYSTEM_NMI_B, we were expecting the breakpoint kept inside the NMI_Handler function to hit. But the breakpoint is never hit. punithchandra_0-1713778864226.png punithchandra_1-1713778975963.png We also have enabled this interrupt using the API NVIC_EnableIRQ(NonMaskableInt_IRQn). We are using the example code of Icu driver and did the changes as per our requirement. Is there any other configuration parameter/ any code changes we need to do in order to enable this NMI interrupt? S32K3 #NMI #Interrupt #ICU Re: NMI Handler (Non Maskable Interrupt) not triggering in S32K388 Configured the WakeupNMI configurations in the Icu module. And referred this in one of the IcuChannels. After this the NMI handler is being triggered. punithchandra_0-1718262939511.png Re: NMI Handler (Non Maskable Interrupt) not triggering in S32K388 Hi Team, Can someone from NXP check this please? Re: NMI Handler (Non Maskable Interrupt) not triggering in S32K388 Hi Team, Can you please look into this query?
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Is there a driver for S32K312's SPI and SD card reading and writing? I have been working on a project about S32K312mcu to read and write SD card using SPI, but what has always confused me is that after configuring SPI for STM32's cubemx, it will automatically generate the initialization and enable of the SPI pins, while S32DS needs to configure it again. I wanted to try to transplant it using the STM32 driver code, but it always failed. So I would like to ask if anyone has SPI and SD card drivers for the S32K312 or S32K3 series. Re: 是否有S32K312的SPI与SD卡的读写驱动程序 As mentioned in case #00660962: We have no drivers for SD card in SPI mode for S32K3 devices. I guess that the libraries mentioned on the community are for Kinetis devices. So, you can take a look at the Kinetis SDK: https://www.nxp.com/design/design-center/development-boards-and-designs/software-development-kit-for-kinetis-mcus:KINETIS-SDK It's mentioned in the Features: "SDMMC, a software component supporting SD Cards and eMMC" Or you can take a look at following resources: https://www.nxp.com/docs/en/application-note/AN10406.pdf https://community.nxp.com/docs/DOC-330958
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S32K3 GPIO DC电气规格 当我向控制器引脚施加从 0 到 3.3V 的变化电压时,微控制器将 1.65 作为输入高电平。另外,当我将 1.58V 的高电平降至低电平(即 3.3V 降至 0V)时,微控制器将其视为输入低电平。 根据数据表,对于 3.3V 微控制器,输入高电压为 0.7 VDD 至 VDD,输入低电压为 0V 至 0.3 VDD。 1、为什么单片机要把1.65作为输入高电平?是否需要更改任何软件设置? 2、电压达到VIL和VIH之间究竟会发生什么? 3、单片机的转换电压是多少? 回复:S32K3 GPIO DC电气规格 软件中是否有任何方法可以将 GPIO 引脚上 0.3VDD 至 0.65VDD 之间的任何输入电压视为低或高? 回复:S32K3 GPIO DC电气规格 微控制器是S32K322NHT0MPAST 100针HDQFP
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imx8mp gpu内存分配内核崩溃(6.1.22)和 6.1.55 在基于 imx8mp 的主板上运行 AI 模型时,我们遇到了内存转储内核恐慌,类似于p1739413和p1753940中描述的情况。当进程使用大量系统内存时,似乎会发生恐慌,而我启动了一个需要 GPU 内存的进程。 我可以通过在设备上首先启动 VSCODE 服务器(使用相当多的系统内存),然后运行以下 gstreamer 管道来非常可靠地触发错误: gst-launch-1.0 videotestsrc ! video/x-raw,format=YUY2,width=1920,height=1080 ! vpuenc_h264 ! vpudec ! queue ! imxvideoconvert_g2d rotation=2 ! video/x-raw,width=800,height=480 ! videoconvert ! perf ! fakesink 我发现,根据系统负载,我甚至会在运行 g2d_basic_test 时感到恐慌。 请注意,当此错误触发时,仍然有足够的系统内存可用。往往是800M>。我猜它只是无法获得足够大的连续区域...... 我们的主板基于 Karp QSXP 模块,但我们运行标准 NXP 内核。该模块具有2GB LPDDR4。 从帖子来看,该问题似乎与 CMA 和 GPU 保留内存有关。我查看了 imx8mp-evk 和我们的设备树之间的变化,它们很小: // OURS // memory@40000000 { device_type = "memory"; reg = <0x0 0x40000000 0 0x40000000>, <0x1 0x00000000 0 0x40000000>; }; &resmem { /* overwrite freescale cma setting since it's not allocatable on qsxp */ linux,cma { size = <0 0x1e000000>; /delete-property/ alloc-ranges; }; gpu_reserved: gpu_reserved@100000000 { no-map; reg = <0x1 0x00000000 0 0x10000000>; }; }; // EVK // memory@40000000 { device_type = "memory"; reg = <0x0 0x40000000 0 0xc0000000>, <0x1 0x00000000 0 0xc0000000>; }; resmem: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; /* global autoconfigured region for contiguous allocations */ linux,cma { compatible = "shared-dma-pool"; reusable; size = <0 0x3c000000>; alloc-ranges = <0 0x40000000 0 0xC0000000>; linux,cma-default; }; gpu_reserved: gpu_reserved@100000000 { no-map; reg = <0x1 0x00000000 0 0x10000000>; }; }; 我尝试过的方法: - 向 cma 添加alloc-ranges 。(没有变化) - 将ldb_phy = Okay 添加到设备树。(无变化) - 增加/减少 CMA 大小。 -只会使其更加脆弱,或者使 VPU 操作无法分配内存。 - 从 devictree 中删除 CMA 并使用内核参数指定 cma 大小。 - 无论大小,这总是会破坏 VPU。 - 将内存@40000000条目替换为单个 2G 条目,而不是 2 个 1G 条目。 - 使gpu_reserved更大。(没有变化) 任何帮助都将不胜感激。当 cma 无法腾出空间时,这是预期的行为吗?可以为 gpu_reserved 分配专用内存吗?即不共享空间? 分配范围可以吗?内核配置中还有其他我需要启用的东西吗?或者图像中是否有我需要的 GPU 服务? 回复:imx8mp gpu内存分配内核崩溃(6.1.22)和 6.1.55 好的,经过数周的搜索,我发现 5.15 和 6.1 图像之间的区别在于 gpu_reserved@100000000 部分。 https://github.com/nxp-imx/linux-imx/commit/2d5c743aef9613a209b8256e54730ed5a3066a47 https://github.com/nxp-imx/linux-imx/commit/af10b4943109e588c82dc0aa5dfb58b2e620b551 我可以验证(在 6.6 和 6.1 Linux 上),如果排除以下情况,内存问题就消失了: &mix_gpu_ml{ /删除属性/内存区域; }; /删除节点/&gpu_reserved; 现在我可以以这种方式使用它,无需 gpu 内存区域。 此时我怀疑问题出在 uboot 上。我注意到内核设备树中指定的内存地址范围未被使用,它似乎是根据检测到的/当前正在使用的内容推断出来的: /* 设备树 */ 内存@40000000 { 设备类型=“内存”; 寄存器 = <0x00 0x40000000 0x00 0x40000000 0x01 0x00 0x00 0x40000000>; }; /* /proc/设备树 */ 内存@40000000 { 设备类型=“内存”; 寄存器=<0x00 0x40000000 0x00 0x80000000>; }; 所以我猜测内核只是从 uboot 检测内存设置,而不是重新配置它。如果是这样,那么 NXP 很可能在内核中引入这一变化的同时更改了他们的 uboot 内存配置。 回复:imx8mp gpu内存分配内核崩溃(6.1.22)和 6.1.55 @Bio_TICFSL我尝试重置为默认的 imx8mp-evk 内核配置,但没有任何变化。 您还有什么其他建议我可以尝试吗? 回复:imx8mp gpu内存分配内核崩溃(6.1.22)和 6.1.55 谢谢您的回复。我正在使用受支持的内核, Linux 6.1.55_2.2.1 版本。 我假设你的意思是 CONFIG_MXC_GPU_VIV=m 而不是 =y?我检查了 arch/arm64/configs/imx_v8_defconfig 文件,它使用 CONFIG_MXC_GPU_VIV=y
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FreemasterアップグレードJavaエラー Freemasterのインストール/アップグレード中にJavaエラー画面が表示され、プロセスが終了します。 ワークステーションのJava構成に何をインストール/変更する必要がありますか? エラーメッセージの内容 java.lang.OutOfMemoryError: Javaヒープスペース java.util.Arrays.copyOf(Arrays.java:3332)で java.lang.AbstractStringBuilder.ensureCapacityInternal(AbstractStringBuilder.java:124)で java.lang.AbstractStringBuilder.append(AbstractStringBuilder.java:448)で java.lang.StringBuilder.append(StringBuilder.java:136)で Flexeraavs.a0(出典不明) Flexeraavs.a0(出典不明) Flexeraavs.a0(出典不明) Flexeraavs.a0(出典不明) Flexeraavs.a0(出典不明) Flexeraavs.a0(出典不明) Flexeraavs.a0(出典不明) Flexeraavs.aj(出典不明) at Flexeraalf.aq(出所不明) Flexeraalf.ab(出典不明) at com.zerog.ia.installer.actions.InstallDirectory.ao(出所不明) at com.zerog.ia.installer.actions.InstallDirectory.uninstall(不明なソース) at Flexeraal4.ac(出所不明) at com.zerog.ia.installer.actions.ExecuteUninstallAction.dispatchLineForID(不明なソース) at com.zerog.ia.installer.actions.ExecuteUninstallAction.ad(出典不明) at com.zerog.ia.installer.actions.ExecuteUninstallAction.startUninstallAction(不明なソース) at com.zerog.ia.installer.Uninstaller.ak(不明なソース) at com.zerog.ia.installer.Uninstaller.ah(出典不明) at com.zerog.ia.installer.Uninstaller.uninstall(不明なソース) at com.zerog.ia.installer.consoles.UninstallProgressActionConsoleUI.executeConsoleAction(不明なソース) at com.zerog.ia.installer.ConsoleBasedAAMgr.ah(不明なソース) at com.zerog.ia.installer.ConsoleBasedAAMgr.ac(出所不明) at com.zerog.ia.installer.AAMgrBase.am(出所不明) at com.zerog.ia.installer.AAMgrBase.runNextInstallPiece(不明なソース) at com.zerog.ia.installer.AAMgrBase.al(出所不明) at com.zerog.ia.installer.ConsoleBasedAAMgr.ac(出所不明) at com.zerog.ia.installer.AAMgrBase.am(出所不明) at com.zerog.ia.installer.AAMgrBase.runNextInstallPiece(不明なソース) Re:FreemasterアップグレードJavaエラー 手動でアンインストールできます。この場合、次のものを削除する必要があります。 FreeMASTERインストールフォルダ「C:\NXP\FreeMASTER 3.2」 FreeMASTERレジストリ "C:\Program Files (x86)\Zero G Registry\.com.zerog.registry.xml" このファイルには、FreeMASTERとそのコンポーネントに関連する情報が含まれています。他の製品が含まれている場合は、バックアップコピーを作成します。 上記の2つの手順の後、FreeMASTERインストーラーを起動すると、クリーンインストールが開始されます。
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1170EVKBのMCU-Linkファームウェアを更新 1170EVK-BボードでMCUXpressoを使用しています。プロジェクトをデバッグしようとすると、次のようなファームウェア更新の警告が表示されます。 Firmware update requiredファームウェアのアップデートが必要です LinkServerと最新のファームウェアを https://www.nxp.com/design/design-center/software/sensor-toolbox/opensda-serial-and-debug-adapter:OPENSDA?tid=vanOpenSDA#MIMXRT1170-EVK からダウンロードしました LinkServerを使用して自動的に更新しようとしましたが、成功しませんでした。 ./LinkServerプローブ「#1」更新自動情報:MCU-Linkファームウェア更新自動:サポートされていません-ファームウェア(V3.122以降)は、選択したプローブで手動でプログラムする必要があります([TQYQNHWCAQPZC][MCU-LINKオンボード(r0E2)CMSIS-DAP V2.250])ファームウェア更新自動:サポートされていません。 次に、ボードをブートローダーモードにして、次のようなさまざまな指示に基づいてファームウェアを更新できるようにしようとしました。 ※https://www.nxp.com/design/design-center/software/sensor-toolbox/opensda-serial-and-debug-adapter:OPENSDA?tid=vanOpenSDA#MIMXRT1170-EVK ※ https://community.nxp.com/t5/i-MX-RT/Put-RT1170-EVK-in-quot-ISP-USB-quot-mode-for-MCU-Link-installer/m-p/1426988 ※ https://community.nxp.com/t5/i-MX-RT/Facing-issue-with-LPC-Link-2-with-iMX-RT-1170-Evk/m-p/1407341 ※https://community.nxp.com/t5/i-MX-RT/i-MX-RT1170-with-MCU-Boot-Utility/td-p/1303418 ...しかし、失敗しました。私の問題は1170EVKと1170EVK-Bの違いから生じているのでしょうか、それとも何か明らかなものが欠けているのでしょうか? どうもありがとう Nick Re:1170EVKBのMCU-Linkファームウェアの更新 お知らせいただきありがとうございます! ディエゴ Re:1170EVKBのMCU-Linkファームウェアの更新 おかげで助かりました。 この記事は「JP3にジャンパを取り付けて、MCU-LinkをISPモードに強制する」に役立ちました - https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/Using-J-Link-with-MIMXRT1170-EVKB/ta-p/1715138 そうしたら: $ cd /Applications/LinkServer_1.5.30/MCU-LINK_installer/scripts J-Link firmware for MCU-Link programming script v1.0.8 March 2023. NOTE: J-Link firmware supports MCU-Link Pro and MCU-Link on-board systems that use an LPC55S69 in LQFP100 or BGA98 package. Although the firmware can be programmed in to MCU-Link and MCU-Link on-board systems that use LQFP64 package, the firmware will not run. Place the board in ISP USB mode using the appropriate jumper on your MCU-Link. Refer to the board documentation for more information. Connect board via USB then press Space. Programming Firmware_J-Link-MCU-Link_230502.s19 Programmed successfully. - To use: remove ISP jumper and reboot. 私はまだ問題を抱えていましたが、この投稿は役に立ちました:https://community.nxp.com/t5/i-MX-RT/Failed-to-power-up-DAP-ERROR-Could-not-connect-to-target/m-p/1503062#M20946 そして、ついにオンボードデバッガーが動作するようになりました。 Re:1170EVKBのMCU-Linkファームウェアの更新 こんにちは@nickager  お元気にお会いできることを願っています。 i.MX RT1170-EVKはLPC43xxをオンボードデバッガとして実装し、i.MX RT1170-EVKBはLPC55s69(MCU-Link)を実装しています。もしかしたら、それが問題があった理由かもしれません。 ここからLinkserverをダウンロードしてください Windows用Linkserver 1.5.30インストーラー 。SWをインストールした後、C:\nxp\LinkServer_1.5.30\MCU-LINK_installer\scriptsでアップデートスクリプトを実行します(デフォルトのインストールパスを使用)。 MCU-Link FWは、上記LinkServer for Microcontrollersのページで配布しています。 これがお役に立てれば幸いです。 ディエゴ
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S32DS-S32K3xx SMP示例编译错误 我正在尝试编译 FreeRTOS_Toggle_Led_Example_S32K358_SMP 项目,它产生了以下错误: C:/NXP/workspaceS32DS.3.6.0/FreeRTOS_Toggle_Led_Example_S32K358_SMP/generate/include/FreeRTOSConfig.h:64:66:错误:函数“taskDISABLE_INTERRUPTS”的隐式声明[-Werror=implicit-function-declaration] arm-none-eabi-gcc“@RTD/src/Clock_Ip.args”-MMD-MP-MF“RTD/src/Clock_Ip_Monitor.d”-MT“RTD/src/Clock_Ip_Monitor.o”-o“RTD/src/Clock_Ip_Monitor.o”“../RTD/src/Clock_Ip_Monitor.c” 64 | #定义 configASSERT(x)if((x)==0){ taskDISABLE_INTERRUPTS(); 对于(;; ); } | ^~~~~~~~~~~~~~~~~~~~~~ ../FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:184:17: 注意:在宏“configASSERT”的扩展中 184 | configASSERT(Get_64(&ucRecursionCountByLock[ulLockNum])!= 255u); | ^~~~~~~~~~~~~~ 缺少#include? 有没有快速修复此问题的方法? 我正在使用 DS 3.6.0以及“适用于 S32K3XX 版本 5.0.0 的 FreeRTOS”包裹。示例取自“SW32K3 FreeRTOS 11.1.05.0.0上述包中的 CD1 D2409 示例项目部分。 谢谢 回复:S32DS-S32K3xx SMP示例编译错误 谢谢朱利安。成功了!
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Is there any other low-power mode besides standby for S32K344, such as sleep mode? Does S32K344 have sleep mode? Re: Is there any other low-power mode besides standby for S32K344, such as sleep mode? Hi@SCoder41 We first need to discuss the control method between S32K344 and your power management chip. If this is a control method of an IO port, it can generally be solved by the following methods 1. Pad Keeping feature, the IO port of S32K344 supports Pad Keeping feature, which allows the IO of S32K344 to maintain the state in RUN mode in Standby mode until the Pad Keeping feature is turned off 2. It can be achieved through some external switch circuits, such as setting a normally open or normally closed switch circuit according to the characteristics of your power management chip, so that the MCU control is only required in RUN mode. Re: Is there any other low-power mode besides standby for S32K344, such as sleep mode? Our S32K344 manages the power management chips that supply power to other modules, and requires S32K344 to enable these power management chips. If I wake up S32K344 from standby mode, it will perform a system reset from the reset handler to run the program, and other modules on our board will lose power. How can I solve this problem? Re: Is there any other low-power mode besides standby for S32K344, such as sleep mode? Our S32K344 manages the power management chips that supply power to other modules, and requires S32K344 to enable these power management chips. If I wake up S32K344 from standby mode, it will perform a system reset from the reset handler to run the program, and other modules on our board will lose power. How can I solve this problem? Re: Is there any other low-power mode besides standby for S32K344, such as sleep mode? Hi@SCoder41 Actually there should be only RUN mode and Standby mode, but in RUN mode you can enter VLSRun by lowering the main frequency, but it is still RUN mode. Senlent_1-1742177801088.png Senlent_2-1742177828211.png https://community.nxp.com/t5/S32K-Knowledge-Base/S32K3-Low-Power-Management-AN-and-demos/ta-p/1527724
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PN7150天线模型测量与仿真 您好,我正在尝试根据 AN12810 使用 nanovna 将我的 PN7150 系统与 Taoglas FXC.30.52.0075X.A.dg nfc 天线进行匹配,但我不确定我是否正确地完成了单独测量天线的第一步。 我调用了 nanovna 并将其直接连接到没有匹配电路的天线,得到了我所附的结果,它与预期的 AN12810.fig18 类似。 但是构建 rfsim99 模型时我使用了天线 ds 中给出的值,但我不知道如何让 sim 模型与测量结果相匹配作为起点。 我能得到一些关于如何改进模型的建议吗? 回复:PN7150天线模型测量与模拟 嗨,托马斯,谢谢,这很有帮助! 供其他关注的人参考,rfsim99 似乎只导入了 s1p 的前 2000 个点,因此您需要相应地裁剪或减少文件。 回复:PN7150天线模型测量与模拟 谢谢,我忘了说,作为这个项目的一部分,我正在考虑将设计从 PN7150 更新到 PN7160。关于这方面没有问题。 但是您是否读过我的问题并且对改进我的天线模型有什么见解? 回复:PN7150天线模型测量与模拟 你好@gwctree42 希望你一切都好。 请注意,不建议将PN7150用于新设计。我们建议改用PN7160 。 您需要根据从天线测量的值来计算 EMC 滤波器和匹配网络的组件。 请查看PN7150 天线设计和匹配指南。第 3 章描述了天线匹配的程序。此外, NFC 天线工具可能对您非常有帮助。 此外,请参考NFC 天线设计培训,这是一个在线培训系列,可以帮助您了解天线的关键方面、优化和调试以及测试,以获得最适合产品的天线。 问候, 爱德华多。
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MC9S12XEP100 Flash burner question MC9S12XEP100. Code Warrior 5.9.0, single chip, absolute assembler. I have a program, similar to the one I wrote using the MC9S12C64, but larger and more complex. I couldn't figure out the flash burner process for that one until I posted the question and Ladislav was able to explain it to me with his C64-FLASH-ASM test program. Using that I was able to get my program to work just fine. Now I am having the same issue using the MC9S12XEP100 processor. I was hoping there would be enough similarities in the process that I could adapt what I learned, but I'm having some difficulties. Is there a test program similar to the C64-FLASH-ASM, but specific to the MC9S12XEP100 in single chip, absolute assembler that I could study and see if I could get that to work? I'm attaching a basic test code that I am using to troubleshoot. Regards, Robert   Re: MC9S12XEP100 Flash burner question Hi Ladislav, Thanks so much for your detailed response. There are still a few minor errors in your comments, but no matter, I'm quite sure I know what you are doing and they really helped. Your screen shots of the memory window were a big revelation to me. I didn't know about the l, g and r suffix. That explains a lot. The spread sheet that compares the equivalent addresses also really helped in my education. I now feel I have a good understanding of what you have done and a better understanding of what the debugger can do. As a result of my new found knowledge I am realizing that I should be using EEPROM emulation. I have some questions about that in a separate thread.  Thanks once more for all your help and patience. Regards, Robert Re: MC9S12XEP100 Flash burner question Hi, I have found my notes contain copy/paste mistakes. I am not sure what are you looking at so more detailed comments. Moreover, I suppose the DFLASH is in erased status before it is written. Moreover, the question is how the RAM content is refreshed in your memory window. You should also check the setup lime it is done for DFLASH. The address 0x2100 is selected by compiler so the array is placed: Buffer[0] is at address 0x2100,0x2101    of a  local address space Buffer[1] is at address 0x2102,0x2103 Buffer[2] is at address 0x2104,0x2105 Buffer[3] is at address 0x2106,0x2106 Finally, it is good to understand local and global address space. The RAM 0x2100 is in local address space 0x2100 and in the global address space 0x0F_E100. Si memory map in attachment. ... and be careful when you show address space ... extension 'G  or 'L. For example 0FE100'G and 2100'L represents the same address from different views.  lama_0-1745926193582.png  .... does no exist lama_1-1745926193582.png .... the variable "buffer" in a local address space lama_2-1745926193583.png ... the variable "buffer" in a global address space better comments of the original asm code..            ;---------------------------             ;err = DFLASH_Program(0x0000, &buffer[0], 4); //write 4 words to D Flash address 0x10_0000             ; GPAGE (0x10_.... ) is not used in the Addr variable because it is directly used in the DFLASH_Program routine             MOVW  #$0000,Addr  ; address to be written 0x(10)0000~0x(10)0007                        MOVB  #4,Cnt       ; number of words to be written             ;for example data to be written into DFLASH are 0x0123, 0x4567, 0x89AB, 0xCDEF             ; written global DFLASH address is 0x10_0000’G   … for data visualization in a debugger memory             ; window“ ’G ” must be added into memory address             LDX   #Buffer      ; Load the base address of the array into X register, the base address                                              ; is selected by compiler if you do not set exact address             LDD  #$0123      ; Load the hexadecimal value 0x0123 into D register             STD  0,X                ; Store the value at the 0th position of the array;  Buffer[0] = 0x0123             LDD  #$4567      ; Load the value 0x4567 into D register             STD  2,X                ; Store the value at the 1st position of the array;  Buffer[1] = 0x4567             LDD  #$89AB      ; Load the value 0x89AB into D register             STD  4,X                ; Store the value at the 2nd position of the array;  Buffer[2] = 0x89AB             LDD  #$CDEF     ; Load the value 0xCDEF into D register             STD  6,X                ; Store the value at the 3rd position of the array;  Buffer[3] = 0xCDEF             CALL  DFLASH_Program  ; note there is a status of verification in the Err variable after execution of this command             ;---------------------------             ;err = DFLASH_Program(0x0008, &buffer[0], 4); //write 4 words to eeprom address 0x0000             ;… at this place you should check whether Err value is OK to be sure entire write process has             ;     finished correctly. I am not doing it in this example.             ;---------------------------             ; write another set of data to a 8 bites higher address of the DFLASH             ; written global DFLASH address is 0x10_0008’G             MOVW  #$0008,Addr  ; address to be written  0x(10)0008~0x(10)000F                        MOVB  #4,Cnt       ; number of words to be written                        ;for example data to be written into DFLASH are 0xDEAD,0xBEEF,0xC0DE,0xCAFE             LDX   #Buffer      ; Load the base address of the array into X register, the base address                                              ; is selected by compiler if you do not set exact address             LDD  #$DEAD     ; Load the hexadecimal value 0xDEAD into D register             STD  0,X                ; Store the value at the 0th position of the array;  Buffer[0] = 0x0123             LDD  #$BEEF      ; Load the value 0xBEEF into D register             STD  2,X                ; Store the value at the 1st position of the array;  Buffer[1] = 0x4567             LDD  #$C0DE      ; Load the value 0XC0DE into D register             STD  4,X                ; Store the value at the 2nd position of the array;  Buffer[2] = 0x89AB             LDD  #$CAFE     ; Load the value 0xCAFE into D register             STD  6,X                ; Store the value at the 3rd position of the array;  Buffer[3] = 0xCDEF             CALL  DFLASH_Program  ; note there is a status of verifiction in the Err variable after execution of this command             ;---------------------------             ;err = DFLASH_Program(0x0008, &buffer[0], 4); //write 4 words to eeprom address 0x0000             ;… at this place you should check whether Err value is OK to be sure entire write process has             ;     finished correctly. I am not doing it in this example.             ;--------------------------- Best regards, Ladislav Re: MC9S12XEP100 Flash burner question Hi Daniel, Freescale USBDM (from China). I use it successfully to load programs. Does that answer your question? Regards, Robert Re: MC9S12XEP100 Flash burner question Hi Robert, I mean debugger like PE Micro Multilink (with revision), USBDM, ... Re: MC9S12XEP100 Flash burner question Hi Daniel, Code Warrior IDE V5.9.0 Build 5294 Special Edition. Regards, Robert Re: MC9S12XEP100 Flash burner question Hello @roberthiebert, What debugger do you use? The debugger can interpret the data as 0xCAFE because of ECC, for example. Regards, Daniel Re: MC9S12XEP100 Flash burner question I've spent a lot of time stepping through this code and recording all the variable and register states on each step. I think I have a pretty good understanding of what is happening here, but one thing in particular still has me puzzled. In this section of code: LDX #Buffer ; Load the base address of the array into X register LDD #$0123 ; Load the value 0123 into A register STD 0,X ; Store the value at the 0th position of the array X is loaded with $2100, the address of "Buffer" in RAM D is loaded with decimal 0123 Decimal 0123 is copied into the first two bytes of the "Buffer" array at address $2100 in RAM. Now, when I use the debugger to check the contents of RAM address $2100 I see $CA, $FE in the first two bytes, and they never change. Why is this and where are the example words stored? Regards, Robert  Re: MC9S12XEP100 Flash burner question Hi, The topic has already been processes... https://community.nxp.com/t5/S12-MagniV-Microcontrollers/S12-X-MCU-Security/ta-p/1111118 https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Unsecuring-MC9S12XEP100MAG/m-p/617603 Best regards, Ladislav Re: MC9S12XEP100 Flash burner question Hi Ladislav, One more thing. I did some more research and I understand that in order for CW to be able to read the D-Flash the FSEC register needs to be set to $FE. I see that your code has done this, but I can't find out where and how you did it. Could you explain how I can do that in my code  please? Regards, Robert Re: MC9S12XEP100 Flash burner question Hi Ladislav, I have made some progress. To make a long story short, I discovered that my controller was secured. I don't know how that happened, but I was able to unsecure it and now your program is working the way you have shown in your last post. Now I am able to study your ASM code to make sure I understand it fully before I try to adapt  it it work in my code. I have one thing that is puzzling me though. If I am understanding you r code correctly, you have placed your test data to be burned to D-Flash, in RAM memory starting at Buffer: (address $2100). But when I look at that address all I ever see is $CA,$FE, repeat.  Why is this? Regards, Robert  Re: MC9S12XEP100 Flash burner question I have the memory set to refresh on halt, but no matter what I do, the memory never changes. I've tried setting breakpoints where I see you have highlighted, but nothing. I tired running the program and halting it at random points. No change. What am I doing wrong? Re: MC9S12XEP100 Flash burner question Hi, Do not step memory functions if the part of memory is displayed in the memory window of the debugger. Set refresh memory when halting lama_0-1744187836708.png lama_1-1744187836709.png lama_2-1744187836710.png First loop lama_3-1744187836713.png Second loop … after erase sector lama_4-1744187836719.png Second loop after writing data lama_5-1744187836724.png Second loop reading the data lama_6-1744187836726.png  lama_7-1744187836730.png  lama_8-1744187836733.png  lama_9-1744187836736.png Moreover, it is always suitable to disable possible interrupts to do not change registers. Create critical section which is not interrupted using CLI, SEI. Best regards, Ladislav Re: MC9S12XEP100 Flash burner question Hi again Ladislav, After stepping through the program again several times I noticed some other peculiar things. After running the FLASH_ERASE_VERIFY subroutine the returned "err" was $01. Which was expected. However, after any FLASH_PROGRAM subroutine "returned "err" was $40. The FLASH_READ  subroutine seems to work but it doesn't return the var_Data values I expected. It returns $FA, $CF first. $4 second. $BB $B6 third.  $46 $46 forth. The values at address $100000 are $FA, $CF, $00,$04,$BB, $B6, $46, $46. These are not the values that should have been burned to this address if I am understanding the program correctly. The values at address $2100 are $CA,$FE,$CA,$FE,$CA,$FE,$CA,$FE and they don't change. Something seems odd here. Regards, Robert  Re: MC9S12XEP100 Flash burner question Hi Ladislav, Thank you for that excellent attachment. It was just what I was looking for. It runs just fine on my controller, except for one thing. I can't seem to get the debugger to update the memory window, either for the RAM or the D-Flash. I when I single step through the program I expected to see the RAM addresses from $2100 to $2110 update with the appropriate steps. I'm not seeing this. I also expected to see the D-Flash addresses from $10000 to $100010 update as I step through, but I'm not seeing that either. Also, if I run the program and halt it, the memory locations are not updated. Are there some settings in the de-bugger that I don't have set right? Regards, Robert Re: MC9S12XEP100 Flash burner question I am very sorry but I see no issue to rebuilt C to ASM. C shows you principle and this C code is not a object oriented programming. It is simple Ansi C. Here you can see programming of D-Flash. (Not P-Flash, it is a little bit different but in principle very similar) ;************************************************************** ;* This stationery serves as the framework for a * ;* user application. For a more comprehensive program that * ;* demonstrates the more advanced functionality of this * ;* processor, please see the demonstration applications * ;* located in the examples subdirectory of the * ;* Freescale CodeWarrior for the HC12 Program directory * ;************************************************************** ; Include derivative-specific definitions INCLUDE 'derivative.inc' ; export symbols XDEF Entry, _Startup, main ; we use export 'Entry' as symbol. This allows us to ; reference 'Entry' either in the linker .prm file ; or from C/C++ later on XREF __SEG_END_SSTACK ; symbol defined by the linker for the end of the stack ;********************************************************************* OK EQU 0 ERASED EQU 1 NON_ERASED EQU 2 LENGTH_OUT_OF_RANGE EQU 3 ;********************************************************************* ; variable/data section MY_EXTENDED_RAM: SECTION ; Insert here your data definition. Buffer ds.w 4; Err ds.b 1; Addr ds.w 1; Cnt ds.b 1; var_i ds.b 1; var_j ds.b 1; var_Data ds.w 1; ;********************************************************************* ; code section MyCode: SECTION main: _Startup: Entry: ;--------------------------- LDS #__SEG_END_SSTACK ; initialize the stack pointer CLI ; enable interrupts ;--------------------------- EndlessLoop: ;--------------------------- ;EE_Init ... 0x0F //oscillator 16MHz -> divide by 0x0F to achieve FCLK 800kHz - 1.05MHz ;while(FSTAT_CCIF == 0); //wait if command in progress BRCLR FSTAT,#128,*+0 ;abs = 0001 ;FCLKDIV = fdiv; //osc = 16MHz LDAB #$0F STAB FCLKDIV ;--------------------------- ;DFLASH_Erase_Sector(0x0000); //erase first sector (256 bytes) MOVW #$0000,Addr CALL DFLASH_Erase_Sector ;--------------------------- ;err = DFLASH_Erase_Verify(0x0000, 16); //check if 16 words are erased - we will receive ERASED message MOVW #$0000,Addr MOVB #16,Cnt CALL DFLASH_Erase_Verify ; note there is a status of verification in the Err variable after execution of this command ;--------------------------- ;err = DFLASH_Program(0x0000, &buffer[0], 4); //write 4 words to D Flash address 0x0000 MOVW #$0000,Addr ; address to be written MOVB #4,Cnt ; number of words to be written ;for example data to be written into DFLASH are 0123, 4567, 89AB, CDEF LDX #Buffer ; Load the base address of the array into X register LDD #$0123 ; Load the value 0123 into A register STD 0,X ; Store the value at the 0th position of the array LDD #$4567 ; Load the value 4567 into A register STD 2,X ; Store the value at the 1st position of the array LDD #$89AB ; Load the value 89SB into A register STD 4,X ; Store the value at the 2nd position of the array LDD #$CDEF ; Load the value CDEF into A register STD 6,X ; Store the value at the 3rd position of the array CALL DFLASH_Program ; note there is a status of verifiction in the Err variable after execution of this command ;--------------------------- ;err = DFLASH_Program(0x0008, &buffer[0], 4); //write 4 words to eeprom address 0x0000 MOVW #$0008,Addr ; address to be written MOVB #4,Cnt ; number of words to be written ;for example data to be written into DFLASH are 0123, 4567, 89AB, CDEF LDX #Buffer ; Load the base address of the array into X register LDD #$DEAD ; Load the value 0123 into A register STD 0,X ; Store the value at the 0th position of the array LDD #$BEEF ; Load the value 4567 into A register STD 2,X ; Store the value at the 1st position of the array LDD #$C0DE ; Load the value 89SB into A register STD 4,X ; Store the value at the 2nd position of the array LDD #$CAFE ; Load the value CDEF into A register STD 6,X ; Store the value at the 3rd position of the array CALL DFLASH_Program ; note there is a status of verifiction in the Err variable after execution of this command ;--------------------------- ; get written data ;--------------------------- MOVW #$0000,Addr CALL DFLASH_Read STD var_Data MOVW #$0002,Addr CALL DFLASH_Read STD var_Data MOVW #$0004,Addr CALL DFLASH_Read STD var_Data MOVW #$0006,Addr CALL DFLASH_Read STD var_Data ;--------------------------- JMP EndlessLoop ; restart. ;--------------------------- ;********************************************************************* ;DFLASH_Read ;********************************************************************* DFLASH_Read: MOVB #$10, GPAGE LDX Addr GLDD X RTC ;********************************************************************* ;DFLASH_Program ;********************************************************************* DFLASH_Program: ;if((Cnt < 1) || (Cnt > 4)) LDAB Cnt CMPB #1 BCS LBL_DP1 CMPB #4 BLS LBL_DP2 ;return LENGTH_OUT_OF_RANGE; LBL_DP1: MOVB #LENGTH_OUT_OF_RANGE,Err RTC LBL_DP2: ;while(FSTAT_CCIF == 0); //wait if command in progress BRCLR FSTAT,#128,*+0 ;abs = 000e ;FSTAT = 0x30; //clear ACCERR and PVIOL MOVB #$30, FSTAT ;FCCOBIX = 0x00; CLR FCCOBIX ;FCCOB = 0x1110; MOVW #$1110,FCCOB ;FCCOBIX = 0x01; MOVB #$1,FCCOBIX ;FCCOB = address; MOVW Addr,FCCOB ;for(i=2; i<=Cnt+1; i++) //fill appropriate number of words to FCCOB CLRA LDX #Buffer LDAB Cnt INCB STAB var_j ; end variable of cycle LDAA #$2 ; start value of cycle LBL_DP3: ;FCCOBIX = A = 2 to {3,4,5}; STAA FCCOBIX ;FCCOB = *ptr; LDD 2,X+ STD FCCOB LDAA FCCOBIX INCA CMPA var_j BLS LBL_DP3 ;FSTAT_CCIF = 1; //launch command BSET FSTAT,#128 ;while(FSTAT_CCIF == 0); //wait for done BRCLR FSTAT,#128,*+0 ;abs = 004b ;return OK; MOVB OK,Err RTC ;********************************************************************* ;DFLASH_Erase_Verify ;********************************************************************* DFLASH_Erase_Verify: ;while(FSTAT_CCIF == 0); //wait if command in progress BRCLR FSTAT,#128,*+0 ;abs = 0001 ;FSTAT = 0x30; //clear ACCERR and PVIOL MOVB #$30,FSTAT ;FCCOBIX = 0x00; CLR FCCOBIX ;FCCOB = 0x1010; MOVW #$1010, FCCOB ;FCCOBIX = 0x01; MOVB #$1, FCCOBIX ;FCCOB = address; MOVW Addr, FCCOB ;FCCOBIX = 0x02; MOVB #$2, FCCOBIX ;FCCOB = number_of_bytes; MOVB Cnt,FCCOB ;FSTAT_CCIF = 1; //launch command BSET FSTAT,#128 ;while(FSTAT_CCIF == 0); //wait for done BRCLR FSTAT,#128,*+0 ;abs = 002b ;if(FSTAT_MGSTAT == 0) BRCLR FSTAT,#3,*+7 ;abs = 0037 BRA lbl_nonerased ;return ERASED; MOVB #ERASED, Err RTC lbl_nonerased: ;return NON_ERASED; MOVB #NON_ERASED, Err RTC ;********************************************************************* ;void DFLASH_Erase_Sector(unsigned int address) ;********************************************************************* DFLASH_Erase_Sector: ;while(FSTAT_CCIF == 0); //wait if command in progress BRCLR FSTAT,#128,*+0 ;abs = 0001 ;FSTAT = 0x30; //clear ACCERR and PVIOL MOVB #$30, FSTAT ;FCCOBIX = 0x00; CLR FCCOBIX ;FCCOB = 0x1210; MOVW #$1210, FCCOB ;FCCOBIX = 0x01; MOVB #$1, FCCOBIX ;FCCOB = address; MOVW Addr,FCCOB ;FSTAT_CCIF = 1; //launch command BSET FSTAT,#128 ;while(FSTAT_CCIF == 0); //wait for done BRCLR FSTAT,#128,*+0 ;abs = 0022 RTC ;********************************************************************* ;********************************************************************* ;********************************************************************* ;********************************************************************* ;********************************************************************* Re: MC9S12XEP100 Flash burner question I'm still working hard at trying to figure this "C" code out but getting nowhere. The code runs and says that the first 256 bytes in D Flash have been erased at $10_0000, but I don't see that. Then it says that buffer[0] has been written into $0_0000, $10_0008 and $10_0010, But I don't see that either. What am I missing here? Regards, Robert Re: MC9S12XEP100 Flash burner question I'm still not getting anywhere with this. I've tried to figure out the ASM by stepping through the code, but I really have to be able to understand what the program is doing in "C" first. I believe that it partitions the DFlash then erases it all. Then it writes 16 bytes that it had written into RAM into D FLash. I can find the bytes in RAM, but in no place in D Flash can I find where it has written them in.  Any suggestions would be greatly appreciated. Regards, Robert Re: MC9S12XEP100 Flash burner question Hi Ladislav, This is not easy stuff for me, but I was able to load your XEP100-DFLASH-CW47 program into my controller using a USBDM. I believe the program is running correctly. I expected to see the D-Flash address from $10_0000 loaded with $12, $34, $56, $78 $9A, $BC, $DE, $F0, but nothing is there. I also expected to see each of the remainder of the 256 byte sector loaded with $FF.  Perhaps my understanding of how the program is supposed to work is flawed? Regards, Robert Re: MC9S12XEP100 Flash burner question Hi Ladislav, Thanks again for your prompt reply and the files. I am not a "C" engineer and only have a basic knowledge of the language so the disassembly process will be challenging, but I'll give it my best shot. Regards, Robert Re: MC9S12XEP100 Flash burner question Hi, there are no similarities. It is 2 levels higher MCU with different memory organization. In this case I suggest to use DFLASH for data storage. There is no ASM code available but I believe it is not any problem to do it by disassembling C code. If you are C coding engineer it must be easy for you to rebuilt it to asm. Here is a C code and the project is attached. You can go/step through the ASM code in debugger to see how it works. I have also attached C code for PFLASH programming. Nothing easier but it does not require to  perform partitioning of this memory. There are some similarities in addresses but global address must be used for data E/W. Short (4000-7FFF) and PPAGE_Offset addresses are used for program execution. In the case of the MCU it will require more effort to understand how flash is organized and how it works. Moreover, to go from relocatable assembly of the single file project to the absolute assembly is easy. Directive EQU is used for data placement into RAM and ORG is used to place code in given PFLASH space. What is necessary to be understand is that for reading and writing DFLASH the global address must be used. However in the case of this memory it is solved easily because it has higher word (DPAFE ) always 0x10 so it is enough to send to the routine only offset in the range 0000-7FFF and full address is created in routine, for example DFLASH_Program.. I am sorry we do not have any empty space, resources or responsibility for such complex projects … plus in assembler. Best regards, Ladislav Re: MC9S12XEP100 Flash burner question Oops. I forgot to mention that when I try to erase the sectors I get an Access Error code. Regards, Robert Re: MC9S12XEP100 Flash burner question I'll try the attachment again
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S32K344裸机DMA初始化 我的 DMA 初始化出现了问题。我无法使用裸机编程来初始化 DMA。未调用中断且未传递任何数据。同时,SPI 中断正在工作。你能检查一下我的 DMA 配置吗?我还在“IP_LPSPI/n/->DER”寄存器中设置了“LPSPI_DER_RDDE”位。这应该设置 DMA 来接收数据。 void DMA_Init(volatile uint32_t rxBuffer) { /* For remaining S32K3xx devices: DMAMUX_0 channel 0-15 and DMAMUX_1 channel 0-15 are mapped to eDMA Transfer Control Descriptor(TCD) 0-15 and eDMA Transfer Control Descriptor(TCD) 16-31, respectively */ // TCD register init IP_TCD->TCD0_SADDR = 0U; IP_TCD->TCD0_SOFF = 0; IP_TCD->TCD0_ATTR = 0U; IP_TCD->NBYTES0.TCD0_NBYTES_MLOFFNO = 0U; IP_TCD->NBYTES0.TCD0_NBYTES_MLOFFYES = 0U; IP_TCD->TCD0_SLAST_SDA = 0; IP_TCD->TCD0_DADDR = 0U; IP_TCD->TCD0_DOFF = 0; IP_TCD->CITER0.TCD0_CITER_ELINKNO = 0U; IP_TCD->CITER0.TCD0_CITER_ELINKYES = 0U; IP_TCD->TCD0_DLAST_SGA = 0; IP_TCD->TCD0_CSR = 0U; IP_TCD->BITER0.TCD0_BITER_ELINKNO = 0U; IP_TCD->BITER0.TCD0_BITER_ELINKYES = 0U; //===== DMA MUX =====// // Enable a source without periodic triggering // 1. Determine the DMA channel with which the source is associated. // LPSPI1 DMA RX Request -> Source 46 // 2. Write 0 to CHCFGn[ENBL] and CHCFGn[TRIG] of the DMA channel. IP_DMAMUX_0->CHCFG[0] &= ~DMAMUX_CHCFG_ENBL_MASK; IP_DMAMUX_0->CHCFG[0] &= ~DMAMUX_CHCFG_TRIG_MASK; // 3. You can enable the DMA channel at this point. IP_DMAMUX_0->CHCFG[0] |= DMAMUX_CHCFG_ENBL_MASK; // 4. Select the source to be routed to the DMA channel. IP_DMAMUX_0->CHCFG[0] |= DMAMUX_CHCFG_SOURCE(46); //===== eDMA =====// // 1. Write to the CSR if a configuration other than the default is wanted. // 2. Write the channel priority levels to the CHn_PRI registers and group priority levels to the CHn_GRPRI registers if a // configuration other than the default is wanted. // 3. Enable error interrupts in the CHn_CSR[EEI] registers if they are wanted. // 4. Write the 32-byte TCD for each channel that may request service. // CH0_SBR_MID: Default master id -> 0b10 // Source address -> SPI receive buffer IP_TCD->TCD0_SADDR = IP_LPSPI_1->RDR; // Destination address IP_TCD->TCD0_DADDR = rxBuffer; // Source Address Offset IP_TCD->TCD0_SOFF = 4; // Destination Address Offset IP_TCD->TCD0_DOFF = 4; // Source size: 32-bit IP_TCD->TCD0_ATTR |= DMA_TCD_TCD0_ATTR_SSIZE(0b10); // Destination size: 32-bit IP_TCD->TCD0_ATTR |= DMA_TCD_TCD0_ATTR_DSIZE(0b10); // 4 byte transfer IP_TCD->NBYTES0.TCD0_NBYTES_MLOFFNO = 4; // Current Major Loop Count IP_TCD->CITER0.TCD0_CITER_ELINKNO = 1; // Beginning Major Loop Count IP_TCD->BITER0.TCD0_BITER_ELINKNO = 1; // Interrupt after transfer is complete IP_TCD->TCD0_CSR |= DMA_TCD_TCD0_CSR_INTMAJOR_MASK; // Enable interrupt __NVIC_ClearPendingIRQ(DMATCD0_IRQn); __NVIC_SetPriority(DMATCD0_IRQn, 0); __NVIC_EnableIRQ(DMATCD0_IRQn); // 5. Enable any hardware service requests via the CHn_CSR[ERQ] registers. IP_TCD->CH0_CSR |= DMA_TCD_CH0_CSR_ERQ_MASK; } void DMATCD0_Handler(void) { // Print rxBuffer printf("rxBuffer: %ld", rxBuffer); // Clear interrupt request IP_TCD->CH0_INT = 1; } 回复:S32K344裸机DMA初始化 谢谢你的帮助,它有效 回复:S32K344裸机DMA初始化 你好, 我禁用了源地址偏移,但没有任何变化。EDMA 中没有错误标志。我在不可缓存的 SRAM 中有缓冲区。 NVIC->ISER[0] = 0x10; NVIC->ISER[5] = 0x40; NVIC->ICER[0] = 0x10; NVIC->ICER[5] = 0x40 EDMA->CSR = 0x300000 EDMA 和 NVIC 中的其他寄存器字段为空。
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FreeMaster using PE micro debugger As mentioned FreeMASTER support real-time debug monitor and data visualization tool that enables runtime configuration and tuning of embedded software applications. I tried to connect NXP microcontroller and FreeMaster through PE micro multi universal debugger for monitoring the variable at run time. But i cant make it proper.  Is is possible  to use FreeMASTER using PE micro multi universal debugger for monitoring data?   Re: FreeMaster using PE micro debugger Hi @MichalH  Thanks you for you quick Response. My issues is solved. Regards, Stark_ Re: FreeMaster using PE micro debugger OK, so the connection problem is resolved. For general use of FreeMASTER, please refer to User Guide.  In short: you have used the ELF file to load symbols; now you need to create so called FreeMASTER Variables, where you select a symbol/address, size, reading period, format, etc. to be displayed in FreeMASTER. Once you have the FreeMASTER variables defined, you can observe them in a grid or in graphs. Please close this thread as the initial issue has been resolved.  If you have any questions on general FreeMASTER usage after reading the User Guide, please start a new thread on this forum. Regards, Michal Re: FreeMaster using PE micro debugger Hi @MichalH  Connection are done when i start the communication popup show for for load the executable file, I also load the .elf file which is created in my project. but how to import the variable that are used in my project? Regards, Stark_ Re: FreeMaster using PE micro debugger There are two important points: The S32 Design Studio (debugger) must be disconnected from the target when attaching FreeMASTER. The P&E probes cannot handle simultaneous connection from two client applications. The FreeMASTER plug-in shall know what MCU part number you are using.  Go to Project/Options, open the configuration dialog and select the MCU type like in the picture below: MichalH_1-1743674891142.png Regards, Michal Re: FreeMaster using PE micro debugger Hi @MichalH  once I flash my microcontroller after that i just connect with FreeMASTER. but it show an error MCU is used is S32K3 series P&E micro Multilink universal FX IDE used S32 Design studio Regards, Stark_ Re: FreeMaster using PE micro debugger The error you show now in the screenshot is reported by the P&E Micro debugging function already - it seems the P&E probe cannot connect to the target MCU. What is your target MCU?  What is the type of P&E probe? Can you use a CodeWarrior or other debugger with the P&E probe? Thanks, Michal Re: FreeMaster using PE micro debugger Hi @MichalH  Thanks for the quick response. As you said " Project/Options - the drop-down list of Plug-in modules will probably be empty in your case " was correct and followed the step you mention, after that can able to see the plugin in FreeMASTER. when i try to run with the mention setting (i.e, FreeMaster P&Emicro communication plugin (Cortex-M, power pc, HCS08/12, Cold fire) ). but again got an error message. Is is possible to use FreeMASTER with P&Emicro debugger? for that any lib should be added in project file ? Re: FreeMaster using PE micro debugger Hello, from your screenshot it seems like a problem in FreeMASTER installation. The communication plug-ins are probably not installed properly. You can confirm this by going to Project/Options - the drop-down list of Plug-in modules will probably be empty in your case: MichalH_0-1743668612039.png How to fix the installation: Close FreeMASTER Open file explorer in "c:\NXP\FreeMASTER 3.2\FreeMASTER" directory Locate the "register.bat" file Right-click the file and select "Run as administrator" Start FreeMASTER, the plug-ins shall now be visible in Project/Options dialog. Regards, Michal
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PEマイクロデバッガを使用したFreeMaster 前述のように、FreeMASTERは、組み込みソフトウェアアプリケーションのランタイム構成とチューニングを可能にするリアルタイムデバッグモニターとデータ視覚化ツールをサポートしています。 実行時に変数を監視するために、NXPマイクロコントローラーとFreeMasterをPEマイクロマルチユニバーサルデバッガーを介して接続しようとしました。しかし、私はそれを適切にすることはできません。 PE micro multi universal debuggerを使用してFreeMASTERをデータ監視に利用することは可能ですか?   Re:PEマイクロデバッガを使用したFreeMaster OK、接続の問題が解決しました。 FreeMASTERの一般的な使用方法については、ユーザーガイドを参照してください。要するに、ELFファイルを使用してシンボルをロードしました。次に、FreeMASTERに表示するシンボル/アドレス、サイズ、読み取り期間、形式などを選択する、いわゆるFreeMASTER変数を作成する必要があります。FreeMASTER変数を定義したら、グリッドまたはグラフでそれらを観察できます。 最初の問題が解決されたため、このスレッドを閉じてください。ユーザーガイドを読んだ後、一般的なFreeMASTERの使用について質問がある場合は、このフォーラムで新しいスレッドを開始してください。 よろしく ミハル Re:PEマイクロデバッガを使用したFreeMaster スクリーンショットに示しているエラーは、P&E Microのデバッグ機能によってすでに報告されています - P&EプローブがターゲットMCUに接続できないようです。 ターゲットとするMCUは何ですか? P&Eプローブの種類は何ですか? CodeWarriorまたはその他のデバッガをP&Eプローブと一緒に使用できますか? 感謝 ミハル
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S32G3 GMAC and PFE pin assignment Hello, I am using S32DS pin tools to configure GMAC0, PFE0/1/2 interfaces. However, I am encountering numerous pin conflicts between GMAC0 and PFE1, as well as between PFE0 and PFE2. According to the "S32G-VNP-RDB3 Ethernet Enablement Guide," it seems that all four interfaces are able to be configured simultaneously, and supports multiple combinations. The dts/dtsi patch files do not provide sufficient information regarding the pin assignments when attempting to use all four interfaces together. My questions are as follows: Can all four interfaces (GMAC0, PFE0, PFE1, and PFE2) be used together? If so, are there any restrictions? If it is possible to use all four interfaces simultaneously, can you provide an example of the correct pin assignment? I am struggling to find enough available pins for all of them using S32DS. Thank you for your assistance. XD  Re: S32G3 GMAC and PFE pin assignment Hello, @XD  Thanks for the update. Yes, the PFE0 and PFE2 could be used simultaneously. Because on RDB3 with the BSP, the PFE0 is working on SGMII mode by default, the pins you listed are not actually used by PFE0, but by PFE2, so that no pin conflicts existed from my understanding. Best Regards Chenyin Re: S32G3 GMAC and PFE pin assignment Hi Chenyin, I appreciate your support, and the files you provided are very helpful. According to the S32g.dtsi file, I noticed that PFE0 and PFE2 are using almost the same pin groups. Below are the PFE0/2 TX pin groups I found: pfe0_pins: pfe0 { pfe0_grp0 { pinmux = , , , , ; output-enable; slew-rate = ; }; pfe2_pins: pfe2 { pfe2_grp0 { pinmux = , , , , ; output-enable; slew-rate = ; }; Given this overlap, could you please clarify how we can use PFE0 and PFE2 simultaneously? Thank you for your assistance. XD Re: S32G3 GMAC and PFE pin assignment Hello, @XD  It is my pleasure to support. You may reference the dts file in TF-A’s source code, under fdts/, with the name s32xxx.dts/dtsi Hope it helps Best Regards Chenyin Re: S32G3 GMAC and PFE pin assignment Hi Chenyin, Thank you for your quick response. Regarding item 2, are the files in the kernel source code? Could you please point me to the DTS file name or the folder name of TF-A? Thanks, XD Re: S32G3 GMAC and PFE pin assignment Hello, @XD  Thanks for the questions. Yes, all four interfaces (GMAC0, PFE0, PFE1, and PFE2) could be used together; for combinations, you may reference the chapter 53 of S32G3RM for the details of serdes working modes.(Page2756-2757 of S32G3 Reference Manual, Rev 3.1) With the default settings of BSP, for example, BSP41, the four interfaces could be used simultaneously, you may reference the dts files in TF-A for the details. Best Regards Chenyin
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DMA 4.0.0 驱动程序不允许配置 DMA 请求(对于 LPSPI) 带有DS3.5和RTD 4.0.0.202311,micro S32K344 我尝试配置 LPSPI 来使用 DMA。 DMA_IP 不允许选择 DMAMUX 源。 附件中有 UM 屏幕截图和 DS 的实际情况。 UM 表明 DMA 通道与该示例中的 SPI2_Tx 源相链接。 实际配置没有任何字段来配置 DMA 源。 只需选择任意两个 DMA 硬件通道并告诉 LPSPI 将它们用于 SPI tx/rx 就足够了吗? S32K1系列的S32SDK
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LPSPI after Lpspi_Ip_AsyncTransmit stays in BUSY state Lpspi_Ip_AsyncTransmit() call gets executed once with expected  SPI waveforms. Other calls are rejected because drives stays in LPSPI_IP_BUSY state. I have a workaround to call Lpspi_Ip_Cancel() when BUSY state is reported: if (Lpspi_Ip_GetStatus() == LPSPI_IP_BUSY) Lpspi_Ip_Cancel(); Lpspi_Ip_AsyncTransmit(); This works but I won't want to keep using that cancel call. What can keep driver in BUSY state even after all needed data are properly Tx/Rx by SPI? I use RTD 4.0.0, SPI with Tx/Rx DMA channels. DMA does not have global/transfer/scatter configs, also no interrupt callback. S32 SDK for S32V Re: LPSPI after Lpspi_Ip_AsyncTransmit stays in BUSY state I ended up with writing my own function using synchronous transmit as example. It was possible to use fifo and have function that does not use interrupts(well, almost) and dma and returns immediately. That works similar to Lpspi_Ip_AsyncTransmit for my project. Re: LPSPI after Lpspi_Ip_AsyncTransmit stays in BUSY state Please create a new thread, Thank you, Daniel Re: LPSPI after Lpspi_Ip_AsyncTransmit stays in BUSY state Hello Daniel, We have the same issue For S32k44, configured LPSPI using EB tresos and tried to transmit data using Lpspi_Ip_AsyncTransmit() call gets executed once Other calls are rejected because the drives stays in LPSPI_IP_BUSY state . Can please share Example project of S32K344(with EB tresos configuration) for Lpspi_Ip_AsyncTransmit(); using Dma ? Re: LPSPI after Lpspi_Ip_AsyncTransmit stays in BUSY state Try enabling Global config in the in the DMA driver. Please share the whole project (or a test project that can demonstrate the issue,) so that I can test it. Thank you, BR, Daniel Re: LPSPI after Lpspi_Ip_AsyncTransmit stays in BUSY state Hello, I added DMA ISRs (I use same DMA channels as the example) to IntCtrl_Ip sstelmak_1-1721932993339.png Nothing changed after that, and I didn't see that any of those interrupts were called. Re: LPSPI after Lpspi_Ip_AsyncTransmit stays in BUSY state Hi @sstelmak, The driver requires the DMA interrupts. Have a look at the Lpspi_Flexio_Ip_Transfer_S32K344 example, where the FlexIO_SPI driver uses DMA. BR, Daniel Re: LPSPI after Lpspi_Ip_AsyncTransmit stays in BUSY state Hello, I can't post entire project per company policies, it would be ok to email it directly. Attached is the mex and few relevant c files.  DMA or SPI interrupts are not configured. This is because I have restriction for micro throughput and looking for possibility to skip unnecessary calls. Re: LPSPI after Lpspi_Ip_AsyncTransmit stays in BUSY state Hi @sstelmak, I understand the driver never becomes IDLE after the transfer. It would help if you could share the project so that I can test it. Did you enable DMA interrups in the IntCtrl_Ip driver? Regards, Daniel
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