Multi Source Translation Content

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Multi Source Translation Content

ディスカッション

ソート順:
关于IMX6的SDIO的问题 在IMX6的数据手册中发该芯片的SDIO接口支持SDXC这个标准,请问是否可以确认IMX6是支持512GB的SD卡?? The IMX6's SDIO interface supports SDXC.Can you confirm IMX6 support capacity of 512GB SD card?  General
記事全体を表示
All Example S32K312 DS3.5 RTD-3.0.0  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** For S32K312, please use this correct clock HSE to AIPS clock should be ½. Please make these changes in the below all example code clock setting. HSE clock to 60 MHZ. Dinesh_Guleria_0-1717149049774.png S32K312 PIT BTCU ADC-1 BCTU_ADC_DATA_REG DMA :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-PIT-BTCU-ADC-1-BCTU-ADC-DATA-REG-DMA-DS3-5/ta-p/1787778 S32K312 UART Transmit & Receive Using DMA :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-UART-Transmit-amp-Receive-Using-DMA-DS3-5-RTD300/ta-p/1787799 S32K312 EIRQ Interrupt :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-EIRQ-Interrupt-DS3-5-RTD300/ta-p/1787860 S32K312 SPI Transmit & Receive Using DMA :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-SPI-Transmit-amp-Receive-Using-DMA-DS3-5-RTD300/ta-p/1787856 Example S32K31 SPI multiple packet Transmit & Receive : solution for DMA Cache issue :- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K31-SPI-multiple-packet-Transmit-amp-Receive-solution/ta-p/2130091 Example S32K312 SPI Transmit & Receive Using Polling DS3.5 RTD300 :-- Example S32K312 SPI Transmit & Receive Using Polling DS3.5 RTD300 - NXP Community Example S32K312 SPI Transmit & Receive Using Interrupt DS3.5 RTD300 :-- Example S32K312 SPI Transmit & Receive Using Interrupt DS3.5 RTD300 - NXP Community S32K312 CAN Transmit & Receive Using Polling mode :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-CAN-Transmit-amp-Receive-Using-Polling-mode-DS3/ta-p/1789191 S32K312 CAN Transmit & Receive Using MB & FIFO DMA :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-CAN-Transmit-amp-Receive-Using-MB-amp-FIFO-DMA/ta-p/1789196 S32K312 ADC :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-ADC-DS3-5-RTD300/ta-p/1789282 S32K312 Switch Debouncing :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Switch-Debouncing-DS3-5-RTD300/ta-p/1789290 S32K312 UART Freemaster :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-UART-Freemaster-DS3-5-RTD300/ta-p/1789306 S32K312 PIT BTCU parallel ADC FIFO DMA  :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-PIT-BTCU-parallel-ADC-FIFO-DMA-DS3-5-RTD300/ta-p/1789908 S32K312 placing variables in DTCM & code in ITCM  :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-placing-variables-in-DCTM-amp-code-in-ICTM-DS3-5/ta-p/1790101 Example S32K312 Standby mode & Standby RAM and PAD keeping DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Standby-mode-amp-Standby-RAM-and-PAD-keeping-DS3/ta-p/1797713 Example S32K312 SWT DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-SWT-DS3-5-RTD300/ta-p/1800559 Example S32K312 Printf Semihosting DS3.5 RTD300 :--- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Printf-Semihosting-DS3-5-RTD300/ta-p/1801354 Example S32K312 I2C Transmit & Receive Using DMA DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-I2C-Transmit-amp-Receive-Using-DMA-DS3-5-RTD300/ta-p/1801357 Example S32K312 HARDFAULT Handling Interrupt DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Handling-Interrupt-DS3-5-RTD300/ta-p/1806259 Example S32K312 Bootloader to Application Jump DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Bootloader-to-Application-Jump-DS3-5-RTD300/ta-p/1809810 Example S32K312 PIT timer Toggle LED DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-PIT-timer-Toggle-LED-DS3-5-RTD300/ta-p/1809932 Example S32K312 HARDFAULT Interrupt Handling using a script DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Interrupt-Handling-using-a-script-DS3/ta-p/1818507 Example S32K312 UART Transmit & Receive Using Interrupt DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-UART-Transmit-amp-Receive-Using-Interrupt-DS3-5/ta-p/1818775 Example S32K312 CAN Transmit & Receive Using MB Interrupt DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-CAN-Transmit-amp-Receive-Using-MB-Interrupt-DS3/ta-p/1818790 Example S32K312 STANDBY wake up using CAN-0-RX and GPIO Switch DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-STANDBY-wake-up-using-CAN-0-RX-and-GPIO-Switch/ta-p/1891411 Example S32K312 STANDBY wake up using RTC DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-STANDBY-wake-up-using-RTC-DS3-5-RTD300/ta-p/1930115 S32K312 : ADC Clock selection :-- https://community.nxp.com/t5/S32K-Knowledge-Base/S32K312-ADC-Clock-selection/ta-p/1997759 Example IP S32K312 PWM ICU using EMIOS Custom IRQ DS3.5 RTD300 :-- Example IP S32K312 PWM ICU using EMIOS DS3.5 RTD300 - NXP Community Example IP S32K312 EMIO PWM Generation & Duty capture using Interrupt DS3.5 RTD300 :-- Example IP S32K312 EMIO PWM Generation & Duty capture using Interrupt DS3.5 RTD300 - NXP Community Example IP S32K312 EMIO PWM Generation & Duty capture using Polling DS3.5 RTD300 :-- Example IP S32K312 EMIO PWM Generation & Duty capture using Polling DS3.5 RTD300 - NXP Community Example S32K312 Continuous SPI Transmit & Receive Using DMA DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-Continuous-SPI-Transmit-amp-Receive-Using-DMA/ta-p/2024597 S32K312 : HSE Demo project :-- https://community.nxp.com/t5/S32K-Knowledge-Base/S32K312-HSE-Demo-project/ta-p/2112562 S32K312 : FS26 Watchdog trigger using the SBC_FS26 CDD :-- https://community.nxp.com/t5/S32K-Knowledge-Base/S32K312-FS26-Watchdog-trigger-using-the-SBC-FS26-CDD/ta-p/2161357
記事全体を表示
S32K Examples S32K1xx S32K144 Example S32K144 CMP Round-robin S32DS2.0  Example S32K144 Verify Backdoor Access Key S32DS1.3  Example S32K144 FlexCAN0 RXFIFO DMA nonSDK S32DS13  Example S32K144 PDB ADC trigger DMA ISR S32DS  Example S32K144 Flash RW simple S32DS  Example S32K144 DMA memory copy test S32DS  Example S32K144 EEEPROM usage Example S32K144 EEEPROM usage - No SDK  Example S32K144 RTC VLPS  Example S32K144 WDOG RCM interrupt  Example S32K144 SRAM ECC Injection  Example S32K144 RAM Retention S32DS.R1 Example S32K144 I2C Master MPL3115A2 S32DSR1_v3  Example S32K144 FlexCAN RXFIFO DMA S32DS.ARM.2018.R1  Example S32K144_printf_implementation - S32DS_1.0  Example S32k144 UART printf/scanf under FreeRTOS - S32DS Example S32K144 SDK Function call on configurable period using LPIT timer.  Example S32K144 .noinit section usage Example S32K144 PDB ADC DMA S32DS.ARM.2018.R1   Example S32K144 RAM selftest simple S32DS 2018.R1  Example S32K144 Position Independent Code  Example S32K144 FlexCAN Pretended Networking STOP mode test S32DS.ARM.2.2  Example S32K144 LPIT DMA LPSPI  Example S32K144 FlexCAN TX/RX/Error ISR test S32DS2.2  Example S32K144 FlexIO Idle Detection S32DS2.2 S32K142 Example_S32K142_LMEN_Cache_v1_0_S32DS3.6_RTD300  Lauterbach_Script_For_MDM_AP_Mass_erase_S32K142  S32K146 Example S32K146 Set_whole_FlexRAM-as_RAM S32DS.ARM.2.2 S32K148 Example S32K148 PDB0-PDB1 ring S32DS3.4 RTM4.0.3  Example S32K148 PDB0-PDB1 ring DMA S32DS3.4 RTM4.0.3  Example S32K148 GPIO Interrupt   S32K116 Example S32K116 WDOG Fast Test  Example S32K116 LPUART LIN Slave TXRX ISR S32DS.ARM.2.2  Example S32K116 FlexCAN PN STOP S32DS.ARM.2.2 Example S32K116 FlexCAN VLPR test S32DS.ARM.2.2 S32K118 Example S32K118-SRAM-keep_data_over_SW_reset v0_1 S32DS.ARM.2.2 S32K3xx S32K312 Example S32K312 ADC_IP Continuous Scan DMA S32DS36 RTD600    S32K344 Example S32K344 PIT BTCU ADC DMA DS3.4 RTD100   Example S32K344 FlexCAN_Ip TX/RX/EnhanceRXFIFO test S32DS3.4 RTD200     Example Siul2_Port_Ip_Example_S32K344_ITCM_DTCM S32DS3.4 RTD300   Example S32K344 LPUART RX/TX ISR FreeRTOS S32DS36 RTD600    Example_S32K344_MCAL_MCU_ClockMonitor_v1_0_S32DS36_RTD600    Example_S32K314_DTCM1_Backdoor_RTD201_DS34_v3    Example_Reg_Prot_Flash_Controller_S32K344   Example S32K344 PIT SWtrig ADC ANAMUX S32DS 3.6.0 RTD 6.0.0   Example S32K344 EMAC lwIP FreeRTOS miniEVB S32DS 3.6.1 RTD 6.0.0   Example S32K344 EMAC lwIP FreeRTOS MRCANHUB S32DS 3.6.1 RTD600   Example_S32K344_BIST_eMCEM_SPD106_v2_0_S32DS365_RTD700      S32K358 Example S32K358 FlexCAN TXRX ISR S32DS35 RTD400/500   Example S32K358 GMAC 100M lwIP FreeRTOS S32DS 3.6.1 RTD600   Example S32K358 GMAC 1G lwIP FreeRTOS S32DS 3.6.1 RTD600     S32K388 Example S32K388 GMAC0 lwIP FreeRTOS S32DS 3.6.1 RTD600   S32K389 Example S32K389 GMAC0 lwIP FreeRTOS S32DS 3.6.1 RTD 6.0.0   Example S32K389 GMAC1 SABRE lwIP FreeRTOS S32DS 3.6.1 RTD600  
記事全体を表示
Adding Openjdk support to zeus yocto layer Environment: openjdk-8 with L5.4.24-2.1.0 and GCC-9 1. Clone meta-java with dedicated branch name: git clone git://git.yoctoproject.org/meta-java -b zeus 2. Update .bb file for compile error in meta-java: diff --git a/recipes-core/icedtea/icedtea7-native.inc b/recipes-core/icedtea/icedtea7-native.inc index 8d0dc71..153a604 100644 --- a/recipes-core/icedtea/icedtea7-native.inc +++ b/recipes-core/icedtea/icedtea7-native.inc @@ -26,7 +26,7 @@ CXXFLAGS_append = " -fno-tree-dse" CXX_append = " -std=gnu++98" # WORKAROUND: ignore errors from new compilers -CFLAGS_append = " -Wno-error=stringop-overflow -Wno-error=return-type" +CFLAGS_append = " -Wno-error=stringop-overflow -Wno-error=return-type -Wno-error=format-overflow" inherit native java autotools pkgconfig inherit openjdk-build-helper 3. Add meta-java layer into bblayers.conf: BBLAYERS += "${BSPDIR}/sources/meta-java" 4. Edit the conf/local.conf to add openjdk variables # Possible provider: cacao-initial-native and jamvm-initial-native PREFERRED_PROVIDER_virtual/java-initial-native = "cacao-initial-native" # Possible provider: cacao-native and jamvm-native PREFERRED_PROVIDER_virtual/java-native = "jamvm-native" # Optional since there is only one provider for now PREFERRED_PROVIDER_virtual/javac-native = "ecj-bootstrap-native" PREFERRED_PROVIDER_java2-runtime = " openjdk-7-jre" IMAGE_INSTALL_append = " openjdk-7-jdk " diff --git a/recipes-core/openjdk/openjdk-8-common.inc b/recipes-core/openjdk/openjdk-8-common.inc index d8b30b8..ed03d60 100644 --- a/recipes-core/openjdk/openjdk-8-common.inc +++ b/recipes-core/openjdk/openjdk-8-common.inc @@ -181,5 +181,5 @@ FLAGS_GCC9 = "-fno-lifetime-dse -fno-delete-null-pointer-checks" BUILD_CFLAGS_append = " ${@openjdk_build_helper_get_build_cflags(d)}" BUILD_CXXFLAGS_append = " ${@openjdk_build_helper_get_build_cflags(d)}" # flags for -cross -TARGET_CFLAGS_append = " ${@openjdk_build_helper_get_target_cflags(d)}" +TARGET_CFLAGS_append = " ${@openjdk_build_helper_get_target_cflags(d)} -Wno-error=format-overflow" TARGET_CXXFLAGS_append = " ${@openjdk_build_helper_get_target_cflags(d)}" diff --git a/recipes-core/openjdk/openjdk-8-native.inc b/recipes-core/openjdk/openjdk-8-native.inc index 321a43d..97ff03f 100644 5. Switch the host GCC to gcc-8 and g++-8: sudo apt-get install gcc-8 g++-8 sudo update-alternatives --install /usr/bin/gcc gcc /usr/bin/gcc-8 --slave /usr/bin/g++ g++ /usr/bin/g++-8 --slave /usr/bin/gcov gcov /usr/bin/gcov-8 --slave /usr/bin/gcov-tool gcov-tool /usr/bin/gcov-tool-8 --slave /usr/bin/gcc-ar gcc-ar /usr/bin/gcc-ar-8 --slave /usr/bin/gcc-nm gcc-nm /usr/bin/gcc-nm-8 --slave /usr/bin/gcc-ranlib gcc-ranlib /usr/bin/gcc-ranlib-8 sudo update-alternatives --config gcc  6. And change the conf/local.conf from openjdk-7 -> openjdk-8: PREFERRED_PROVIDER_java2-runtime = " openjdk-8-jre" IMAGE_INSTALL_append = " openjdk-8 "  i.MX 8 Family | i.MX 8QuadMax (8QM) | 8QuadPlus
記事全体を表示
FlexTimer Module (FTM) Usage on S32M24x and S32K14x Series Abstract This document describes how to use the FlexTimer Module on S32M24x and S32K14x series. It introduces several operational modes, including the corresponding implementation to provide reference for different applications. Introduction S32M24x builds on the broad family of S32K14x MCUs, their tools and software by taking select MCUs from that portfolio and co-packaging them with an analog die that supports 12V power management, communications at the physical layer (CAN FD, LIN or CXPI) and the MOSFET gate drivers (6 channels). Based on the above, the FlexTimer Module (FTM) Usage on S32M24x and S32K1xx series can be addressed in same context. Therefore SW and configuration will be quite similar (if not the same) for both devices. However text will be focus on S32M24x implementation. Talking now about the FlexTimer module (FTM), it is built upon a timer with a 16-bit counter. It contains an extended set of features that meet the demands of motor control, including the signed up-counter, dead time insertion hardware, fault control inputs, enhanced triggering functionality, and initialization and polarity control. Software implementation To simplify and accelerate an application development, embedded part of the FTM examples have been created using S32 Design studio, RTD drivers (low level part) and S32K14x/S32M24x is configured using S32 Configuration Tools, see the following figure: Figure 1: S32 Configuration Tools Regarding Peripherals Tool, it allows to configure FTM functionalities though different drivers as follows: Figure 2: FTM Drivers Once you have selected a driver, you could refer for more details to its respective User Manual in the top corner of the FTM Driver Tab: Figure 3: User Manuals for S32K1_S32M24X FTM Drivers Project structure Project structure using S32 Design Studio and RTD for S32K14x and S32M24x version 2.0.0 contains the following components: Figure 4: Project structure Implementation differences between S32M244 and S32K144 devices      Clocking S32M24x and S32K1xx have some spec differences regarding clocking. Additionally, S32M24xEVB-C064 is supplied externally by 16 MHz crystal, meanwhile S32K144EVK is supplied externally by 8 MHz crystal. In Clocks Tool of FTM examples both devices will be configured in Run mode and using PLL as system clock source, the same frequencies will be used for simplicity purposes as follows:      - System and Core clock -> 80MHz      - Bus clock -> 40MHz      - Flash Clock -> 20MHz _Leo__0-1729805873232.png Figure 5: Clocking in S32M24x devices _Leo__1-1729805912193.png Figure 6: Clocking in S32K1xx devices      Pinout S32K144EVK contains a S32K144HFT0VLLT MCU with LQFP 100 package and all its FTM channels are routable to at least to an external pin. Meanwhile S32M24xEVB-C064 contains a S32M244CCABWKHST MCU with LQFP 64 package and not all its FTM channels are routable to an external pin. Such is the case of the following signals: - ftm1_ch1 - ftm1_ch5 Particularly, ftm1_ch1 configuration is required to perform PWM Modulation on FTM0, but even though such channel is not routed to an external pin, such feature on FTM0 can be archived (Please refer to S32M24x/S32K14x-> PWM Modulation Implementation example). FTM examples The FTM examples provided for S32M24x and S32K14x are listed below: • S32M24x/S32K14x -> FTM: Edge-align PWM (EPWM) mode • S32M24x/S32K14x -> FTM: Center-align PWM (CPWM) mode • S32M24x/S32K14x -> FTM: Complementary mode and dead-time insertion • S32M24x/S32K14x -> FTM: Modified Combine PWM Mode for Phase Shift • S32M24x/S32K14x -> FTM: Input capture (In progress) • S32M24x/S32K14x -> FTM: PWM Modulation Implementation • S32M24x/S32K14x -> FTM: Global time base • S32M24x/S32K14x -> FTM: Output compare (In progress) Conclusion This document, together with the linked FTM examples, shows the simplicity and efficiency in using the S32K1xx and S32M24x MCUs for different timing applications. It allows a better understanding of the implementation of FTM functionalities, making it easy, friendly and intuitive for users as well as to properly use this module in their projects. References S32 Design Studio for S32 Platform Real-Time Drivers (RTD) S32M2xx Data Sheet S32M24x Reference Manual S32M24XEVB S32K1xx MCU Family - Data Sheet S32K1xx MCU Family - Reference Manual S32K144EVB AN5303: Features and Operation Modes of FlexTimer Module on S32K
記事全体を表示
为 zeus yocto 层添加 Openjdk 支持 环境:openjdk-8,带有L5.4.24-2.1.0和 GCC-9 1. 使用专用分支名称克隆 meta-java: git clone git://git.yoctoproject.org/meta-java -b zeus 2. 更新 .bbmeta-java 中的编译错误文件: diff --git a/recipes-core/icedtea/icedtea7-native.inc b/recipes-core/icedtea/icedtea7-native.inc index 8d0dc71..153a604 100644 --- a/recipes-core/icedtea/icedtea7-native.inc +++ b/recipes-core/icedtea/icedtea7-native.inc @@ -26,7 +26,7 @@ CXXFLAGS_append = " -fno-tree-dse" CXX_append = " -std=gnu++98" # WORKAROUND: ignore errors from new compilers -CFLAGS_append = " -Wno-error=stringop-overflow -Wno-error=return-type" +CFLAGS_append = " -Wno-error=stringop-overflow -Wno-error=return-type -Wno-error=format-overflow" inherit native java autotools pkgconfig inherit openjdk-build-helper 3. 在 bblayers.conf 中添加 meta-java 层: BBLAYERS += "${BSPDIR}/sources/meta-java" 4.编辑conf/local.conf以添加openjdk变量 # Possible provider: cacao-initial-native and jamvm-initial-native PREFERRED_PROVIDER_virtual/java-initial-native = "cacao-initial-native" # Possible provider: cacao-native and jamvm-native PREFERRED_PROVIDER_virtual/java-native = "jamvm-native" # Optional since there is only one provider for now PREFERRED_PROVIDER_virtual/javac-native = "ecj-bootstrap-native" PREFERRED_PROVIDER_java2-runtime = " openjdk-7-jre" IMAGE_INSTALL_append = " openjdk-7-jdk " diff --git a/recipes-core/openjdk/openjdk-8-common.inc b/recipes-core/openjdk/openjdk-8-common.inc index d8b30b8..ed03d60 100644 --- a/recipes-core/openjdk/openjdk-8-common.inc +++ b/recipes-core/openjdk/openjdk-8-common.inc @@ -181,5 +181,5 @@ FLAGS_GCC9 = "-fno-lifetime-dse -fno-delete-null-pointer-checks" BUILD_CFLAGS_append = " ${@openjdk_build_helper_get_build_cflags(d)}" BUILD_CXXFLAGS_append = " ${@openjdk_build_helper_get_build_cflags(d)}" # flags for -cross -TARGET_CFLAGS_append = " ${@openjdk_build_helper_get_target_cflags(d)}" +TARGET_CFLAGS_append = " ${@openjdk_build_helper_get_target_cflags(d)} -Wno-error=format-overflow" TARGET_CXXFLAGS_append = " ${@openjdk_build_helper_get_target_cflags(d)}" diff --git a/recipes-core/openjdk/openjdk-8-native.inc b/recipes-core/openjdk/openjdk-8-native.inc index 321a43d..97ff03f 100644 5.将主机 GCC 切换为 gcc-8 和 g++-8: sudo apt-get install gcc-8 g++-8 sudo update-alternatives --install /usr/bin/gcc gcc /usr/bin/gcc-8 --slave /usr/bin/g++ g++ /usr/bin/g++-8 --slave /usr/bin/gcov gcov /usr/bin/gcov-8 --slave /usr/bin/gcov-tool gcov-tool /usr/bin/gcov-tool-8 --slave /usr/bin/gcc-ar gcc-ar /usr/bin/gcc-ar-8 --slave /usr/bin/gcc-nm gcc-nm /usr/bin/gcc-nm-8 --slave /usr/bin/gcc-ranlib gcc-ranlib /usr/bin/gcc-ranlib-8 sudo update-alternatives --config gcc  6.并将 conf/local.conf 从 openjdk-7 -> openjdk-8 更改: PREFERRED_PROVIDER_java2-runtime = " openjdk-8-jre" IMAGE_INSTALL_append = " openjdk-8 "  i.MX 8 系列 | i.MX 8QuadMax (8QM) | 8QuadPlus
記事全体を表示
S32 Design Studio 3.6.0 - Main Features (view in My Videos) This short video discuss the main features introduced with the S32 Design Studio 3.6.0 A comparison between S32DS 3.5 and 3.6 in regards to the product architecture & release changes is shown, followed by a quick overview of the main features introduced that impact everyone using the new version of the toolset Eclipse IDE Usage and Settings General
記事全体を表示
[S32K3 Tools Part] How to port RTD's existing MCAL demo to other K3 chips [S32K3 Tools Part] How to port RTD's existing MCAL demo to other K3 chips  1. Abstract     From the release notes of NXP's RTD4.0.0, we can see that the supported chip models are very complete: 1.png Fig 1 From this point, we can know that RTD4.0.0 can cover all S32K3 series chips. But if you want a ready-made demo, such as MCAL demo, you can see it under the ready-made demo path, for example: C:\NXP\SW32K3_S32M27x_RTD_R21-11_4.0.0\eclipse\plugins\Dio_TS_T40D34M40I0R0\examples\EBT Just S32K344,S32K358,S32K388,S32K396,S32M276。 Therefore, if you use other S32 chips, such as K312, in actual use, although it is within the range supported by RTD, but there is no ready-made demo to use, you need to do the porting by yourself. This article will explain how to port the RTD4.0.0 K344 MCAL demo to S32K312 and configure the corresponding EB project. First, implement the execution in the command line. After success, port the working MCAL code EB project to S32DS. 2. Platform and migration steps 2.1 Platform Description This article is based on RTD4.0.0: SW32K3_S32M27x_RTD_R21-11_4.0.0 For other versions with patch or HF, the operation process is the same! Hardware platform: S32K312 mini EVB or S32K312EVB Other official EVBs, such as S32K31XEVB, or the customer's own S32K3 hardware board also have the same steps. Due to the lack of official EVB boards, this article is based on S32K312 mini EVB, combined with P&E Multilink simulator download simulation. The platform situation is as follows: 2.png Fig 2 2.2 Migration steps The reference demo can be any existing demo in RTD4.0.0. In order to simplify the process, this article takes DIO as an example: C:\NXP\SW32K3_S32M27x_RTD_R21-11_4.0.0\eclipse\plugins\Dio_TS_T40D34M40I0R0\examples\EBT\S32K3XX\Dio_Example_S32K344 2.2.1 Copy the project and configure 2.2.1.1 Copy the project In order not to affect the original RTD default demo, here we directly copy a Dio_TS_T40D34M40I0R0 and open the path: C:\NXP\SW32K3_S32M27x_RTD_R21-11_4.0.0\eclipse\plugins Copy Dio_TS_T40D34M40I0R0 and save it in a folder named: Dio_TS_T40D34M40I0R0_miniK312_doc The process for other chips is similar. You only need to change the chip name and related configuration to the required chip. Open folder: C:\NXP\SW32K3_S32M27x_RTD_R21-11_4.0.0\eclipse\plugins\Dio_TS_T40D34M40I0R0_miniK312_doc\examples\EBT\S32K3XX Copy Dio_Example_S32K344 to Dio_Example_S32K312 3.png Fig 3    Open path: C:\NXP\SW32K3_S32M27x_RTD_R21-11_4.0.0\eclipse\plugins\Dio_TS_T40D34M40I0R0_miniK312_doc\examples\EBT\S32K3XX\Dio_Example_S32K312\TresosProject  Modify the EB project Dio_Example_S32K344 to Dio_Example_S32K312 4.png Fig 4 2.2.1.2 Configure the project Enter the newly created Dio_Example_S32K312, open the path with VScode, and save the VScode workspace to this path. Modify project_parameters.mk: GCC_DIR = C:/NXP/S32DS.3.5_RTD400/S32DS/build_tools/gcc_v10.2/gcc-10.2-arm32-eabi TRESOS_DIR = C:/EB/tresos_29_0_0 PLUGINS_DIR = C:/NXP/SW32K3_S32M27x_RTD_R21-11_4.0.0/eclipse/plugins EXAMPLE_DERIVATIVE = S32K312 TRESO_PROJECT_NAME = Dio_Example_S32K312 ​ 5.png Fig 5 6.png Fig 6 Check_build_params.mk, delete the following code: ifeq ("$(wildcard $(T32_DIR)/bin/windows/t32marm.exe)","") $(error Invalid path set to Trace32. \ The provided path: from project_parameters.mk T32_DIR=$(T32_DIR) is invalid!) endif This part is used for lauterbach trace32. If it is not deleted, an error will be reported. 2.2.2 EB project configuration The following is the configuration of the EB project. Open the EB tresos Studio 29.0 software and import the project. File->Import->General->Existing Projects into Workspace, add the EB project path: C:\NXP\SW32K3_S32M27x_RTD_R21-11_4.0.0\eclipse\plugins\Dio_TS_T40D34M40I0R0_miniK312_doc\examples\EBT\S32K3XX\Dio_Example_S32K312\TresosProject\Dio_Example_S32K312 Note, do not click copy projects into workspace!!! Select the project Dio_Example_S32K344, right-click the mouse, and rename it to: Dio_Example_S32K312 7.png Fig 7 Double-click someId to open the configuration module. Open the Resource module, General->ResourceSubderivative select the target chip partbumber, here select: s32k312_hdqfp172 8.png Fig 8 After saving, you will find many errors reported as follows: 9.png Fig 9 There is no need to worry too much here, because if you analyze it carefully, you will find that it is actually because there are many modules on K344 that K312 does not have. So enter the error prompt location and delete the missing K312 module. Mcu->McuModeSettingConf->McuPeripheral If you click in, you can find that if the K312 does not have a module, there is a red cross in front of the peripheral Name. 10.png Fig 10 The direct method is to delete all the error items, a total of 41. After deleting, you can find that all the problems are gone: 11.png Fig 11 Select someId in the project, right-click, and click Generate Code. You can see that the project can be generated without any errors. 12.png Fig12 Don't take it lightly here. Although the code can be generated without error, there is still a place that needs to be modified. Here, we can firstly close the EB tresos tool, then open terminal->new terminal in VScode and enter: 13.png Fig13 We can see the error content is : mcucgm0_clockMux0/McuClockMux0Divider5, McuClockMux0Divider6, McuClkMux0Div5_En, McuClkMux0Div6_En. Open S32KRM here, and you can see that K312 actually does not have MUX_0_5,6. 14.png Fig 14 At this time, when I opened the EB tresos software again, there was indeed such an error on the interface, and there was no divider 5,6 option in mcucgmClockMux0. 15.png Fig 15 Don't worry at this time, there is a way to fix this problem. Close the EB tresos tool and open the text: C:\NXP\SW32K3_S32M27x_RTD_R21-11_4.0.0\eclipse\plugins\Dio_TS_T40D34M40I0R0_miniK312_doc\examples\EBT\S32K3XX\Dio_Example_S32K312\TresosProject\Dio_Example_S32K312\config\ Mcu.xdm file. Directly turn off the enablement and value configuration of divider 5 and 6 in the file. Modify the following code:Modified to:The main thing is to change the enable and frequency value of Mux0Divider5,6 hidden in the file. Reopen it and you can see that the error disappears. Right-click on the EB project someId, generate project, and the code can be generated normally without error. Here is a little trick: In order to prevent the mismatch between the previously generated code and the latest EB project, you can also change: C:\NXP\SW32K3_S32M27x_RTD_R21-11_4.0.0\eclipse\plugins\Dio_TS_T40D34M40I0R0_miniK312_doc\examples\EBT\S32K3XX\Dio_Example_S32K312\generate Folder:src,include clean it,then regenerate in EB tresos when generating a project. Close the EB software and enter make generate again in the terminal of the Vscode project You can see that there are no problems at this time: 16.png Fig 16  3.Command line compilation and result testing From the above steps, the code and EB configuration migration of an existing RTD K344 project to a K312 MCAL project has been completed. Now, through VScode, command line form, generate main.elf, and then download and test. Command: make generate make build the main.elf can be found in the following folder path: C:\NXP\SW32K3_S32M27x_RTD_R21-11_4.0.0\eclipse\plugins\Dio_TS_T40D34M40I0R0_miniK312_doc\examples\EBT\S32K3XX\Dio_Example_S32K312\out Regarding testing, because there is a main.elf file and PE Multilink, you can create a new K312 project in S32DS. The debug interface is PE Multilink. After compiling and generating the code, copy main.elf to the Debug_FLASH folder of the new project. In the S32DS debug configuration, directly replace the C/C++ application with main.elf and download it for testing.  17.png Fig 17 As you can see, you can enter the debug interface, and the LED light on the actual test board can flash successfully. This means that the MCAL code has been successfully ported to K312. 4. S32DS project migration and testing       In the previous document: https://community.nxp.com/t5/S32K-Knowledge-Base/S32K3-Tools-Part-How-to-import-RTD-EB-project-into-S32DS/ta-p/1966207 Previously, the RTD MCAL EB project was transplanted to the K344 project of S32DS. Simply modify the project name, project chip model, ld file, driver file inclusion, etc., then clean the project and compile the project.      It is assumed here that you already have an RTD MCAL project imported into the S32DS project, and then modify it based on this. 4.1 S32DS Project Configuration     Because the folder was copied under the original RTD folder, there is a newly created folder in the S32DS project Mcal_Plugins->Link_Source. This folder needs to be excluded from compilation: Select Dio_TS_T40D34M40I0R0_minik312_doc, right-click Build path->remove from->Debug_FLASH.      18.png Fig 18 Rename the project from Mcal_Dio_S32K344_RTD400 to Mcal_Dio_S32K312_RTD400. Modify the following project configuration, project->properties: (1)preprocessor S32K344->S32K312 19.png Fig 19   (2) Sstandard S32DS C Linker->General Modify "${MCAL_PLUGIN_PATH}/Platform${MCAL_MODULE_NAME_SUFFIX}/build_files/gcc/linker_flash_s32k344.ld" To "${MCAL_PLUGIN_PATH}/Platform${MCAL_MODULE_NAME_SUFFIX}/build_files/gcc/linker_flash_s32k312.ld" After modification, click apply and close Now, change the main.c content to the content in path:  C:\NXP\SW32K3_S32M27x_RTD_R21-11_4.0.0\eclipse\plugins\Dio_TS_T40D34M40I0R0_miniK312_doc\examples\EBT\S32K3XX\Dio_Example_S32K312\src\main.c Add header file: #include "Port_Cfg.h" Comment code: // #include "check_example.h" // Exit_Example(TRUE); 4.2 EB project replacement Copy: C:\NXP\SW32K3_S32M27x_RTD_R21-11_4.0.0\eclipse\plugins\Dio_TS_T40D34M40I0R0_miniK312_doc\examples\EBT\S32K3XX\Dio_Example_S32K312\TresosProject\Dio_Example_S32K312\config All the .xdm file to the S32DS EB folder, replace the old file: Mcal_Dio_S32K312_RTD400\Tresos_Project\Mcal_Dio_S32K344_RTD400\config Use the EB tresos open the above project, then Generate project,after the code is generated, close the EB project, back to the S32DS side. 4.3 MCAL S32DS project testing clean project:project->clean project,  then build the project 20.png Fig 20 You can see that it can be compiled successfully, then RUN->debug configuration selects the downloaded code xxx_Debug_FLASH_PNE. Note that you need to change the Device from S32K344 to S32K312 21.png Fig 21 After successful configuration, click debug, download the code and simulate. The results are as follows: 22.png Fig 22 As you can see, we can successfully enter debug, and the light on the board is actually blinking, which means that the RTD MCAL project demo can be successfully ported to S32K312 S32DS. Video: 1.MCAL demo porting K344 to K312 based on RTD500 (view in My Videos) 2.S32DS CT MCAL demo porting K344 to K312 based on RTD500 (view in My Videos) Attachment: Dio_Example_S32K312_MCALRTD600.zip: unzip it, get Dio_Example_S32K312, put in the RTD600 folder: C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Dio_TS_T40D34M60I0R0_xxx\examples\EBT\S32K3XX Dio_TS_T40D34M60I0R0_xxx is copy from Dio_TS_T40D34M60I0R0
記事全体を表示
S32G HSE-Hに基づくFAQ S32Gに基づくHSE-Hの一般的な問題をまとめました。HSE-Hの既知の問題を理解するのに役立つことを願っています。 問題の内容が一覧表示されていますので、興味のあるトピックを簡単に見つけることができます。詳細については、添付ファイルを参照してください。よろしくお願いします。 HSE FW属性 Q: VDD_EUFSEの電源はいつ必要ですか? Q:HSE FW 1.0.5でHSEセルフ・テストが失敗するのはなぜですか? 質問:シリアルブートローダーに署名する方法 Q:SYS_IMGのどのデータがブート・フェーズで検証されますか? Q:SIMULATED_OEM/IN_FEILD属性とは何ですか?また、どのように使用しますか? Q:FW_IMG*とSYS_IMGのアンチロールバック・カウンタ番号はどこで確認できますか? Q:複数のサービスリクエストがある場合、HSEはどのように時間枠を割り当てますか? Q:重い操作とは何ですか?高速な操作とは何ですか? Q:致命的なエラー(GSRのビット16からビット31が0以外)が発生した場合はどうすればよいですか? Q:GSRの致命的エラー・コードはそれぞれ何を意味していますか? Q:ブルーの画像をオフラインで確認することはできますか? Q: アンチロールバック保護はデフォルトで有効になっていますか? Q:初期化ベクトル(IV)とは何ですか? Q:LC=IN_FEILDの場合、SYS_IMGでキー・カタログをフォーマットすることは可能ですか? Q:FSRとGSRは各MUで同じ値ですか? ブート Q: ブートフロー Q:セキュア・ブート Q:IVT_AUTH==1の場合、BOOT_SEQは非セキュア・ブート(BOOT_SEQ==0)を維持できますか? Q:セキュア・ブートが失敗する原因は何ですか? HSE FWサービス Q:なぜ一部のサービスは通常よりも長い時間がかかるのですか? Q:RNGはどのくらいの頻度で再シードされますか? Q:RNGの再シードはどのサービスに含まれる可能性がありますか? Q: HSE UIO はサスペンド&レジュームをサポートしていますか? Q:導出鍵のエクスポート方法は? Q:どの鍵使用フラグが競合しますか? Q: 暗号ドライバーがサポートしていないキーをインポートするにはどうすればよいですか? HSE FWその他 Q:VDD_EFUSEに電力を供給する方法 Q:XRDCがHSEにNCSPD_STATレジスタへのアクセスを与えるべきなのはなぜですか? 質問:Life_Cycle を進める前に何をすべきですか? Q:非セキュア・ブート時に1.0.9 HSEデモがQSPI再構成パラメータを使用してSYS_IMGをロードできないのはなぜですか? Q: XRDC 構成で HSE にどの周辺機器のアクセス権を与えるべきですか? Q:HSE FWをピンクから青に切り替えることを推奨するのはなぜですか? S32Gに基づくHSE-Hの一般的な問題をまとめました。HSE-Hの既知の問題を理解するのに役立つことを願っています。 問題の内容が一覧表示されていますので、興味のあるトピックを簡単に見つけることができます。詳細については、添付ファイルを参照してください。よろしくお願いします。 オートモーティブ
記事全体を表示
i.MX Create NFS Server and Export USB Drive: Yocto Project Distribution Overview i.MX28EVK Setup Build Yocto Project image Create a SDCARD from the Linux Host Boot i.MX28EVK Create file system on USB Create Mount Point and Mount the USB device Create 250 MB File Create Exports File Restart NFS Server Ubuntu Linux Host Setup Create Mount Directory Mount i.MX28EVK Exported Directory Access the NFS mounted directory Overview This document describes the steps for configuring a NFS Server running on an i.MX Application Processor - in this case the evaluation board i.MX28 EVK. Once the NFS server is running, an Ubuntu 12.04 Linux host is then configured to NFS mount the i.MX28EVK exported directory. The Ethernet interface is used for the connection transport. A block diagram of the connection setup is shown below: An Ethernet switch provided the Ethernet connection between the Linux Host and the i.MX28EVK. A thumb drive was connected to the USB port on the i.MX28EVK which was used for the exported directory. i.MX28EVK Setup Build Yocto Project image Use core-image-minimal and add packages to conf/local.conf to support NFS MACHINE=imx28evk source setup-environment mx28-evk echo "CORE_IMAGE_EXTRA_INSTALL += \"bash kernel-modules nfs-utils\" " >> conf/local.conf bitbake core-image-minimal When bitbake finishes the images are found in tmp/deploy/images/imx28evk Create a SDCARD from the Linux Host sudo dd if=/tmp/deploy/images/imx28evk/core-image-minimal-imx28evk.sdcard of=/dev/sdc bs=4M && sync Boot i.MX28EVK Insert the SDCARD into slot 0 on the bottom side of the i.MX28EVK and connect the serial console. Power-on and push the POWER button on the lower conner to turn on. The Login credentials are User Name: root      There is no password configured by default. Create file system on USB The USB drive had one partition which was formatted with vfat file system: mkfs.vfat /dev/sdb1 Create Mount Point and Mount the USB device mkdir /mnt/usb mount /dev/sdb1 /mnt/usb Create 250 MB File dd if=/dev/zero of=/mnt/usb/file1.txt bs=512K count=500 Create Exports File echo "/mnt/usb *(rw,sync,no_root_squash,no_subtree_check)" > /etc/exports Restart NFS Server /etc/init.d/nfsserver stop /etc/init.d/nfsserver start Ubuntu Linux Host Setup Create Mount Directory sudo mkdir /mnt/remote Mount i.MX28EVK Exported Directory sudo mount -t nfs 10.85.1.10:/mnt/usb /mnt/remote Access the NFS mounted directory ls /mnt/remote
記事全体を表示
Example_S32K344_decouple_RTD400_Ip_C40_DS35 ******************************************************************************************************* * Detailed Description: * DCF Record decouples CM7_0 and CM_1 on S32K344 * Find first available location in UTEST. * By default, first available address is 0x1B000768U * * NOTE: There is a bug in the RTD version. * Change FLS_MAX_VIRTUAL_SECTOR to 528 in C40_Ip_Cfg.h * ------------------------------------------------------------------------------ * Test HW: : S32K344EVB-Q257 * MCU: : S32K344 * Project : RTD AUTOSAR 4.7 * Platform : CORTEXM * Peripheral : S32K3XX * Dependencies : none * Autosar Version : 4.7.0 * Autosar Revision : ASR_REL_4_7_REV_0000 * Autosar Conf.Variant : * SW Version : 4.0.0 * Build Version : S32K3_RTD_4_0_0_P20_D2403_ASR_REL_4_7_REV_0000_20240315 ******************************************************************************************************* Re: Example_S32K344_decouple_RTD400_Ip_C40_DS35 Hello @dmitry_buchynski, Thanks for the feedback. It has been fixed. Regards, Daniel Re: Example_S32K344_decouple_RTD400_Ip_C40_DS35_v1 Hello, @danielmartynek  I have a few questions and notes: 1) Is it aplicable for s32k358? 2) In the main.c line 33:      * By default, first available address is 0x1B000780U I suppose it should be 0x1B000768U according to description 3) in the main.c lines 115 and 116:     DCF_record[0] = 0x00000100; /* DCF Control Word */     DCF_record[1] = 0x00100004; /* DCF Data Word, LOCKSTEP = 0 */ I think the comments are incorrect and the first one should be DCF data word and the second DCF control word 4) in the main.c line 116:  DCF_record[1] = 0x00100004; is the parity bit missing here and it actually must be 0x00100006 to match parity with DCF_record[0] = 0x00000100; ? 
記事全体を表示
E9171 AMDPUとT1040 RDBボード 私はE9171 AMDGPUにT1040 NXPボードを搭載していますが、このGPUはamdgpuを使ったパートゥピアデータ転送に対応していますか?このNXPはPCIeスイッチを介してFPGAおよびGPUに接続されています。このGPUはQDMAドライバーを使ってFPGAから直接データを取得できるはずですし、またこのNXPボードはAMDGPUドライバーを使った直接ピアツーピア機能をサポートしていますか? Re: E9171 AMDPU with T1040 RDB Board T1040プラットフォーム上のE9171 + AMDGPUがFPGA→GPU PCIe P2P DMAをサポートしていると考えないでください。現在入手可能なAMDGPUの情報に基づくと、NVIDIA GPUDirect RDMAのように、FPGAとAMDGPU間の直接的なP2P通信は、AMDGPUの標準機能として一般的にはサポートされていません。   AMDGPUはPCIeピアツーピア(P2P)をサポートしていますか? AMDGPUにはLinuxのP2Pインフラストラクチャサポート(PCI_P2PDMA)があり、AMD KFDにはHSA_AMD_P2Pオプションがありますが、このサポートは主に以下の目的で文書化されています: AM GPU ↔ AMD GPU通信 ROCm/HSAコンピューティング環境 GPUが大きなBARを露出し、プラットフォームやチップセットがPCIe P2Pルーティングを可能にするプラットフォーム Linux Kconfigの説明には 、AMDのGPU間のP2P通信が明示的に記載されています。 FPGA→AMD GPUのダイレクトDMAに適用できますか? AMDのエンジニアは次のように公に述べている。 Xilinx FPGAとAMD GPU間のP2Pは現在直接サポートされていません そして、真のデバイス間PCIe DMAの代わりに、ホストメモリ登録の回避策を提案した。 そのため、 パス ステータス AMD GPU ↔ AMD GPU 特定のROCmプラットフォームでサポートされています FPGA ↔ AMD GPUダイレクトPCIe DMA AMDGPUでは一般的にサポートされていません FPGA →ホストDDR → GPU サポートされる FPGA P2Pバッファはホストメモリにマッピングされ、GPUに登録されました   T1040はPCIe P2Pをサポートしていますか? T1040側からは、PCIeハードウェア自体がスイッチを介してメモリ読み書きTLPを転送できる場合、以下の場合に限ります: PCIeスイッチはP2Pルーティングを可能にします。 ACSリダイレクトは無効化されています(スイッチによります)。 住所変換は正しく設定されています。 PCIeというプロトコルは、エンドポイント間のデータ転送を妨げるものではありません。しかし、 T1040/NXPソフトウェアは自動的にAMDGPU-FPGAのP2Pサポートを提供するわけではありません。重要な問題は、次の点である。 AMDGPUはGPUメモリをエクスポートしてサードパーティのDMAアクセス用にします。 FPGA QDMAはGPUのBAR/VRAM物理アドレスを取得することができます。 LinuxのIOMMU/P2PDMAパスはトランザクションを受け入れます。 通常、T1040 PCIeコントローラ自体よりもAMDGPUの制限がブロック要因となっています。 あなたのシステムでうまく機能しそうなものは何ですか? 現在のトポロジー: PCIeスイッチ / \ FPGA(QDMA)E9171 GPU \ / T1040 RC 最も可能性の高いサポートフロー: FPGA →--> DDR(T1040メモリ) | V AMDGPU DMA | VRAM 動作保証はありません: FPGA(QDMA)---> GPU VRAM AMDGPUは一般的に任意のFPGAデバイス向けにGPUDirect-RDMAのようなインターフェースを公開しないからです。
記事全体を表示
SE050E2HQ1/Z01Z3Z所需的热数据 各位同事好, 我正在寻找以下零件编号的热阻数据和工作结温信息: SE050E2HQ1/Z01Z3Z 谢谢,此致敬礼。 残酷的 Smart Card Re: Thermal Data required for SE050E2HQ1/Z01Z3Z 你好@Harsh_Bhavsar , 详情请参阅https://www.nxp.com/docs/en/data-sheet/SE051.pdf 。它们几乎相同。 真挚地, 坎 Re: Thermal Data required for SE050E2HQ1/Z01Z3Z 你好 Kan_Li, 感谢您的回复,数据手册很有帮助。 你能帮我查一下这个器件的最大允许结温吗?或者我可以考虑一下它的工作温度吗? 谢谢,此致敬礼。 残酷的 Re: Thermal Data required for SE050E2HQ1/Z01Z3Z 你好 kan, 这真是非常有用的信息。 谢谢,此致敬礼。 残酷的 Re: Thermal Data required for SE050E2HQ1/Z01Z3Z 你好@Harsh_Bhavsar , 工作时的最大结温仅比工作温度略高,因为内部温度传感器在110°C左右开始触发信号。 祝你有美好的一天, 坎 ------------------------------------------------------------------------------- 笔记: - 如果此回复解答了您的问题,请点击“标记为正确答案”按钮。谢谢你! - 我们会持续关注帖子,从最后一条回复发出后持续7周,之后的回复将被忽略。 如果您之后有相关问题,请另开新帖并引用已关闭的帖子。 -------------------------------------------------------------------------------
記事全体を表示
MiFARE Plus APDU 您好, 我正在开发一个 Windows/Linux 应用程序,该应用程序使用 `winscard`/`pcsc-lite` 库和 HID Global OMNIKEY 5122 读卡器将数据编码到 MIFARE 卡上。我已经成功实现了对经典卡和Ultralight卡的支持,现在我需要添加对Plus卡的支持。 来自 `MF1P(H)x2.pdf`根据公开文档(见下方链接),我知道该卡支持许多原生命令,例如 `GetVersion` 和 `WritePerso`,而且,如果我对第 8.2.3 节的理解正确的话,这些命令可以封装在 APDU 中。那将是理想的,因为我就是这样处理其他卡的:我构建并发送 APDU。 我的问题如下: 1. 哪些文档描述了 MIFARE Plus 的本地命令及其参数?我需要这些信息才能正确地编写这些命令。 2. 据我了解,MIFARE Plus 需要基于 AES 的身份验证和加密才能向卡发送命令。哪份文件对此有详细描述? 3. 是否有关于如何在 APDU 中封装本地命令的文档? 4. `MF1P(H)x2.pdf` 包含许多链接,或者看起来像链接的文本,但它们是不可点击的。例如:`CommitReaderID`、`WritePerso`、`CommitPerso` 和 `虚拟卡架构`。我如何才能获取这些文件?是否有办法确定每个链接指向哪个文档? 我签署了保密协议,并获得了访问我的 NXP 帐户安全部分的一些文件的权限,但这些文件都没有回答我的问题。 https://www.nxp.com/docs/en/data-sheet/MF1P(H)x2.pdf Re: MiFARE Plus APDUs 你好@Codringher 希望你一切都好。 支持 MIFARE Plus EV2 的资源受 NDA 保护,必须通过安全访问权限申请,请按照此页面上的说明进行操作:安全访问权限 | NXP 半导体 。另外,我建议您查看NXP 半导体的“安全访问权限常见问题解答” 。 请查收您的收件箱,我刚刚给您发送了一条社区私信。 问候, 爱德华多。
記事全体を表示
PDB ADC 预触发序列错误恢复 NXP社区的各位好, S32K144 运行时闪存擦除/编程操作后,ADC0/ADC1 中断停止 作为我之前问题的延续,我需要一些关于如何正确恢复 S32K144 上的 PDB ADC 预触发序列错误的说明。 我尝试了以下三种方法,但只有一种方法有效。 方法一(有效): 在执行闪存擦除/编程操作之前,请先停止 PDB0 和 PDB1。 闪存操作完成后,重新启动两个 PDB 并重新启用相应的 ISR。 采用这种方法,不会出现PDB序列错误。 方法2: 闪存擦除/编程操作完成后,我停止并重新启动了 PDB0 和 PDB1。然而,PDB 预触发序列出现错误。然后我尝试通过停止并重新启动 PDB 模块来恢复,但序列错误仍然存在。 方法三: 方法三(无效): 在闪存擦除/编程操作期间,我没有停止或重新启动 PDB0 和 PDB1。相反,操作完成后,产生了一个待处理的 PDB ISR 和一个 ADC ISR 触发信号。 在 PDB ISR 中,我尝试使用以下方法清除序列错误标志: PDB0->CH[0].S &= (uint32_t)(~PDB_S_ERR_MASK); 然后执行相应的 ADC ISR,读取 ADC 结果寄存器清除 COCO 标志。我原本期望这样做可以防止进一步的预触发序列错误,但问题仍然存在,这种方法并没有奏效。 我的问题是:一旦触发了 PDB 预触发序列错误,是否有可能在不 RESET 系统的情况下恢复 PDB/ADC 操作并恢复正常触发信号?或者是否需要事先停止并重新启动 PDB,以避免进入不可恢复的状态? Re: PDB ADC pre trigger sequence error recovery 嗨 PetrS, 我尝试了以下方法。 在未停止 PDB 的情况下执行闪存擦除操作后,微控制器收到一个待处理的 ADC ISR 回调。在该回调函数中,读取 ADC 结果寄存器后,我调用以下函数来检查和恢复 PDB 序列错误: ```c void PDB1_check_seq_err(void) { 如果 ((PDB1->CH[0].S & PDB_S_ERR_MASK) != 0) { PDB1->CH[0].S &= (uint32_t)(~PDB_S_ERR_MASK); PDB1->SC &= (uint32_t)(~PDB_SC_PDBEN_MASK); PDB1->SC |= (uint32_t)PDB_SC_PDBEN_MASK; PDB1->SC |= (uint32_t)PDB_SC_SWTRIG_MASK; } } void PDB0_check_seq_err(void) { 如果 ((PDB0->CH[0].S & PDB_S_ERR_MASK) != 0) { PDB0->CH[0].S &= (uint32_t)(~PDB_S_ERR_MASK); PDB0->SC &= (uint32_t)(~PDB_SC_PDBEN_MASK); PDB0->SC |= (uint32_t)PDB_SC_PDBEN_MASK; PDB0->SC |= (uint32_t)PDB_SC_SWTRIG_MASK; } } ``` 我使用的恢复顺序是: 1. 清除 `ERR` 标志。 2. 停止 PDB。 3. 重新启用并重启 PDB。 通过这种停止和启动序列,一切都恢复正常:后续的预触发发生,ADC ISR 回调正常调用。 然而,我仍然不太明白为什么有必要这样做。参考手册指出,清除“ERR”条件并读取ADC结果寄存器(这将清除“COCO”)应该可以释放锁定。就我而言,仅靠这一点似乎还不够,需要执行 PDB 停止/启动序列才能恢复。 另外,我观察到 `PDBn->SC |= PDB_SC_SWTRIG_MASK` 并不是严格必需的。即使没有发出软件触发信号,PDB 重启后,锁定也会被释放,ADC ISR 也会再次开始执行。 请问为什么在这种情况下需要停止并重新启动 PDB,即使 RM 指示清除 `ERR` 和 `COCO` 应该可以释放锁? Re: PDB ADC pre trigger sequence error recovery 您好, 仅清除 PDB_S_ERR 通常不足以从触发信号前序列错误中恢复,因为 ADC/PDB 序列可能已经失去同步。根据您的测试结果,在刷写操作之前停止 PDB,然后在刷写操作之后重新启动 PDB,似乎是防止出现这种情况的最可靠方法。 如果在发生错误后尝试恢复,我建议确保 PDB 和 ADC 的状态完全重新同步。这可能包括禁用 PDB、清除待处理的 PDB 状态标志、确保所有待处理的 ADC 转换结果都已读取(COCO 已清除)、重新启用 PDB,以及在执行触发信号恢复之前根据需要重新加载配置。 根据 RM 的说法,当相应的 COCO 标志被设置、预触发被禁用或 PDB 被禁用时,预触发锁将被释放,因此完整的 PDB 禁用/启用序列也可能值得研究。 BR,彼得
記事全体を表示
纽约州纽约市离婚律师 纽约离婚律师专门从事家庭法,为寻求离婚、分居或解决相关问题的个人提供专业代理服务。他们的执业领域包括离婚、分居协议、子女监护权、探视权、子女抚养费、配偶赡养费、财产分割、婚前和婚后协议、亲子鉴定纠纷以及现有协议的修改。一名优秀的离婚律师应该具备纽约州家庭法方面的经验、较强的谈判和诉讼技巧、同理心、注重细节,以及对当地法院和程序的了解。聘请离婚律师的好处包括保护权利和利益、在复杂的过程中提供专家指导、个性化代理、提高获得有利结果的可能性以及减轻压力和情感负担。寻找合格的纽约州离婚律师的资源:纽约州律师协会、美国婚姻律师学会和国家州法院中心。 Re: new york ny divorce lawyer 严重的犬只袭击事件可能使受害者面临身体伤害、医疗费用以及对未来的不确定性。在德克萨斯州提起狗咬伤索赔诉讼可能有助于获得治疗费用、工资损失、疼痛以及与该事件相关的其他损失的赔偿。德克萨斯州经验丰富的狗咬伤律师可以审查袭击事件的情况,收集佐证材料,并指导受害者完成法律程序。无论事件发生在公共场所还是私人场所,了解您的权利都是保护自身利益的重要一步。对于那些寻求本地法律援助的人来说,阿灵顿的狗咬伤律师可以提供根据案件具体情况量身定制的法律支持。值得信赖的德克萨斯州人身伤害律师致力于帮助受害者根据德克萨斯州法律获得他们应得的赔偿。
記事全体を表示
FS26 Amux 传感问题 我尝试在将BAT 感知电压连接到AMUX 引脚后测量该引脚上的电压。我已经验证了所有相关的寄存器值, FS_STATES寄存器报告设备处于正常模式。然而,AMUX 引脚持续输出 0 V,我的 12 位 ADC 读数始终为 0。我的代码以S32K3xx 参考示例之一为基础(已附上),但 AMUX 测量功能并未按预期工作。请查一下。 Re: FS26 Amux sensing issue 您好, 感谢您分享代码和详细信息。请您核对以下内容: - 写入后读取 M_AMUX_CTRL 寄存器,并确认 AMUX_EN = 1 且 AMUX[4:0] = 0x16(已选择 BATSENSE)。 - 请同时确认 SPI 响应指示 M_AVAL = 1,这意味着主状态机处于正常模式。 - 硬件方面,请确认 BATSENSE 引脚是否有预期的电压,以及 AMUX 引脚是否正确连接到 ADC 输入。   BRs,托马斯 Re: FS26 Amux sensing issue M_AMUX_CTRL 寄存器配置为 M_AMUX_EN | M_AMUX_BATSENSE | M_AMUX_DIV_0,并通过回读验证为 0x56。这证实了模拟多路复用器处于活动状态,并正确地路由了 12V 电池感应输入。   但是,SPI 设备状态 (u8DeviceStatus) 读取结果为 0xCA。由于最高有效位已设置(sbc_fs26_RxFrameType.u8DeviceStatus & 0x80 == 1),因此全局故障保护故障处于活动状态。此外,FS_STATES 寄存器返回 11,证明设备卡在 INIT_FS(初始化故障保护)状态。 Re: FS26 Amux sensing issue 你好, 您的回读结果确认 AMUX 配置正确,但设备卡在 INIT_FS 中。 为解决此问题,请按照AN13850 (需要签署保密协议的安全文件)第 6.1 节和第 6.2 节中描述的初始化和监视程序序列进行操作: 上电或 RESET 后,按照 6.1 节所述配置所有必需的 FS_I_xxx 和 FS_I_NOT_xxx 寄存器。 在 256 毫秒的 INIT_FS 窗口内执行一次良好的看门狗刷新,以结束初始化阶段。 一旦功能安全输出解除,设备将进入正常模式,AMUX 测量功能将按预期运行。 BRs,托马斯 Re: FS26 Amux sensing issue 感谢您的支持。 我的 AMUX 没有正确启用,所以它没有将选定的电压路由到 AMUX 引脚。非常感谢您提供的初始化序列——它解决了这个问题。我还把看门狗周期配置为 256,现在设备如预期那样保持在正常状态。
記事全体を表示
ISP support for iMX95 FRDM Evaluation kit Hi Team, I am trying to port a Bayer sensor on the i.MX95 FRDM platform. Following the software setup guide below, I was able to connect and stream video using the NXP-supported OS08A20 camera module which was provided in the NXP website. Now, I would like to port and stream a different Bayer sensor. Is there any documentation available that explains: Where to obtain the libcamera source code and how to build it for the i.MX95 platform? How to generate ISP-specific YAML and configuration files for a new Bayer sensor? What camera driver parameters and controls are required to support a Bayer sensor on the i.MX95 FRDM platform? The complete software flow for integrating a new Bayer sensor with the NXP ISP pipeline? Can you please let me know at the earliest. Thanks Re: ISP support for iMX95 FRDM Evaluation kit Hello, Please refer to the following guide: https://www.nxp.com/docs/en/user-guide/UG10215.pdf Best regards/Saludos, Aldo.
記事全体を表示
S32K324のVREFH こんにちは、NXP チームの皆様、 回路には3.3Vで動作するS32K324マイクロコントローラを使っています。マイクロコントローラ内のVREFHピン自体は3.3V(VDD_HV_A / VDD_HV_B)に接続されています。データシートに、VREFH電圧レベルに関する注記がありました。 hemanths_0-1688361073670.png しかし、ハードウェアデザインガイドラインのドキュメントにはこのコメントは記載されていません。 hemanths_1-1688361175410.png どなたか、データシートに記載されているノートの意義について説明してもらえますか? ありがとうございます。 ヘマント Re: VREFH for S32K324 こんにちは、 @JulesW さん。 データシート(表3、動作条件)によると、VREFHは最低2.97Vに制限されているため、これは仕様外となります。 BR、ダニエル Re: VREFH for S32K324 VREHがVDD_HV_Aよりもはるかに低い場合、例えばVDD = 3.3Vの場合にVREFH = 2.5Vとなる場合はどうなるでしょうか? Re: VREFH for S32K324 ADCの結果は飽和状態になるだろう。 注入電流は、ピンあたり3mAに制限する必要があります。 danielmartynek_0-1688384914242.png danielmartynek_1-1688385147391.png BR、ダニエル Re: VREFH for S32K324 こんにちは、ダニエルさん。 ご回答ありがとうございます。 ADCの入力電圧がADCのVREFHよりも大きい場合、どうなりますか?マイクロコントローラのADCに過電圧保護や飽和機構があるかどうか? Re: VREFH for S32K324 こんにちは、ヘマントさん。 VREFH参照は必ずしもVDD_HV_A/VDD_HV_Bにコネクテッドする必要はありません。 しかし基準はVDD_HV_Aにクランプされるため、電圧はVDD_HV_A + 0.1Vを超えてはならず、0.1VはRF信号専用です。 HWDGの改訂版においてC、仕様書も見つけることができます: danielmartynek_0-1688380987606.png よろしくお願いいたします。 ダニエル
記事全体を表示
TRGMUX 技术支持 - MCXE316 我正在尝试使用 TRGMUX 方法将比较器 LPCMP0 的输出路由到 emios0_CH7 的输入(配置为输入捕获)。我正在使用 MCXE316 设备。我的问题之一在于理解输入/输出以及弄明白相关术语,而第二个问题我认为是 PERI_TRGMUX.h 中的一个错误。文件。 我将 emiOS0 通道 7 配置为简单的输入捕获,分配给物理引脚后可以正常工作。但是,我希望改用 LPCMP0 比较器的输出来触发输入捕获。因此,我应该能够让 TRGMUX 将比较器的输出路由到 EMIOS0_7 的输入捕获的输入。 我看了参考手册所附的 MCXE31_TRGMUX_connectivity.xlsx 文件,在左边看到 " 输入数字 ",我假设这是输入 TRGMUX 的。我看到那里列出了 LPCMP_0_COUT,输入数为 5,这应该就是我想要的。在顶部,我看到"、EMIOS_0_ipp_ind_emios_ch[7]、" ,并且在其上方看到输出寄存器编号为9。我还注意到,第5、6和9频道也显示了同样的数字。 那么,我的第一个问题 —— 如何告诉 TRGMUX LPCMP0 触发信号输出进入通道 7 而不是 5、6 或 9?我知道 TRGMUX 寄存器的内部有 SEL0、SEL1、SEL2 和 SEL3 —— 我是否要用其中一个来选择信道?如果是这样,这是如何映射的(例如 SEL0 对应通道 5 等),还是有其他映射方式,抑或根本没有映射?我查阅了说明书,但没找到相关内容。 我推测 SEL3 对应第 7 通道(仅作测试),于是尝试使用 SDK 中的 TRGMUX 方法——以下是我的调用序列:   TRGMUX_SetTriggerSource(TRGMUX, kTRGMUX_Emios0_1, kTRGMUX_TriggerInput2, kTRGMUX_SourceLpcmp0 ); 以 TRGMUX 为寄存器基础,ktrgmux_emios0_1 是 emiOS0 的 TRGMUX 寄存器(定义值为 9),ktrgmux_triggerInput2 是寄存器的 SEL2 输入,ktrgmux_sourcelPCMP0 是触发器的来源(定义值为 5)。 问题在于,该例程会在该方法内部抛出严重错误。以下是该方法的实际 SDK 代码: status_t TRGMUX_SetTriggerSource(TRGMUX_Type *base, uint32_t index, trgmux_trigger_input_t input, uint32_t trigger_src) { uint32_t value; status_t status;   value = base->TRGCFG[index]; if (0U != (value& TRGMUX_TRGCFG_LK_MASK)) { status = kStatus_TRGMUX_Locked; } else { /* 由于 TRGCFG 寄存器中的所有 SEL 位字段长度相同,因此使用 SEL0 的掩码来 访问其他 SEL * 位字段。*/ value = (value& ~((uint32_t)TRGMUX_TRGCFG_SEL0_MASK<< (uint32_t)input)) | ((trigger_src& (uint32_t)TRGMUX_TRGCFG_SEL0_MASK)<< (uint32_t)input); base->TRGCFG[index] = value;    status = kStatus_Success; }   返回状态; } 该例程在第一行发生崩溃: value=base->TRGCFG[index]; 查看调试输出后,似乎 TRGCFG 数组从未被初始化——该变量在 PERI_TRGMUX.h 中定义其结构如下: /** TRGMUX - 寄存器数组大小 */ #define TRGMUX_TRGCFG_COUNT 40u /** TRGMUX - 寄存器布局类型定义 */ typedef struct { __IO uint32_t TRGCFG[TRGMUX_TRGCFG_COUNT]; /**< TRGMUX ADC12_0 寄存器..TRGMUX CM7_RXEV 寄存器,数组偏移量:0x0,数组步长:0x4,有效索引:[0-1, 3, 6-18, 21-39] */ } TRGMUX_Type; 我就是找不到TRGCFG到底是在哪里定义的。在调试器中,整个数组的40个元素都被设置为199661,这显然是垃圾数据。我正在访问第 9 个元素(索引为 9)。 那么我的第二个问题是:我使用这种方法是否正确,我的假设是否合理,还是SDK例程本身存在问题? 电路板设计 启动 ROM | 启动配置 | 闪存 时钟|计时器 Re: TRGMUX Assistance - MCXE316 你好@brucebowling  谢谢你的帖子! 您对 TRGMUX SELx 工作原理的理解是正确的:EMIOS0_0 对应第 1 至 4 通道,EMIOS0_1 对应第 5 至 7 通道以及第 9 通道,如 TRGMUX_connectivity.xlsx 所示,第 0 和第 8 通道不可用。  此外, 我这边成功复现了该问题。我将进行内部核查,并提供任何有助于解决此问题的相关信息。 Re: TRGMUX Assistance - MCXE316 我想了解一下关于 SDK 和 TRGMUX 函数是否有任何新的反馈? 由于 TRGMUX 每个外设只有一个寄存器,我尝试使用以下一行代码直接写入: *(volatile uint32_t *)0x40080024UL = 0x00050000UL; 根据 RM,TRGMUX 基地址为 0x4008_000,TRGMUX_eMIOS0_1 寄存器偏移量为 0x24,绝对地址为 0x40080024。LPCMP0_COUT 的 SELx 字段为 0x05 - 我将其上移到 SEL2 位位置(位 16:23)。锁定位应为 0(从 RESET 开始,即解锁状态),我将其保持解锁状态。 这一行代码每次都会导致硬故障崩溃(故障不精确)。我尝试修改其他 SELx 位置,但仍然崩溃。我尝试在设置 eMIOS 和 LPCMP 之前分配此权限,也尝试在完成外围设备设置之后分配,但每次都会崩溃。 这让我产生了一些疑问,但我似乎在手册中找不到答案: 1)你是在初始化和启用外设之前还是之后设置 TRGMUX 链接? 2) TRGMUX 是否有任何模块时钟或类似设备?我知道在启用时钟之前访问模块可能会导致像我遇到的这种硬故障。我没有看到任何具体的东西,而且我的理解是 TRGMUX 寄存器是每个外设的一部分,所以启用外设的时钟也应该会启用任何所需的 TRGMUX 时钟? 谢谢你的帮助。 Re: TRGMUX Assistance - MCXE316 是的,添加这行时钟代码纠正了硬故障和 SDK 方法。我提出的直接编码方法也同样有效。 因此,一般来说,您需要启用 TRGMUX 时钟并设置 IMCR 寄存器,同时调用 SDK 方法进行 TRGMUX 连接。这样,LPCMP 就能正确触发 eMIOS 输入捕获。 感谢大家的支持。 Re: TRGMUX Assistance - MCXE316 好的,崩溃问题仍然存在,但进一步研究发现,我需要在设置 TRGMUX 之前设置 SIUL2 IMCR 寄存器。在参考手册附带的 IOMUX xls 文件中,我看到对于 eMIOS0_CH[7],需要将 SSS 位设置为 4 才能选择 TRGMUX_INT_OUT38,这是通过 SIUL_IMCR567 完成的(由于命名中的 512 偏移量,需要从 567 中减去 512)。以下是我用来实现此功能的代码行,后面是设置 TRGMUX 的代码行: SIUL2->IMCR[55] = SIUL2_IMCR_SSS(4); *(volatile uint32_t *)0x40080024UL = TRGMUX_TRGCFG_SEL3(kTRGMUX_SourceLpcmp0); 我仍然遇到 TRGMUX 硬故障。 Re: TRGMUX Assistance - MCXE316 嗨@brucebowling 很抱歉回复晚了。 我们注意到 TRGMUX 时钟默认情况下未启用。在时钟被禁用时尝试访问 TRGMUX 寄存器会导致 HardFault。你猜对了,钟表不见了。 请在调用 TRGMUX_SetTriggerSource 之前添加以下代码行? CLOCK_EnableClock(kCLOCK_Trgmux); 这项更改解决了我的问题。 作为参考,您可以在 SDK 中找到 TRGMUX 的使用示例: 板/frdmmcxe31b/demo_apps/mc_pmsm/pmsm_enc 请告诉我这是否解决了您的问题,或者您是否还有其他关于TRGMUX的问题。
記事全体を表示