Architectural Overview for the Dual-Motor EV Control System 1 Introduction After introducing the Dual-Motor EV Traction platform and the Software & Hardware environment behind it, this article moves one step closer to the running application. It looks inside the Motor Control System and explains how the Simulink model is structured to control two PMSM motors using the NXP S32K396 MCU as the target hardware. The goal is to provide a clear architectural view of the application before diving into simulation, validation, or deployment details. We will follow the main signal paths, from vehicle-level CAN commands and inverter feedback to FOC execution, PWM generation, ADC measurement, and communication back to the vehicle network. The focus remains intentionally architectural. Instead of covering controller tuning, peripheral configuration, or low-level implementation, this article highlights the building blocks that make the dual-motor application understandable as a complete embedded control system. This article is organized around five architectural views: the application overview, the system interfaces, the CAN communication path, the Simulink model structure, and the peripheral-to-data-flow mapping. Together, these views explain how the dual-motor application receives commands, measures feedback, executes control, drives the inverters, and reports diagnostic information back to the vehicle network.   2 Table of Contents • Introduction • Application Overview • System Inputs and Outputs • Vehicle-Level Communication • Simulink Application Architecture • Peripheral Mapping • Data Flow • Conclusion • References   3 Application Overview The Motor Control System is implemented on the NXP S32K396 microcontroller and runs as a single-core embedded application. The ECU controls two PMSMs, each connected to its own three-phase inverter stage. From a control perspective, the application contains two Field-Oriented Control implementations. Each FOC instance is responsible for one motor and executes independently, based on its own sensing path, control states, and output generation. Both control loops are scheduled from independent interrupt sources and are triggered every 100 microseconds. This execution period supports the fast current-control layer required by traction inverter applications, while the single-core implementation requires both motor-control paths to complete within the available timing budget.   Figure 3-1. Overall Simulink Application At vehicle level, the Motor Control System behaves as a actuating end node. It receives enable and speed commands from the Central Node over CAN and sends back monitoring and diagnostic information at a slower periodic rate. The Motor Control System exchanges CAN data with the vehicle network through the South Zone Controller. 3.1. Control Strategy At the heart of the application is the Field-Oriented Control algorithm, which provides the control structure required to drive each PMSM efficiently and independently. In this architecture, FOC transforms the three-phase motor behavior into a control problem handled in a rotating reference frame, where torque-producing and flux-producing current components are regulated separately. The control strategy is built around speed control. The requested speed comes from the vehicle-level command interface, while the estimated rotor speed is provided by the sensorless observer. The speed controller compares these values and generates the current reference needed to reach the commanded operating point. For each motor, the FOC structure combines an outer speed loop with inner current-control loops. The current PI controllers regulate the direct-axis and quadrature-axis currents in the rotating reference frame, allowing the application to control the electrical behavior of the motor in a deterministic and decoupled way. Sensorless operation is achieved using an Extended EMF Observer. This observer estimates the rotor position and speed from the measured electrical quantities, removing the need for a physical position sensor in the control loop. The estimated position is then used by the Park and inverse Park transformations that connect the stationary and rotating reference frames. The feedback path is based on phase-current reconstruction using the dual-shunt measurement method. The reconstructed phase currents are processed through the Clarke and Park transformations, while the DC bus voltage feedback is used to keep the control and modulation stages aware of the available inverter supply. The two FOC implementations follow the same control structure, but each one operates on its own motor-specific inputs, states, and outputs. This separation allows Motor 1 and Motor 2 to be controlled independently, even though both algorithms execute on the same S32K396 device. Because the control loops are executed every 100 microseconds, the FOC layer must remain compact and deterministic. The model architecture therefore separates the fast control path from slower communication and monitoring tasks, ensuring that current regulation and PWM update remain the highest-priority activities in the application.   Figure 3-2. Sensorless Field-Oriented Control diagram 4 System Inputs and Outputs The application interface can be viewed through two categories of signals. The first category contains vehicle-level commands exchanged over CAN. These signals define how the traction application is started, stopped, and commanded from the rest of the vehicle. The second category contains real-time electrical feedback and actuation signals exchanged with the inverter hardware.   Figure 4-1. Split the Simulink model to Inputs, Outputs and Application layers 4.1. Inputs The main vehicle-level inputs are received from the Central Node over CAN through the South Zone Controller. The command message contains the CCS_EnableMotors signal, used to engage or disengage the motors, and the CCS_SetSpeed signal, used to provide the desired speed reference for the control application.   Figure 4-2. CAN Message Unpack block for receiving the command signals   These CAN inputs are not part of the fast current-control loop, but they directly influence its behavior. Once decoded, the enable command defines whether the control logic is allowed to drive the inverters, while the speed reference becomes the target followed by the outer speed controller. The hardware feedback inputs are acquired from the inverter stages through ADC measurements. For each motor, two phase currents are measured using the dual-shunt method, while the third phase current is reconstructed in software using Kirchhoff’s Current Law. The DC bus voltage is measured for each inverter so the control, modulation, and monitoring logic remain aware of the available supply voltage.   Figure 4-3. Gathering analog quantities via ADC Block   4.2. Outputs The primary real-time outputs are the PWM commands used to actuate the inverter phases for both motors. The FOC algorithm computes the voltage commands required by each PMSM, and these commands are translated into duty cycles for the three-phase inverter. Because each inverter leg requires a high-side and a low-side control signal, the application ultimately drives six PWM signals per motor. These signals are generated from the MCU timing path and routed to the gate-driver stage that controls the external power switches.   Figure 4-4. PWM Actuation Subsystem   In addition to the PWM outputs, the application sends CAN data to the South Zone Controller every 0.1 seconds. These messages are intended for diagnostics, monitoring, and vehicle-level observability. The transmitted CAN data includes the estimated speed of each motor, the fault status reported by each control channel, the measured DC bus voltage for each inverter, the current operating state of each motor-control instance and many more. The following table highlights the output data sent over CAN bus:   Name Description Unit MC_BusVoltageM1 DC Bus Voltage measured by inverter for Motor 1 V MC_BusVoltageM2 DC Bus Voltage measured by inverter for Motor 2 V MC_FaultStatusM1 Fault status reported by Motor 1 true/false MC_FaultStatusM2 Fault status reported by Motor 2 true/false MC_PhACurrentM1 Phase A current – Motor 1 A MC_PhACurrentM2 Phase A current – Motor 2 A MC_PhBCurrentM1 Phase B current – Motor 1 A MC_PhBCurrentM2 Phase B current – Motor 2 A MC_PhCCurrentM1 Phase C current – Motor 1 A MC_PhCCurrentM2 Phase C current – Motor 2 A MC_SpeedEstM1 Motor 1 estimated speed rpm MC_SpeedEstM2 Motor 2 estimated speed rpm MC_SpeedRefM1 Motor 1 desired speed rpm MC_SpeedRefM2 Motor 2 desired speed rpm MCS_StateM1 Motor 1 state. It can be Stand By, Running, Fault - MCS_StateM2 Motor 2 state. It can be Stand By, Running, Fault - MCS_PhAVoltageM1 Phase A Voltage – Motor 1 V MCS_PhAVoltageM2 Phase A Voltage – Motor 2 V MCS_PhBVoltageM1 Phase B Voltage – Motor 1 V MCS_PhBVoltageM2 Phase B Voltage – Motor 2 V MCS_PhCVoltageM1 Phase C Voltage – Motor 1 V MCS_PhCVoltageM2 Phase C Voltage – Motor 2 V   Figure 3-5. Example for CAN Pack Message 5 Vehicle-Level Communication The Motor Control System is part of a distributed EV control architecture. It does not operate as an isolated controller. Instead, it receives high-level commands from the vehicle network and reports measured and estimated values back to the rest of the system. The communication path is organized around the CAN interface between the Central Node, the South Zone Controller, and the Motor Control System Node. Commands such as motor enable and desired speed are received through this path, while feedback messages such as estimated speed, DC bus voltage, phase-current information, and fault status are sent back through the same zonal communication route. CAN receive handling is interrupt-driven. When a command frame is received, the application decodes the enable and speed request signals and updates the internal command variables used by the Simulink control model. This keeps the command interface responsive without placing CAN processing inside the 100 microsecond FOC interrupt.   Figure 4-1. CAN Receive Interrupt block   CAN transmit handling is periodic. A PIT interrupt schedules outgoing monitoring messages every 0.1 seconds. This separates network reporting from the real-time control path and ensures that diagnostics transmission does not disturb the deterministic execution of the motor-control interrupts.   Figure 4-2. Periodic Interrupt for transmitting CAN messages   The CAN database defines the mapping between application variables and network messages. For example, the enable and speed command are grouped in dedicated message, while fault information, estimated speed, DC bus voltage, and phase-current feedback are exposed through dedicated monitoring messages. More information about the CAN database created for organizing the CAN messages and signals will be presented in a dedicated article. 6 Simulink Application Architecture The Simulink model is organized around a dual-control structure. Each motor channel contains the algorithmic blocks required to transform measured currents, estimate rotor position and speed, regulate the control loops, and generate voltage commands for PWM modulation. Although both channels implement the same FOC strategy, they are treated as separate execution paths. This separation makes it easier to scale from a single-motor setup to a dual-motor configuration and to validate each channel independently before running both motors together. 6.1. Real-Time Control Layer The real-time control layer is executed inside the BCTU-triggered interrupt flow. The BCTU is synchronized with the PWM timing generated by eMIOS, so the ADC conversions are requested at the correct moment within the switching period. Once the required current measurements are available, the interrupt allows the control algorithm to run using a coherent feedback set.   Figure 5-1. FOC Implementation   Inside this layer, the application reconstructs the three-phase current set, executes the Clarke and Park transformations, estimates rotor position and speed through the Extended EMF Observer, runs the speed and current PI controllers, and generates the voltage commands required by the modulation stage. The voltage commands are then translated into PWM duty cycles. eMIOS provides the base PWM generation, while the LCU forms the complementary high-side and low-side signals needed by the inverter legs. LCU also adds the necessary dead-time in complementary PWM signals to avoid the DC source damage. TRGMUX routes the required trigger signals between these peripherals, maintaining alignment between actuation and measurement.   Figure 5-2. Fast Loop Subsystem   The same execution concept is applied to the second motor channel. The two FOC instances run on the same S32K396 core, so the application depends on the MCU processing capability and on a carefully scheduled interrupt structure to complete both control paths within the available timing budget. 6.2. Communication and Monitoring Layer The communication and monitoring layer connects the fast control application with the vehicle network. It receives the enable and speed commands from CAN, prepares diagnostic information, and schedules outgoing status messages. This layer runs at a lower rate than the FOC loops. It is intended for command exchange, observability, and integration with the Central Node through the South Zone Controller. 6.3. Hardware Abstraction and Peripheral Layer The hardware abstraction and peripheral layer connects the generated Simulink application to the physical resources of the S32K396 MCU. Its purpose is to keep the control algorithm separated from the low-level hardware access, while still allowing the model to read measurements, update PWM outputs, handle interrupts, and exchange data over communication interfaces. In practice, this layer contains the target-specific blocks used for ADC acquisition, PWM generation, and CAN communication. These blocks provide the interface between the algorithmic part of the model and the peripherals configured on the MCU. This layer also makes the model easier to understand and maintain. The FOC subsystems can remain focused on control behavior, while the peripheral layer handles how signals enter and leave the MCU. As a result, the same architectural structure can be reused when moving between simulation, generated code, and target execution. The NXP Model-Based Design Toolbox provides the Simulink blocks that expose these S32K396 peripherals at model level. This allows engineers to configure and connect hardware-facing functions directly in Simulink, while the generated embedded code uses the corresponding target drivers and configuration. 7 Peripheral Mapping The peripheral mapping is centered on the synchronization between measurement, control execution, actuation, gate-driver communication, and vehicle-level CAN communication. Each peripheral has a specific role in this chain, and together they allow the generated Simulink application to interact deterministically with the inverter hardware. SAR-ADC is used to measure the analog quantities required by the control algorithm. These measurements include the phase-current feedback acquired from the inverter stages and the DC bus voltage used by the modulation and monitoring logic. BCTU (Body Cross Triggering Unit) performs the triggering of the ADC conversions. Instead of sampling the analog signals at an arbitrary moment, BCTU waits for the synchronization event coming from the PWM timing path and then starts the SARADC conversions at the correct point in the switching period. eMIOS (Enhanced Multiple Input Output System) generates the three phase PWM signals for each motor channel. These PWM signals represent the base timing generated from the duty cycles computed by the FOC algorithm. LCU (Logic Control Unit) takes the three PWM signals generated by eMIOS and creates the six PWM outputs required by the inverter. For each motor phase, it generates the complementary high-side and low-side control signals with dead-time insertion used to drive the corresponding inverter leg. TRGMUX provides the internal routing between peripherals. It connects the three PWM outputs from eMIOS to the LCU inputs and also routes the synchronization signal between eMIOS and BCTU. This routing keeps the actuation path and the measurement path aligned. LPSPI is used as the communication layer between the S32K396 controller and the MC33937 gate driver. Through this interface, the application can configure and exchange diagnostic information with the gate-driver device, complementing the direct PWM actuation path. FlexCAN provides the CAN communication controller used by the Motor Control System. It enables reception of command messages from the South Zone Controller and transmission of monitoring and diagnostic data back to the vehicle network. In this mapping, the fast motor-control path is formed by eMIOS, TRGMUX, BCTU, SARADC, and LCU, while LPSPI supports gate-driver interaction and FlexCAN supports vehicle-level communication. This separation helps keep the time-critical control loop independent from slower configuration, diagnostics, and network tasks.   Figure 6-1. Peripherals Mapping Overview   PIT (Periodic Interrupt Timer) peripheral is used for slower periodic activity, such as CAN diagnostics transmission every 0.1 seconds. CAN receive interrupts are used for incoming command messages from the South Zone Controller. 8 Data Flow The data flow starts at the vehicle network and at the analog feedback interface. CAN provides the high-level operating commands, while the inverter sensing path provides the real-time electrical feedback required by the FOC loops. When a CAN command is received, the enable and speed references are decoded and stored as application-level command variables. These signals are then consumed by the motor-control logic during the next control execution. In parallel, synchronized ADC conversions provide the latest phase-current and DC bus voltage values. The control algorithm reconstructs the motor currents, estimates rotor position and speed, transforms the feedback into the rotating reference frame, and computes the required voltage commands. The voltage commands are converted into PWM duty cycles and applied to the inverter actuation path. The resulting gate-drive signals control the external power stage, which drives the PMSM phases. At a slower rate, selected internal variables are packed into CAN monitoring frames. These values allow the South Zone Controller and Central Node to observe the Motor Control System state without interfering with the fast control-loop execution. 9 Conclusion This article described the architectural overview of the Dual-Motor EV Control System application. It presented the main Simulink model structure, the system inputs and outputs, the vehicle-level CAN communication path, the peripheral mapping, and the data flow between command reception, sensing, control, actuation, and monitoring. The architecture is built around two independent FOC control paths running on the S32K396 in a single-core configuration. Each motor channel receives synchronized analog feedback, executes its control algorithm every 100 microseconds, and generates the PWM outputs required by its inverter stage. By combining Model-Based design with target-specific peripheral integration, the application provides a scalable foundation for validating dual-motor traction behavior in simulation and on real hardware. The next article can build on this architecture by focusing on Model-in-the-Loop development and controller validation before deployment. 10 References Developing a Dual-Motor EV Control System with Model-Based Design Toolbox Software & Hardware Enablement for the Dual-Motor EV Control System Sensorless FOC with Motor Control Blockset Extended EMF Observer – Motor Control Blockset NXP Model-Based Design Toolbox for S32K3 NXP S32K396 microcontroller documentation AN14481: MCSPTR2AK396 3-phase PMSM Motor Control Kit with S32K396 Application Note

Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. The compilation logs are attached below. Please advise on how to resolve this issue. DEBUG: Executing python function extend_recipe_sysroot NOTE: Direct dependencies are ['/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/quilt/quilt-native_0.67.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/bison/bison_3.8.2.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/dwarfsrcfiles/dwarfsrcfiles.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/patch/patch_2.7.6.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/pkgconfig/pkgconfig_git.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/pseudo/pseudo_git.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/rpm/rpm_4.19.1.1.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/rsync/rsync_3.2.7.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/unifdef/unifdef_2.12.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-extended/xz/xz_5.4.7.bb:do_populate_sysroot'] NOTE: Installed into sysroot: ['cmake-native', 'openssl-native', 'expat-native', 'ncurses-native', 'readline-native', 'util-linux-libuuid-native', 'dwarfsrcfiles-native', 'elfutils-native', 'file-native', 'libedit-native', 'lua-native', 'make-native', 'perl-native', 'python3-native', 'rpm-native', 'bzip2-native', 'libarchive-native', 'libidn2-native', 'libnsl2-native', 'libtirpc-native', 'lzlib-native', 'zstd-native', 'curl-native', 'gdbm-native', 'gmp-native', 'gnutls-native', 'libtasn1-native', 'libcap-native', 'libffi-native', 'libgcrypt-native', 'libgpg-error-native', 'libmicrohttpd-native', 'libunistring-native', 'nettle-native'] NOTE: Skipping as already exists in sysroot: ['gettext-minimal-native', 'libtool-native', 'm4-native', 'quilt-native', 'texinfo-dummy-native', 'zlib-native', 'bison-native', 'flex-native', 'gnu-config-native', 'patch-native', 'pkgconfig-native', 'pseudo-native', 'rsync-native', 'unifdef-native', 'xz-native', 'acl-native', 'attr-native', 'popt-native', 'sqlite3-native'] DEBUG: sed -e 's:^[^/]*/:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/recipe-sysroot-native/:g' /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/openssl-native/fixmepath /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/ncurses-native/fixmepath /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/elfutils-native/fixmepath /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/lua-native/fixmepath /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/perl-native/fixmepath /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/python3-native/fixmepath /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/rpm-native/fixmepath /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/curl-native/fixmepath /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/gmp-native/fixmepath /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/libgcrypt-native/fixmepath /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/libgpg-error-native/fixmepath | xargs sed -i -e 's:FIXMESTAGINGDIRTARGET:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/recipe-sysroot:g; s:FIXMESTAGINGDIRHOST:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/recipe-sysroot-native:g' -e 's:FIXME_PSEUDO_SYSROOT:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/pseudo-native:g' -e 's:FIXME_HOSTTOOLS_DIR:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/hosttools:g' -e 's:FIXME_PKGDATA_DIR:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/pkgdata/s32g399avmcu2.1asc:g' -e 's:FIXME_PSEUDO_LOCALSTATEDIR:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/pseudo/:g' -e 's:FIXME_LOGFIFO:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/temp/fifo.4087696:g' DEBUG: Python function extend_recipe_sysroot finished DEBUG: Executing python function sstate_task_prefunc DEBUG: Python function sstate_task_prefunc finished DEBUG: Executing python function do_package DEBUG: Executing python function package_setup_pkgv DEBUG: Python function package_setup_pkgv finished DEBUG: Executing python function package_convert_pr_autoinc DEBUG: Python function package_convert_pr_autoinc finished DEBUG: Executing python function package_prepare_pkgdata NOTE: Installed into pkgdata-sysroot: [] DEBUG: Python function package_prepare_pkgdata finished DEBUG: Executing python function perform_packagecopy ERROR: Error executing a python function in exec_func_python() autogenerated: The stack trace of python calls that resulted in this exception/failure was: File: 'exec_func_python() autogenerated', lineno: 2, function: 0001: *** 0002:perform_packagecopy(d) 0003: File: '/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/classes-global/package.bbclass', lineno: 363, function: perform_packagecopy 0359: rpath_replace (dvar, d) 0360:} 0361:perform_packagecopy[cleandirs] = "${PKGD}" 0362:perform_packagecopy[dirs] = "${PKGD}" *** 0363: 0364:python populate_packages () { 0365: oe.package.populate_packages(d) 0366:} 0367:populate_packages[dirs] = "${D}" File: '/usr/lib/python3.10/subprocess.py', lineno: 421, function: check_output 0417: else: 0418: empty = b'' 0419: kwargs['input'] = empty 0420: *** 0421: return run(*popenargs, stdout=PIPE, timeout=timeout, check=True, 0422: **kwargs).stdout 0423: 0424: 0425:class CompletedProcess(object): File: '/usr/lib/python3.10/subprocess.py', lineno: 526, function: run 0522: # We don't call process.wait() as .__exit__ does that for us. 0523: raise 0524: retcode = process.poll() 0525: if check and retcode: *** 0526: raise CalledProcessError(retcode, process.args, 0527: output=stdout, stderr=stderr) 0528: return CompletedProcess(process.args, retcode, stdout, stderr) 0529: 0530: Exception: subprocess.CalledProcessError: Command 'tar --exclude=./sysroot-only -cf - -C /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/image -p -S . | tar -xf - -C /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/package' returned non-zero exit status 2. Subprocess output: got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. tar: ./usr/include: Cannot mkdir: Bad address got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. tar: ./usr/include: Cannot mkdir: Bad address tar: ./usr/include/misc: Cannot mkdir: No such file or directory got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. tar: ./usr/include: Cannot mkdir: Bad address tar: ./usr/include/misc/ocxl.h: Cannot open: No such file or directory got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. tar: ./usr/include: Cannot mkdir: Bad address tar: ./usr/include/misc/pvpanic.h: Cannot open: No such file or directory got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. tar: ./usr/include: Cannot mkdir: Bad address tar: ./usr/include/misc/xilinx_sdfec.h: Cannot open: No such file or directory got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. tar: ./usr/include: Cannot mkdir: Bad address tar: ./usr/include/misc/cxl.h: Cannot open: No such file or directory got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. tar: ./usr/include: Cannot mkdir: Bad address tar: ./usr/include/misc/fastrpc.h: Cannot open: No such file or directory got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. tar: ./usr/include: Cannot mkdir: Bad address tar: ./usr/include/misc/uacce: Cannot mkdir: No such file or directory got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. tar: ./usr/include: Cannot mkdir: Bad address tar: ./usr/include/misc/uacce/uacce.h: Cannot open: No such file or directory got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path include couldn't allocate absolute path for 'include'. Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Okay, thank you very much. Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Hi, @zhijie  Thanks for your reply. I have reproduced the issue, it does not related with current BSP, but from the building system changes I am looking into it and will reply you later once any progress made? BR Chenyin Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Thanks， @zhijie  Could you also help to share the result of uname -a? BR Chenyin Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Hello, @zhijie  Thanks for your post. May I know the details of your building environment? It is the first time you built the BSP46? or previously it is correct? BR Chenyin Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Hi  @zhijie  I am also facing the same issue, if you ressolved it kindly let us know. ERROR: zlib-1.3.1-r0 do_package: Error executing a python function in exec_func_python() autogenerated: The stack trace of python calls that resulted in this exception/failure was: File: 'exec_func_python() autogenerated', lineno: 2, function: 0001: *** 0002:perform_packagecopy(d) 0003: File: '/home/smurugan8/LWT/sources/poky/meta/classes-global/package.bbclass', lineno: 363, function: perform_packagecopy 0359: rpath_replace (dvar, d) 0360:} 0361:perform_packagecopy[cleandirs] = "${PKGD}" 0362:perform_packagecopy[dirs] = "${PKGD}" *** 0363: 0364:python populate_packages () { 0365: oe.package.populate_packages(d) 0366:} 0367:populate_packages[dirs] = "${D}" File: '/usr/lib/python3.12/subprocess.py', lineno: 466, function: check_output 0462: else: 0463: empty = b'' 0464: kwargs['input'] = empty 0465: *** 0466: return run(*popenargs, stdout=PIPE, timeout=timeout, check=True, 0467: **kwargs).stdout 0468: 0469: 0470:class CompletedProcess(object): File: '/usr/lib/python3.12/subprocess.py', lineno: 571, function: run 0567: # We don't call process.wait() as .__exit__ does that for us. 0568: raise 0569: retcode = process.poll() 0570: if check and retcode: *** 0571: raise CalledProcessError(retcode, process.args, 0572: output=stdout, stderr=stderr) 0573: return CompletedProcess(process.args, retcode, stdout, stderr) 0574: 0575: Exception: subprocess.CalledProcessError: Command 'tar --exclude=./sysroot-only -cf - -C /home/smurugan8/LWT/build/tmp/work/armv8a-poky-linux/zlib/1.3.1/image -p -S . | tar -xf - -C /home/smurugan8/LWT/build/tmp/work/armv8a-poky-linux/zlib/1.3.1/package' returned non-zero exit status 2. Subprocess output: got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path lib couldn't allocate absolute path for 'lib'. tar: ./usr/lib: Cannot mkdir: Bad address got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path lib couldn't allocate absolute path for 'lib'. got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path lib couldn't allocate absolute path for 'lib'. tar: ./usr/lib: Cannot mkdir: Bad address tar: ./usr/lib/libz.so.1: Cannot create symlink to ‘libz.so.1.3.1’: No such file or directory Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Hello chenyin：     Is there any update on this build failure issue?     Wait for good news, much appreciated. BR Zhijie Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Hello Chenyin     The problem is resolved, Thanks! BR Zhijie Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Hello, @zhijie  Thanks for your reply By checking the logs of the building failure, it seems related with the program changes of the building machine. Would you mind trying the following way? On your ubuntu PC, use the command "sudo apt install tar=1.34+dfsg-1build3" to make a change of tar version used, the clean the BSP and rebuild it again   BR Chenyin Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. I was having the same issue and I've figured out the issue is with the tar version build 4 and the downgrading did resolve the error, but the actual issue is the tar and pseudo using openat2() instead of openat for the system call. The poky has already given the patch as far as I've seen, does the NXP has any update on it? I'm currently using LLDP 6.1.22 SDK on the LX2160ARDB_REV2 Board and the same error appears when i try to build rcw using bitbake.  If NXP has upated the pseudo_git.bb to use openat2() instead of openat() as per tar's latest build 4., it will be useful for us as we can update tar to the latest version. Attached the logs for your reference. The bug from yocto-project link is added here  https://bugzilla.yoctoproject.org/show_bug.cgi?id=16117 Regards, PVSN Subhash Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Hello, @pvsnsubhash  Thanks for your reply, after my workaround fix for the issue, I had also noticed the pseudo issue and then reported it to our internal team. The corresponding team would review the issue and arrange the schedule for the formal fix. Thanks again for your valuable inputs. BR Chenyin Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Hello, @Sanjiv_Mns  Thanks for your reply. 1. OK, I understand you are currently using i.MX instead of S32G products 2. You may have a try with the following method:  "sudo apt install tar=1.34+dfsg-1build3" and then clean/rebuild with your Yocto setup 3. If still issues, I suggest waiting for the feedback from your original link, I believe my colleague would help you to solve it based on you i.MX setup BR Chenyin Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Hi @chenyin_h  Have you found anything that could help resolve it? This issue is currently blocking our progress, We would really appreciate any update or guidance you can provide. Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. The issue is because of the tar package in linux getting upgraded to build4 from build3. Downgrade the tar package using the below steps and hold the apt upgrade for that package for now and proceed with your compilation. wget http://archive.ubuntu.com/ubuntu/pool/main/t/tar/tar_1.34+dfsg-1build3_amd64.deb sudo dpkg -i tar_1.34+dfsg-1build3_amd64.deb  sudo apt-mark hold tar After the above steps, you can proceed with your compilation and no such errors will be seen. Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Hi @chenyin_h   I am still facing the same issue. I have already raised a query on the forum, but I haven't received any response yet.Link I am attaching the log below for your reference. Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. Hello, @Sanjiv_Mns  Thanks for your reply. May I know if you met the same issue? would you mind creating a new post with your details logs, we would directly support it ASAP. BR Chenyin

BSP46とlinux-libc-headers 6.6の組み合わせでコンパイル失敗が発生します。 BSP46とlinux-libc-headers 6.6の組み合わせでコンパイル失敗が発生します。 コンパイルログを以下に添付します。この問題を解決する方法についてご教示ください。 DEBUG:python関数の実行extend_recipe_sysroot 注意:直接依存関係は ['/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/quilt/quilt-native_0.67.bb:do_populate_sysroot'、 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/bison/bison_3.8.2.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/dwarfsrcfiles/dwarfsrcfiles.bb:do_populate_sysroot','virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/patch/patch_2.7.6.bb:do_populate_sysroot','virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/pkgconfig/pkgconfig_git.bb:do_populate_sysroot','virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/pseudo/pseudo_git.bb:do_populate_sysroot','virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/rpm/rpm_4.19.1.1.bb:do_populate_sysroot','virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/rsync/rsync_3.2.7.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/unifdef/unifdef_2.12.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-extended/xz/xz_5.4.7.bb:do_populate_sysroot'] 注意:sysrootにインストールした際: ['cmake-native', 'openssl-native', 'expat-native', 'ncurses-native', 'readline-native', 'util-linux-libuuid-native', 'dwarfsrcfiles-native', 'elfutils-native', 'file-native', 'libedit-native', 'lua-native', 'make-native', 'perl-native', 'python3-native', 'rpm-native', 'bzip2-native', 'libarchive-native', 'libbnsl2-native', 'libtirpc-native', 'lzlib-native', 'zstd-native', 'curl-native', 'gdbm-native', 'gmp-native', 'gnutls-native', 'libtasn1-native', 'libcap-native', 'libffi-native', 'libgcrypt-native', 'libgpg-error-native', 'libmicrohttpd-native', 'libunistring-native', 'nettle-native'] 注意:sysrootで既に存在しているようにスキップしています: ['gettext-minimal-native', 'libtool-native', 'm4-native', 'quilt-native', 'texinfo-dummy-native', 'zlib-native', 'bison-native', 'flex-native', 'gnu-config-native', 'patch-native', 'pkgconfig-native', 'pseudo-native', 'rsync-native', 'unifdef-native', 'xz-native', 'acl-native', 'attr-native', 'popt-native', 'sqlite3-native'] DEBUG: sed -e 's:^[^/]*/:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/recipe-sysroot-native/:g'/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/openssl-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/ncurses-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/elfutils-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/lua-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/perl-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/python3-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/rpm-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/curl-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/gmp-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/libgcrypt-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/libgpg-error-native/fixmepath|XARGS sed -i -e 's:FIXMESTAGINGDIRTARGET:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/recipe-sysroot:g;s:FIXMESTAGINGDIRHOST:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/recipe-sysroot-native:g'-E 's:FIXME_PSEUDO_SYSROOT:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/pseudo-native:g'-E 's:FIXME_HOSTTOOLS_DIR:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/hosttools:g'-E 's:FIXME_PKGDATA_DIR:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/pkgdata/s32g399avmcu2.1asc:g'-E 's:FIXME_PSEUDO_LOCALSTATEDIR:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/pseudo/:g'-E 's:FIXME_LOGFIFO:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/temp/fifo.4087696:g' デバッグ: Python 関数 extend_recipe_sysroot が完了しました デバッグ: Python関数sstate_task_prefuncを実行中 デバッグ: Python関数sstate_task_prefuncが終了しました デバッグ: Python関数 do_package を実行中 デバッグ: Python関数 package_setup_pkgv を実行中 デバッグ: Python関数 package_setup_pkgv が完了しました デバッグ: Python 関数 package_convert_pr_autoinc を実行中 デバッグ: Python 関数 package_convert_pr_autoinc が完了しました デバッグ: Python関数 package_prepare_pkgdata を実行中 注: pkgdata-sysroot にインストールされました: [] デバッグ: Python関数 package_prepare_pkgdata が完了しました デバッグ: Python関数 perform_packagecopy を実行中 エラー: exec_func_python() で Python 関数を実行中にエラーが発生しました (自動生成)。 この例外/失敗を引き起こしたPython呼び出しのスタックトレースは以下の通りです: ファイル: 'exec_func_python() autogenerated', lineno: 2, function: 0001: 0002:perform_packagecopy(d) 0003: ファイル: '/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/classes-global/package.bbclass', lineno: 363, function: perform_packagecopy 0359: rpath_replace (dvar, d) 0360:} 0361:perform_packagecopy[cleandirs] = "${PKGD}" 0362:perform_packagecopy[指揮] = "${PKGD}" *** 0363: 0364:Python populate_packages () { 0365: oe.package.populate_packages(d) 0366:} 0367:populate_packages[dirs] = " ${D} " ファイル: '/usr/lib/python3.10/subprocess.py'、行番号: 421、関数: check_output 0417: それ以外の場合: 0418: 空 = b'' 0419: kwargs['input'] = 空 0420: *** 0421: return run(*popenargs, stdout=PIPE, timeout=timeout, check=True, 0422: **kwargs).stdout 0423: 0424: 0425:class CompletedProcess(object): ファイル: '/usr/lib/python3.10/subprocess.py'、行番号: 526、関数: 実行 0522: # process.wait() は呼び出しませんとして。 __exit__それは私たちのためにやってくれる。 0523: 上げる 0524: retcode = process.poll() 0525: チェックして戻りコードを取得する場合: *** 0526: raise CalledProcessError(retcode, process.args, 0527: 出力=標準出力、標準エラー=標準エラー) 0528: return CompletedProcess(process.args, retcode, stdout, stderr) 0529: 0530: 例外: subprocess.CalledProcessError: コマンド 'tar --exclude=./sysroot-only'-cf - -C /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/image-p -S 。|tar -xf - -C /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/package'ゼロ以外の終了ステータス2を返しました。 サブプロセスの出力: 不明なディレクトリ、fd 4 に対して *at() システムコールが呼び出されました fd 4 の不明なベースパス、パスインクルード 'include' の絶対パスを割り当てられませんでした。 tar: ./usr/include:Cannot mkdir: 悪いアドレス 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基線経路、経路には以下が含まれます 「インクルーク」の絶対的な経路を割り当てることができませんでした。 不明なディレクトリ、fd 4 に対して *at() システムコールが呼び出されました fd 4 の不明なベースパス、パスインクルード 'include' の絶対パスを割り当てられませんでした。 tar: ./usr/include:Cannot mkdir: 悪いアドレス TAR: ./USR/Include/MISC:Cannot mkdir:そのようなファイルやディレクトリは存在しません 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基線経路、経路には以下が含まれます 「インクルーク」の絶対的な経路を割り当てることができませんでした。 不明なディレクトリ、fd 4 に対して *at() システムコールが呼び出されました fd 4 の不明なベースパス、パスインクルード 'include' の絶対パスを割り当てられませんでした。 tar: ./usr/include:Cannot mkdir: 悪いアドレス tar: ./usr/include/misc/ocxl.h: 開けられない:そのようなファイルやディレクトリは存在しません 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基線経路、経路には以下が含まれます 「インクルーク」の絶対的な経路を割り当てることができませんでした。 不明なディレクトリ、fd 4 に対して *at() システムコールが呼び出されました fd 4 の不明なベースパス、パスインクルード 'include' の絶対パスを割り当てられませんでした。 tar: ./usr/include:Cannot mkdir: 悪いアドレス tar: ./usr/include/misc/pvpanic.h: 開けません:そのようなファイルやディレクトリはありません 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基線経路、経路には以下が含まれます 「インクルーク」の絶対的な経路を割り当てることができませんでした。 不明なディレクトリ、fd 4 に対して *at() システムコールが呼び出されました fd 4 の不明なベースパス、パスインクルード 'include' の絶対パスを割り当てられませんでした。 tar: ./usr/include:Cannot mkdir: 悪いアドレス tar: ./usr/include/misc/xilinx_sdfec.h: 開けません:そのようなファイルやディレクトリはありません 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基線経路、経路には以下が含まれます 「インクルーク」の絶対的な経路を割り当てることができませんでした。 不明なディレクトリ、fd 4 に対して *at() システムコールが呼び出されました fd 4 の不明なベースパス、パスインクルード 'include' の絶対パスを割り当てられませんでした。 tar: ./usr/include:Cannot mkdir: 悪いアドレス tar: ./usr/include/misc/cxl.h: 開けません:そのようなファイルやディレクトリはありません 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基線経路、経路には以下が含まれます 「インクルーク」の絶対的な経路を割り当てることができませんでした。 不明なディレクトリ、fd 4 に対して *at() システムコールが呼び出されました fd 4 の不明なベースパス、パスインクルード 'include' の絶対パスを割り当てられませんでした。 tar: ./usr/include:Cannot mkdir: 悪いアドレス tar: ./usr/include/misc/fastrpc.h: 開けられない:そのようなファイルやディレクトリはありません 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基線経路、経路には以下が含まれます 「インクルーク」の絶対的な経路を割り当てることができませんでした。 不明なディレクトリ、fd 4 に対して *at() システムコールが呼び出されました fd 4 の不明なベースパス、パスインクルード 'include' の絶対パスを割り当てられませんでした。 tar: ./usr/include:Cannot mkdir: 悪いアドレス TAR: ./USR/include/misc/uacce:Cannot mkdir:そのようなファイルやディレクトリは存在しません 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基線経路、経路には以下が含まれます 「インクルーク」の絶対的な経路を割り当てることができませんでした。 不明なディレクトリ、fd 4 に対して *at() システムコールが呼び出されました fd 4 の不明なベースパス、パスインクルード 'include' の絶対パスを割り当てられませんでした。 tar: ./usr/include:Cannot mkdir: 悪いアドレス tar: ./usr/include/misc/uacce/uacce.h: 開けられない:そのようなファイルやディレクトリは存在しない 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基線経路、経路には以下が含まれます 「インクルーク」の絶対的な経路を割り当てることができませんでした。 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. はい、どうもありがとうございました。 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. こんにちは、 @zhijie ご返信ありがとうございます。 問題を再現しましたが、現在のBSPとは関係なく、ビルディングシステムの変更によるものです 現在調査中です。進展があり次第、後ほどご連絡いたします。 BR チェイン Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. ありがとう、 @zhijie uname -aの結果も教えていただけますか? BR チェイン Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. こんにちは、 @zhijie 投稿ありがとうございます。 ビルディングの環境について詳しく教えていただけますか? BSP46を組み立てるのは今回が初めてですか？それとも以前にも組み立てたことがありますか？ BR チェイン Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. こんにちは@zhijie 私も同じ問題に直面しています。もし解決できた方がいらっしゃいましたら、ぜひ教えてください。 エラー: zlib-1.3.1-r0do_package: exec_func_python() で Python 関数を実行中にエラーが発生しました (自動生成) この例外/失敗を引き起こしたPython呼び出しのスタックトレースは以下の通りです: ファイル: 'exec_func_python() autogenerated', lineno: 2, function: 0001: 0002:perform_packagecopy(d) 0003: ファイル: '/home/smurugan8/LWT/sources/poky/meta/classes-global/package.bbclass', lineno: 363, function: perform_packagecopy 0359: rpath_replace (dvar, d) 0360:} 0361:perform_packagecopy[cleandirs] = "${PKGD}" 0362:perform_packagecopy[パッケージ] = "${PKGD}" *** 0363: 0364:Python populate_packages () { 0365: oe.package.populate_packages(d) 0366:} 0367:populate_packages[dirs] = " ${D} " ファイル: '/usr/lib/python3.12/subprocess.py'、行番号: 466、関数: check_output 0462: それ以外の場合: 0463: 空 = b'' 0464: kwargs['input'] = 空 0465: *** 0466: return run(*popenargs, stdout=PIPE, timeout=timeout, check=True, 0467: **kwargs).stdout 0468: 0469: 0470:class CompletedProcess(object): ファイル: '/usr/lib/python3.12/subprocess.py'、行番号: 571、関数: run 0567: # process.wait() は呼び出しませんとして。 __exit__それは私たちのためにやってくれる。 0568: 上げる 0569: retcode = process.poll() 0570: チェックして戻りコードを取得する場合: *** 0571: raise CalledProcessError(retcode, process.args, 0572: 出力=標準出力、標準エラー=標準エラー) 0573: return CompletedProcess(process.args, retcode, stdout, stderr) 0574: 0575: 例外: subprocess.CalledProcessError: コマンド 'tar --exclude=./sysroot-only'-cf - -C /home/smurugan8/LWT/build/tmp/work/armv8a-poky-linux/zlib/1.3.1/image-p -S 。|tar -xf - -C /home/smurugan8/LWT/build/tmp/work/armv8a-poky-linux/zlib/1.3.1/package'ゼロ以外の終了ステータス2を返しました。 サブプロセスの出力: 不明なディレクトリ、fd 4 に対して *at() システムコールが呼び出されました fd 4 の不明なベースパス、パス lib 'lib' の絶対パスを割り当てられませんでした。 tar: ./usr/lib:Cannot mkdir: 悪いアドレス 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基底パス、パスライブラリ 「リベラル」に絶対的な道を割り当てることができませんでした。 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基底パス、パスライブラリ 「リベラル」に絶対的な道を割り当てることができませんでした。 tar: ./usr/lib:Cannot mkdir: 悪いアドレス tar: ./usr/lib/libz.so.1:'libz.so.1.3.1'へのシンムリンクを作成できません:そのようなファイル、又はディレクトリはありません Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. こんにちは、陳音 問題は解決しました。ありがとうございました！ BR 志傑 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. こんにちは、chenyinさん： このビルド失敗問題について、何か進展はありますか？ 良い知らせをお待ちしています。大変ありがたいです。 BR 志傑 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. こんにちは、 @zhijie ご返信ありがとうございます ビルディングの故障ログを確認すると、建築機械のプログラム変更に関連しているようです。 以下の方法を試していただけますか？Ubuntu PCで、コマンド「sudo apt install tar=1.34+dfsg-1build3 」を使用して使用するtarのバージョンを変更し、BSPをクリーンアップして再度再構築してください。   BR チェイン Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 私も同じ問題に直面していましたが、問題はtarのバージョンビルド4にあることが分かり、ダウングレードすることでエラーは解決しました。しかし、実際の問題はtarとpseudoがシステムコールにopenatではなくopenat2()を使用していることです。 私が知る限り、Pokyは既にパッチをリリースしているようですが、NXPは何かアップデート情報を持っていますか？ 現在、LLDP 6.1.22を使用しています。LX2160ARDB_REV2ボード上でSDKを起動しても、bitbakeでRCWを構築しようとすると同じエラーが出ます。 もしNXPがtarの最新ビルド4のようにopenat()ではなくopenat2()を使ったpseudo_git.bbを更新していれば、tarを最新バージョンにアップデートできるので便利になるでしょう。 参考までにログファイルを添付しました。 yocto-projectのバグはここに追加されています https://bugzilla.yoctoproject.org/show_bug.cgi?id=16117 よろしくお願いいたします。 PVSN スバシュ Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. こんにちは、 @pvsnsubhash ご返信ありがとうございます。問題の回避策を講じた後、私も同様の疑似問題に気づき、社内チームに報告しました。 担当チームが問題を検討し、正式な修正のためのスケジュールを調整します。 貴重なご意見をありがとうございました。 BR チェイン Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. こんにちは@chenyin_h 私は依然として同じ問題に直面しています。フォーラムに既に質問を投稿しましたが、まだ返信がありません。リンク 参考までに、ログファイルを以下に添付いたします。 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. こんにちは、 @Sanjiv_Mns ご返信ありがとうございます。 あなたも同じ問題に遭遇しましたか？詳細記録を載せた新しい投稿を作成してもよろしいでしょうか?できるだけ早く直接サポートします。 BR チェイン Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. こんにちは@chenyin_h 解決に役立つ何か見つけましたか? この問題が現在進行を妨げています。何か進捗やアドバイスをいただけると本当にありがたいです。 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. こんにちは、 @Sanjiv_Mns ご返信ありがとうございます。 1. わかりました。現在S32G製品ではなく i.MX を使っていると理解しています 2. 以下の方法で試してみることもできます: "sudo apt install tar=1.34+dfsg-1build3"そしてYoctoのセットアップでクリーン・再構築 3. それでも問題が解決しない場合は、元のリンクからのフィードバックをお待ちください。私の同僚があなたのi.MXの設定に基づいて解決のお手伝いをしてくれると思います。 BR チェイン Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 問題は、Linuxのtarパッケージがbuild3からbuild4にアップグレードされたことです。以下の手順でtarパッケージをダウングレードし、そのパッケージのアップグレードを一旦保留してコンパイレーションを進めてください。 wget http://archive.ubuntu.com/ubuntu/pool/main/t/tar/tar_1.34+dfsg-1build3_amd64.deb sudo dpkg -i tar_1.34+dfsg-1build3_amd64.deb sudo apt-mark hold tar 上記の手順を踏み終えた後、コンパイルを進めば、そのようなエラーは一切見られません。

HSE設置 S32K311 以下の内容はすべて添付ファイルからコピーしたものです。 S32DS バージョン: S32DS.3.5_b220726_win32.x86_64(1).exe RTDバージョン: SW32K3_RTD_R21-11_3.0.0_P07_D2306_DS_updatesite.zip S32K311 サポートパッケージ バージョン: SW32K3_S32DS_3.5.6_D2309.zip SBAFバージョン: SBAF_S32K311_0_0_15_0 ビン ファイル: s32k311_Secure_Baf_0.12.0_0.15.0.6_pb230804.bin.pink HSEバージョン: HSE_FW_S32K311_0_2_40_0 バイナリファイルはs32k311_hse_fw_0.12.0_2.40.0_pb230730.bin.pinkです。 FULL_MEMを使用する セーフブートなし 現在発生している問題 プログラムはここで停止します: `while ( FALSE == HSE_CheckStatus(HSE_STATUS_INIT_OK) );`           Re: HSE INSTALL S32K311 これは補足的なprintf情報です。 DCMROF21: 0x00040000 HSE GPR3: 0x000000C0 Current_SBAF_Version-0x4039c020: 0x00000C00 LC構成ワード -0x4039C02C: 0x00000000 ライフサイクル関連情報 - 0x402AC200: 0x00000000 HSEステータス: 0x00000000 ネットで調べてみたところ、チップに付属しているSBAFは、私が現在使用しているHSEファームウェアを認識しないようです。 Re: HSE INSTALL S32K311 SBAFがHSEファームウェアをフラッシュメモリからHSE_NVMにコピーできなかったことが原因ではないかと疑っています。もしこれが原因であれば、どのように解決すればよいでしょうか？ Re: HSE INSTALL S32K311 これが私が印刷したデータです。 DCMROF21: 0x00040000 HSE GPR3: 0x000000C0 HSEステータス: 0x00000000 HSEファームウェアが起動していません（NVMが空であるか、ファームウェアが破損しています） Re: HSE INSTALL S32K311 こんにちは@iiiddd HSE_CONFIG_GPR3(0x4039C028)の価値について教えていただけますか?ビット0は、HSEファームウェアが存在するかどうかを示します。 BR、VaneB Re: HSE INSTALL S32K311 私が使用しているRTDライブラリは、UTESTを作成する際に呼び出されます。 gHsePort_FlsIf.writeApi(UTEST_BASE_ADDR,(uint8_t*)hseFwFeatureFlag,FW_FEATURE_FLAG_LEN); FLS_MAX_VIRTUAL_SECTOR 定義が使用されます。私のRTDライブラリはデフォルトで135ですが、アドレス0x1B000000ULにアクセスするには136が必要です。私が使用しているRTDライブラリはHSEと互換性がないのでしょうか？ Re: HSE INSTALL S32K311 こんにちは@iiiddd HSE_CONFIG_GPR3[0]ビットが設定されていないということは、デバイスにHSEハードウェアが存在しないことを示しています。 参考までに、以下の画像は、S32K311 デバイスに HSE FW FULL_MEM をインストールするために構成されたリンカー ファイルの例を示しています。

使用 BSP46 和 linux-libc-headers 6.6 时会出现编译失败。 使用 BSP46 和 linux-libc-headers 6.6 时会出现编译失败。 编译日志附在下方。请告知如何解决此问题。 调试：正在执行 Python 函数 extend_recipe_sysroot 注意：直接依赖项为 ['/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/quilt/quilt-native_0.67.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/bison/bison_3.8.2.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/dwarfsrcfiles/dwarfsrcfiles.bb:do_populate_sysroot','virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/patch/patch_2.7.6.bb:do_populate_sysroot','virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/pkgconfig/pkgconfig_git.bb:do_populate_sysroot','virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/参考发行版、系统开发套件。/meta/配方-devtools/pseudo/pseudo_git.bb:do_populate_sysroot','virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/rpm/rpm_4.19.1.1.bb:do_populate_sysroot','virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/rsync/rsync_3.2.7.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-devtools/unifdef/unifdef_2.12.bb:do_populate_sysroot', 'virtual:native:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/poky/meta/recipes-extended/xz/xz_5.4.7.bb:do_populate_sysroot'] 注意：已安装到系统根目录：['cmake-native', 'openssl-native', 'expat-native', 'ncurses-native', 'readline-native', 'util-linux-libuuid-native', 'dwarfsrcfiles-native', 'elfutils-native', 'file-native', 'libedit-native', 'lua-native', 'make-native', 'perl-native', 'python3-native', 'rpm-native', 'bzip2-native', 'libarchive-native', 'libidn2-native', 'libnsl2-native', 'libtirpc-native', 'lzlib-native', 'zstd-native', 'curl-native', 'gdbm-native', 'gmp-native', 'gnutls-native', 'libtasn1-native', 'libcap-native', 'libffi-native', 'libgcrypt-native', 'libgpg-error-native', 'libmicrohttpd-native', 'libunistring-native', 'nettle-native'] 注意：由于 sysroot 中已存在以下项，因此跳过：['gettext-minimal-native', 'libtool-native', 'm4-native', 'quilt-native', 'texinfo-dummy-native', 'zlib-native', 'bison-native', 'flex-native', 'gnu-config-native', 'patch-native', 'pkgconfig-native', 'pseudo-native', 'rsync-native', 'unifdef-native', 'xz-native', 'acl-native', 'attr-native', 'popt-native', 'sqlite3-native'] 调试：sed -e 's:^[^/]*/:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/配方-sysroot-native/:g'/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/openssl-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/ncurses-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/elfutils-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/lua-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/perl-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/python3-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/rpm-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/curl-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/gmp-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/libgcrypt-native/fixmepath/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/libgpg-error-native/fixmepath| xargs sed -i -e 's:FIXMESTAGINGDIRTARGET:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/配方-sysroot:g;s:FIXMESTAGINGDIRHOST:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/recipe-sysroot-native:g'-e 's:FIXME_PSEUDO_SYSROOT:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/sysroots-components/x86_64/pseudo-native:g'-e 's:FIXME_HOSTTOOLS_DIR:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/hosttools:g'-e 's:FIXME_PKGDATA_DIR:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/pkgdata/s32g399avmcu2.1asc:g'-e 's:FIXME_PSEUDO_LOCALSTATEDIR:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/pseudo/:g'-e 's:FIXME_LOGFIFO:/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/temp/fifo.4087696:g' 调试：Python 函数 extend_recipe_sysroot 已完成 调试：正在执行 Python 函数 sstate_task_prefunc 调试：Python 函数 sstate_task_prefunc 已完成 调试：正在执行 Python 函数 do_package 调试：正在执行 Python 函数 package_setup_pkgv 调试：Python 函数 package_setup_pkgv 已完成 调试：正在执行 Python 函数 package_convert_pr_autoinc 调试：Python 函数 package_convert_pr_autoinc 已完成 调试：正在执行 Python 函数 package_prepare_pkgdata 注意：已安装到 pkgdata-sysroot：[] 调试：Python 函数 package_prepare_pkgdata 已完成 调试：正在执行 Python 函数 perform_packagecopy 错误：执行 Python 函数时出错，exec_func_python() 自动生成： 导致此异常/失败的 Python 调用堆栈跟踪如下： 文件：'exec_func_python() autogenerated'，行号：2，函数： 0001： *** 0002:perform_代码包，软件包copy(d) 0003： 文件：'/home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/sources/参考发行版、系统开发套件。/meta/classes-global/代码包，软件包.bbclass'，行号：363，函数：perform_代码包，软件包copy 0359: rpath_replace (dvar, d) 0360:} 0361:perform_代码包，软件包copy[cleandirs] = "${PKGD} " 0362:perform_代码包，软件包copy[dirs] = "${PKGD} " *** 0363： 0364:python populate_代码包，软件包s() { 0365: oe.代码包，软件包.populate_代码包，软件包s(d) 0366:} 0367:populate_packages[dirs] = " ${D} " 文件：'/usr/lib/python3.10/subprocess.py'行号：421，函数：check_output 0417：否则： 0418：空 = b'' 0419: kwargs['input'] = 空 0420: *** 0421: 返回 run(*popenargs, stdout=PIPE, timeout=timeout, check=True, 0422: **kwargs).stdout 0423： 0424： 0425:class CompletedProcess(object): 文件：'/usr/lib/python3.10/subprocess.py'lineno: 526, function: run 0522: # 我们不调用 process.wait()作为。 __exit__它能帮我们做到这一点。 0523：提高 0524: retcode = process.poll() 0525：如果检查并返回代码： *** 0526: 引发 CalledProcessError(retcode, process.args, 0527: output=stdout, stderr=stderr) 0528: 返回 CompletedProcess(process.args, retcode, stdout, stderr) 0529： 0530: 异常：subprocess.CalledProcessError：命令“tar --exclude=./sysroot-only”-cf - -C /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/image-p -S 。| tar -xf - -C /home/ubuntu/develop_bsp46/sw-prj-SDV_HPC_Linux_s32g399a/build_s32g399avmcu2.1asc/tmp/work/cortexa53-crypto-fsl-linux/linux-libc-headers/6.6/package'返回非零退出状态 2。 子进程输出： 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 tar：./usr/include：无法创建目录：地址错误 获取到未知目录的 *at() 系统调用，文件描述符为 4 fd 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 tar：./usr/include：无法创建目录：地址错误 tar：./usr/include/misc：无法创建目录：没有该文件或目录 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 获取到未知目录的 *at() 系统调用，文件描述符为 4 fd 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 tar：./usr/include：无法创建目录：地址错误 tar：./usr/include/misc/ocxl.h：无法打开：没有该文件或目录 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 获取到未知目录的 *at() 系统调用，文件描述符为 4 fd 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 tar：./usr/include：无法创建目录：地址错误 tar：./usr/include/misc/pvpanic.h：无法打开：没有该文件或目录 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 tar：./usr/include：无法创建目录：地址错误 tar：./usr/include/misc/xilinx_sdfec.h：无法打开：没有该文件或目录 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 tar：./usr/include：无法创建目录：地址错误 tar：./usr/include/misc/cxl.h：无法打开：没有该文件或目录 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 tar：./usr/include：无法创建目录：地址错误 tar：./usr/include/misc/fastrpc.h：无法打开：没有该文件或目录 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 tar：./usr/include：无法创建目录：地址错误 tar：./usr/include/misc/uacce：无法创建目录：没有该文件或目录 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 tar：./usr/include：无法创建目录：地址错误 tar：./usr/include/misc/uacce/uacce.h：无法打开：没有该文件或目录 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径包含 无法为“include”分配绝对路径。 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 好的，非常感谢。 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 嗨， @zhijie 感谢您的回复。 我已经重现了这个问题，它与当前的 BSP 无关，而是由构建系统变更引起的。 我正在调查此事，一旦有任何进展，我会稍后回复您。 BR 陈银 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 谢谢， @zhijie 您能否也帮忙分享一下 uname -a 的运行结果？ BR 陈银 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 你好， @zhijie 感谢你的帖子。 请问您的建筑环境有哪些具体情况？ 这是你第一次组装BSP46吗？还是之前组装过？ BR 陈银 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 嗨@zhijie 我也遇到了同样的问题，如果您解决了，请与我们联系。 错误：zlib-1.3.1-r0do_package：执行 Python 函数时出错，exec_func_python() 自动生成： 导致此异常/失败的 Python 调用堆栈跟踪如下： 文件：'exec_func_python() autogenerated'，行号：2，函数： 0001： *** 0002:perform_packagecopy(d) 0003： 文件：'/home/smurugan8/LWT/sources/poky/meta/classes-global/package.bbclass'，行号：363，函数：perform_packagecopy 0359: rpath_replace (dvar, d) 0360:} 0361:perform_packagecopy[cleandirs] = "${PKGD} " 0362:perform_packagecopy[dirs] = "${PKGD} " *** 0363： 0364:python populate_packages() { 0365: oe.package.populate_packages(d) 0366:} 0367:populate_packages[dirs] = " ${D} " 文件：'/usr/lib/python3.12/subprocess.py'行号：466，函数：check_output 0462：否则： 0463：空 = b'' 0464: kwargs['input'] = 空 0465： *** 0466: 返回 run(*popenargs, stdout=PIPE, timeout=timeout, check=True, 0467: **kwargs).stdout 0468： 0469： 0470:class CompletedProcess(object): 文件：'/usr/lib/python3.12/subprocess.py'行号：571，功能：运行 0567: # 我们不调用 process.wait()作为。 __exit__它能帮我们做到这一点。 0568：提高 0569: retcode = process.poll() 0570：如果检查并返回代码： *** 0571: 引发 CalledProcessError(retcode, process.args, 0572: output=stdout, stderr=stderr) 0573: 返回 CompletedProcess(process.args, retcode, stdout, stderr) 0574： 0575： 异常：subprocess.CalledProcessError：命令“tar --exclude=./sysroot-only”-cf - -C /home/smurugan8/LWT/build/tmp/work/armv8a-poky-linux/zlib/1.3.1/image-p -S 。| tar -xf - -C /home/smurugan8/LWT/build/tmp/work/armv8a-poky-linux/zlib/1.3.1/package'返回非零退出状态 2。 子进程输出： 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径库 无法为“lib”分配绝对路径。 tar：./usr/lib：无法创建目录：地址错误 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径库 无法为“lib”分配绝对路径。 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径库 无法为“lib”分配绝对路径。 tar：./usr/lib：无法创建目录：地址错误 tar：./usr/lib/libz.so.1：无法创建指向“libz.so.1.3.1”的符号链接：没有这样的文件或目录 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 你好，陈音： 关于版本失败的问题，有什么最新进展吗？ 请耐心等待好消息，非常感谢。 BR 志杰 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 你好， @zhijie 谢谢你的回复 通过查看建筑物故障日志，似乎与建筑物机器的程序更改有关。 您能否尝试一下以下方法？在你的 Ubuntu 电脑上，使用命令“sudo apt install tar=1.34+dfsg-1build3 ”来更改使用的 tar 版本，然后清理 电路板支持包。 并重新构建它。   BR 陈银 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 你好，陈音 问题已解决，谢谢！ BR 志杰 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 我也遇到了同样的问题，我发现问题出在 tar 版本 build 4 上，降级确实解决了错误，但真正的问题是 tar 和 pseudo 使用了 openat2() 而不是 openat 来进行系统调用。 据我所见，poky 已经发布了补丁，NXP 方面有什么更新吗？ 我目前使用的是 LLDP 6.1.22 版本。我在 LX2160ARDB_REV2 板上使用 SDK，尝试使用 bitbake 构建 rcw 时出现同样的错误。 如果 NXP 已将 pseudo_git.bb 更新为使用 openat2() 而不是 openat()（如 tar 最新构建 4 中所述），这将对我们很有用，因为我们可以将 tar 更新到最新版本。 附件包含日志文件，供您参考。 yocto-project 链接中的错误已添加到此处 https://bugzilla.yoctoproject.org/show_bug.cgi?id=16117 此致， PVSN Subhash Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 你好， @pvsnsubhash 感谢您的回复。在我找到解决办法后，我也注意到了这个伪问题，并已将其报告给了我们的内部团队。 相关团队将审查该问题，并安排正式修复的时间。 再次感谢您提供的宝贵意见。 BR 陈银 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 你好， @Sanjiv_Mns 感谢您的回复。 1. 好的，我了解到您目前使用的是 i.MX 而不是 S32G 产品。 2. 您可以尝试以下方法： "sudo apt install tar=1.34+dfsg-1build3"然后使用您的 Yocto 设置进行清理/重建 3. 如果问题仍然存在，我建议您等待原链接的反馈，我相信我的同事会根据您的 i.MX 设置帮助您解决问题。 BR 陈银 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 问题在于 Linux 中的 tar 软件包从 build3 升级到了 build4。按照以下步骤降级 tar 软件包，暂时不要对该软件包执行 apt upgrade 命令，然后继续进行编译。 wget http://archive.ubuntu.com/ubuntu/pool/main/t/tar/tar_1.34+dfsg-1build3_amd64.deb sudo dpkg -i tar_1.34+dfsg-1build3_amd64.deb sudo apt-mark hold tar 完成以上步骤后，您可以继续进行编译，不会再出现此类错误。 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 嗨@chenyin_h 你找到什么可能有助于解决这个问题的方法了吗？ 这个问题目前阻碍了我们的进展，非常感谢您能提供任何最新信息或指导。 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 你好， @Sanjiv_Mns 感谢您的回复。 请问您是否遇到过同样的问题？请您创建一个新帖子，附上您的详细日志，我们将尽快直接提供支持。 BR 陈银 Re: Compilation failure occurs with BSP46 paired with linux-libc-headers 6.6. 嗨@chenyin_h 我仍然面临同样的问题。我已经在论坛上发帖询问了，但还没有收到任何回复。链接 附件中包含以下日志，供您参考。

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Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board Hi Everyone, I am working with the RIOP RT1189 board and have a few questions regarding software compatibility and debugging. Initially, I successfully programmed the RIOP demo application using the Secure Provisioning Tool in Serial Download Mode, and the demo is working as expected. After that, I tried to run the MIMXRT1180 EVK SDK example projects (for example, the LED Blinky example) on the RIOP RT1189 board. What I tried Modified the LED pin configuration in the RT1180 EVK LED Blinky example to match the RIOP RT1189 board. Programmed the image using the Secure Provisioning Tool in Serial Download Mode. However, the application does not run on the RIOP board. To verify the hardware, I took the working RIOP demo project, commented out most of the demo functionality, added only the LED Blinky code, and programmed it again. In this case, the LED Blinky works correctly. This makes me think there are additional board-specific configurations in the RIOP demo that are required beyond simply changing the LED GPIO pin. Questions Can the MIMXRT1180 EVK SDK example projects be used directly on the RIOP RT1189 board? If not, what board-specific modifications are required (clock configuration, memory configuration, FlexSPI, linker script, startup code, etc.) to make the SDK examples work on the RIOP board? Debugging Issue I also tried to debug the demo application using MCU-Link, but the debugger fails during flash initialization with the following error: Inspected v.2 External Flash Device on SPI using SFDP JEDEC ID MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx Image 'iMXRT1180_SFDP_FlexSPI1_A_QSPI Jun 26 2025 18:32:16' Opening flash driver MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx VECTRESET requested, but not supported on ARMv8-M CPUs. Using SOFTRESET instead. Using SOFT reset to run the flash driver Driver V.2 dynamic startup failed - driver Init provided no flash parameters Flash Driver V.2 startup failed - rc Ef(55): Dynamic flash driver startup failed to provide flash parameters. Terminate (0x0, 0x0, 0x0) status 0x40 - driver reports init failure - EXTSPIJ driver rc 20107 (0x4E8B) chip initialization failed - Ef(55): Dynamic flash driver startup failed to provide flash parameters. failed to initialize flash driver MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx Could this error indicate that the RT1180 EVK flash driver is incompatible with the external flash used on the RIOP RT1189 board, or is there an additional flash configuration that needs to be provided for debugging? Any guidance or suggestions would be greatly appreciated. Thank you!

LPC-Link2のシリアル番号の一貫性について 複数のLPC-Link2チップのシリアル番号が同一である場合、それらのシリアル番号を変更する方法を教えていただきたいです。よろしくお願いいたします。 Re: 关于lpc-link2 SN码一致 こんにちは@chenwe97 このシリアル番号は変更できません。 複数のLPC-LINK2デバイスを同時に接続する場合は、CMSIS-DAPファームウェアにアップデートすることをお勧めします。これにより、各デバッガに固有のID番号が割り当てられます。 BR アリス

RIOP RT1189ボード上でRT1180 EVK SDKの例を実行できない こんにちは、皆さん 私はRIOP RT1189ボードを使っており、ソフトウェアの互換性やデバッグについていくつか質問があります。 最初は、シリアルダウンロードモードでSecure Provisioning Toolを使ってRIPデモアプリケーションを無事にプログラムでき、デモは期待通りに動作しています。 その後、MIMXRT1180 EVK SDKの例プロジェクト(例えばLED Blinkyの例)をRIOP RT1189ボード上で実行しようとしました。 私が試したこと RT1180 EVK LED点滅サンプルにおけるLEDピン配置を、RIOP RT1189ボードに合わせて変更しました。 セキュアプロビジョニングツールをシリアルダウンロードモードで使用してイメージをプログラムしました。 ただし、このアプリケーションはRIOPボード上で動作しません。 ハードウェアを検証するために、動作確認済みのRIOPデモプロジェクトを入手し、デモ機能のほとんどをコメントアウトし、LED点滅コードのみを追加して、再度プログラムを書き込んだ。この場合、LEDブリンキーは正常に動作します。 このことから、RIOPデモには、LEDのGPIOピンを変更する以外にも、ボード固有の設定がいくつか必要になるのではないかと考えています。 質問 MIMXRT1180 EVK SDKのサンプルプロジェクトはRIOP RT1189ボード上で直接使用できますか? もしそうでなければ、RIPボード上でSDKの例を動作させるために、どんなボード固有の変更(クロック設定、メモリ設定、FlexSPI、リンカースクリプト、スタートアップコードなど)が必要ですか? デバッグの問題 また、MCU-Linkを使ってデモアプリケーションのデバッグも試みましたが、フラッシュ初期化中にデバッガが以下のエラーで失敗しました。 SPI上でSVDP JEDEX ID MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfxを使ってv.2外部フラッシュデバイスを検査しました 画像『iMXRT1180_SFDP_FlexSPI1_A_QSPI 2025年6月26日 18:32:16』 フラッシュドライバーの開MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx VECTRESETが要求されましたが、ARMv8-M CPUではサポートされていません。代わりにソフトリセットを使用してください。 フラッシュドライバを動かすためのソフトリセット ドライバV.2の動的起動失敗 - ドライバのInitがフラッシュパラメータを提供しませんでした Flash ドライバ V.2の起動失敗 - rc Ef(55): 動的フラッシュドライバの起動がフラッシュパラメータを提供できませんでした。 終了(0x0、0x0、0x0)ステータス0x40 - ドライバーがinit失敗を報告 - EXTSPIJドライバーrc 20107(0x4E8B) チップ初期化失敗 - Ef(55): 動的フラッシュドライバー起動時にフラッシュパラメータが提供されませんでした。 フラッシュドライバーの初期化に失敗MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx このエラーは、RT1180 EVKフラッシュドライバーがRIOP RT1189ボードで使用されている外部フラッシュと互換性がないことを示唆しているのでしょうか?それともデバッグのために追加のフラッシュ構成が必要でしょうか? 何かご助言やご提案があれば、大変ありがたく思います。 ご回答をお待ちしています。

关于lpc-link2 SN码一致 想请问下几块lpc-link2  SN码一致的情况下，怎么更改，谢谢。 Re: 关于lpc-link2 SN码一致 Hi @chenwei97  这个SN 码没办法修改。 如果您是为了同时连接多个LPC-LINK2，建议更新成CMSIS-DAP固件。这样每个调试器会有唯一的ID号。 BR Alice

无法在RIOP RT1189开发板上运行RT1180 EVK SDK示例 大家好， 我正在使用RIOP RT1189开发板，有一些关于软件兼容性和调试方面的问题。 最初，我使用串行下载模式下的安全配置工具成功地对 RIOP 演示应用程序进行了编程，并且演示程序运行正常。 之后，我尝试在 RIOP RT1189 板上运行 MIMXRT1180 EVK SDK 示例项目（例如 LED Blinky 示例）。 我尝试过 修改了 RT1180 EVK LED 闪烁示例中的 LED 引脚配置，使其与 RIOP RT1189 板匹配。 使用安全配置工具在串行下载模式下对映像进行编程。 但是，该应用程序无法在 RIOP 板上运行。 为了验证硬件，我使用了可运行的 RIOP 演示项目，注释掉了大部分演示功能，只添加了 LED 闪烁代码，然后重新编写了程序。在这种情况下，LED闪烁功能工作正常。 这让我觉得，RIOP 演示中除了简单地更改 LED GPIO 引脚之外，还需要其他特定于电路板的配置。 问题 MIMXRT1180 EVK SDK 示例项目可以直接在 RIOP RT1189 板上使用吗？ 如果不行，需要对电路板进行哪些特定修改（时钟配置、内存配置、FlexSPI、链接器脚本、启动代码等）才能使 SDK 示例在 RIOP 板上运行？ 调试问题 我还尝试使用 MCU-Link 调试演示应用程序，但调试器在闪存初始化期间失败，并出现以下错误： 使用 SFDP JEDEC ID MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx 检查了 SPI 接口的 v.2 外部闪存设备。 图像'iMXRT1180_SFDP_FlexSPI1_A_QSPI 2025年6月26日 18:32:16' 打开闪存驱动程序 MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx 请求 VECTRESET，但 ARMv8-M CPU 不支持此功能。改用软重置。 使用软复位来运行闪存驱动程序 驱动程序 V.2 动态启动失败 - 驱动程序初始化未提供闪存参数 Flash Driver V.2 启动失败 - rc Ef(55): 动态闪存驱动程序启动未能提供闪存参数。 终止 (0x0, 0x0, 0x0) 状态 0x40 - 驱动程序报告初始化失败 - EXTSPIJ 驱动程序返回码 20107 (0x4E8B) 芯片初始化失败 - Ef(55): 动态闪存驱动程序启动未能提供闪存参数。 初始化闪存驱动程序 MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx 失败 这个错误是否表明 RT1180 EVK 闪存驱动程序与 RIOP RT1189 板上使用的外部闪存不兼容，或者是否需要提供额外的闪存配置来进行调试？ 任何指导或建议都将不胜感激。 谢谢！

Regarding the consistency of LPC-Link2 serial numbers I would like to ask how to change the serial number of several LPC-Link2 chips if they are identical. Thank you. Re: 关于lpc-link2 SN码一致 Hi @chenwei97 This serial number cannot be modified. If you are connecting multiple LPC-LINK2 devices simultaneously, it is recommended to update to the CMSIS-DAP firmware. This will give each debugger a unique ID number. BR Alice

HSE INSTALL S32K311 下面的所有内容都是从附件中复制 S32DS版本：S32DS.3.5_b220726_win32.x86_64 (1).exe RTD版本：SW32K3_RTD_R21-11_3.0.0_P07_D2306_DS_updatesite.zip S32K311支持包版本：SW32K3_S32DS_3.5.6_D2309.zip SBAF版本：SBAF_S32K311_0_0_15_0， Bin文件：s32k311_Secure_Baf_0.12.0_0.15.0.6_pb230804.bin.pink HSE版本：HSE_FW_S32K311_0_2_40_0， bin文件为s32k311_hse_fw_0.12.0_2.40.0_pb230730.bin.pink 使用FULL_MEM 没有安全启动 当前遇到的一个问题 程序运行会一直卡在这里while ( FALSE == HSE_CheckStatus(HSE_STATUS_INIT_OK) );             Re: HSE INSTALL S32K311 这个是补充的printf信息 DCMROF21: 0x00040000 HSE GPR3: 0x000000C0 Current_SBAF_Version-0x4039c020: 0x00000C00 LC 配置字-0x4039C02C: 0x00000000 生命周期相关信息-0x402AC200: 0x00000000 HSE Status: 0x00000000 我从网上查阅资料，是不是芯片出场自带的SBAF不识别我现在使用的HSE固件？ Re: HSE INSTALL S32K311 我怀疑是SBAF没有将flash中的hse固件复制到hse_nvm中，如果是这个问题，我应该怎么解决 Re: HSE INSTALL S32K311 这个是我打印的数据 DCMROF21: 0x00040000 HSE GPR3: 0x000000C0 HSE Status: 0x00000000 HSE 固件未启动（NVM 空或固件损坏） Re: HSE INSTALL S32K311 嗨@iiiddd 请问能否提供 HSE_CONFIG_GPR3 (0x4039C028) 的值？位 0 表示 HSE 固件是否存在。 BR，VaneB Re: HSE INSTALL S32K311 我在编写 UTEST 时调用了 RTD 库。 gHsePort_FlsIf.writeApi(UTEST_BASE_ADDR,(uint8_t*)hseFwFeatureFlag,FW_FEATURE_FLAG_LEN); 将使用 FLS_MAX_VIRTUAL_SECTOR 定义。我的 RTD 库默认值为 135，但访问地址 0x1B000000UL 需要 136。我使用的RTD库与HSE不兼容吗？ Re: HSE INSTALL S32K311 嗨@iiiddd HSE_CONFIG_GPR3[0] 位未设置，这表明设备上不存在 HSE 硬件。 作为参考，下图显示了为在 S32K311 设备上安装 HSE FW FULL_MEM 而配置的链接器文件示例：

HSE INSTALL S32K311 All the content below is copied from the attachment. S32DS version: S32DS.3.5_b220726_win32.x86_64 (1).exe RTD version: SW32K3_RTD_R21-11_3.0.0_P07_D2306_DS_updatesite.zip S32K311 Support Package Version: SW32K3_S32DS_3.5.6_D2309.zip SBAF version: SBAF_S32K311_0_0_15_0 Bin file: s32k311_Secure_Baf_0.12.0_0.15.0.6_pb230804.bin.pink HSE version: HSE_FW_S32K311_0_2_40_0 The bin file is s32k311_hse_fw_0.12.0_2.40.0_pb230730.bin.pink Use FULL_MEM No safe boot A problem currently encountered The program will get stuck here: `while ( FALSE == HSE_CheckStatus(HSE_STATUS_INIT_OK) );`           Re: HSE INSTALL S32K311 This is supplementary printf information. DCMROF21: 0x00040000 HSE GPR3: 0x000000C0 Current_SBAF_Version-0x4039c020: 0x00000C00 LC configuration word -0x4039C02C: 0x00000000 Lifecycle-related information - 0x402AC200: 0x00000000 HSE Status: 0x00000000 I've looked up information online, and it seems the SBAF that comes with the chip doesn't recognize the HSE firmware I'm currently using. Re: HSE INSTALL S32K311 I suspect that SBAF failed to copy the HSE firmware from the flash memory to the HSE_NVM. If this is the problem, how should I resolve it? Re: HSE INSTALL S32K311 This is the data I printed. DCMROF21: 0x00040000 HSE GPR3: 0x000000C0 HSE Status: 0x00000000 HSE firmware not started (NVM empty or firmware corrupted) Re: HSE INSTALL S32K311 Hi @iiiddd  Could you please share the value of HSE_CONFIG_GPR3 (0x4039C028)? Bit 0 indicates whether the HSE Firmware is present. BR, VaneB Re: HSE INSTALL S32K311 The RTD library I'm using is called when writing UTEST. gHsePort_FlsIf.writeApi(UTEST_BASE_ADDR,(uint8_t*)hseFwFeatureFlag,FW_FEATURE_FLAG_LEN); The FLS_MAX_VIRTUAL_SECTOR definition will be used. My RTD library defaults to 135, but accessing the address 0x1B000000UL requires 136. Is the RTD library I'm using incompatible with HSE? Re: HSE INSTALL S32K311 Hi @iiiddd  The HSE_CONFIG_GPR3[0] bit is not set, which indicates that the HSE hardware is not present on the device. For reference, the following image shows an example of a linker file configured for the installation of the HSE FW FULL_MEM on an S32K311 device:

Training material (PPT and Video) list for S32K3 (until Jan. 2026) Hi. After you login www.nxp.com and Please switch to ENGLISH mode      Click on the link below https://www.nxp.com/design/design-center/training:TRAINING-EVENTS?collection=trainings &start=0 &max=12 &sorting=sort_date. desc &parameters=TrainingType.Topics.deviceTax.applicationTax.country.region.application.TrainingLanguage.TrainingFormat.skillLevel. durationTime.provider &language=en &query=TrainingFormat %3E%3EOnline::training_date %3E%3E2026-02-02... * &keyword=s32k &siblings=false You can get the following training topics with input the topic as You can get the following training topics with input the topic as searching keyword. S32K3 Part 1 MKT Overview (DFAE Only) Training Presentation S32K3 Part 3 Hardware and Software Tools Overview (DFAE Only) Training Presentation S32K3 Part 5 RTD Overview and Demo (DFAE Only) Training Presentation S32K3 and MCSPTE1AK344 Motor Control Kit Training Presentation S32K3 Booting and Startup Process Memory (Chinese) Training Video S32K3 Debug Based on MCAL and FreeMASTER S32K3 Debug Based-On MCAL EB Freemaster (Chinese) Training Video S32K3 Debugging Skills Training Presentation S32K3 Deep Dive and Design Tips Part 1 Training Presentation S32K3 Deep Dive and Design Tips Part 2 Training Presentation S32K3 Deep Dive and Design Tips Part 3 Training Presentation S32K3 Deep Dive and Design Tips Part 4 Training Presentation S32K3 DFAE Day 1 Training Presentation S32K3 DFAE Day 2 Training Presentation S32K3 DFAE Training HSE Security Aspects Day 2 S32K3 DFAE Training Memory Link Boot Day 2 S32K3 DFAE Training Day 1 S32K3 Documents Location On Security Safety (Chinese) Training Video S32K3 Getting Started Training Presentation S32K3 How to Request Access to Safety Documentation S32K3 HSE Security Library Enablement Training Presentation S32K3 HSE-B with Demo (Chinese) Training Video S32K3 Memory Link Boot (Chinese) Training Video S32K3 Part 2 Architecture and Technical Overview DFAE Only Training Presentation S32K3 Part 4 K1 to K3 Hardware and Software Migration Guide DFAE Only Training Presentation S32K3 Safey Design Consideration Training Presentation S32K3 Software Enablement DFAE Training Part 1 S32K3 Software Enablement DFAE Training Part 1 - Auto MCU RTD Demo Porting Techniques S32K3 Software Enablement DFAE Training Part 1 - Getting Started with S32K RTD Features S32K3 Software Enablement DFAE Training Part 1 - HAL and EL demos Show S32K3 Software Enablement DFAE Training Part 1 - How to Import RTD MCAL to IAR project S32K3 Software Enablement DFAE Training Part 1 - How to Import RTD MCAL to S32DS project S32K3 Software Enablement DFAE Training Part 1 - How to Use GHS Complier Build S32K3 RTD MCAL S32K3 Software Enablement DFAE Training Part 1 - SW Commercial Offering HAL and EL Bundle S32K3 Software Enablement DFAE Training Part 2 S32K3 Software Enablement DFAE Training Part 2 - AUTOSAR and MCAL Architecture S32K3 Software Enablement DFAE Training Part 2 - MCAL Training AE S32K3 Software Enablement DFAE Training Part 2 - MCAL Training CAN S32K3 Software Enablement DFAE Training Part 2 - MCAL Training CRC S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Crypto S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Dio S32K3 Software Enablement DFAE Training Part 2 - MCAL Training DPGA S32K3 Software Enablement DFAE Training Part 2 - MCAL Training ETH S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Fee S32K3 Software Enablement DFAE Training Part 2 - MCAL Training GDUs S32K3 Software Enablement DFAE Training Part 2 - MCAL Training I2C S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Icu S32K3 Software Enablement DFAE Training Part 2 - MCAL Training MCL S32K3 Software Enablement DFAE Training Part 2 - MCAL Training MCUs S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Mem S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Mem Acc S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Mem Eep S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Mem EXFIs S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Mem INFIs S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Multicore S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Ocu S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Port S32K3 Software Enablement DFAE Training Part 2 - MCAL Training SPI S32K3 Software Enablement DFAE Training Part 2 - MCAL Training UART S32K3 Software Enablement DFAE Training Part 3 S32K3 Software Enablement DFAE Training Part 3 - Function Safety General S32K3 Software Enablement DFAE Training Part 3 - Hands-On Creating Projects with Multiple MCAL Modules S32K3 Software Enablement DFAE Training Part 3 - Hands-On Creating Projects with Multiple MCAL Modules S32K3 Software Enablement DFAE Training Part 3 - HSE Hands-On Workshop-S32K3 HSE Security Library Enablement S32K3 Software Enablement DFAE Training Part 3 - HSE Hands-On Workshop-S32K3 HSE Security Library Enablement S32K3 Software Enablement DFAE Training Part 3 - HSE NXP Security on S32K3 S32K3 Software Enablement DFAE Training Part 3 - HSE NXP Security on S32K3 S32K3 Software Enablement DFAE Training Part 3 - Integrating Safety with S32 Safety Software Framework S32K3 Software Enablement DFAE Training Part 3 - Introduction of S32K3 HSE and Debugging Techniques S32K3 T-BOX Business Training Presentation S32K3 Zonal Aggregators, Telematics Box and Communications Protocols Training Presentation GC DFAE Training S32K SW Day 5 Training Presentation Introduction to S32K Hardware Security Engine HSE Library and Debugging Techniques Training Presentation K3 booting and startup process           Re: Training material(PPT and Video) list for S32K3 (until Jan. 2026) Enjoy these training! Cheers! Oliver Re: Training material(PPT and Video) list for S32K3 (until Jan. 2026) Where do I find this material now?

Training material(PPT and Video) list for S32K3 (until Jan. 2026) Hi,     After you login www.nxp.com and       请切换到ENGLISH模式          点击下面链接 https://www.nxp.com/design/design-center/training:TRAINING-EVENTS?collection=trainings&start=0&max=12&sorting=sort_date.desc&parameters=TrainingType.Topics.deviceTax.applicationTax.country.region.application.TrainingLanguage.TrainingFormat.skillLevel.durationTime.provider&language=en&query=TrainingFormat%3E%3EOnline::training_date%3E%3E2026-02-02..*&keyword=s32k&siblings=false    You can get the following training topics with input the topic as searching keyword.  S32K3  Part 1 MKT Overview (DFAE Only) Training Presentation S32K3  Part 3 Hardware and Software Tools Overview (DFAE Only) Training Presentation S32K3  Part 5 RTD Overview and Demo (DFAE Only) Training Presentation S32K3 and MCSPTE1AK344 Motor Control Kit Training Presentation S32K3 Booting and Startup Process Memory (Chinese) Training Video S32K3 Debug Based on MCAL and FreeMASTER S32K3 Debug Based-On MCAL EB Freemaster (Chinese) Training Video S32K3 Debugging Skills Training Presentation S32K3 Deep Dive and Design Tips Part 1 Training Presentation S32K3 Deep Dive and Design Tips Part 2 Training Presentation S32K3 Deep Dive and Design Tips Part 3 Training Presentation S32K3 Deep Dive and Design Tips Part 4 Training Presentation S32K3 DFAE Day 1 Training Presentation S32K3 DFAE Day 2 Training Presentation S32K3 DFAE Training  HSE Security Aspects Day 2 S32K3 DFAE Training  Memory Link Boot Day 2 S32K3 DFAE Training Day 1 S32K3 Documents Location On Security Safety (Chinese) Training Video S32K3 Getting Started Training Presentation S32K3 How to Request Access to Safety Documentation S32K3 HSE Security Library Enablement Training Presentation S32K3 HSE-B with Demo (Chinese) Training Video S32K3 Memory Link Boot (Chinese) Training Video S32K3 Part 2 Architecture and Technical Overview DFAE Only Training Presentation S32K3 Part 4 K1 to K3 Hardware and Software Migration Guide DFAE Only Training Presentation S32K3 Safey Design Consideration Training Presentation S32K3 Software Enablement DFAE Training Part 1 S32K3 Software Enablement DFAE Training Part 1 - Auto MCU RTD Demo Porting Techniques S32K3 Software Enablement DFAE Training Part 1 - Getting Start with S32K RTD Features S32K3 Software Enablement DFAE Training Part 1 - HAL and EL demos Show S32K3 Software Enablement DFAE Training Part 1 - How to Import RTD MCAL to IAR project S32K3 Software Enablement DFAE Training Part 1 - How to Import RTD MCAL to S32DS project S32K3 Software Enablement DFAE Training Part 1 - How to Use GHS Complier Build S32K3 RTD MCAL S32K3 Software Enablement DFAE Training Part 1 - SW Commercial Offering HAL and EL Bundle S32K3 Software Enablement DFAE Training Part 2 S32K3 Software Enablement DFAE Training Part 2 - AUTOSAR and MCAL Architecture S32K3 Software Enablement DFAE Training Part 2 - MCAL Training AE S32K3 Software Enablement DFAE Training Part 2 - MCAL Training CAN S32K3 Software Enablement DFAE Training Part 2 - MCAL Training CRC S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Crypto S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Dio S32K3 Software Enablement DFAE Training Part 2 - MCAL Training DPGA S32K3 Software Enablement DFAE Training Part 2 - MCAL Training ETH S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Fee S32K3 Software Enablement DFAE Training Part 2 - MCAL Training GDU S32K3 Software Enablement DFAE Training Part 2 - MCAL Training I2C S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Icu S32K3 Software Enablement DFAE Training Part 2 - MCAL Training MCL S32K3 Software Enablement DFAE Training Part 2 - MCAL Training MCU S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Mem S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Mem Acc S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Mem Eep S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Mem EXFIs S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Mem INFIs S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Multicore S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Ocu S32K3 Software Enablement DFAE Training Part 2 - MCAL Training Port S32K3 Software Enablement DFAE Training Part 2 - MCAL Training SPI S32K3 Software Enablement DFAE Training Part 2 - MCAL Training UART S32K3 Software Enablement DFAE Training Part 3 S32K3 Software Enablement DFAE Training Part 3 - Function Safety General S32K3 Software Enablement DFAE Training Part 3 - Hands-On Creating Projects with Multiple MCAL Modules S32K3 Software Enablement DFAE Training Part 3 - Hands-On Creating Projects with Multiple MCAL Modules S32K3 Software Enablement DFAE Training Part 3 - HSE Hands-On Workshop-S32K3 HSE Security Library Enablement S32K3 Software Enablement DFAE Training Part 3 - HSE Hands-On Workshop-S32K3 HSE Security Library Enablement S32K3 Software Enablement DFAE Training Part 3 - HSE NXP Security on S32K3 S32K3 Software Enablement DFAE Training Part 3 - HSE NXP Security on S32K3 S32K3 Software Enablement DFAE Training Part 3 - Integrating Safety with S32 Safety Software Framework S32K3 Software Enablement DFAE Training Part 3 - Introduction of S32K3 HSE and Debugging Techniques S32K3 T-BOX Business Training Presentation S32K3 Zonal Aggregators, Telematics Box and Communications Protocols Training Presentation GC DFAE Training S32K SW Day 5 Training Presentation Introduction to S32K Hardware Security Engine HSE Library and Debugging Techniques Training Presentation K3 booting and startup process           Re: Training material(PPT and Video) list for S32K3 (until Jan. 2026) 享受这些培训！ 干杯 奥利弗 Re: Training material(PPT and Video) list for S32K3 (until Jan. 2026) 我现在在哪里可以找到这些材料？

RT1176 PWM startup failed I am using PWM + fault + QTimer to implement motor pulse control, but the PWM3 submodule 0 PWM_A channel occasionally fails to start, where after the first high level it remains constant and subsequent pulses do not appear.After the inspection, it was found that the "run" bit of the pwm was not correctly set. Even though repeated startup operations were added in the program later, this anomaly still occurred. Re: RT1176 PWM startup failed Hi @liu626, Are you using a custom board or an EVK? If you are using the EVK, did you make any rework to it? Could you share the configuration you are using for PWM3? Are you using an example as a reference? If so, which one? If you try to replicate the issue using a project with only PWM3, does the problem persist? Does this only happen with PWM3 submodule 0 PWM_A channel? Has this occurred on other PWM modules or submodules? Is there any other task or interrupt that manipulates PWM3 registers and could affect or overwrite the run bit? Best Regards, Pablo Re: RT1176 PWM startup failed hi，I used a custom circuit board. I didn't refer to any examples. This was a problem that was discovered during the official development of the project. I configured six PWM channels for pulse control. Only this channel had problems, while no such issue occurred on the other sub-modules. I checked and found that only this channel was using the PWM3 module. No other interfering factors were detected. Below is my configuration. static axis_ctrl_t g_axes[AXIS_NUM] = { { .id = AXIS_X1, .name = "X1", .pwmBase = PWM1, .pwmModule = kPWM_Module_0, .pwmChannel = kPWM_PwmA, .tmrBase = TMR3, .lowCh = kQTMR_Channel_2, .highCh = kQTMR_Channel_3, .tmrInputsrc=kQTMR_ClockCounter2InputPin, .cascadePcs = 6U, .faultNum = 0U, .hwExactSupported = true, .outTrigMask = kPWM_ValueRegisterMask_3, }, { .id = AXIS_X2, .name = "X2", .pwmBase = PWM2, .pwmModule = kPWM_Module_0, .pwmChannel = kPWM_PwmA, .tmrBase = TMR2, .lowCh = kQTMR_Channel_0, .highCh = kQTMR_Channel_1, .tmrInputsrc=kQTMR_ClockCounter0InputPin, .cascadePcs = 4U, .faultNum = 0U, .hwExactSupported = true, .outTrigMask = kPWM_ValueRegisterMask_3, }, { .id = AXIS_Y, .name = "Y", .pwmBase = PWM3, .pwmModule = kPWM_Module_0, .pwmChannel = kPWM_PwmA, .tmrBase = TMR3, .lowCh = kQTMR_Channel_0, .highCh = kQTMR_Channel_1, .tmrInputsrc=kQTMR_ClockCounter0InputPin, .cascadePcs = 4U, .faultNum = 0U, .hwExactSupported = true, .outTrigMask = kPWM_ValueRegisterMask_3, }, { .id = AXIS_Z, .name = "Z", .pwmBase = PWM4, .pwmModule = kPWM_Module_0, .pwmChannel = kPWM_PwmA, .tmrBase = TMR1, .lowCh = kQTMR_Channel_0, .highCh = kQTMR_Channel_1, .tmrInputsrc=kQTMR_ClockCounter0InputPin, .cascadePcs = 4U, .faultNum = 0U, .hwExactSupported = true, .outTrigMask = kPWM_ValueRegisterMask_3, }, { .id = AXIS_EX1, .name = "EX1", .pwmBase = PWM1, .pwmModule = kPWM_Module_1, .pwmChannel = kPWM_PwmA, .tmrBase = TMR1, .lowCh = kQTMR_Channel_2, .highCh = kQTMR_Channel_3, .tmrInputsrc=kQTMR_ClockCounter2InputPin, .cascadePcs = 6U, .faultNum = 1U, .hwExactSupported = true, .outTrigMask = kPWM_ValueRegisterMask_3, }, { .id = AXIS_EX2, .name = "EX2", .pwmBase = PWM2, .pwmModule = kPWM_Module_1, .pwmChannel = kPWM_PwmA, .tmrBase = TMR2, .lowCh = kQTMR_Channel_2, .highCh = kQTMR_Channel_3, .tmrInputsrc=kQTMR_ClockCounter2InputPin, .cascadePcs = 6U, .faultNum = 1U, .hwExactSupported = true, .outTrigMask = kPWM_ValueRegisterMask_3, }, };static void APP_Init_PWM_QTMR(void) { pwm_config_t pwmConfig; pwm_fault_param_t faultConfig; qtmr_config_t qtmrConfig; PWM_GetDefaultConfig(&pwmConfig); pwmConfig.pairOperation = kPWM_Independent; pwmConfig.reloadLogic = kPWM_ReloadImmediate; PWM_FaultDefaultConfig(&faultConfig); faultConfig.faultLevel = true; faultConfig.enableCombinationalPath = false; faultConfig.faultClearingMode = kPWM_ManualSafety; faultConfig.recoverMode = kPWM_NoRecovery; QTMR_GetDefaultConfig(&qtmrConfig); CLOCK_EnableClock(kCLOCK_Qtimer1); CLOCK_EnableClock(kCLOCK_Qtimer2); CLOCK_EnableClock(kCLOCK_Qtimer3); PWM_StopTimer(PWM1, 0x0FU); PWM_StopTimer(PWM2, 0x0FU); PWM_StopTimer(PWM3, 0x0FU); PWM_StopTimer(PWM4, 0x0FU); pwm_fault_input_filter_param_t faultFilter; faultFilter.faultFilterPeriod = 255U; faultFilter.faultFilterCount = 7U; faultFilter.faultGlitchStretch = false; /* 记录每个 PWM 实例上已配置的 fault channel，避免重复设置 */ uint16_t pwm1FaultDone = 0U, pwm2FaultDone = 0U, pwm3FaultDone = 0U, pwm4FaultDone = 0U; for (uint8_t i = 0U; i < AXIS_NUM; i++) { axis_ctrl_t *ax = &g_axes[i]; PWM_Init(ax->pwmBase, ax->pwmModule, &pwmConfig); PWM_SetupFaults(ax->pwmBase, (pwm_fault_input_t)ax->faultNum, &faultConfig); /* 故障滤波（每个 PWM 实例的每个 fault channel 只设一次） */ { uint16_t *faultDone; if (ax->pwmBase == PWM1) faultDone = &pwm1FaultDone; else if (ax->pwmBase == PWM2) faultDone = &pwm2FaultDone; else if (ax->pwmBase == PWM3) faultDone = &pwm3FaultDone; else faultDone = &pwm4FaultDone; uint16_t faultBit = (uint16_t)(1U << ax->faultNum); if ((*faultDone & faultBit) == 0U) { PWM_SetupFaultInputFilterExt(ax->pwmBase, (pwm_fault_channels_t)ax->faultNum, &faultFilter); *faultDone |= faultBit; } } /* Fault 时输出低电平 */ ax->pwmBase->SM[ax->pwmModule].OCTRL &= ~(PWM_OCTRL_PWMAFS_MASK | PWM_OCTRL_PWMBFS_MASK); APP_PWM_Unmap_Selected_Fault(ax); APP_PWM_ClearFault_Safe(ax); ax->pwmBase->SM[ax->pwmModule].INIT = 0U; ax->pwmBase->SM[ax->pwmModule].VAL0 = 0U; ax->pwmBase->SM[ax->pwmModule].VAL1 = 1U; ax->pwmBase->SM[ax->pwmModule].VAL2 = 0U; ax->pwmBase->SM[ax->pwmModule].VAL3 = 0U; ax->pwmBase->SM[ax->pwmModule].VAL4 = 0U; ax->pwmBase->SM[ax->pwmModule].VAL5 = 0U; ax->pwmBase->SM[ax->pwmModule].TCTRL = PWM_TCTRL_OUT_TRIG_EN(ax->outTrigMask); APP_PWM_Disable_Output(ax); if (ax->hwExactSupported) { qtmrConfig.primarySource = ax->tmrInputSrc; QTMR_Init(ax->tmrBase, ax->lowCh, &qtmrConfig); QTMR_Init(ax->tmrBase, ax->highCh, &qtmrConfig); ax->tmrBase->CHANNEL[ax->lowCh].CTRL = TMR_CTRL_CM(kQTMR_PriSrcRiseEdge) | TMR_CTRL_PCS(ax->tmrInputSrc); ax->tmrBase->CHANNEL[ax->highCh].CTRL = TMR_CTRL_CM(kQTMR_CascadeCount) | TMR_CTRL_PCS(ax->cascadePcs); APP_QTMR_Disable_Low_OFLAG_Output(ax); QTMR_DisableInterrupts(ax->tmrBase, ax->lowCh, 0xFFU); QTMR_DisableInterrupts(ax->tmrBase, ax->highCh, 0xFFU); QTMR_ClearStatusFlags(ax->tmrBase, ax->lowCh, 0xFFU); QTMR_ClearStatusFlags(ax->tmrBase, ax->highCh, 0xFFU); } ax->phase = kAxisIdle; ax->armed = false; ax->running = false; ax->done = true; #if HARD_PWM_STATE_GUARD_ENABLE APP_StateGuard_Reset(ax); #endif } /* 使能 QTMR 中断 */ NVIC_SetPriority(TMR1_IRQn, 2U); NVIC_SetPriority(TMR2_IRQn, 2U); NVIC_SetPriority(TMR3_IRQn, 2U); EnableIRQ(TMR1_IRQn); EnableIRQ(TMR2_IRQn); EnableIRQ(TMR3_IRQn); }static bool APP_PWM_Config_Pulse(axis_ctrl_t *axis, uint32_t highCnt400M, uint32_t lowCnt400M) { pwm_clock_prescale_t prescale; uint16_t periodTicks; uint32_t totalCnt400M = highCnt400M + lowCnt400M; if ((axis == NULL) || (totalCnt400M == 0U)) return false; if (!APP_PWM_SelectPrescaler_FromPeriodCnt400M(totalCnt400M, &prescale, &periodTicks)) return false; uint32_t highTicks32 = (uint32_t)(((uint64_t)periodTicks * (uint64_t)highCnt400M + ((uint64_t)totalCnt400M / 2ULL)) / (uint64_t)totalCnt400M); if (highTicks32 == 0U) highTicks32 = 1U; if (highTicks32 >= periodTicks) highTicks32 = (uint32_t)periodTicks - 1U; uint32_t riseTicks32 = 0U; uint32_t fallTicks32 = highTicks32; #if HARD_PWM_LOW_START_PHASE_ENABLE uint32_t lowTicks32 = (uint32_t)periodTicks - highTicks32; if (lowTicks32 >= (2U * HARD_PWM_LOW_START_PHASE_MIN_TICKS)) { uint32_t desiredLeadCnt400M = highCnt400M; uint32_t minLeadCnt400M = (uint32_t)HARD_PWM_LOW_START_PHASE_MIN_US * 400U; if (desiredLeadCnt400M < minLeadCnt400M) desiredLeadCnt400M = minLeadCnt400M; uint32_t desiredLeadTicks32 = (uint32_t)(((uint64_t)periodTicks * (uint64_t)desiredLeadCnt400M + ((uint64_t)totalCnt400M / 2ULL)) / (uint64_t)totalCnt400M); if (desiredLeadTicks32 < HARD_PWM_LOW_START_PHASE_MIN_TICKS) desiredLeadTicks32 = HARD_PWM_LOW_START_PHASE_MIN_TICKS; uint32_t maxRiseByHalfTicks32 = lowTicks32 / 2U; uint32_t postGuardTicks32 = (uint32_t)(((uint64_t)periodTicks * (uint64_t)(HARD_PWM_VAL3_POST_LOW_GUARD_US * 400U) + ((uint64_t)totalCnt400M / 2ULL)) / (uint64_t)totalCnt400M); if (postGuardTicks32 < HARD_PWM_VAL3_POST_LOW_GUARD_MIN_TICKS) postGuardTicks32 = HARD_PWM_VAL3_POST_LOW_GUARD_MIN_TICKS; uint32_t maxRiseByPostGuardTicks32 = (lowTicks32 > postGuardTicks32) ? (lowTicks32 - postGuardTicks32) : 0U; uint32_t selectedRiseTicks32; if (maxRiseByHalfTicks32 >= desiredLeadTicks32) { selectedRiseTicks32 = desiredLeadTicks32; if (selectedRiseTicks32 > maxRiseByHalfTicks32) selectedRiseTicks32 = maxRiseByHalfTicks32; } else if (maxRiseByPostGuardTicks32 >= desiredLeadTicks32) { selectedRiseTicks32 = desiredLeadTicks32; if (selectedRiseTicks32 > maxRiseByPostGuardTicks32) selectedRiseTicks32 = maxRiseByPostGuardTicks32; } else { selectedRiseTicks32 = maxRiseByPostGuardTicks32; } if (selectedRiseTicks32 >= HARD_PWM_LOW_START_PHASE_MIN_TICKS) { riseTicks32 = selectedRiseTicks32; fallTicks32 = riseTicks32 + highTicks32; } } #endif if (fallTicks32 >= (uint32_t)periodTicks) fallTicks32 = (uint32_t)periodTicks - 1U; uint16_t riseTicks = (uint16_t)riseTicks32; uint16_t fallTicks = (uint16_t)fallTicks32; PWM_SetPwmLdok(axis->pwmBase, APP_PwmModuleMask(axis), false); uint16_t ctrl = axis->pwmBase->SM[axis->pwmModule].CTRL; ctrl &= (uint16_t)(~PWM_CTRL_PRSC_MASK); ctrl |= PWM_CTRL_PRSC(prescale); axis->pwmBase->SM[axis->pwmModule].CTRL = ctrl; axis->pwmBase->SM[axis->pwmModule].INIT = 0U; axis->pwmBase->SM[axis->pwmModule].VAL0 = 0U; axis->pwmBase->SM[axis->pwmModule].VAL1 = (uint16_t)(periodTicks - 1U); if (axis->pwmChannel == kPWM_PwmA) { axis->pwmBase->SM[axis->pwmModule].VAL2 = riseTicks; axis->pwmBase->SM[axis->pwmModule].VAL3 = fallTicks; } else if (axis->pwmChannel == kPWM_PwmB) { axis->pwmBase->SM[axis->pwmModule].VAL4 = riseTicks; axis->pwmBase->SM[axis->pwmModule].VAL5 = fallTicks; } axis->pwmBase->SM[axis->pwmModule].TCTRL = PWM_TCTRL_OUT_TRIG_EN(axis->outTrigMask); PWM_SetPwmLdok(axis->pwmBase, APP_PwmModuleMask(axis), true); PWM_SetPwmLdok(axis->pwmBase, APP_PwmModuleMask(axis), true); axis->pwmConfigValid = true; axis->cachedHighCnt400M = highCnt400M; axis->cachedLowCnt400M = lowCnt400M; return true; } Re: RT1176 PWM startup failed Hi @liu626, Could you help me isolate the configuration and test whether the issue persists when only PWM3 is initialized? After reviewing the configuration, you shared and in order to try to replicate the behavior, I have the following questions: What is the definition of axis_ctrl_t? Are HARD_PWM_LOW_START_PHASE_ENABLE and HARD_PWM_STATE_GUARD_ENABLE enabled in your application? What do the following APP functions do? APP_PWM_Unmap_Selected_Fault APP_PWM_ClearFault_Safe APP_PWM_Disable_Output APP_QTMR_Disable_Low_OFLAG_Output APP_StateGuard_Reset APP_PWM_SelectPrescaler_FromPeriodCnt400M APP_PwmModuleMask Best Regards, Pablo Re: RT1176 PWM startup failed Thank you for your reply. The GPIO pin I'm using is GPIO_EMC_B1_29 of the rt1176."axis_ctrl_t" is the definition related to the motor shaft. * PWM output pulse -> Trigger XBAR signal -> Falling edge of pulse drives the external clock input of QTMR -> * QTMR 32-bit cascaded counter decrements by 1 -> When it reaches 0, triggers QTMR comparison interrupt -> Interrupt internally turns off PWM * At the same time, QTMR triggers the hardware Fault, directly pulling down the physical output pin of PWM. .id = AXIS_Y, .name = "Y", /* Used for serial port logging or breakpoint debugging to identify the Y-axis */ /* ================= PWM Output Resource Allocation ================= */ .pwmBase = PWM3, /* The Y-axis uses the FlexPWM3 module */ .pwmModule = kPWM_Module_0, /* Uses the sub-module 0 of PWM3 (each PWM has 4 sub-modules from 0 to 3) */ .pwmChannel = kPWM_PwmA, /* Uses the output pin of phase A of sub-module 0, corresponding to the physical pin GPIO_EMC_B1_29 */ /* ================= 32-bit QTMR cascaded count resource allocation ================= */ .tmrBase = TMR3, /* The Y-axis uses the QTMR3 peripheral (corresponding to IRQ interrupt number TMR3_IRQn) */ .lowCh = kQTMR_Channel_0, /* 16-bit low counter: uses channel 0 of TMR3 */ .highCh = kQTMR_Channel_1,/* 16-bit high counter: uses channel 1 of TMR3 */ /* 👉 .lowCh and .highCh are paired, and in the hardware level, they are automatically combined into a 32-bit counter */ /* ================= Configuration of Hardware Cascaded Clock Sources (Core Critical) ================= */ .tmrInputsrc=kQTMR_ClockCounter0InputPin, /* The clock source for Channel 0: Set to "External Pin Input 0". In the XBAR configuration, the falling edge of the pulse from PWM3 is connected to the input pin of Channel 0 of TMR3 through the XBAR. Therefore, every time a pulse is output by PWM, Channel 0 (16-bit) will perform a decrement operation once. */ .cascadePcs = 4U, /* Configuration of the clock source (PCS) for the high 16-bit channel (Channel 1). In the QTMR register of i.MX RT, the PCS value corresponds as follows: 0-3 = External pin input; 4 = Overflow/Termination event of Channel 0; 5 = Overflow/Termination event of Channel 1; 6 = Overflow/Termination event of Channel 2; 7 = Overflow/Termination event of Channel 3. Here, it is configured as 4U, meaning: Let "Channel 1 of TMR3" monitor the "Overflow event of Channel 0 of TMR3". HARD_PWM_LOW_START_PHASE_ENABLE and HARD_PWM_STATE_GUARD_ENABLE have been enabled. APP_PWM_Unmap_Selected_Fault Function: Remove the Fault pin mapping corresponding to the current axis. Call the underlying PWM_SetupFaultDisableMap function to disable the Fault. The purpose is: When the hardware Fault is not needed, prevent accidental external interference from causing the PWM to be turned off, facilitating the underlying debugging process. APP_PWM_ClearFault (original code function) Function: Clear the Fault status flag (axis->pwmBase->FSTS) of the PWM module. After triggering a hardware Fault, you must first clear this flag before the PWM can be allowed to restart. APP_PWM_Disable_Output Function: Immediately stop the PWM timer, force the pin to output a low level (PWM_SetPwmForceOutputToZero), and enable the output. Its purpose is to ensure that the pin does not output a high level due to being left floating or in the default state before the motor starts, which could cause the motor to move erratically. APP_QTMR_Disable_Low_OFLAG_Output Function: Disable the OFLAG (status flag) output of QTMR and force the OFLAG to be at a low level. In conjunction with the XBAR hardware, its role is to cut off the path from the QTMR output to the PWM Fault pin, preventing accidental triggering of Fault before startup. APP_StateGuard_Reset Function: Clears the counters and flags of the state guard (watchdog). This function is used to reset these protection variables before stopping or restarting the system if it encounters a long period of no pulse change or a deadlock when HARD_PWM_STATE_GUARD_ENABLE is enabled. APP_PWM_SelectPrescaler_FromPeriodCnt400M Function: This is a very core underlying frequency calculation function. It receives the total 400MHz count value of High + Low, and calculates how many prescalers (PRSC) and PWM periods (PERIOD) should be set in order to fit into the 16-bit PWM register. Please note: If the calculated period exceeds 65535 and the division coefficient is out of range, this function will return false, causing the motor to fail to start. APP_PwmModuleMask Function: Convert the index number of the PWM sub-module (for example, kPWM_Module_0 with the value 0) into a bit mask shifted left by N bits. Many of NXP's PWM registers (such as OUTEN, MCTRL) are controlled bit by bit. This function is responsible for generating the correct binary mask. Re: RT1176 PWM startup failed I have found the cause. It is because the internal load of the PIT interrupt in the cm4 core is too heavy, which has affected the PWM operation of the cm7 core. After I reduced the load of the PIT interrupt, the failure of PWM startup disappeared.

使用 MCUXpresso IDE 配置 RT1170 的外部闪存 我目前使用的是搭载 MIMXRT1176CVM8B 的定制电路板。同时，还使用了外置闪光灯，部件号为：W25Q01NW。 但我无法将 MCUXpresso IDE 中的代码烧录到这个新闪存中。（错误截图已附上） 我还修改了evkbmimxrt1170_flexspi_nor_config.c文件。 修改的参数是： .sflashA1Size = 128u * 1024u * 1024u, // 已更改：因为新的闪存大小为 128MB。 还有其他配置参数需要更改吗？ 提前致谢 Re: Configuring external flash using MCUXpresso IDE for RT1170 能否帮忙分享一下电路图以便我审核，因为这是一个 1.8V 的设备？同时，闪存和SoC之间的SPI时钟频率如何？ Re: Configuring external flash using MCUXpresso IDE for RT1170 你好@brundasathish ， 请问您是否正在使用MIMXRT1160/1170 硬件开发指南表 11“ROM 引导加载程序外设引脚复用”中提到的推荐的 FlexSPI NOR QSPI 引脚？我强烈建议您仔细阅读这份文件，其中提供了有关电路板布局建议和设计清单的信息，以确保一次性成功并避免电路板启动问题。 另外，能否请您使用 Secure Provisioning Tool v26.6 中的 启动内存配置 功能测试一下您的闪存配置？这是为了验证您的FCB配置。 BR 哈比卜 Re: Configuring external flash using MCUXpresso IDE for RT1170 你好@db16122 ， 电源配置为 1.8V，时钟频率为 133MHz。 Re: Configuring external flash using MCUXpresso IDE for RT1170 你好@Habib_MS ， 非常感谢您的回复。我们已经为闪存配置了 flexspi2，以下是已配置的引脚。这是 MCUXpresso IDE 引脚配置的快照。 我们尝试使用安全配置工具配置闪存。这就是我们得到的回复。 谢谢。 Re: Configuring external flash using MCUXpresso IDE for RT1170 你好@brundasathish ， 要从 FlexSPI2 次级引脚组启动，需要配置相应的 eFuse，如 RM 的表 10-1“ROM 引导加载程序外设引脚复用”中所述，如下图所示： 请注意，eFuse编程是不可逆的操作。请您确认相应的熔丝是否已充分熔断，以便使用这组辅助引脚？如果熔丝烧断正常，请您使用启动内存配置再次测试您的闪存配置。 另外请注意，此引脚配置仅支持低速读取操作，因为它不提供 DQS 信号路径。因此，在 SDR 模式下最大支持频率为 60 MHz，在 DDR 模式下最大支持频率为 30 MHz。请参考以下社区帖子，其中包含更详细的解释。 BR 哈比卜

S32DS 3.4 ライセンスの問題 NXPチームの皆様へ S32DS 3.4の再アクティベーションを試みましたが、できず、下の画像のようなメッセージが表示されました。現在、古いコンピューターでライセンスを復元することができません。この問題を解決するお手伝いをしていただけないでしょうか？よろしくお願いいたします。 Re: S32DS 3.4 License Problem こんにちは、 利用可能なライセンス数が増加しました。

KW47 extended advertising Hi, The sdk version I'm using is 26.06 . The routine is kw47loc_loc_reader_freertos . #define gAppIsPeripheral_d                   1U   It was found that the return value of calling BluetoothLEHost_StartExtAdvertising is 4(gBleFeatureNotSupported_c)  I'd like to use extended advertising. Please give me your support.   Thanks!   Re: KW47 extended advertising Hello, Hope you are doing well. What modifications have you made in the example? In order to configure Extended Advertising in an application, the first steps are to set the extended advertising parameters with Gap_SetExtAdvertisingParameters and setting the advertising data by calling Gap_SetExtAdvertisingData. For the full setup sequence and parameter details, please check this guide: Extended advertising — MCUXpresso SDK Documentation   Hope this helps! Best regards, Ana Sofia. Re: KW47 extended advertising Hi, The sdk version I'm using is 26.06. The imported routine is kw47loc_loc_reader_freertos.  Modify the macro definition of gAppIsPeripheral_d in the routine to 1, and at the same time add BleApp_Start() in the BluetoothLEHost_AppInit function;  Nothing else has been modified. It was found that the return value of calling BluetoothLEHost_StartExtAdvertising is 4(gBleFeatureNotSupported_c)    Thanks! Re: KW47 extended advertising Hi @wjw2026 , Could you please confirm if you were able to follow the steps from the Extended Advertising Guide ? There are several required steps involved in the Peripheral configuration for extended advertising, verifying those settings may be helpful in troubleshooting the behavior you're observing. Best regards, Ana Sofia.